]> git.proxmox.com Git - mirror_ubuntu-jammy-kernel.git/blame - drivers/media/dvb/dm1105/dm1105.c
Merge branch 'for-linus' of git://git390.marist.edu/pub/scm/linux-2.6
[mirror_ubuntu-jammy-kernel.git] / drivers / media / dvb / dm1105 / dm1105.c
CommitLineData
a611d0ca
IL
1/*
2 * dm1105.c - driver for DVB cards based on SDMC DM1105 PCI chip
3 *
4 * Copyright (C) 2008 Igor M. Liplianin <liplianin@me.by>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 *
20 */
21
a611d0ca
IL
22#include <linux/i2c.h>
23#include <linux/init.h>
24#include <linux/kernel.h>
25#include <linux/module.h>
26#include <linux/proc_fs.h>
27#include <linux/pci.h>
28#include <linux/dma-mapping.h>
29#include <linux/input.h>
30#include <media/ir-common.h>
31
32#include "demux.h"
33#include "dmxdev.h"
34#include "dvb_demux.h"
35#include "dvb_frontend.h"
36#include "dvb_net.h"
37#include "dvbdev.h"
38#include "dvb-pll.h"
39
40#include "stv0299.h"
e4aab64c
IL
41#include "stv0288.h"
42#include "stb6000.h"
04ad28c9 43#include "si21xx.h"
35d9c427 44#include "cx24116.h"
a611d0ca 45#include "z0194a.h"
b4a0e816 46#include "ds3000.h"
a611d0ca 47
d8300df9
IL
48#define UNSET (-1U)
49
50#define DM1105_BOARD_NOAUTO UNSET
51#define DM1105_BOARD_UNKNOWN 0
52#define DM1105_BOARD_DVBWORLD_2002 1
53#define DM1105_BOARD_DVBWORLD_2004 2
54#define DM1105_BOARD_AXESS_DM05 3
55
a611d0ca
IL
56/* ----------------------------------------------- */
57/*
58 * PCI ID's
59 */
60#ifndef PCI_VENDOR_ID_TRIGEM
61#define PCI_VENDOR_ID_TRIGEM 0x109f
62#endif
519a4bdc
IL
63#ifndef PCI_VENDOR_ID_AXESS
64#define PCI_VENDOR_ID_AXESS 0x195d
65#endif
a611d0ca
IL
66#ifndef PCI_DEVICE_ID_DM1105
67#define PCI_DEVICE_ID_DM1105 0x036f
68#endif
69#ifndef PCI_DEVICE_ID_DW2002
70#define PCI_DEVICE_ID_DW2002 0x2002
71#endif
72#ifndef PCI_DEVICE_ID_DW2004
73#define PCI_DEVICE_ID_DW2004 0x2004
74#endif
519a4bdc
IL
75#ifndef PCI_DEVICE_ID_DM05
76#define PCI_DEVICE_ID_DM05 0x1105
77#endif
a611d0ca
IL
78/* ----------------------------------------------- */
79/* sdmc dm1105 registers */
80
81/* TS Control */
82#define DM1105_TSCTR 0x00
83#define DM1105_DTALENTH 0x04
84
85/* GPIO Interface */
86#define DM1105_GPIOVAL 0x08
87#define DM1105_GPIOCTR 0x0c
88
89/* PID serial number */
90#define DM1105_PIDN 0x10
91
92/* Odd-even secret key select */
93#define DM1105_CWSEL 0x14
94
95/* Host Command Interface */
96#define DM1105_HOST_CTR 0x18
97#define DM1105_HOST_AD 0x1c
98
99/* PCI Interface */
100#define DM1105_CR 0x30
101#define DM1105_RST 0x34
102#define DM1105_STADR 0x38
103#define DM1105_RLEN 0x3c
104#define DM1105_WRP 0x40
105#define DM1105_INTCNT 0x44
106#define DM1105_INTMAK 0x48
107#define DM1105_INTSTS 0x4c
108
109/* CW Value */
110#define DM1105_ODD 0x50
111#define DM1105_EVEN 0x58
112
113/* PID Value */
114#define DM1105_PID 0x60
115
116/* IR Control */
117#define DM1105_IRCTR 0x64
118#define DM1105_IRMODE 0x68
119#define DM1105_SYSTEMCODE 0x6c
120#define DM1105_IRCODE 0x70
121
122/* Unknown Values */
123#define DM1105_ENCRYPT 0x74
124#define DM1105_VER 0x7c
125
126/* I2C Interface */
127#define DM1105_I2CCTR 0x80
128#define DM1105_I2CSTS 0x81
129#define DM1105_I2CDAT 0x82
130#define DM1105_I2C_RA 0x83
131/* ----------------------------------------------- */
132/* Interrupt Mask Bits */
133
134#define INTMAK_TSIRQM 0x01
135#define INTMAK_HIRQM 0x04
136#define INTMAK_IRM 0x08
137#define INTMAK_ALLMASK (INTMAK_TSIRQM | \
138 INTMAK_HIRQM | \
139 INTMAK_IRM)
140#define INTMAK_NONEMASK 0x00
141
142/* Interrupt Status Bits */
143#define INTSTS_TSIRQ 0x01
144#define INTSTS_HIRQ 0x04
145#define INTSTS_IR 0x08
146
147/* IR Control Bits */
148#define DM1105_IR_EN 0x01
149#define DM1105_SYS_CHK 0x02
150#define DM1105_REP_FLG 0x08
151
152/* EEPROM addr */
153#define IIC_24C01_addr 0xa0
154/* Max board count */
155#define DM1105_MAX 0x04
156
157#define DRIVER_NAME "dm1105"
158
159#define DM1105_DMA_PACKETS 47
160#define DM1105_DMA_PACKET_LENGTH (128*4)
161#define DM1105_DMA_BYTES (128 * 4 * DM1105_DMA_PACKETS)
162
163/* GPIO's for LNB power control */
164#define DM1105_LNB_MASK 0x00000000
d8300df9 165#define DM1105_LNB_OFF 0x00020000
a611d0ca
IL
166#define DM1105_LNB_13V 0x00010100
167#define DM1105_LNB_18V 0x00000100
168
519a4bdc
IL
169/* GPIO's for LNB power control for Axess DM05 */
170#define DM05_LNB_MASK 0x00000000
d8300df9 171#define DM05_LNB_OFF 0x00020000/* actually 13v */
519a4bdc
IL
172#define DM05_LNB_13V 0x00020000
173#define DM05_LNB_18V 0x00030000
174
d8300df9
IL
175static unsigned int card[] = {[0 ... 3] = UNSET };
176module_param_array(card, int, NULL, 0444);
177MODULE_PARM_DESC(card, "card type");
178
a611d0ca
IL
179static int ir_debug;
180module_param(ir_debug, int, 0644);
181MODULE_PARM_DESC(ir_debug, "enable debugging information for IR decoding");
182
d8300df9
IL
183static unsigned int dm1105_devcount;
184
a611d0ca
IL
185DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
186
d8300df9
IL
187struct dm1105_board {
188 char *name;
189};
190
191struct dm1105_subid {
192 u16 subvendor;
193 u16 subdevice;
194 u32 card;
195};
196
197static const struct dm1105_board dm1105_boards[] = {
198 [DM1105_BOARD_UNKNOWN] = {
199 .name = "UNKNOWN/GENERIC",
200 },
201 [DM1105_BOARD_DVBWORLD_2002] = {
202 .name = "DVBWorld PCI 2002",
203 },
204 [DM1105_BOARD_DVBWORLD_2004] = {
205 .name = "DVBWorld PCI 2004",
206 },
207 [DM1105_BOARD_AXESS_DM05] = {
208 .name = "Axess/EasyTv DM05",
209 },
210};
211
212static const struct dm1105_subid dm1105_subids[] = {
213 {
214 .subvendor = 0x0000,
215 .subdevice = 0x2002,
216 .card = DM1105_BOARD_DVBWORLD_2002,
217 }, {
218 .subvendor = 0x0001,
219 .subdevice = 0x2002,
220 .card = DM1105_BOARD_DVBWORLD_2002,
221 }, {
222 .subvendor = 0x0000,
223 .subdevice = 0x2004,
224 .card = DM1105_BOARD_DVBWORLD_2004,
225 }, {
226 .subvendor = 0x0001,
227 .subdevice = 0x2004,
228 .card = DM1105_BOARD_DVBWORLD_2004,
229 }, {
230 .subvendor = 0x195d,
231 .subdevice = 0x1105,
232 .card = DM1105_BOARD_AXESS_DM05,
233 },
234};
235
236static void dm1105_card_list(struct pci_dev *pci)
237{
238 int i;
239
240 if (0 == pci->subsystem_vendor &&
241 0 == pci->subsystem_device) {
242 printk(KERN_ERR
243 "dm1105: Your board has no valid PCI Subsystem ID\n"
244 "dm1105: and thus can't be autodetected\n"
245 "dm1105: Please pass card=<n> insmod option to\n"
246 "dm1105: workaround that. Redirect complaints to\n"
247 "dm1105: the vendor of the TV card. Best regards,\n"
248 "dm1105: -- tux\n");
249 } else {
250 printk(KERN_ERR
251 "dm1105: Your board isn't known (yet) to the driver.\n"
252 "dm1105: You can try to pick one of the existing\n"
253 "dm1105: card configs via card=<n> insmod option.\n"
254 "dm1105: Updating to the latest version might help\n"
255 "dm1105: as well.\n");
256 }
257 printk(KERN_ERR "Here is a list of valid choices for the card=<n> "
258 "insmod option:\n");
259 for (i = 0; i < ARRAY_SIZE(dm1105_boards); i++)
260 printk(KERN_ERR "dm1105: card=%d -> %s\n",
261 i, dm1105_boards[i].name);
262}
263
a611d0ca
IL
264/* infrared remote control */
265struct infrared {
a611d0ca 266 struct input_dev *input_dev;
b72857dd 267 struct ir_input_state ir;
a611d0ca 268 char input_phys[32];
b72857dd 269 struct work_struct work;
a611d0ca
IL
270 u32 ir_command;
271};
272
34d2f9bf 273struct dm1105_dev {
a611d0ca
IL
274 /* pci */
275 struct pci_dev *pdev;
276 u8 __iomem *io_mem;
277
278 /* ir */
279 struct infrared ir;
280
281 /* dvb */
282 struct dmx_frontend hw_frontend;
283 struct dmx_frontend mem_frontend;
284 struct dmxdev dmxdev;
285 struct dvb_adapter dvb_adapter;
286 struct dvb_demux demux;
287 struct dvb_frontend *fe;
288 struct dvb_net dvbnet;
289 unsigned int full_ts_users;
d8300df9
IL
290 unsigned int boardnr;
291 int nr;
a611d0ca
IL
292
293 /* i2c */
294 struct i2c_adapter i2c_adap;
295
d1498ffc
IL
296 /* irq */
297 struct work_struct work;
519a4bdc
IL
298 struct workqueue_struct *wq;
299 char wqn[16];
d1498ffc 300
a611d0ca
IL
301 /* dma */
302 dma_addr_t dma_addr;
303 unsigned char *ts_buf;
304 u32 wrp;
d1498ffc 305 u32 nextwrp;
a611d0ca
IL
306 u32 buffer_size;
307 unsigned int PacketErrorCount;
308 unsigned int dmarst;
309 spinlock_t lock;
a611d0ca
IL
310};
311
34d2f9bf 312#define dm_io_mem(reg) ((unsigned long)(&dev->io_mem[reg]))
a611d0ca 313
5eb3291f
IL
314#define dm_readb(reg) inb(dm_io_mem(reg))
315#define dm_writeb(reg, value) outb((value), (dm_io_mem(reg)))
316
317#define dm_readw(reg) inw(dm_io_mem(reg))
318#define dm_writew(reg, value) outw((value), (dm_io_mem(reg)))
319
320#define dm_readl(reg) inl(dm_io_mem(reg))
321#define dm_writel(reg, value) outl((value), (dm_io_mem(reg)))
322
323#define dm_andorl(reg, mask, value) \
324 outl((inl(dm_io_mem(reg)) & ~(mask)) |\
325 ((value) & (mask)), (dm_io_mem(reg)))
326
327#define dm_setl(reg, bit) dm_andorl((reg), (bit), (bit))
328#define dm_clearl(reg, bit) dm_andorl((reg), (bit), 0)
329
a611d0ca
IL
330static int dm1105_i2c_xfer(struct i2c_adapter *i2c_adap,
331 struct i2c_msg *msgs, int num)
332{
34d2f9bf 333 struct dm1105_dev *dev ;
a611d0ca
IL
334
335 int addr, rc, i, j, k, len, byte, data;
336 u8 status;
337
34d2f9bf 338 dev = i2c_adap->algo_data;
a611d0ca 339 for (i = 0; i < num; i++) {
5eb3291f 340 dm_writeb(DM1105_I2CCTR, 0x00);
a611d0ca
IL
341 if (msgs[i].flags & I2C_M_RD) {
342 /* read bytes */
343 addr = msgs[i].addr << 1;
344 addr |= 1;
5eb3291f 345 dm_writeb(DM1105_I2CDAT, addr);
a611d0ca 346 for (byte = 0; byte < msgs[i].len; byte++)
5eb3291f 347 dm_writeb(DM1105_I2CDAT + byte + 1, 0);
a611d0ca 348
5eb3291f 349 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
a611d0ca
IL
350 for (j = 0; j < 55; j++) {
351 mdelay(10);
5eb3291f 352 status = dm_readb(DM1105_I2CSTS);
a611d0ca
IL
353 if ((status & 0xc0) == 0x40)
354 break;
355 }
356 if (j >= 55)
357 return -1;
358
359 for (byte = 0; byte < msgs[i].len; byte++) {
5eb3291f 360 rc = dm_readb(DM1105_I2CDAT + byte + 1);
a611d0ca
IL
361 if (rc < 0)
362 goto err;
363 msgs[i].buf[byte] = rc;
364 }
ed7c847a
IL
365 } else if ((msgs[i].buf[0] == 0xf7) && (msgs[i].addr == 0x55)) {
366 /* prepaired for cx24116 firmware */
367 /* Write in small blocks */
368 len = msgs[i].len - 1;
369 k = 1;
370 do {
5eb3291f
IL
371 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
372 dm_writeb(DM1105_I2CDAT + 1, 0xf7);
ed7c847a
IL
373 for (byte = 0; byte < (len > 48 ? 48 : len); byte++) {
374 data = msgs[i].buf[k + byte];
5eb3291f 375 dm_writeb(DM1105_I2CDAT + byte + 2, data);
a611d0ca 376 }
5eb3291f 377 dm_writeb(DM1105_I2CCTR, 0x82 + (len > 48 ? 48 : len));
a611d0ca
IL
378 for (j = 0; j < 25; j++) {
379 mdelay(10);
5eb3291f 380 status = dm_readb(DM1105_I2CSTS);
a611d0ca
IL
381 if ((status & 0xc0) == 0x40)
382 break;
383 }
384
385 if (j >= 25)
386 return -1;
ed7c847a
IL
387
388 k += 48;
389 len -= 48;
390 } while (len > 0);
391 } else {
392 /* write bytes */
5eb3291f 393 dm_writeb(DM1105_I2CDAT, msgs[i].addr << 1);
ed7c847a
IL
394 for (byte = 0; byte < msgs[i].len; byte++) {
395 data = msgs[i].buf[byte];
5eb3291f 396 dm_writeb(DM1105_I2CDAT + byte + 1, data);
ed7c847a 397 }
5eb3291f 398 dm_writeb(DM1105_I2CCTR, 0x81 + msgs[i].len);
ed7c847a
IL
399 for (j = 0; j < 25; j++) {
400 mdelay(10);
5eb3291f 401 status = dm_readb(DM1105_I2CSTS);
ed7c847a
IL
402 if ((status & 0xc0) == 0x40)
403 break;
a611d0ca 404 }
ed7c847a
IL
405
406 if (j >= 25)
407 return -1;
a611d0ca
IL
408 }
409 }
410 return num;
411 err:
412 return rc;
413}
414
415static u32 functionality(struct i2c_adapter *adap)
416{
417 return I2C_FUNC_I2C;
418}
419
420static struct i2c_algorithm dm1105_algo = {
421 .master_xfer = dm1105_i2c_xfer,
422 .functionality = functionality,
423};
424
34d2f9bf 425static inline struct dm1105_dev *feed_to_dm1105_dev(struct dvb_demux_feed *feed)
a611d0ca 426{
34d2f9bf 427 return container_of(feed->demux, struct dm1105_dev, demux);
a611d0ca
IL
428}
429
34d2f9bf 430static inline struct dm1105_dev *frontend_to_dm1105_dev(struct dvb_frontend *fe)
a611d0ca 431{
34d2f9bf 432 return container_of(fe->dvb, struct dm1105_dev, dvb_adapter);
a611d0ca
IL
433}
434
34d2f9bf 435static int dm1105_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
a611d0ca 436{
34d2f9bf 437 struct dm1105_dev *dev = frontend_to_dm1105_dev(fe);
d8300df9 438 u32 lnb_mask, lnb_13v, lnb_18v, lnb_off;
a611d0ca 439
34d2f9bf 440 switch (dev->boardnr) {
d8300df9 441 case DM1105_BOARD_AXESS_DM05:
519a4bdc 442 lnb_mask = DM05_LNB_MASK;
d8300df9 443 lnb_off = DM05_LNB_OFF;
519a4bdc
IL
444 lnb_13v = DM05_LNB_13V;
445 lnb_18v = DM05_LNB_18V;
446 break;
d8300df9
IL
447 case DM1105_BOARD_DVBWORLD_2002:
448 case DM1105_BOARD_DVBWORLD_2004:
519a4bdc
IL
449 default:
450 lnb_mask = DM1105_LNB_MASK;
d8300df9 451 lnb_off = DM1105_LNB_OFF;
519a4bdc
IL
452 lnb_13v = DM1105_LNB_13V;
453 lnb_18v = DM1105_LNB_18V;
454 }
455
5eb3291f 456 dm_writel(DM1105_GPIOCTR, lnb_mask);
519a4bdc 457 if (voltage == SEC_VOLTAGE_18)
5eb3291f 458 dm_writel(DM1105_GPIOVAL, lnb_18v);
d8300df9 459 else if (voltage == SEC_VOLTAGE_13)
5eb3291f 460 dm_writel(DM1105_GPIOVAL, lnb_13v);
d8300df9 461 else
5eb3291f 462 dm_writel(DM1105_GPIOVAL, lnb_off);
a611d0ca
IL
463
464 return 0;
465}
466
34d2f9bf 467static void dm1105_set_dma_addr(struct dm1105_dev *dev)
a611d0ca 468{
5eb3291f 469 dm_writel(DM1105_STADR, cpu_to_le32(dev->dma_addr));
a611d0ca
IL
470}
471
34d2f9bf 472static int __devinit dm1105_dma_map(struct dm1105_dev *dev)
a611d0ca 473{
34d2f9bf
IL
474 dev->ts_buf = pci_alloc_consistent(dev->pdev,
475 6 * DM1105_DMA_BYTES,
476 &dev->dma_addr);
a611d0ca 477
34d2f9bf 478 return !dev->ts_buf;
a611d0ca
IL
479}
480
34d2f9bf 481static void dm1105_dma_unmap(struct dm1105_dev *dev)
a611d0ca 482{
34d2f9bf
IL
483 pci_free_consistent(dev->pdev,
484 6 * DM1105_DMA_BYTES,
485 dev->ts_buf,
486 dev->dma_addr);
a611d0ca
IL
487}
488
34d2f9bf 489static void dm1105_enable_irqs(struct dm1105_dev *dev)
a611d0ca 490{
5eb3291f
IL
491 dm_writeb(DM1105_INTMAK, INTMAK_ALLMASK);
492 dm_writeb(DM1105_CR, 1);
a611d0ca
IL
493}
494
34d2f9bf 495static void dm1105_disable_irqs(struct dm1105_dev *dev)
a611d0ca 496{
5eb3291f
IL
497 dm_writeb(DM1105_INTMAK, INTMAK_IRM);
498 dm_writeb(DM1105_CR, 0);
a611d0ca
IL
499}
500
34d2f9bf 501static int dm1105_start_feed(struct dvb_demux_feed *f)
a611d0ca 502{
34d2f9bf 503 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 504
34d2f9bf
IL
505 if (dev->full_ts_users++ == 0)
506 dm1105_enable_irqs(dev);
a611d0ca
IL
507
508 return 0;
509}
510
34d2f9bf 511static int dm1105_stop_feed(struct dvb_demux_feed *f)
a611d0ca 512{
34d2f9bf 513 struct dm1105_dev *dev = feed_to_dm1105_dev(f);
a611d0ca 514
34d2f9bf
IL
515 if (--dev->full_ts_users == 0)
516 dm1105_disable_irqs(dev);
a611d0ca
IL
517
518 return 0;
519}
520
b72857dd
IL
521/* ir work handler */
522static void dm1105_emit_key(struct work_struct *work)
a611d0ca 523{
b72857dd 524 struct infrared *ir = container_of(work, struct infrared, work);
a611d0ca
IL
525 u32 ircom = ir->ir_command;
526 u8 data;
a611d0ca 527
d1498ffc
IL
528 if (ir_debug)
529 printk(KERN_INFO "%s: received byte 0x%04x\n", __func__, ircom);
530
a611d0ca
IL
531 data = (ircom >> 8) & 0x7f;
532
8573b74a 533 ir_input_keydown(ir->input_dev, &ir->ir, data);
b72857dd 534 ir_input_nokey(ir->input_dev, &ir->ir);
a611d0ca
IL
535}
536
d1498ffc
IL
537/* work handler */
538static void dm1105_dmx_buffer(struct work_struct *work)
539{
34d2f9bf 540 struct dm1105_dev *dev = container_of(work, struct dm1105_dev, work);
d1498ffc 541 unsigned int nbpackets;
34d2f9bf
IL
542 u32 oldwrp = dev->wrp;
543 u32 nextwrp = dev->nextwrp;
d1498ffc 544
34d2f9bf
IL
545 if (!((dev->ts_buf[oldwrp] == 0x47) &&
546 (dev->ts_buf[oldwrp + 188] == 0x47) &&
547 (dev->ts_buf[oldwrp + 188 * 2] == 0x47))) {
548 dev->PacketErrorCount++;
d1498ffc 549 /* bad packet found */
34d2f9bf
IL
550 if ((dev->PacketErrorCount >= 2) &&
551 (dev->dmarst == 0)) {
5eb3291f 552 dm_writeb(DM1105_RST, 1);
34d2f9bf
IL
553 dev->wrp = 0;
554 dev->PacketErrorCount = 0;
555 dev->dmarst = 0;
d1498ffc
IL
556 return;
557 }
558 }
559
560 if (nextwrp < oldwrp) {
34d2f9bf
IL
561 memcpy(dev->ts_buf + dev->buffer_size, dev->ts_buf, nextwrp);
562 nbpackets = ((dev->buffer_size - oldwrp) + nextwrp) / 188;
d1498ffc
IL
563 } else
564 nbpackets = (nextwrp - oldwrp) / 188;
565
34d2f9bf
IL
566 dev->wrp = nextwrp;
567 dvb_dmx_swfilter_packets(&dev->demux, &dev->ts_buf[oldwrp], nbpackets);
d1498ffc
IL
568}
569
34d2f9bf 570static irqreturn_t dm1105_irq(int irq, void *dev_id)
a611d0ca 571{
34d2f9bf 572 struct dm1105_dev *dev = dev_id;
a611d0ca
IL
573
574 /* Read-Write INSTS Ack's Interrupt for DM1105 chip 16.03.2008 */
5eb3291f
IL
575 unsigned int intsts = dm_readb(DM1105_INTSTS);
576 dm_writeb(DM1105_INTSTS, intsts);
a611d0ca
IL
577
578 switch (intsts) {
579 case INTSTS_TSIRQ:
580 case (INTSTS_TSIRQ | INTSTS_IR):
5eb3291f 581 dev->nextwrp = dm_readl(DM1105_WRP) - dm_readl(DM1105_STADR);
34d2f9bf 582 queue_work(dev->wq, &dev->work);
a611d0ca
IL
583 break;
584 case INTSTS_IR:
5eb3291f 585 dev->ir.ir_command = dm_readl(DM1105_IRCODE);
34d2f9bf 586 schedule_work(&dev->ir.work);
a611d0ca
IL
587 break;
588 }
a611d0ca 589
d1498ffc 590 return IRQ_HANDLED;
a611d0ca
IL
591}
592
34d2f9bf 593int __devinit dm1105_ir_init(struct dm1105_dev *dm1105)
a611d0ca
IL
594{
595 struct input_dev *input_dev;
715a2233 596 struct ir_scancode_table *ir_codes = &ir_codes_dm1105_nec_table;
971e8298 597 u64 ir_type = IR_TYPE_OTHER;
b72857dd 598 int err = -ENOMEM;
a611d0ca
IL
599
600 input_dev = input_allocate_device();
601 if (!input_dev)
602 return -ENOMEM;
603
604 dm1105->ir.input_dev = input_dev;
605 snprintf(dm1105->ir.input_phys, sizeof(dm1105->ir.input_phys),
606 "pci-%s/ir0", pci_name(dm1105->pdev));
607
579e7d60 608 err = ir_input_init(input_dev, &dm1105->ir.ir, ir_type);
055cd556
MCC
609 if (err < 0) {
610 input_free_device(input_dev);
611 return err;
612 }
613
a611d0ca 614 input_dev->name = "DVB on-card IR receiver";
a611d0ca
IL
615 input_dev->phys = dm1105->ir.input_phys;
616 input_dev->id.bustype = BUS_PCI;
b72857dd 617 input_dev->id.version = 1;
a611d0ca
IL
618 if (dm1105->pdev->subsystem_vendor) {
619 input_dev->id.vendor = dm1105->pdev->subsystem_vendor;
620 input_dev->id.product = dm1105->pdev->subsystem_device;
621 } else {
622 input_dev->id.vendor = dm1105->pdev->vendor;
623 input_dev->id.product = dm1105->pdev->device;
624 }
b72857dd 625
a611d0ca 626 input_dev->dev.parent = &dm1105->pdev->dev;
b72857dd
IL
627
628 INIT_WORK(&dm1105->ir.work, dm1105_emit_key);
629
e93854da 630 err = ir_input_register(input_dev, ir_codes, NULL);
a611d0ca 631
579e7d60 632 return err;
a611d0ca
IL
633}
634
34d2f9bf 635void __devexit dm1105_ir_exit(struct dm1105_dev *dm1105)
a611d0ca 636{
38ef6aa8 637 ir_input_unregister(dm1105->ir.input_dev);
a611d0ca
IL
638}
639
34d2f9bf 640static int __devinit dm1105_hw_init(struct dm1105_dev *dev)
a611d0ca 641{
34d2f9bf 642 dm1105_disable_irqs(dev);
a611d0ca 643
5eb3291f 644 dm_writeb(DM1105_HOST_CTR, 0);
a611d0ca
IL
645
646 /*DATALEN 188,*/
5eb3291f 647 dm_writeb(DM1105_DTALENTH, 188);
a611d0ca 648 /*TS_STRT TS_VALP MSBFIRST TS_MODE ALPAS TSPES*/
5eb3291f 649 dm_writew(DM1105_TSCTR, 0xc10a);
a611d0ca
IL
650
651 /* map DMA and set address */
34d2f9bf
IL
652 dm1105_dma_map(dev);
653 dm1105_set_dma_addr(dev);
a611d0ca 654 /* big buffer */
5eb3291f
IL
655 dm_writel(DM1105_RLEN, 5 * DM1105_DMA_BYTES);
656 dm_writeb(DM1105_INTCNT, 47);
a611d0ca
IL
657
658 /* IR NEC mode enable */
5eb3291f
IL
659 dm_writeb(DM1105_IRCTR, (DM1105_IR_EN | DM1105_SYS_CHK));
660 dm_writeb(DM1105_IRMODE, 0);
661 dm_writew(DM1105_SYSTEMCODE, 0);
a611d0ca
IL
662
663 return 0;
664}
665
34d2f9bf 666static void dm1105_hw_exit(struct dm1105_dev *dev)
a611d0ca 667{
34d2f9bf 668 dm1105_disable_irqs(dev);
a611d0ca
IL
669
670 /* IR disable */
5eb3291f
IL
671 dm_writeb(DM1105_IRCTR, 0);
672 dm_writeb(DM1105_INTMAK, INTMAK_NONEMASK);
a611d0ca 673
34d2f9bf 674 dm1105_dma_unmap(dev);
a611d0ca 675}
e4aab64c 676
d4305c68
IL
677static struct stv0299_config sharp_z0194a_config = {
678 .demod_address = 0x68,
679 .inittab = sharp_z0194a_inittab,
680 .mclk = 88000000UL,
681 .invert = 1,
682 .skip_reinit = 0,
683 .lock_output = STV0299_LOCKOUTPUT_1,
684 .volt13_op0_op1 = STV0299_VOLT13_OP1,
685 .min_delay_ms = 100,
686 .set_symbol_rate = sharp_z0194a_set_symbol_rate,
687};
688
a611d0ca
IL
689static struct stv0288_config earda_config = {
690 .demod_address = 0x68,
691 .min_delay_ms = 100,
692};
693
694static struct si21xx_config serit_config = {
695 .demod_address = 0x68,
696 .min_delay_ms = 100,
697
698};
699
700static struct cx24116_config serit_sp2633_config = {
701 .demod_address = 0x55,
702};
a611d0ca 703
b4a0e816
IL
704static struct ds3000_config dvbworld_ds3000_config = {
705 .demod_address = 0x68,
706};
707
34d2f9bf 708static int __devinit frontend_init(struct dm1105_dev *dev)
a611d0ca
IL
709{
710 int ret;
711
34d2f9bf 712 switch (dev->boardnr) {
d8300df9 713 case DM1105_BOARD_DVBWORLD_2004:
34d2f9bf 714 dev->fe = dvb_attach(
519a4bdc 715 cx24116_attach, &serit_sp2633_config,
34d2f9bf
IL
716 &dev->i2c_adap);
717 if (dev->fe) {
718 dev->fe->ops.set_voltage = dm1105_set_voltage;
b4a0e816
IL
719 break;
720 }
721
34d2f9bf 722 dev->fe = dvb_attach(
b4a0e816 723 ds3000_attach, &dvbworld_ds3000_config,
34d2f9bf
IL
724 &dev->i2c_adap);
725 if (dev->fe)
726 dev->fe->ops.set_voltage = dm1105_set_voltage;
a611d0ca 727
519a4bdc 728 break;
d8300df9
IL
729 case DM1105_BOARD_DVBWORLD_2002:
730 case DM1105_BOARD_AXESS_DM05:
519a4bdc 731 default:
34d2f9bf 732 dev->fe = dvb_attach(
519a4bdc 733 stv0299_attach, &sharp_z0194a_config,
34d2f9bf
IL
734 &dev->i2c_adap);
735 if (dev->fe) {
736 dev->fe->ops.set_voltage = dm1105_set_voltage;
737 dvb_attach(dvb_pll_attach, dev->fe, 0x60,
738 &dev->i2c_adap, DVB_PLL_OPERA1);
519a4bdc 739 break;
a611d0ca 740 }
e4aab64c 741
34d2f9bf 742 dev->fe = dvb_attach(
519a4bdc 743 stv0288_attach, &earda_config,
34d2f9bf
IL
744 &dev->i2c_adap);
745 if (dev->fe) {
746 dev->fe->ops.set_voltage = dm1105_set_voltage;
747 dvb_attach(stb6000_attach, dev->fe, 0x61,
748 &dev->i2c_adap);
519a4bdc 749 break;
a611d0ca 750 }
e4aab64c 751
34d2f9bf 752 dev->fe = dvb_attach(
519a4bdc 753 si21xx_attach, &serit_config,
34d2f9bf
IL
754 &dev->i2c_adap);
755 if (dev->fe)
756 dev->fe->ops.set_voltage = dm1105_set_voltage;
519a4bdc 757
a611d0ca
IL
758 }
759
34d2f9bf
IL
760 if (!dev->fe) {
761 dev_err(&dev->pdev->dev, "could not attach frontend\n");
a611d0ca
IL
762 return -ENODEV;
763 }
764
34d2f9bf 765 ret = dvb_register_frontend(&dev->dvb_adapter, dev->fe);
a611d0ca 766 if (ret < 0) {
34d2f9bf
IL
767 if (dev->fe->ops.release)
768 dev->fe->ops.release(dev->fe);
769 dev->fe = NULL;
a611d0ca
IL
770 return ret;
771 }
772
773 return 0;
774}
775
34d2f9bf 776static void __devinit dm1105_read_mac(struct dm1105_dev *dev, u8 *mac)
a611d0ca
IL
777{
778 static u8 command[1] = { 0x28 };
779
780 struct i2c_msg msg[] = {
519a4bdc
IL
781 {
782 .addr = IIC_24C01_addr >> 1,
783 .flags = 0,
784 .buf = command,
785 .len = 1
786 }, {
787 .addr = IIC_24C01_addr >> 1,
788 .flags = I2C_M_RD,
789 .buf = mac,
790 .len = 6
791 },
a611d0ca
IL
792 };
793
34d2f9bf
IL
794 dm1105_i2c_xfer(&dev->i2c_adap, msg , 2);
795 dev_info(&dev->pdev->dev, "MAC %pM\n", mac);
a611d0ca
IL
796}
797
798static int __devinit dm1105_probe(struct pci_dev *pdev,
799 const struct pci_device_id *ent)
800{
34d2f9bf 801 struct dm1105_dev *dev;
a611d0ca
IL
802 struct dvb_adapter *dvb_adapter;
803 struct dvb_demux *dvbdemux;
804 struct dmx_demux *dmx;
805 int ret = -ENOMEM;
d8300df9 806 int i;
a611d0ca 807
34d2f9bf
IL
808 dev = kzalloc(sizeof(struct dm1105_dev), GFP_KERNEL);
809 if (!dev)
d1498ffc 810 return -ENOMEM;
a611d0ca 811
d8300df9 812 /* board config */
34d2f9bf
IL
813 dev->nr = dm1105_devcount;
814 dev->boardnr = UNSET;
815 if (card[dev->nr] < ARRAY_SIZE(dm1105_boards))
816 dev->boardnr = card[dev->nr];
817 for (i = 0; UNSET == dev->boardnr &&
d8300df9
IL
818 i < ARRAY_SIZE(dm1105_subids); i++)
819 if (pdev->subsystem_vendor ==
820 dm1105_subids[i].subvendor &&
821 pdev->subsystem_device ==
822 dm1105_subids[i].subdevice)
34d2f9bf 823 dev->boardnr = dm1105_subids[i].card;
d8300df9 824
34d2f9bf
IL
825 if (UNSET == dev->boardnr) {
826 dev->boardnr = DM1105_BOARD_UNKNOWN;
d8300df9
IL
827 dm1105_card_list(pdev);
828 }
829
830 dm1105_devcount++;
34d2f9bf
IL
831 dev->pdev = pdev;
832 dev->buffer_size = 5 * DM1105_DMA_BYTES;
833 dev->PacketErrorCount = 0;
834 dev->dmarst = 0;
a611d0ca
IL
835
836 ret = pci_enable_device(pdev);
837 if (ret < 0)
838 goto err_kfree;
839
284901a9 840 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
a611d0ca
IL
841 if (ret < 0)
842 goto err_pci_disable_device;
843
844 pci_set_master(pdev);
845
846 ret = pci_request_regions(pdev, DRIVER_NAME);
847 if (ret < 0)
848 goto err_pci_disable_device;
849
34d2f9bf
IL
850 dev->io_mem = pci_iomap(pdev, 0, pci_resource_len(pdev, 0));
851 if (!dev->io_mem) {
a611d0ca
IL
852 ret = -EIO;
853 goto err_pci_release_regions;
854 }
855
34d2f9bf
IL
856 spin_lock_init(&dev->lock);
857 pci_set_drvdata(pdev, dev);
a611d0ca 858
34d2f9bf 859 ret = dm1105_hw_init(dev);
a611d0ca 860 if (ret < 0)
d1498ffc 861 goto err_pci_iounmap;
a611d0ca
IL
862
863 /* i2c */
34d2f9bf
IL
864 i2c_set_adapdata(&dev->i2c_adap, dev);
865 strcpy(dev->i2c_adap.name, DRIVER_NAME);
866 dev->i2c_adap.owner = THIS_MODULE;
867 dev->i2c_adap.class = I2C_CLASS_TV_DIGITAL;
868 dev->i2c_adap.dev.parent = &pdev->dev;
869 dev->i2c_adap.algo = &dm1105_algo;
870 dev->i2c_adap.algo_data = dev;
871 ret = i2c_add_adapter(&dev->i2c_adap);
a611d0ca
IL
872
873 if (ret < 0)
34d2f9bf 874 goto err_dm1105_hw_exit;
a611d0ca
IL
875
876 /* dvb */
34d2f9bf 877 ret = dvb_register_adapter(&dev->dvb_adapter, DRIVER_NAME,
a611d0ca
IL
878 THIS_MODULE, &pdev->dev, adapter_nr);
879 if (ret < 0)
880 goto err_i2c_del_adapter;
881
34d2f9bf 882 dvb_adapter = &dev->dvb_adapter;
a611d0ca 883
34d2f9bf 884 dm1105_read_mac(dev, dvb_adapter->proposed_mac);
a611d0ca 885
34d2f9bf 886 dvbdemux = &dev->demux;
a611d0ca
IL
887 dvbdemux->filternum = 256;
888 dvbdemux->feednum = 256;
34d2f9bf
IL
889 dvbdemux->start_feed = dm1105_start_feed;
890 dvbdemux->stop_feed = dm1105_stop_feed;
a611d0ca
IL
891 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
892 DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING);
893 ret = dvb_dmx_init(dvbdemux);
894 if (ret < 0)
895 goto err_dvb_unregister_adapter;
896
897 dmx = &dvbdemux->dmx;
34d2f9bf
IL
898 dev->dmxdev.filternum = 256;
899 dev->dmxdev.demux = dmx;
900 dev->dmxdev.capabilities = 0;
a611d0ca 901
34d2f9bf 902 ret = dvb_dmxdev_init(&dev->dmxdev, dvb_adapter);
a611d0ca
IL
903 if (ret < 0)
904 goto err_dvb_dmx_release;
905
34d2f9bf 906 dev->hw_frontend.source = DMX_FRONTEND_0;
a611d0ca 907
34d2f9bf 908 ret = dmx->add_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
909 if (ret < 0)
910 goto err_dvb_dmxdev_release;
911
34d2f9bf 912 dev->mem_frontend.source = DMX_MEMORY_FE;
a611d0ca 913
34d2f9bf 914 ret = dmx->add_frontend(dmx, &dev->mem_frontend);
a611d0ca
IL
915 if (ret < 0)
916 goto err_remove_hw_frontend;
917
34d2f9bf 918 ret = dmx->connect_frontend(dmx, &dev->hw_frontend);
a611d0ca
IL
919 if (ret < 0)
920 goto err_remove_mem_frontend;
921
34d2f9bf 922 ret = frontend_init(dev);
a611d0ca
IL
923 if (ret < 0)
924 goto err_disconnect_frontend;
925
34d2f9bf
IL
926 dvb_net_init(dvb_adapter, &dev->dvbnet, dmx);
927 dm1105_ir_init(dev);
d1498ffc 928
34d2f9bf
IL
929 INIT_WORK(&dev->work, dm1105_dmx_buffer);
930 sprintf(dev->wqn, "%s/%d", dvb_adapter->name, dvb_adapter->num);
931 dev->wq = create_singlethread_workqueue(dev->wqn);
932 if (!dev->wq)
519a4bdc 933 goto err_dvb_net;
d1498ffc 934
34d2f9bf
IL
935 ret = request_irq(pdev->irq, dm1105_irq, IRQF_SHARED,
936 DRIVER_NAME, dev);
d1498ffc 937 if (ret < 0)
519a4bdc 938 goto err_workqueue;
d1498ffc
IL
939
940 return 0;
a611d0ca 941
519a4bdc 942err_workqueue:
34d2f9bf 943 destroy_workqueue(dev->wq);
519a4bdc 944err_dvb_net:
34d2f9bf 945 dvb_net_release(&dev->dvbnet);
a611d0ca
IL
946err_disconnect_frontend:
947 dmx->disconnect_frontend(dmx);
948err_remove_mem_frontend:
34d2f9bf 949 dmx->remove_frontend(dmx, &dev->mem_frontend);
a611d0ca 950err_remove_hw_frontend:
34d2f9bf 951 dmx->remove_frontend(dmx, &dev->hw_frontend);
a611d0ca 952err_dvb_dmxdev_release:
34d2f9bf 953 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
954err_dvb_dmx_release:
955 dvb_dmx_release(dvbdemux);
956err_dvb_unregister_adapter:
957 dvb_unregister_adapter(dvb_adapter);
958err_i2c_del_adapter:
34d2f9bf
IL
959 i2c_del_adapter(&dev->i2c_adap);
960err_dm1105_hw_exit:
961 dm1105_hw_exit(dev);
a611d0ca 962err_pci_iounmap:
34d2f9bf 963 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
964err_pci_release_regions:
965 pci_release_regions(pdev);
966err_pci_disable_device:
967 pci_disable_device(pdev);
968err_kfree:
969 pci_set_drvdata(pdev, NULL);
34d2f9bf 970 kfree(dev);
d1498ffc 971 return ret;
a611d0ca
IL
972}
973
974static void __devexit dm1105_remove(struct pci_dev *pdev)
975{
34d2f9bf
IL
976 struct dm1105_dev *dev = pci_get_drvdata(pdev);
977 struct dvb_adapter *dvb_adapter = &dev->dvb_adapter;
978 struct dvb_demux *dvbdemux = &dev->demux;
a611d0ca
IL
979 struct dmx_demux *dmx = &dvbdemux->dmx;
980
34d2f9bf 981 dm1105_ir_exit(dev);
a611d0ca 982 dmx->close(dmx);
34d2f9bf
IL
983 dvb_net_release(&dev->dvbnet);
984 if (dev->fe)
985 dvb_unregister_frontend(dev->fe);
a611d0ca
IL
986
987 dmx->disconnect_frontend(dmx);
34d2f9bf
IL
988 dmx->remove_frontend(dmx, &dev->mem_frontend);
989 dmx->remove_frontend(dmx, &dev->hw_frontend);
990 dvb_dmxdev_release(&dev->dmxdev);
a611d0ca
IL
991 dvb_dmx_release(dvbdemux);
992 dvb_unregister_adapter(dvb_adapter);
34d2f9bf
IL
993 if (&dev->i2c_adap)
994 i2c_del_adapter(&dev->i2c_adap);
a611d0ca 995
34d2f9bf 996 dm1105_hw_exit(dev);
a611d0ca 997 synchronize_irq(pdev->irq);
34d2f9bf
IL
998 free_irq(pdev->irq, dev);
999 pci_iounmap(pdev, dev->io_mem);
a611d0ca
IL
1000 pci_release_regions(pdev);
1001 pci_disable_device(pdev);
1002 pci_set_drvdata(pdev, NULL);
d8300df9 1003 dm1105_devcount--;
34d2f9bf 1004 kfree(dev);
a611d0ca
IL
1005}
1006
1007static struct pci_device_id dm1105_id_table[] __devinitdata = {
1008 {
1009 .vendor = PCI_VENDOR_ID_TRIGEM,
1010 .device = PCI_DEVICE_ID_DM1105,
1011 .subvendor = PCI_ANY_ID,
d8300df9 1012 .subdevice = PCI_ANY_ID,
519a4bdc
IL
1013 }, {
1014 .vendor = PCI_VENDOR_ID_AXESS,
1015 .device = PCI_DEVICE_ID_DM05,
d8300df9
IL
1016 .subvendor = PCI_ANY_ID,
1017 .subdevice = PCI_ANY_ID,
a611d0ca
IL
1018 }, {
1019 /* empty */
1020 },
1021};
1022
1023MODULE_DEVICE_TABLE(pci, dm1105_id_table);
1024
1025static struct pci_driver dm1105_driver = {
1026 .name = DRIVER_NAME,
1027 .id_table = dm1105_id_table,
1028 .probe = dm1105_probe,
1029 .remove = __devexit_p(dm1105_remove),
1030};
1031
1032static int __init dm1105_init(void)
1033{
1034 return pci_register_driver(&dm1105_driver);
1035}
1036
1037static void __exit dm1105_exit(void)
1038{
1039 pci_unregister_driver(&dm1105_driver);
1040}
1041
1042module_init(dm1105_init);
1043module_exit(dm1105_exit);
1044
1045MODULE_AUTHOR("Igor M. Liplianin <liplianin@me.by>");
1046MODULE_DESCRIPTION("SDMC DM1105 DVB driver");
1047MODULE_LICENSE("GPL");