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825b9670 1/*
c89f66f6 2 * Afatech AF9013 demodulator driver
825b9670
AP
3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
f571e004 5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
825b9670
AP
6 *
7 * Thanks to Afatech who kindly provided information.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 */
24
825b9670 25#include "af9013_priv.h"
825b9670
AP
26
27int af9013_debug;
f571e004
AP
28module_param_named(debug, af9013_debug, int, 0644);
29MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
825b9670
AP
30
31struct af9013_state {
32 struct i2c_adapter *i2c;
f571e004 33 struct dvb_frontend fe;
825b9670
AP
34 struct af9013_config config;
35
9e35cd22
AP
36 /* tuner/demod RF and IF AGC limits used for signal strength calc */
37 u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
825b9670
AP
38 u16 signal_strength;
39 u32 ber;
40 u32 ucblocks;
41 u16 snr;
f571e004
AP
42 u32 bandwidth_hz;
43 fe_status_t fe_status;
44 unsigned long set_frontend_jiffies;
45 unsigned long read_status_jiffies;
46 bool first_tune;
47 bool i2c_gate_state;
48 unsigned int statistics_step:3;
49 struct delayed_work statistics_work;
825b9670
AP
50};
51
f571e004
AP
52/* write multiple registers */
53static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
54 const u8 *val, int len)
825b9670 55{
f571e004 56 int ret;
825b9670 57 u8 buf[3+len];
f571e004
AP
58 struct i2c_msg msg[1] = {
59 {
60 .addr = priv->config.i2c_addr,
61 .flags = 0,
62 .len = sizeof(buf),
63 .buf = buf,
64 }
65 };
66
67 buf[0] = (reg >> 8) & 0xff;
68 buf[1] = (reg >> 0) & 0xff;
825b9670
AP
69 buf[2] = mbox;
70 memcpy(&buf[3], val, len);
71
f571e004
AP
72 ret = i2c_transfer(priv->i2c, msg, 1);
73 if (ret == 1) {
74 ret = 0;
75 } else {
76 warn("i2c wr failed=%d reg=%04x len=%d", ret, reg, len);
77 ret = -EREMOTEIO;
825b9670 78 }
f571e004 79 return ret;
825b9670
AP
80}
81
f571e004
AP
82/* read multiple registers */
83static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
84 u8 *val, int len)
825b9670 85{
f571e004
AP
86 int ret;
87 u8 buf[3];
88 struct i2c_msg msg[2] = {
89 {
90 .addr = priv->config.i2c_addr,
91 .flags = 0,
92 .len = 3,
93 .buf = buf,
94 }, {
95 .addr = priv->config.i2c_addr,
96 .flags = I2C_M_RD,
97 .len = len,
98 .buf = val,
99 }
100 };
101
102 buf[0] = (reg >> 8) & 0xff;
103 buf[1] = (reg >> 0) & 0xff;
104 buf[2] = mbox;
105
106 ret = i2c_transfer(priv->i2c, msg, 2);
107 if (ret == 2) {
108 ret = 0;
109 } else {
110 warn("i2c rd failed=%d reg=%04x len=%d", ret, reg, len);
111 ret = -EREMOTEIO;
112 }
113 return ret;
825b9670
AP
114}
115
f571e004
AP
116/* write multiple registers */
117static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
118 int len)
825b9670 119{
f571e004
AP
120 int ret, i;
121 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
122
123 if ((priv->config.ts_mode == AF9013_TS_USB) &
124 ((reg & 0xff00) != 0xff00) & ((reg & 0xff00) != 0xae00)) {
125 mbox |= ((len - 1) << 2);
126 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
127 } else {
128 for (i = 0; i < len; i++) {
129 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
130 if (ret)
131 goto err;
132 }
133 }
134
135err:
136 return 0;
137}
138
139/* read multiple registers */
140static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
141{
142 int ret, i;
143 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
144
145 if ((priv->config.ts_mode == AF9013_TS_USB) &
146 ((reg & 0xff00) != 0xff00) & ((reg & 0xff00) != 0xae00)) {
147 mbox |= ((len - 1) << 2);
148 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
149 } else {
150 for (i = 0; i < len; i++) {
151 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
152 if (ret)
153 goto err;
154 }
155 }
156
157err:
158 return 0;
825b9670
AP
159}
160
161/* write single register */
f571e004 162static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
825b9670 163{
f571e004 164 return af9013_wr_regs(priv, reg, &val, 1);
825b9670
AP
165}
166
167/* read single register */
f571e004 168static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
825b9670 169{
f571e004
AP
170 return af9013_rd_regs(priv, reg, val, 1);
171}
825b9670 172
f571e004
AP
173static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
174 u8 len)
175{
176 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
177 return af9013_wr_regs_i2c(state, mbox, reg, val, len);
825b9670
AP
178}
179
f571e004
AP
180static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
181 int len, u8 val)
825b9670
AP
182{
183 int ret;
184 u8 tmp, mask;
185
f571e004
AP
186 /* no need for read if whole reg is written */
187 if (len != 8) {
188 ret = af9013_rd_reg(state, reg, &tmp);
189 if (ret)
190 return ret;
825b9670 191
f571e004
AP
192 mask = (0xff >> (8 - len)) << pos;
193 val <<= pos;
194 tmp &= ~mask;
195 val |= tmp;
196 }
825b9670 197
f571e004 198 return af9013_wr_reg(state, reg, val);
825b9670
AP
199}
200
f571e004
AP
201static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
202 int len, u8 *val)
825b9670
AP
203{
204 int ret;
205 u8 tmp;
206
f571e004 207 ret = af9013_rd_reg(state, reg, &tmp);
825b9670
AP
208 if (ret)
209 return ret;
f571e004
AP
210
211 *val = (tmp >> pos);
212 *val &= (0xff >> (8 - len));
213
825b9670
AP
214 return 0;
215}
216
217static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
218{
219 int ret;
220 u8 pos;
221 u16 addr;
825b9670 222
f571e004
AP
223 dbg("%s: gpio=%d gpioval=%02x", __func__, gpio, gpioval);
224
225 /*
226 * GPIO0 & GPIO1 0xd735
227 * GPIO2 & GPIO3 0xd736
228 */
825b9670
AP
229
230 switch (gpio) {
231 case 0:
232 case 1:
233 addr = 0xd735;
234 break;
235 case 2:
236 case 3:
237 addr = 0xd736;
238 break;
239
240 default:
241 err("invalid gpio:%d\n", gpio);
242 ret = -EINVAL;
f571e004 243 goto err;
825b9670
AP
244 };
245
246 switch (gpio) {
247 case 0:
248 case 2:
249 pos = 0;
250 break;
251 case 1:
252 case 3:
253 default:
254 pos = 4;
255 break;
256 };
257
f571e004
AP
258 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
259 if (ret)
260 goto err;
825b9670 261
f571e004
AP
262 return ret;
263err:
264 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
265 return ret;
266}
267
268static u32 af913_div(u32 a, u32 b, u32 x)
269{
270 u32 r = 0, c = 0, i;
f571e004
AP
271
272 dbg("%s: a=%d b=%d x=%d", __func__, a, b, x);
825b9670
AP
273
274 if (a > b) {
275 c = a / b;
276 a = a - c * b;
277 }
278
279 for (i = 0; i < x; i++) {
280 if (a >= b) {
281 r += 1;
282 a -= b;
283 }
284 a <<= 1;
285 r <<= 1;
286 }
287 r = (c << (u32)x) + r;
288
f571e004 289 dbg("%s: a=%d b=%d x=%d r=%x", __func__, a, b, x, r);
825b9670
AP
290 return r;
291}
292
f571e004 293static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
825b9670 294{
f571e004
AP
295 int ret, i;
296 u8 tmp;
9b22edd4 297
f571e004
AP
298 dbg("%s: onoff=%d", __func__, onoff);
299
300 /* enable reset */
301 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
302 if (ret)
303 goto err;
304
305 /* start reset mechanism */
306 ret = af9013_wr_reg(state, 0xaeff, 1);
307 if (ret)
308 goto err;
309
310 /* wait reset performs */
311 for (i = 0; i < 150; i++) {
312 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
313 if (ret)
314 goto err;
315
316 if (tmp)
317 break; /* reset done */
318
319 usleep_range(5000, 25000);
825b9670
AP
320 }
321
f571e004
AP
322 if (!tmp)
323 return -ETIMEDOUT;
825b9670 324
f571e004
AP
325 if (onoff) {
326 /* clear reset */
327 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
825b9670 328 if (ret)
f571e004
AP
329 goto err;
330
331 /* disable reset */
332 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
333
334 /* power on */
335 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
336 } else {
337 /* power off */
338 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
825b9670
AP
339 }
340
f571e004
AP
341 return ret;
342err:
343 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
344 return ret;
345}
346
f571e004 347static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
825b9670 348{
f571e004 349 struct af9013_state *state = fe->demodulator_priv;
825b9670 350 int ret;
825b9670 351
f571e004 352 dbg("%s", __func__);
825b9670 353
f571e004
AP
354 /* reset and start BER counter */
355 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
356 if (ret)
357 goto err;
358
359 return ret;
360err:
361 dbg("%s: failed=%d", __func__, ret);
362 return ret;
363}
364
365static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
366{
367 struct af9013_state *state = fe->demodulator_priv;
368 int ret;
369 u8 buf[5];
370
371 dbg("%s", __func__);
372
373 /* check if error bit count is ready */
374 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
375 if (ret)
376 goto err;
377
378 if (!buf[0]) {
379 dbg("%s: not ready", __func__);
380 return 0;
381 }
382
383 ret = af9013_rd_regs(state, 0xd387, buf, 5);
384 if (ret)
385 goto err;
386
387 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
388 state->ucblocks += (buf[4] << 8) | buf[3];
389
390 return ret;
391err:
392 dbg("%s: failed=%d", __func__, ret);
393 return ret;
394}
395
396static int af9013_statistics_snr_start(struct dvb_frontend *fe)
397{
398 struct af9013_state *state = fe->demodulator_priv;
399 int ret;
400
401 dbg("%s", __func__);
402
403 /* start SNR meas */
404 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
405 if (ret)
406 goto err;
407
408 return ret;
409err:
410 dbg("%s: failed=%d", __func__, ret);
411 return ret;
412}
413
414static int af9013_statistics_snr_result(struct dvb_frontend *fe)
415{
416 struct af9013_state *state = fe->demodulator_priv;
417 int ret, i, len;
418 u8 buf[3], tmp;
419 u32 snr_val;
420 const struct af9013_snr *uninitialized_var(snr_lut);
421
422 dbg("%s", __func__);
423
424 /* check if SNR ready */
425 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
426 if (ret)
427 goto err;
428
429 if (!tmp) {
430 dbg("%s: not ready", __func__);
431 return 0;
432 }
433
434 /* read value */
435 ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
436 if (ret)
437 goto err;
438
439 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
440
441 /* read current modulation */
442 ret = af9013_rd_reg(state, 0xd3c1, &tmp);
443 if (ret)
444 goto err;
445
446 switch ((tmp >> 6) & 3) {
447 case 0:
448 len = ARRAY_SIZE(qpsk_snr_lut);
449 snr_lut = qpsk_snr_lut;
825b9670 450 break;
f571e004
AP
451 case 1:
452 len = ARRAY_SIZE(qam16_snr_lut);
453 snr_lut = qam16_snr_lut;
825b9670 454 break;
f571e004
AP
455 case 2:
456 len = ARRAY_SIZE(qam64_snr_lut);
457 snr_lut = qam64_snr_lut;
825b9670
AP
458 break;
459 default:
f571e004
AP
460 goto err;
461 break;
825b9670
AP
462 }
463
f571e004
AP
464 for (i = 0; i < len; i++) {
465 tmp = snr_lut[i].snr;
825b9670 466
f571e004
AP
467 if (snr_val < snr_lut[i].val)
468 break;
469 }
470 state->snr = tmp * 10; /* dB/10 */
825b9670 471
f571e004
AP
472 return ret;
473err:
474 dbg("%s: failed=%d", __func__, ret);
475 return ret;
476}
825b9670 477
f571e004
AP
478static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
479{
480 struct af9013_state *state = fe->demodulator_priv;
481 int ret = 0;
482 u8 buf[2], rf_gain, if_gain;
483 int signal_strength;
484
485 dbg("%s", __func__);
486
487 if (!state->signal_strength_en)
488 return 0;
489
490 ret = af9013_rd_regs(state, 0xd07c, buf, 2);
491 if (ret)
492 goto err;
493
494 rf_gain = buf[0];
495 if_gain = buf[1];
496
497 signal_strength = (0xffff / \
498 (9 * (state->rf_50 + state->if_50) - \
499 11 * (state->rf_80 + state->if_80))) * \
500 (10 * (rf_gain + if_gain) - \
501 11 * (state->rf_80 + state->if_80));
502 if (signal_strength < 0)
503 signal_strength = 0;
504 else if (signal_strength > 0xffff)
505 signal_strength = 0xffff;
506
507 state->signal_strength = signal_strength;
508
509 return ret;
510err:
511 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
512 return ret;
513}
514
f571e004 515static void af9013_statistics_work(struct work_struct *work)
825b9670
AP
516{
517 int ret;
f571e004
AP
518 struct af9013_state *state = container_of(work,
519 struct af9013_state, statistics_work.work);
520 unsigned int next_msec;
521
522 /* update only signal strength when demod is not locked */
523 if (!(state->fe_status & FE_HAS_LOCK)) {
524 state->statistics_step = 0;
525 state->ber = 0;
526 state->snr = 0;
527 }
528
529 switch (state->statistics_step) {
530 default:
531 state->statistics_step = 0;
532 case 0:
533 ret = af9013_statistics_signal_strength(&state->fe);
534 state->statistics_step++;
535 next_msec = 300;
536 break;
537 case 1:
538 ret = af9013_statistics_snr_start(&state->fe);
539 state->statistics_step++;
540 next_msec = 200;
541 break;
542 case 2:
543 ret = af9013_statistics_ber_unc_start(&state->fe);
544 state->statistics_step++;
545 next_msec = 1000;
546 break;
547 case 3:
548 ret = af9013_statistics_snr_result(&state->fe);
549 state->statistics_step++;
550 next_msec = 400;
551 break;
552 case 4:
553 ret = af9013_statistics_ber_unc_result(&state->fe);
554 state->statistics_step++;
555 next_msec = 100;
556 break;
557 }
558
559 schedule_delayed_work(&state->statistics_work,
560 msecs_to_jiffies(next_msec));
561
562 return;
563}
564
565static int af9013_get_tune_settings(struct dvb_frontend *fe,
566 struct dvb_frontend_tune_settings *fesettings)
567{
568 fesettings->min_delay_ms = 800;
569 fesettings->step_size = 0;
570 fesettings->max_drift = 0;
571
572 return 0;
573}
574
59d3cc19 575static int af9013_set_frontend(struct dvb_frontend *fe)
f571e004
AP
576{
577 struct af9013_state *state = fe->demodulator_priv;
578 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
579 int ret, i, sampling_freq;
580 bool auto_mode, spec_inv;
581 u8 buf[6];
582 u32 if_frequency, freq_cw;
583
584 dbg("%s: frequency=%d bandwidth_hz=%d", __func__,
585 c->frequency, c->bandwidth_hz);
586
587 /* program tuner */
588 if (fe->ops.tuner_ops.set_params)
14d24d14 589 fe->ops.tuner_ops.set_params(fe);
f571e004
AP
590
591 /* program CFOE coefficients */
592 if (c->bandwidth_hz != state->bandwidth_hz) {
593 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
594 if (coeff_lut[i].clock == state->config.clock &&
595 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
596 break;
597 }
825b9670
AP
598 }
599
f571e004
AP
600 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
601 sizeof(coeff_lut[i].val));
602 }
6d42b218 603
f571e004
AP
604 /* program frequency control */
605 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
6d42b218
AP
606 /* get used IF frequency */
607 if (fe->ops.tuner_ops.get_if_frequency)
f571e004 608 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
6d42b218 609 else
f571e004 610 if_frequency = state->config.if_frequency;
825b9670 611
f571e004 612 sampling_freq = if_frequency;
825b9670 613
f571e004
AP
614 while (sampling_freq > (state->config.clock / 2))
615 sampling_freq -= state->config.clock;
825b9670 616
f571e004
AP
617 if (sampling_freq < 0) {
618 sampling_freq *= -1;
619 spec_inv = state->config.spec_inv;
620 } else {
621 spec_inv = !state->config.spec_inv;
622 }
825b9670 623
f571e004 624 freq_cw = af913_div(sampling_freq, state->config.clock, 23);
825b9670 625
f571e004
AP
626 if (spec_inv)
627 freq_cw = 0x800000 - freq_cw;
825b9670 628
f571e004
AP
629 buf[0] = (freq_cw >> 0) & 0xff;
630 buf[1] = (freq_cw >> 8) & 0xff;
631 buf[2] = (freq_cw >> 16) & 0x7f;
825b9670 632
f571e004 633 freq_cw = 0x800000 - freq_cw;
825b9670 634
f571e004
AP
635 buf[3] = (freq_cw >> 0) & 0xff;
636 buf[4] = (freq_cw >> 8) & 0xff;
637 buf[5] = (freq_cw >> 16) & 0x7f;
638
639 ret = af9013_wr_regs(state, 0xd140, buf, 3);
640 if (ret)
641 goto err;
642
643 ret = af9013_wr_regs(state, 0x9be7, buf, 6);
644 if (ret)
645 goto err;
825b9670 646 }
825b9670 647
f571e004
AP
648 /* clear TPS lock flag */
649 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
650 if (ret)
651 goto err;
825b9670 652
f571e004
AP
653 /* clear MPEG2 lock flag */
654 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
655 if (ret)
656 goto err;
a2f5a811 657
f571e004
AP
658 /* empty channel function */
659 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
660 if (ret)
661 goto err;
662
663 /* empty DVB-T channel function */
664 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
665 if (ret)
666 goto err;
667
668 /* transmission parameters */
669 auto_mode = false;
670 memset(buf, 0, 3);
671
672 switch (c->transmission_mode) {
825b9670 673 case TRANSMISSION_MODE_AUTO:
f571e004
AP
674 auto_mode = 1;
675 break;
825b9670
AP
676 case TRANSMISSION_MODE_2K:
677 break;
678 case TRANSMISSION_MODE_8K:
679 buf[0] |= (1 << 0);
680 break;
681 default:
f571e004
AP
682 dbg("%s: invalid transmission_mode", __func__);
683 auto_mode = 1;
825b9670
AP
684 }
685
f571e004 686 switch (c->guard_interval) {
825b9670 687 case GUARD_INTERVAL_AUTO:
f571e004
AP
688 auto_mode = 1;
689 break;
825b9670
AP
690 case GUARD_INTERVAL_1_32:
691 break;
692 case GUARD_INTERVAL_1_16:
693 buf[0] |= (1 << 2);
694 break;
695 case GUARD_INTERVAL_1_8:
696 buf[0] |= (2 << 2);
697 break;
698 case GUARD_INTERVAL_1_4:
699 buf[0] |= (3 << 2);
700 break;
701 default:
f571e004
AP
702 dbg("%s: invalid guard_interval", __func__);
703 auto_mode = 1;
825b9670
AP
704 }
705
f571e004 706 switch (c->hierarchy) {
825b9670 707 case HIERARCHY_AUTO:
f571e004
AP
708 auto_mode = 1;
709 break;
825b9670
AP
710 case HIERARCHY_NONE:
711 break;
712 case HIERARCHY_1:
713 buf[0] |= (1 << 4);
714 break;
715 case HIERARCHY_2:
716 buf[0] |= (2 << 4);
717 break;
718 case HIERARCHY_4:
719 buf[0] |= (3 << 4);
720 break;
721 default:
f571e004
AP
722 dbg("%s: invalid hierarchy", __func__);
723 auto_mode = 1;
825b9670
AP
724 };
725
f571e004 726 switch (c->modulation) {
825b9670 727 case QAM_AUTO:
f571e004
AP
728 auto_mode = 1;
729 break;
825b9670
AP
730 case QPSK:
731 break;
732 case QAM_16:
733 buf[1] |= (1 << 6);
734 break;
735 case QAM_64:
736 buf[1] |= (2 << 6);
737 break;
738 default:
f571e004
AP
739 dbg("%s: invalid modulation", __func__);
740 auto_mode = 1;
825b9670
AP
741 }
742
743 /* Use HP. How and which case we can switch to LP? */
744 buf[1] |= (1 << 4);
745
f571e004 746 switch (c->code_rate_HP) {
825b9670 747 case FEC_AUTO:
f571e004
AP
748 auto_mode = 1;
749 break;
825b9670
AP
750 case FEC_1_2:
751 break;
752 case FEC_2_3:
753 buf[2] |= (1 << 0);
754 break;
755 case FEC_3_4:
756 buf[2] |= (2 << 0);
757 break;
758 case FEC_5_6:
759 buf[2] |= (3 << 0);
760 break;
761 case FEC_7_8:
762 buf[2] |= (4 << 0);
763 break;
764 default:
f571e004
AP
765 dbg("%s: invalid code_rate_HP", __func__);
766 auto_mode = 1;
825b9670
AP
767 }
768
f571e004 769 switch (c->code_rate_LP) {
825b9670 770 case FEC_AUTO:
f571e004
AP
771 auto_mode = 1;
772 break;
825b9670
AP
773 case FEC_1_2:
774 break;
775 case FEC_2_3:
776 buf[2] |= (1 << 3);
777 break;
778 case FEC_3_4:
779 buf[2] |= (2 << 3);
780 break;
781 case FEC_5_6:
782 buf[2] |= (3 << 3);
783 break;
784 case FEC_7_8:
785 buf[2] |= (4 << 3);
786 break;
787 case FEC_NONE:
f571e004 788 break;
825b9670 789 default:
f571e004
AP
790 dbg("%s: invalid code_rate_LP", __func__);
791 auto_mode = 1;
825b9670
AP
792 }
793
f571e004
AP
794 switch (c->bandwidth_hz) {
795 case 6000000:
825b9670 796 break;
f571e004 797 case 7000000:
825b9670
AP
798 buf[1] |= (1 << 2);
799 break;
f571e004 800 case 8000000:
825b9670
AP
801 buf[1] |= (2 << 2);
802 break;
803 default:
f571e004
AP
804 dbg("%s: invalid bandwidth_hz", __func__);
805 ret = -EINVAL;
806 goto err;
825b9670
AP
807 }
808
f571e004 809 ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
825b9670 810 if (ret)
f571e004 811 goto err;
825b9670 812
f571e004
AP
813 if (auto_mode) {
814 /* clear easy mode flag */
815 ret = af9013_wr_reg(state, 0xaefd, 0);
825b9670 816 if (ret)
f571e004 817 goto err;
825b9670 818
f571e004 819 dbg("%s: auto params", __func__);
825b9670 820 } else {
f571e004
AP
821 /* set easy mode flag */
822 ret = af9013_wr_reg(state, 0xaefd, 1);
825b9670 823 if (ret)
f571e004 824 goto err;
825b9670 825
f571e004 826 ret = af9013_wr_reg(state, 0xaefe, 0);
825b9670 827 if (ret)
f571e004
AP
828 goto err;
829
830 dbg("%s: manual params", __func__);
825b9670 831 }
825b9670 832
f571e004
AP
833 /* tune */
834 ret = af9013_wr_reg(state, 0xffff, 0);
825b9670 835 if (ret)
f571e004
AP
836 goto err;
837
838 state->bandwidth_hz = c->bandwidth_hz;
839 state->set_frontend_jiffies = jiffies;
840 state->first_tune = false;
825b9670 841
f571e004
AP
842 return ret;
843err:
844 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
845 return ret;
846}
847
7c61d80a 848static int af9013_get_frontend(struct dvb_frontend *fe)
825b9670 849{
7c61d80a 850 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
825b9670
AP
851 struct af9013_state *state = fe->demodulator_priv;
852 int ret;
f571e004 853 u8 buf[3];
825b9670 854
f571e004
AP
855 dbg("%s", __func__);
856
857 ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
858 if (ret)
859 goto err;
825b9670
AP
860
861 switch ((buf[1] >> 6) & 3) {
862 case 0:
f571e004 863 c->modulation = QPSK;
825b9670
AP
864 break;
865 case 1:
f571e004 866 c->modulation = QAM_16;
825b9670
AP
867 break;
868 case 2:
f571e004 869 c->modulation = QAM_64;
825b9670
AP
870 break;
871 }
872
873 switch ((buf[0] >> 0) & 3) {
874 case 0:
f571e004 875 c->transmission_mode = TRANSMISSION_MODE_2K;
825b9670
AP
876 break;
877 case 1:
f571e004 878 c->transmission_mode = TRANSMISSION_MODE_8K;
825b9670
AP
879 }
880
881 switch ((buf[0] >> 2) & 3) {
882 case 0:
6a2329ad 883 c->guard_interval = GUARD_INTERVAL_1_32;
825b9670
AP
884 break;
885 case 1:
6a2329ad 886 c->guard_interval = GUARD_INTERVAL_1_16;
825b9670
AP
887 break;
888 case 2:
6a2329ad 889 c->guard_interval = GUARD_INTERVAL_1_8;
825b9670
AP
890 break;
891 case 3:
6a2329ad 892 c->guard_interval = GUARD_INTERVAL_1_4;
825b9670
AP
893 break;
894 }
895
896 switch ((buf[0] >> 4) & 7) {
897 case 0:
f571e004 898 c->hierarchy = HIERARCHY_NONE;
825b9670
AP
899 break;
900 case 1:
f571e004 901 c->hierarchy = HIERARCHY_1;
825b9670
AP
902 break;
903 case 2:
f571e004 904 c->hierarchy = HIERARCHY_2;
825b9670
AP
905 break;
906 case 3:
f571e004 907 c->hierarchy = HIERARCHY_4;
825b9670
AP
908 break;
909 }
910
911 switch ((buf[2] >> 0) & 7) {
912 case 0:
f571e004 913 c->code_rate_HP = FEC_1_2;
825b9670
AP
914 break;
915 case 1:
f571e004
AP
916 c->code_rate_HP = FEC_2_3;
917 break;
918 case 2:
919 c->code_rate_HP = FEC_3_4;
920 break;
921 case 3:
922 c->code_rate_HP = FEC_5_6;
923 break;
924 case 4:
925 c->code_rate_HP = FEC_7_8;
926 break;
825b9670
AP
927 }
928
f571e004
AP
929 switch ((buf[2] >> 3) & 7) {
930 case 0:
931 c->code_rate_LP = FEC_1_2;
932 break;
933 case 1:
934 c->code_rate_LP = FEC_2_3;
935 break;
936 case 2:
937 c->code_rate_LP = FEC_3_4;
938 break;
939 case 3:
940 c->code_rate_LP = FEC_5_6;
941 break;
942 case 4:
943 c->code_rate_LP = FEC_7_8;
944 break;
945 }
825b9670 946
f571e004
AP
947 switch ((buf[1] >> 2) & 3) {
948 case 0:
949 c->bandwidth_hz = 6000000;
950 break;
951 case 1:
952 c->bandwidth_hz = 7000000;
953 break;
954 case 2:
955 c->bandwidth_hz = 8000000;
956 break;
825b9670
AP
957 }
958
825b9670 959 return ret;
f571e004
AP
960err:
961 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
962 return ret;
963}
964
825b9670
AP
965static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
966{
967 struct af9013_state *state = fe->demodulator_priv;
f571e004 968 int ret;
825b9670 969 u8 tmp;
f571e004
AP
970
971 /*
972 * Return status from the cache if it is younger than 2000ms with the
973 * exception of last tune is done during 4000ms.
974 */
975 if (time_is_after_jiffies(
976 state->read_status_jiffies + msecs_to_jiffies(2000)) &&
977 time_is_before_jiffies(
978 state->set_frontend_jiffies + msecs_to_jiffies(4000))
979 ) {
980 *status = state->fe_status;
981 return 0;
982 } else {
983 *status = 0;
984 }
825b9670 985
825b9670 986 /* MPEG2 lock */
f571e004 987 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
825b9670 988 if (ret)
f571e004
AP
989 goto err;
990
825b9670 991 if (tmp)
8af5e381
AP
992 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
993 FE_HAS_SYNC | FE_HAS_LOCK;
825b9670 994
8af5e381
AP
995 if (!*status) {
996 /* TPS lock */
f571e004 997 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
825b9670 998 if (ret)
f571e004
AP
999 goto err;
1000
825b9670 1001 if (tmp)
8af5e381
AP
1002 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1003 FE_HAS_VITERBI;
825b9670
AP
1004 }
1005
f571e004
AP
1006 state->fe_status = *status;
1007 state->read_status_jiffies = jiffies;
825b9670 1008
f571e004
AP
1009 return ret;
1010err:
1011 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
1012 return ret;
1013}
1014
f571e004 1015static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
825b9670
AP
1016{
1017 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1018 *snr = state->snr;
1019 return 0;
825b9670
AP
1020}
1021
1022static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1023{
1024 struct af9013_state *state = fe->demodulator_priv;
825b9670 1025 *strength = state->signal_strength;
f571e004 1026 return 0;
825b9670
AP
1027}
1028
f571e004 1029static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
825b9670
AP
1030{
1031 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1032 *ber = state->ber;
1033 return 0;
825b9670
AP
1034}
1035
1036static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1037{
1038 struct af9013_state *state = fe->demodulator_priv;
825b9670 1039 *ucblocks = state->ucblocks;
f571e004 1040 return 0;
825b9670
AP
1041}
1042
1043static int af9013_init(struct dvb_frontend *fe)
1044{
1045 struct af9013_state *state = fe->demodulator_priv;
1046 int ret, i, len;
f571e004
AP
1047 u8 buf[3], tmp;
1048 u32 adc_cw;
1049 const struct af9013_reg_bit *init;
825b9670 1050
f571e004 1051 dbg("%s", __func__);
825b9670
AP
1052
1053 /* power on */
1054 ret = af9013_power_ctrl(state, 1);
1055 if (ret)
f571e004 1056 goto err;
825b9670
AP
1057
1058 /* enable ADC */
f571e004 1059 ret = af9013_wr_reg(state, 0xd73a, 0xa4);
825b9670 1060 if (ret)
f571e004 1061 goto err;
825b9670
AP
1062
1063 /* write API version to firmware */
f571e004
AP
1064 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
1065 if (ret)
1066 goto err;
825b9670
AP
1067
1068 /* program ADC control */
f571e004
AP
1069 switch (state->config.clock) {
1070 case 28800000: /* 28.800 MHz */
1071 tmp = 0;
1072 break;
1073 case 20480000: /* 20.480 MHz */
1074 tmp = 1;
1075 break;
1076 case 28000000: /* 28.000 MHz */
1077 tmp = 2;
1078 break;
1079 case 25000000: /* 25.000 MHz */
1080 tmp = 3;
1081 break;
1082 default:
1083 err("invalid clock");
1084 return -EINVAL;
1085 }
1086
1087 adc_cw = af913_div(state->config.clock, 1000000ul, 19);
1088 buf[0] = (adc_cw >> 0) & 0xff;
1089 buf[1] = (adc_cw >> 8) & 0xff;
1090 buf[2] = (adc_cw >> 16) & 0xff;
1091
1092 ret = af9013_wr_regs(state, 0xd180, buf, 3);
1093 if (ret)
1094 goto err;
1095
1096 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
825b9670 1097 if (ret)
f571e004 1098 goto err;
825b9670
AP
1099
1100 /* set I2C master clock */
f571e004 1101 ret = af9013_wr_reg(state, 0xd416, 0x14);
825b9670 1102 if (ret)
f571e004 1103 goto err;
825b9670
AP
1104
1105 /* set 16 embx */
f571e004 1106 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
825b9670 1107 if (ret)
f571e004 1108 goto err;
825b9670
AP
1109
1110 /* set no trigger */
f571e004 1111 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
825b9670 1112 if (ret)
f571e004 1113 goto err;
825b9670
AP
1114
1115 /* set read-update bit for constellation */
f571e004 1116 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
825b9670 1117 if (ret)
f571e004 1118 goto err;
825b9670 1119
f571e004
AP
1120 /* settings for mp2if */
1121 if (state->config.ts_mode == AF9013_TS_USB) {
1122 /* AF9015 split PSB to 1.5k + 0.5k */
1123 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
1124 if (ret)
1125 goto err;
1126 } else {
1127 /* AF9013 change the output bit to data7 */
1128 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
1129 if (ret)
1130 goto err;
1131
1132 /* AF9013 set mpeg to full speed */
1133 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
1134 if (ret)
1135 goto err;
1136 }
1137
1138 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
825b9670 1139 if (ret)
f571e004 1140 goto err;
825b9670
AP
1141
1142 /* load OFSM settings */
f571e004 1143 dbg("%s: load ofsm settings", __func__);
825b9670
AP
1144 len = ARRAY_SIZE(ofsm_init);
1145 init = ofsm_init;
1146 for (i = 0; i < len; i++) {
f571e004 1147 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1148 init[i].len, init[i].val);
1149 if (ret)
f571e004 1150 goto err;
825b9670
AP
1151 }
1152
1153 /* load tuner specific settings */
f571e004 1154 dbg("%s: load tuner specific settings", __func__);
825b9670
AP
1155 switch (state->config.tuner) {
1156 case AF9013_TUNER_MXL5003D:
1157 len = ARRAY_SIZE(tuner_init_mxl5003d);
1158 init = tuner_init_mxl5003d;
1159 break;
1160 case AF9013_TUNER_MXL5005D:
1161 case AF9013_TUNER_MXL5005R:
a4f31d0d 1162 case AF9013_TUNER_MXL5007T:
825b9670
AP
1163 len = ARRAY_SIZE(tuner_init_mxl5005);
1164 init = tuner_init_mxl5005;
1165 break;
1166 case AF9013_TUNER_ENV77H11D5:
1167 len = ARRAY_SIZE(tuner_init_env77h11d5);
1168 init = tuner_init_env77h11d5;
1169 break;
1170 case AF9013_TUNER_MT2060:
1171 len = ARRAY_SIZE(tuner_init_mt2060);
1172 init = tuner_init_mt2060;
1173 break;
1174 case AF9013_TUNER_MC44S803:
1175 len = ARRAY_SIZE(tuner_init_mc44s803);
1176 init = tuner_init_mc44s803;
1177 break;
1178 case AF9013_TUNER_QT1010:
1179 case AF9013_TUNER_QT1010A:
1180 len = ARRAY_SIZE(tuner_init_qt1010);
1181 init = tuner_init_qt1010;
1182 break;
1183 case AF9013_TUNER_MT2060_2:
1184 len = ARRAY_SIZE(tuner_init_mt2060_2);
1185 init = tuner_init_mt2060_2;
1186 break;
1187 case AF9013_TUNER_TDA18271:
2158e509 1188 case AF9013_TUNER_TDA18218:
825b9670
AP
1189 len = ARRAY_SIZE(tuner_init_tda18271);
1190 init = tuner_init_tda18271;
1191 break;
1192 case AF9013_TUNER_UNKNOWN:
1193 default:
1194 len = ARRAY_SIZE(tuner_init_unknown);
1195 init = tuner_init_unknown;
1196 break;
1197 }
1198
1199 for (i = 0; i < len; i++) {
f571e004 1200 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1201 init[i].len, init[i].val);
1202 if (ret)
f571e004 1203 goto err;
825b9670
AP
1204 }
1205
f571e004
AP
1206 /* TS mode */
1207 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
825b9670 1208 if (ret)
f571e004 1209 goto err;
825b9670
AP
1210
1211 /* enable lock led */
f571e004 1212 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
825b9670 1213 if (ret)
f571e004 1214 goto err;
825b9670 1215
f571e004
AP
1216 /* check if we support signal strength */
1217 if (!state->signal_strength_en) {
1218 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
1219 &state->signal_strength_en);
1220 if (ret)
1221 goto err;
1222 }
9e35cd22 1223
f571e004
AP
1224 /* read values needed for signal strength calculation */
1225 if (state->signal_strength_en && !state->rf_50) {
1226 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
9e35cd22 1227 if (ret)
f571e004
AP
1228 goto err;
1229
1230 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
9e35cd22 1231 if (ret)
f571e004
AP
1232 goto err;
1233
1234 ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
9e35cd22 1235 if (ret)
f571e004
AP
1236 goto err;
1237
1238 ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
9e35cd22 1239 if (ret)
f571e004 1240 goto err;
9e35cd22
AP
1241 }
1242
f571e004
AP
1243 /* SNR */
1244 ret = af9013_wr_reg(state, 0xd2e2, 1);
1245 if (ret)
1246 goto err;
1247
1248 /* BER / UCB */
1249 buf[0] = (10000 >> 0) & 0xff;
1250 buf[1] = (10000 >> 8) & 0xff;
1251 ret = af9013_wr_regs(state, 0xd385, buf, 2);
1252 if (ret)
1253 goto err;
1254
1255 /* enable FEC monitor */
1256 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
1257 if (ret)
1258 goto err;
1259
1260 state->first_tune = true;
1261 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
1262
1263 return ret;
1264err:
1265 dbg("%s: failed=%d", __func__, ret);
1266 return ret;
1267}
1268
1269static int af9013_sleep(struct dvb_frontend *fe)
1270{
1271 struct af9013_state *state = fe->demodulator_priv;
1272 int ret;
1273
1274 dbg("%s", __func__);
1275
1276 /* stop statistics polling */
1277 cancel_delayed_work_sync(&state->statistics_work);
1278
1279 /* disable lock led */
1280 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
1281 if (ret)
1282 goto err;
1283
1284 /* power off */
1285 ret = af9013_power_ctrl(state, 0);
1286 if (ret)
1287 goto err;
1288
1289 return ret;
1290err:
1291 dbg("%s: failed=%d", __func__, ret);
1292 return ret;
1293}
1294
1295static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1296{
1297 int ret;
1298 struct af9013_state *state = fe->demodulator_priv;
1299
1300 dbg("%s: enable=%d", __func__, enable);
1301
1302 /* gate already open or close */
1303 if (state->i2c_gate_state == enable)
1304 return 0;
1305
1306 if (state->config.ts_mode == AF9013_TS_USB)
1307 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
1308 else
1309 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
1310 if (ret)
1311 goto err;
1312
1313 state->i2c_gate_state = enable;
1314
1315 return ret;
1316err:
1317 dbg("%s: failed=%d", __func__, ret);
825b9670
AP
1318 return ret;
1319}
1320
f571e004
AP
1321static void af9013_release(struct dvb_frontend *fe)
1322{
1323 struct af9013_state *state = fe->demodulator_priv;
1324 kfree(state);
1325}
1326
825b9670
AP
1327static struct dvb_frontend_ops af9013_ops;
1328
1329static int af9013_download_firmware(struct af9013_state *state)
1330{
6ed9d560 1331 int i, len, remaining, ret;
825b9670 1332 const struct firmware *fw;
825b9670
AP
1333 u16 checksum = 0;
1334 u8 val;
1335 u8 fw_params[4];
825b9670
AP
1336 u8 *fw_file = AF9013_DEFAULT_FIRMWARE;
1337
1338 msleep(100);
1339 /* check whether firmware is already running */
f571e004 1340 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1341 if (ret)
f571e004 1342 goto err;
825b9670 1343 else
f571e004 1344 dbg("%s: firmware status=%02x", __func__, val);
825b9670
AP
1345
1346 if (val == 0x0c) /* fw is running, no need for download */
1347 goto exit;
1348
1349 info("found a '%s' in cold state, will try to load a firmware",
1350 af9013_ops.info.name);
1351
1352 /* request the firmware, this will block and timeout */
e9785250 1353 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
825b9670
AP
1354 if (ret) {
1355 err("did not find the firmware file. (%s) "
1356 "Please see linux/Documentation/dvb/ for more details" \
1357 " on firmware-problems. (%d)",
1358 fw_file, ret);
f571e004 1359 goto err;
825b9670
AP
1360 }
1361
1362 info("downloading firmware from file '%s'", fw_file);
1363
1364 /* calc checksum */
1365 for (i = 0; i < fw->size; i++)
1366 checksum += fw->data[i];
1367
1368 fw_params[0] = checksum >> 8;
1369 fw_params[1] = checksum & 0xff;
1370 fw_params[2] = fw->size >> 8;
1371 fw_params[3] = fw->size & 0xff;
1372
1373 /* write fw checksum & size */
1374 ret = af9013_write_ofsm_regs(state, 0x50fc,
1375 fw_params, sizeof(fw_params));
1376 if (ret)
f571e004 1377 goto err_release;
825b9670 1378
6ed9d560
AP
1379 #define FW_ADDR 0x5100 /* firmware start address */
1380 #define LEN_MAX 16 /* max packet size */
1381 for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
1382 len = remaining;
1383 if (len > LEN_MAX)
1384 len = LEN_MAX;
825b9670 1385
6ed9d560
AP
1386 ret = af9013_write_ofsm_regs(state,
1387 FW_ADDR + fw->size - remaining,
1388 (u8 *) &fw->data[fw->size - remaining], len);
825b9670 1389 if (ret) {
6ed9d560 1390 err("firmware download failed:%d", ret);
f571e004 1391 goto err_release;
825b9670
AP
1392 }
1393 }
1394
825b9670 1395 /* request boot firmware */
f571e004 1396 ret = af9013_wr_reg(state, 0xe205, 1);
825b9670 1397 if (ret)
f571e004 1398 goto err_release;
825b9670
AP
1399
1400 for (i = 0; i < 15; i++) {
1401 msleep(100);
1402
1403 /* check firmware status */
f571e004 1404 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1405 if (ret)
f571e004 1406 goto err_release;
825b9670 1407
f571e004 1408 dbg("%s: firmware status=%02x", __func__, val);
825b9670
AP
1409
1410 if (val == 0x0c || val == 0x04) /* success or fail */
1411 break;
1412 }
1413
1414 if (val == 0x04) {
1415 err("firmware did not run");
f571e004 1416 ret = -ENODEV;
825b9670
AP
1417 } else if (val != 0x0c) {
1418 err("firmware boot timeout");
f571e004 1419 ret = -ENODEV;
825b9670
AP
1420 }
1421
f571e004 1422err_release:
825b9670 1423 release_firmware(fw);
f571e004 1424err:
825b9670
AP
1425exit:
1426 if (!ret)
1427 info("found a '%s' in warm state.", af9013_ops.info.name);
1428 return ret;
1429}
1430
825b9670
AP
1431struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1432 struct i2c_adapter *i2c)
1433{
1434 int ret;
1435 struct af9013_state *state = NULL;
ce99efa5 1436 u8 buf[4], i;
825b9670
AP
1437
1438 /* allocate memory for the internal state */
1439 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1440 if (state == NULL)
f571e004 1441 goto err;
825b9670
AP
1442
1443 /* setup the state */
1444 state->i2c = i2c;
1445 memcpy(&state->config, config, sizeof(struct af9013_config));
1446
825b9670 1447 /* download firmware */
f571e004 1448 if (state->config.ts_mode != AF9013_TS_USB) {
825b9670
AP
1449 ret = af9013_download_firmware(state);
1450 if (ret)
f571e004 1451 goto err;
825b9670
AP
1452 }
1453
1454 /* firmware version */
f571e004 1455 ret = af9013_rd_regs(state, 0x5103, buf, 4);
109a2990 1456 if (ret)
f571e004 1457 goto err;
109a2990 1458
f571e004 1459 info("firmware version %d.%d.%d.%d", buf[0], buf[1], buf[2], buf[3]);
825b9670
AP
1460
1461 /* set GPIOs */
1462 for (i = 0; i < sizeof(state->config.gpio); i++) {
1463 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1464 if (ret)
f571e004 1465 goto err;
825b9670
AP
1466 }
1467
1468 /* create dvb_frontend */
f571e004 1469 memcpy(&state->fe.ops, &af9013_ops,
825b9670 1470 sizeof(struct dvb_frontend_ops));
f571e004
AP
1471 state->fe.demodulator_priv = state;
1472
1473 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
825b9670 1474
f571e004
AP
1475 return &state->fe;
1476err:
825b9670
AP
1477 kfree(state);
1478 return NULL;
1479}
1480EXPORT_SYMBOL(af9013_attach);
1481
1482static struct dvb_frontend_ops af9013_ops = {
59d3cc19 1483 .delsys = { SYS_DVBT },
825b9670 1484 .info = {
f571e004 1485 .name = "Afatech AF9013",
825b9670
AP
1486 .frequency_min = 174000000,
1487 .frequency_max = 862000000,
1488 .frequency_stepsize = 250000,
1489 .frequency_tolerance = 0,
f571e004
AP
1490 .caps = FE_CAN_FEC_1_2 |
1491 FE_CAN_FEC_2_3 |
1492 FE_CAN_FEC_3_4 |
1493 FE_CAN_FEC_5_6 |
1494 FE_CAN_FEC_7_8 |
1495 FE_CAN_FEC_AUTO |
1496 FE_CAN_QPSK |
1497 FE_CAN_QAM_16 |
1498 FE_CAN_QAM_64 |
1499 FE_CAN_QAM_AUTO |
825b9670
AP
1500 FE_CAN_TRANSMISSION_MODE_AUTO |
1501 FE_CAN_GUARD_INTERVAL_AUTO |
1502 FE_CAN_HIERARCHY_AUTO |
1503 FE_CAN_RECOVER |
1504 FE_CAN_MUTE_TS
1505 },
1506
1507 .release = af9013_release,
f571e004 1508
825b9670
AP
1509 .init = af9013_init,
1510 .sleep = af9013_sleep,
825b9670 1511
f571e004 1512 .get_tune_settings = af9013_get_tune_settings,
59d3cc19
MCC
1513 .set_frontend = af9013_set_frontend,
1514 .get_frontend = af9013_get_frontend,
825b9670 1515
825b9670 1516 .read_status = af9013_read_status,
825b9670 1517 .read_snr = af9013_read_snr,
f571e004
AP
1518 .read_signal_strength = af9013_read_signal_strength,
1519 .read_ber = af9013_read_ber,
825b9670 1520 .read_ucblocks = af9013_read_ucblocks,
825b9670 1521
f571e004
AP
1522 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1523};
825b9670
AP
1524
1525MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1526MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1527MODULE_LICENSE("GPL");