[mirror_ubuntu-hirsute-kernel.git] / drivers / media / dvb / frontends / cx22702.c

/*
    Conexant 22702 DVB OFDM demodulator driver

    based on:
	Alps TDMB7 DVB OFDM demodulator driver

    Copyright (C) 2001-2002 Convergence Integrated Media GmbH
	  Holger Waechtler <holger@convergence.de>

    Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>

    This program is free software; you can redistribute it and/or modify
    it under the terms of the GNU General Public License as published by
    the Free Software Foundation; either version 2 of the License, or
    (at your option) any later version.

    This program is distributed in the hope that it will be useful,
    but WITHOUT ANY WARRANTY; without even the implied warranty of
    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
    GNU General Public License for more details.

    You should have received a copy of the GNU General Public License
    along with this program; if not, write to the Free Software
    Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.

*/

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/module.h>
#include <linux/string.h>
#include <linux/slab.h>
#include <linux/delay.h>
#include "dvb_frontend.h"
#include "dvb-pll.h"
#include "cx22702.h"


struct cx22702_state {

	struct i2c_adapter* i2c;

	/* configuration settings */
	const struct cx22702_config* config;

	struct dvb_frontend frontend;

	/* previous uncorrected block counter */
	u8 prevUCBlocks;
};

static int debug = 0;
#define dprintk	if (debug) printk

/* Register values to initialise the demod */
static u8 init_tab [] = {
	0x00, 0x00, /* Stop aquisition */
	0x0B, 0x06,
	0x09, 0x01,
	0x0D, 0x41,
	0x16, 0x32,
	0x20, 0x0A,
	0x21, 0x17,
	0x24, 0x3e,
	0x26, 0xff,
	0x27, 0x10,
	0x28, 0x00,
	0x29, 0x00,
	0x2a, 0x10,
	0x2b, 0x00,
	0x2c, 0x10,
	0x2d, 0x00,
	0x48, 0xd4,
	0x49, 0x56,
	0x6b, 0x1e,
	0xc8, 0x02,
	0xf9, 0x00,
	0xfa, 0x00,
	0xfb, 0x00,
	0xfc, 0x00,
	0xfd, 0x00,
};

static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
{
	int ret;
	u8 buf [] = { reg, data };
	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };

	ret = i2c_transfer(state->i2c, &msg, 1);

	if (ret != 1)
		printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
			__FUNCTION__, reg, data, ret);

	return (ret != 1) ? -1 : 0;
}

static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
{
	int ret;
	u8 b0 [] = { reg };
	u8 b1 [] = { 0 };

	struct i2c_msg msg [] = {
		{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
		{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };

	ret = i2c_transfer(state->i2c, msg, 2);

	if (ret != 2)
		printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);

	return b1[0];
}

static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
{
	u8 val;

	switch (inversion) {

		case INVERSION_AUTO:
			return -EOPNOTSUPP;

		case INVERSION_ON:
			val = cx22702_readreg (state, 0x0C);
			return cx22702_writereg (state, 0x0C, val | 0x01);

		case INVERSION_OFF:
			val = cx22702_readreg (state, 0x0C);
			return cx22702_writereg (state, 0x0C, val & 0xfe);

		default:
			return -EINVAL;

	}

}

/* Retrieve the demod settings */
static int cx22702_get_tps (struct cx22702_state *state, struct dvb_ofdm_parameters *p)
{
	u8 val;

	/* Make sure the TPS regs are valid */
	if (!(cx22702_readreg(state, 0x0A) & 0x20))
		return -EAGAIN;

	val = cx22702_readreg (state, 0x01);
	switch( (val&0x18)>>3) {
		case 0: p->constellation =   QPSK; break;
		case 1: p->constellation = QAM_16; break;
		case 2: p->constellation = QAM_64; break;
	}
	switch( val&0x07 ) {
		case 0: p->hierarchy_information = HIERARCHY_NONE; break;
		case 1: p->hierarchy_information =    HIERARCHY_1; break;
		case 2: p->hierarchy_information =    HIERARCHY_2; break;
		case 3: p->hierarchy_information =    HIERARCHY_4; break;
	}


	val = cx22702_readreg (state, 0x02);
	switch( (val&0x38)>>3 ) {
		case 0: p->code_rate_HP = FEC_1_2; break;
		case 1: p->code_rate_HP = FEC_2_3; break;
		case 2: p->code_rate_HP = FEC_3_4; break;
		case 3: p->code_rate_HP = FEC_5_6; break;
		case 4: p->code_rate_HP = FEC_7_8; break;
	}
	switch( val&0x07 ) {
		case 0: p->code_rate_LP = FEC_1_2; break;
		case 1: p->code_rate_LP = FEC_2_3; break;
		case 2: p->code_rate_LP = FEC_3_4; break;
		case 3: p->code_rate_LP = FEC_5_6; break;
		case 4: p->code_rate_LP = FEC_7_8; break;
	}


	val = cx22702_readreg (state, 0x03);
	switch( (val&0x0c)>>2 ) {
		case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
		case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
		case 2: p->guard_interval =  GUARD_INTERVAL_1_8; break;
		case 3: p->guard_interval =  GUARD_INTERVAL_1_4; break;
	}
	switch( val&0x03 ) {
		case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
		case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
	}

	return 0;
}

static int cx22702_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
{
	struct cx22702_state* state = fe->demodulator_priv;
	dprintk ("%s(%d)\n", __FUNCTION__, enable);
	if (enable)
		return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) & 0xfe);
	else
		return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) | 1);
}

/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
{
	u8 val;
	struct cx22702_state* state = fe->demodulator_priv;

	if (fe->ops.tuner_ops.set_params) {
		fe->ops.tuner_ops.set_params(fe, p);
		if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
	}

	/* set inversion */
	cx22702_set_inversion (state, p->inversion);

	/* set bandwidth */
	switch(p->u.ofdm.bandwidth) {
	case BANDWIDTH_6_MHZ:
		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x20 );
		break;
	case BANDWIDTH_7_MHZ:
		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) | 0x10 );
		break;
	case BANDWIDTH_8_MHZ:
		cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
		break;
	default:
		dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
		return -EINVAL;
	}


	p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working

	/* use auto configuration? */
	if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) ||
	   (p->u.ofdm.constellation==QAM_AUTO) ||
	   (p->u.ofdm.code_rate_HP==FEC_AUTO) ||
	   (p->u.ofdm.code_rate_LP==FEC_AUTO) ||
	   (p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) ||
	   (p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {

		/* TPS Source - use hardware driven values */
		cx22702_writereg(state, 0x06, 0x10);
		cx22702_writereg(state, 0x07, 0x9);
		cx22702_writereg(state, 0x08, 0xC1);
		cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
		cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );
		cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
		dprintk("%s: Autodetecting\n",__FUNCTION__);
		return 0;
	}

	/* manually programmed values */
	val=0;
	switch(p->u.ofdm.constellation) {
		case   QPSK: val = (val&0xe7); break;
		case QAM_16: val = (val&0xe7)|0x08; break;
		case QAM_64: val = (val&0xe7)|0x10; break;
		default:
			dprintk ("%s: invalid constellation\n",__FUNCTION__);
			return -EINVAL;
	}
	switch(p->u.ofdm.hierarchy_information) {
		case HIERARCHY_NONE: val = (val&0xf8); break;
		case    HIERARCHY_1: val = (val&0xf8)|1; break;
		case    HIERARCHY_2: val = (val&0xf8)|2; break;
		case    HIERARCHY_4: val = (val&0xf8)|3; break;
		default:
			dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
			return -EINVAL;
	}
	cx22702_writereg (state, 0x06, val);

	val=0;
	switch(p->u.ofdm.code_rate_HP) {
		case FEC_NONE:
		case FEC_1_2: val = (val&0xc7); break;
		case FEC_2_3: val = (val&0xc7)|0x08; break;
		case FEC_3_4: val = (val&0xc7)|0x10; break;
		case FEC_5_6: val = (val&0xc7)|0x18; break;
		case FEC_7_8: val = (val&0xc7)|0x20; break;
		default:
			dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
			return -EINVAL;
	}
	switch(p->u.ofdm.code_rate_LP) {
		case FEC_NONE:
		case FEC_1_2: val = (val&0xf8); break;
		case FEC_2_3: val = (val&0xf8)|1; break;
		case FEC_3_4: val = (val&0xf8)|2; break;
		case FEC_5_6: val = (val&0xf8)|3; break;
		case FEC_7_8: val = (val&0xf8)|4; break;
		default:
			dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
			return -EINVAL;
	}
	cx22702_writereg (state, 0x07, val);

	val=0;
	switch(p->u.ofdm.guard_interval) {
		case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
		case GUARD_INTERVAL_1_16: val = (val&0xf3)|0x04; break;
		case  GUARD_INTERVAL_1_8: val = (val&0xf3)|0x08; break;
		case  GUARD_INTERVAL_1_4: val = (val&0xf3)|0x0c; break;
		default:
			dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
			return -EINVAL;
	}
	switch(p->u.ofdm.transmission_mode) {
		case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
		case TRANSMISSION_MODE_8K: val = (val&0xfc)|1; break;
		default:
			dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
			return -EINVAL;
	}
	cx22702_writereg(state, 0x08, val);
	cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) | 0x02 );
	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) | 0x40 );

	/* Begin channel aquisition */
	cx22702_writereg(state, 0x00, 0x01);

	return 0;
}

/* Reset the demod hardware and reset all of the configuration registers
   to a default state. */
static int cx22702_init (struct dvb_frontend* fe)
{
	int i;
	struct cx22702_state* state = fe->demodulator_priv;

	cx22702_writereg (state, 0x00, 0x02);

	msleep(10);

	for (i=0; i<sizeof(init_tab); i+=2)
		cx22702_writereg (state, init_tab[i], init_tab[i+1]);

	cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02);

	cx22702_i2c_gate_ctrl(fe, 0);

	return 0;
}

static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
{
	struct cx22702_state* state = fe->demodulator_priv;
	u8 reg0A;
	u8 reg23;

	*status = 0;

	reg0A = cx22702_readreg (state, 0x0A);
	reg23 = cx22702_readreg (state, 0x23);

	dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
		,__FUNCTION__,reg0A,reg23);

	if(reg0A & 0x10) {
		*status |= FE_HAS_LOCK;
		*status |= FE_HAS_VITERBI;
		*status |= FE_HAS_SYNC;
	}

	if(reg0A & 0x20)
		*status |= FE_HAS_CARRIER;

	if(reg23 < 0xf0)
		*status |= FE_HAS_SIGNAL;

	return 0;
}

static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
{
	struct cx22702_state* state = fe->demodulator_priv;

	if(cx22702_readreg (state, 0xE4) & 0x02) {
		/* Realtime statistics */
		*ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
			| (cx22702_readreg (state, 0xDF)&0x7F);
	} else {
		/* Averagtine statistics */
		*ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
			| cx22702_readreg (state, 0xDF);
	}

	return 0;
}

static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
{
	struct cx22702_state* state = fe->demodulator_priv;

	u16 rs_ber = 0;
	rs_ber = cx22702_readreg (state, 0x23);
	*signal_strength = (rs_ber << 8) | rs_ber;

	return 0;
}

static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
{
	struct cx22702_state* state = fe->demodulator_priv;

	u16 rs_ber=0;
	if(cx22702_readreg (state, 0xE4) & 0x02) {
		/* Realtime statistics */
		rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
			| (cx22702_readreg (state, 0xDF)& 0x7F);
	} else {
		/* Averagine statistics */
		rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
			| cx22702_readreg (state, 0xDF);
	}
	*snr = ~rs_ber;

	return 0;
}

static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
{
	struct cx22702_state* state = fe->demodulator_priv;

	u8 _ucblocks;

	/* RS Uncorrectable Packet Count then reset */
	_ucblocks = cx22702_readreg (state, 0xE3);
	if (state->prevUCBlocks < _ucblocks)
		*ucblocks = (_ucblocks - state->prevUCBlocks);
	else
		*ucblocks = state->prevUCBlocks - _ucblocks;
	state->prevUCBlocks = _ucblocks;

	return 0;
}

static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
{
	struct cx22702_state* state = fe->demodulator_priv;

	u8 reg0C = cx22702_readreg (state, 0x0C);

	p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
	return cx22702_get_tps (state, &p->u.ofdm);
}

static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
{
	tune->min_delay_ms = 1000;
	return 0;
}

static void cx22702_release(struct dvb_frontend* fe)
{
	struct cx22702_state* state = fe->demodulator_priv;
	kfree(state);
}

static struct dvb_frontend_ops cx22702_ops;

struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
				    struct i2c_adapter* i2c)
{
	struct cx22702_state* state = NULL;

	/* allocate memory for the internal state */
	state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
	if (state == NULL)
		goto error;

	/* setup the state */
	state->config = config;
	state->i2c = i2c;
	state->prevUCBlocks = 0;

	/* check if the demod is there */
	if (cx22702_readreg(state, 0x1f) != 0x3)
		goto error;

	/* create dvb_frontend */
	memcpy(&state->frontend.ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
	state->frontend.demodulator_priv = state;
	return &state->frontend;

error:
	kfree(state);
	return NULL;
}

static struct dvb_frontend_ops cx22702_ops = {

	.info = {
		.name			= "Conexant CX22702 DVB-T",
		.type			= FE_OFDM,
		.frequency_min		= 177000000,
		.frequency_max		= 858000000,
		.frequency_stepsize	= 166666,
		.caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
		FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
		FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
		FE_CAN_HIERARCHY_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
		FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_RECOVER
	},

	.release = cx22702_release,

	.init = cx22702_init,
	.i2c_gate_ctrl = cx22702_i2c_gate_ctrl,

	.set_frontend = cx22702_set_tps,
	.get_frontend = cx22702_get_frontend,
	.get_tune_settings = cx22702_get_tune_settings,

	.read_status = cx22702_read_status,
	.read_ber = cx22702_read_ber,
	.read_signal_strength = cx22702_read_signal_strength,
	.read_snr = cx22702_read_snr,
	.read_ucblocks = cx22702_read_ucblocks,
};

module_param(debug, int, 0644);
MODULE_PARM_DESC(debug, "Enable verbose debug messages");

MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
MODULE_AUTHOR("Steven Toth");
MODULE_LICENSE("GPL");

EXPORT_SYMBOL(cx22702_attach);
Commit	Line	Data
1da177e4 LT	1	/*
	2	Conexant 22702 DVB OFDM demodulator driver
	3
	4	based on:
9101e622	5	Alps TDMB7 DVB OFDM demodulator driver
1da177e4 LT	6
	7	Copyright (C) 2001-2002 Convergence Integrated Media GmbH
	8	Holger Waechtler <holger@convergence.de>
	9
9b9225f0	10	Copyright (C) 2004 Steven Toth <stoth@hauppauge.com>
1da177e4 LT	11
	12	This program is free software; you can redistribute it and/or modify
	13	it under the terms of the GNU General Public License as published by
	14	the Free Software Foundation; either version 2 of the License, or
	15	(at your option) any later version.
	16
	17	This program is distributed in the hope that it will be useful,
	18	but WITHOUT ANY WARRANTY; without even the implied warranty of
	19	MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	20	GNU General Public License for more details.
	21
	22	You should have received a copy of the GNU General Public License
	23	along with this program; if not, write to the Free Software
	24	Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	25
	26	*/
	27
	28	#include <linux/kernel.h>
	29	#include <linux/init.h>
	30	#include <linux/module.h>
	31	#include <linux/string.h>
	32	#include <linux/slab.h>
	33	#include <linux/delay.h>
	34	#include "dvb_frontend.h"
9990d744	35	#include "dvb-pll.h"
1da177e4 LT	36	#include "cx22702.h"
	37
	38
	39	struct cx22702_state {
	40
	41	struct i2c_adapter* i2c;
	42
1da177e4 LT	43	/* configuration settings */
	44	const struct cx22702_config* config;
	45
	46	struct dvb_frontend frontend;
	47
	48	/* previous uncorrected block counter */
	49	u8 prevUCBlocks;
	50	};
	51
	52	static int debug = 0;
	53	#define dprintk if (debug) printk
	54
	55	/* Register values to initialise the demod */
	56	static u8 init_tab [] = {
	57	0x00, 0x00, /* Stop aquisition */
	58	0x0B, 0x06,
	59	0x09, 0x01,
	60	0x0D, 0x41,
	61	0x16, 0x32,
	62	0x20, 0x0A,
	63	0x21, 0x17,
	64	0x24, 0x3e,
	65	0x26, 0xff,
	66	0x27, 0x10,
	67	0x28, 0x00,
	68	0x29, 0x00,
	69	0x2a, 0x10,
	70	0x2b, 0x00,
	71	0x2c, 0x10,
	72	0x2d, 0x00,
	73	0x48, 0xd4,
	74	0x49, 0x56,
	75	0x6b, 0x1e,
	76	0xc8, 0x02,
1da177e4 LT	77	0xf9, 0x00,
	78	0xfa, 0x00,
	79	0xfb, 0x00,
	80	0xfc, 0x00,
	81	0xfd, 0x00,
	82	};
	83
	84	static int cx22702_writereg (struct cx22702_state* state, u8 reg, u8 data)
	85	{
	86	int ret;
	87	u8 buf [] = { reg, data };
	88	struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 };
	89
	90	ret = i2c_transfer(state->i2c, &msg, 1);
	91
	92	if (ret != 1)
	93	printk("%s: writereg error (reg == 0x%02x, val == 0x%02x, ret == %i)\n",
	94	__FUNCTION__, reg, data, ret);
	95
	96	return (ret != 1) ? -1 : 0;
	97	}
	98
	99	static u8 cx22702_readreg (struct cx22702_state* state, u8 reg)
	100	{
	101	int ret;
	102	u8 b0 [] = { reg };
	103	u8 b1 [] = { 0 };
	104
	105	struct i2c_msg msg [] = {
	106	{ .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 },
	107	{ .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } };
	108
	109	ret = i2c_transfer(state->i2c, msg, 2);
	110
	111	if (ret != 2)
	112	printk("%s: readreg error (ret == %i)\n", __FUNCTION__, ret);
	113
	114	return b1[0];
	115	}
	116
	117	static int cx22702_set_inversion (struct cx22702_state *state, int inversion)
	118	{
	119	u8 val;
	120
	121	switch (inversion) {
	122
	123	case INVERSION_AUTO:
	124	return -EOPNOTSUPP;
	125
	126	case INVERSION_ON:
	127	val = cx22702_readreg (state, 0x0C);
	128	return cx22702_writereg (state, 0x0C, val \| 0x01);
	129
	130	case INVERSION_OFF:
	131	val = cx22702_readreg (state, 0x0C);
	132	return cx22702_writereg (state, 0x0C, val & 0xfe);
	133
	134	default:
	135	return -EINVAL;
	136
	137	}
	138
	139	}
	140
141	/* Retrieve the demod settings */
142	static int cx22702_get_tps (struct cx22702_state state, struct dvb_ofdm_parameters p)
143	{
144	u8 val;
145
146	/* Make sure the TPS regs are valid */
147	if (!(cx22702_readreg(state, 0x0A) & 0x20))
148	return -EAGAIN;
149
150	val = cx22702_readreg (state, 0x01);
151	switch( (val&0x18)>>3) {
152	case 0: p->constellation = QPSK; break;
153	case 1: p->constellation = QAM_16; break;
154	case 2: p->constellation = QAM_64; break;
155	}
156	switch( val&0x07 ) {
157	case 0: p->hierarchy_information = HIERARCHY_NONE; break;
158	case 1: p->hierarchy_information = HIERARCHY_1; break;
159	case 2: p->hierarchy_information = HIERARCHY_2; break;
160	case 3: p->hierarchy_information = HIERARCHY_4; break;
161	}
162
163
164	val = cx22702_readreg (state, 0x02);
165	switch( (val&0x38)>>3 ) {
166	case 0: p->code_rate_HP = FEC_1_2; break;
167	case 1: p->code_rate_HP = FEC_2_3; break;
168	case 2: p->code_rate_HP = FEC_3_4; break;
169	case 3: p->code_rate_HP = FEC_5_6; break;
170	case 4: p->code_rate_HP = FEC_7_8; break;
171	}
172	switch( val&0x07 ) {
173	case 0: p->code_rate_LP = FEC_1_2; break;
174	case 1: p->code_rate_LP = FEC_2_3; break;
175	case 2: p->code_rate_LP = FEC_3_4; break;
176	case 3: p->code_rate_LP = FEC_5_6; break;
177	case 4: p->code_rate_LP = FEC_7_8; break;
178	}
179
180
181	val = cx22702_readreg (state, 0x03);
182	switch( (val&0x0c)>>2 ) {
183	case 0: p->guard_interval = GUARD_INTERVAL_1_32; break;
184	case 1: p->guard_interval = GUARD_INTERVAL_1_16; break;
185	case 2: p->guard_interval = GUARD_INTERVAL_1_8; break;
186	case 3: p->guard_interval = GUARD_INTERVAL_1_4; break;
187	}
188	switch( val&0x03 ) {
189	case 0: p->transmission_mode = TRANSMISSION_MODE_2K; break;
190	case 1: p->transmission_mode = TRANSMISSION_MODE_8K; break;
191	}
192
193	return 0;
194	}
195
611900c1 ST	196	static int cx22702_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
	197	{
	198	struct cx22702_state* state = fe->demodulator_priv;
	199	dprintk ("%s(%d)\n", __FUNCTION__, enable);
	200	if (enable)
	201	return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) & 0xfe);
	202	else
	203	return cx22702_writereg (state, 0x0D, cx22702_readreg(state, 0x0D) \| 1);
	204	}
	205
1da177e4 LT	206	/* Talk to the demod, set the FEC, GUARD, QAM settings etc */
	207	static int cx22702_set_tps (struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
	208	{
	209	u8 val;
b8742700	210	struct cx22702_state* state = fe->demodulator_priv;
1da177e4	211
dea74869 PB	212	if (fe->ops.tuner_ops.set_params) {
	213	fe->ops.tuner_ops.set_params(fe, p);
	214	if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0);
9990d744	215	}
1da177e4 LT	216
	217	/* set inversion */
	218	cx22702_set_inversion (state, p->inversion);
	219
	220	/* set bandwidth */
	221	switch(p->u.ofdm.bandwidth) {
	222	case BANDWIDTH_6_MHZ:
	223	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) \| 0x20 );
	224	break;
	225	case BANDWIDTH_7_MHZ:
	226	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xcf) \| 0x10 );
	227	break;
	228	case BANDWIDTH_8_MHZ:
	229	cx22702_writereg(state, 0x0C, cx22702_readreg(state, 0x0C) &0xcf );
	230	break;
	231	default:
	232	dprintk ("%s: invalid bandwidth\n",__FUNCTION__);
	233	return -EINVAL;
	234	}
	235
	236
	237	p->u.ofdm.code_rate_LP = FEC_AUTO; //temp hack as manual not working
	238
	239	/* use auto configuration? */
	240	if((p->u.ofdm.hierarchy_information==HIERARCHY_AUTO) \|\|
	241	(p->u.ofdm.constellation==QAM_AUTO) \|\|
	242	(p->u.ofdm.code_rate_HP==FEC_AUTO) \|\|
	243	(p->u.ofdm.code_rate_LP==FEC_AUTO) \|\|
	244	(p->u.ofdm.guard_interval==GUARD_INTERVAL_AUTO) \|\|
	245	(p->u.ofdm.transmission_mode==TRANSMISSION_MODE_AUTO) ) {
	246
	247	/* TPS Source - use hardware driven values */
	248	cx22702_writereg(state, 0x06, 0x10);
	249	cx22702_writereg(state, 0x07, 0x9);
	250	cx22702_writereg(state, 0x08, 0xC1);
	251	cx22702_writereg(state, 0x0B, cx22702_readreg(state, 0x0B) & 0xfc );
	252	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) \| 0x40 );
	253	cx22702_writereg(state, 0x00, 0x01); /* Begin aquisition */
f46dbb05	254	dprintk("%s: Autodetecting\n",__FUNCTION__);
1da177e4 LT	255	return 0;
	256	}
	257
	258	/* manually programmed values */
	259	val=0;
	260	switch(p->u.ofdm.constellation) {
	261	case QPSK: val = (val&0xe7); break;
	262	case QAM_16: val = (val&0xe7)\|0x08; break;
	263	case QAM_64: val = (val&0xe7)\|0x10; break;
	264	default:
	265	dprintk ("%s: invalid constellation\n",__FUNCTION__);
	266	return -EINVAL;
	267	}
	268	switch(p->u.ofdm.hierarchy_information) {
	269	case HIERARCHY_NONE: val = (val&0xf8); break;
	270	case HIERARCHY_1: val = (val&0xf8)\|1; break;
	271	case HIERARCHY_2: val = (val&0xf8)\|2; break;
	272	case HIERARCHY_4: val = (val&0xf8)\|3; break;
	273	default:
	274	dprintk ("%s: invalid hierarchy\n",__FUNCTION__);
	275	return -EINVAL;
	276	}
	277	cx22702_writereg (state, 0x06, val);
	278
	279	val=0;
	280	switch(p->u.ofdm.code_rate_HP) {
	281	case FEC_NONE:
	282	case FEC_1_2: val = (val&0xc7); break;
	283	case FEC_2_3: val = (val&0xc7)\|0x08; break;
	284	case FEC_3_4: val = (val&0xc7)\|0x10; break;
	285	case FEC_5_6: val = (val&0xc7)\|0x18; break;
	286	case FEC_7_8: val = (val&0xc7)\|0x20; break;
	287	default:
	288	dprintk ("%s: invalid code_rate_HP\n",__FUNCTION__);
	289	return -EINVAL;
	290	}
	291	switch(p->u.ofdm.code_rate_LP) {
	292	case FEC_NONE:
	293	case FEC_1_2: val = (val&0xf8); break;
	294	case FEC_2_3: val = (val&0xf8)\|1; break;
	295	case FEC_3_4: val = (val&0xf8)\|2; break;
	296	case FEC_5_6: val = (val&0xf8)\|3; break;
	297	case FEC_7_8: val = (val&0xf8)\|4; break;
	298	default:
	299	dprintk ("%s: invalid code_rate_LP\n",__FUNCTION__);
	300	return -EINVAL;
	301	}
	302	cx22702_writereg (state, 0x07, val);
	303
	304	val=0;
	305	switch(p->u.ofdm.guard_interval) {
	306	case GUARD_INTERVAL_1_32: val = (val&0xf3); break;
	307	case GUARD_INTERVAL_1_16: val = (val&0xf3)\|0x04; break;
	308	case GUARD_INTERVAL_1_8: val = (val&0xf3)\|0x08; break;
	309	case GUARD_INTERVAL_1_4: val = (val&0xf3)\|0x0c; break;
	310	default:
	311	dprintk ("%s: invalid guard_interval\n",__FUNCTION__);
	312	return -EINVAL;
	313	}
	314	switch(p->u.ofdm.transmission_mode) {
	315	case TRANSMISSION_MODE_2K: val = (val&0xfc); break;
	316	case TRANSMISSION_MODE_8K: val = (val&0xfc)\|1; break;
	317	default:
	318	dprintk ("%s: invalid transmission_mode\n",__FUNCTION__);
319	return -EINVAL;
320	}
321	cx22702_writereg(state, 0x08, val);
322	cx22702_writereg(state, 0x0B, (cx22702_readreg(state, 0x0B) & 0xfc) \| 0x02 );
323	cx22702_writereg(state, 0x0C, (cx22702_readreg(state, 0x0C) & 0xBF) \| 0x40 );
324
325	/* Begin channel aquisition */
326	cx22702_writereg(state, 0x00, 0x01);
327
328	return 0;
329	}
330
331	/* Reset the demod hardware and reset all of the configuration registers
332	to a default state. */
333	static int cx22702_init (struct dvb_frontend* fe)
334	{
335	int i;
b8742700	336	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	337
	338	cx22702_writereg (state, 0x00, 0x02);
	339
	340	msleep(10);
	341
	342	for (i=0; i<sizeof(init_tab); i+=2)
	343	cx22702_writereg (state, init_tab[i], init_tab[i+1]);
	344
f46dbb05	345	cx22702_writereg (state, 0xf8, (state->config->output_mode << 1) & 0x02);
1da177e4	346
611900c1	347	cx22702_i2c_gate_ctrl(fe, 0);
1da177e4 LT	348
	349	return 0;
	350	}
	351
	352	static int cx22702_read_status(struct dvb_frontend* fe, fe_status_t* status)
	353	{
b8742700	354	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	355	u8 reg0A;
	356	u8 reg23;
	357
	358	*status = 0;
	359
	360	reg0A = cx22702_readreg (state, 0x0A);
	361	reg23 = cx22702_readreg (state, 0x23);
	362
	363	dprintk ("%s: status demod=0x%02x agc=0x%02x\n"
	364	,__FUNCTION__,reg0A,reg23);
	365
	366	if(reg0A & 0x10) {
	367	*status \|= FE_HAS_LOCK;
	368	*status \|= FE_HAS_VITERBI;
	369	*status \|= FE_HAS_SYNC;
	370	}
	371
	372	if(reg0A & 0x20)
	373	*status \|= FE_HAS_CARRIER;
	374
	375	if(reg23 < 0xf0)
	376	*status \|= FE_HAS_SIGNAL;
	377
	378	return 0;
	379	}
	380
	381	static int cx22702_read_ber(struct dvb_frontend* fe, u32* ber)
	382	{
b8742700	383	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	384
	385	if(cx22702_readreg (state, 0xE4) & 0x02) {
	386	/* Realtime statistics */
	387	*ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
	388	\| (cx22702_readreg (state, 0xDF)&0x7F);
	389	} else {
	390	/* Averagtine statistics */
	391	*ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
	392	\| cx22702_readreg (state, 0xDF);
	393	}
	394
	395	return 0;
	396	}
	397
	398	static int cx22702_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength)
	399	{
b8742700	400	struct cx22702_state* state = fe->demodulator_priv;
1da177e4	401
1e9dadbe BK	402	u16 rs_ber = 0;
	403	rs_ber = cx22702_readreg (state, 0x23);
	404	*signal_strength = (rs_ber << 8) \| rs_ber;
1da177e4 LT	405
	406	return 0;
	407	}
	408
	409	static int cx22702_read_snr(struct dvb_frontend* fe, u16* snr)
	410	{
b8742700	411	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	412
	413	u16 rs_ber=0;
	414	if(cx22702_readreg (state, 0xE4) & 0x02) {
	415	/* Realtime statistics */
	416	rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 7
	417	\| (cx22702_readreg (state, 0xDF)& 0x7F);
	418	} else {
	419	/* Averagine statistics */
	420	rs_ber = (cx22702_readreg (state, 0xDE) & 0x7F) << 8
	421	\| cx22702_readreg (state, 0xDF);
	422	}
	423	*snr = ~rs_ber;
	424
	425	return 0;
	426	}
	427
	428	static int cx22702_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
	429	{
b8742700	430	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	431
	432	u8 _ucblocks;
	433
	434	/* RS Uncorrectable Packet Count then reset */
	435	_ucblocks = cx22702_readreg (state, 0xE3);
f46dbb05 PB	436	if (state->prevUCBlocks < _ucblocks)
	437	*ucblocks = (_ucblocks - state->prevUCBlocks);
	438	else
	439	*ucblocks = state->prevUCBlocks - _ucblocks;
1da177e4 LT	440	state->prevUCBlocks = _ucblocks;
	441
	442	return 0;
	443	}
	444
	445	static int cx22702_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p)
	446	{
b8742700	447	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	448
	449	u8 reg0C = cx22702_readreg (state, 0x0C);
	450
	451	p->inversion = reg0C & 0x1 ? INVERSION_ON : INVERSION_OFF;
	452	return cx22702_get_tps (state, &p->u.ofdm);
	453	}
	454
f46dbb05 PB	455	static int cx22702_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings *tune)
	456	{
	457	tune->min_delay_ms = 1000;
	458	return 0;
	459	}
	460
1da177e4 LT	461	static void cx22702_release(struct dvb_frontend* fe)
1da177e4 LT	462	{
b8742700	463	struct cx22702_state* state = fe->demodulator_priv;
1da177e4 LT	464	kfree(state);
	465	}
	466
	467	static struct dvb_frontend_ops cx22702_ops;
	468
	469	struct dvb_frontend* cx22702_attach(const struct cx22702_config* config,
	470	struct i2c_adapter* i2c)
	471	{
	472	struct cx22702_state* state = NULL;
	473
	474	/* allocate memory for the internal state */
b8742700	475	state = kmalloc(sizeof(struct cx22702_state), GFP_KERNEL);
f46dbb05 PB	476	if (state == NULL)
f46dbb05 PB	477	goto error;
1da177e4 LT	478
	479	/* setup the state */
	480	state->config = config;
	481	state->i2c = i2c;
1da177e4 LT	482	state->prevUCBlocks = 0;
	483
	484	/* check if the demod is there */
f46dbb05 PB	485	if (cx22702_readreg(state, 0x1f) != 0x3)
f46dbb05 PB	486	goto error;
1da177e4 LT	487
1da177e4 LT	488	/* create dvb_frontend */
dea74869	489	memcpy(&state->frontend.ops, &cx22702_ops, sizeof(struct dvb_frontend_ops));
1da177e4 LT	490	state->frontend.demodulator_priv = state;
	491	return &state->frontend;
	492
	493	error:
	494	kfree(state);
	495	return NULL;
	496	}
	497
	498	static struct dvb_frontend_ops cx22702_ops = {
	499
	500	.info = {
	501	.name = "Conexant CX22702 DVB-T",
	502	.type = FE_OFDM,
	503	.frequency_min = 177000000,
	504	.frequency_max = 858000000,
	505	.frequency_stepsize = 166666,
	506	.caps = FE_CAN_FEC_1_2 \| FE_CAN_FEC_2_3 \| FE_CAN_FEC_3_4 \|
	507	FE_CAN_FEC_5_6 \| FE_CAN_FEC_7_8 \| FE_CAN_FEC_AUTO \|
	508	FE_CAN_QPSK \| FE_CAN_QAM_16 \| FE_CAN_QAM_64 \| FE_CAN_QAM_AUTO \|
	509	FE_CAN_HIERARCHY_AUTO \| FE_CAN_GUARD_INTERVAL_AUTO \|
	510	FE_CAN_TRANSMISSION_MODE_AUTO \| FE_CAN_RECOVER
	511	},
	512
	513	.release = cx22702_release,
	514
	515	.init = cx22702_init,
02444222	516	.i2c_gate_ctrl = cx22702_i2c_gate_ctrl,
1da177e4 LT	517
	518	.set_frontend = cx22702_set_tps,
	519	.get_frontend = cx22702_get_frontend,
f46dbb05	520	.get_tune_settings = cx22702_get_tune_settings,
1da177e4 LT	521
	522	.read_status = cx22702_read_status,
	523	.read_ber = cx22702_read_ber,
	524	.read_signal_strength = cx22702_read_signal_strength,
	525	.read_snr = cx22702_read_snr,
	526	.read_ucblocks = cx22702_read_ucblocks,
	527	};
	528
	529	module_param(debug, int, 0644);
	530	MODULE_PARM_DESC(debug, "Enable verbose debug messages");
	531
	532	MODULE_DESCRIPTION("Conexant CX22702 DVB-T Demodulator driver");
	533	MODULE_AUTHOR("Steven Toth");
	534	MODULE_LICENSE("GPL");
	535
	536	EXPORT_SYMBOL(cx22702_attach);