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Commit | Line | Data |
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b79cb653 ST |
1 | /* |
2 | Conexant cx24123/cx24109 - DVB QPSK Satellite demod/tuner driver | |
3 | ||
4 | Copyright (C) 2005 Steven Toth <stoth@hauppauge.com> | |
5 | ||
1c956a3a VC |
6 | Support for KWorld DVB-S 100 by Vadim Catana <skystar@moldova.cc> |
7 | ||
b79cb653 ST |
8 | This program is free software; you can redistribute it and/or modify |
9 | it under the terms of the GNU General Public License as published by | |
10 | the Free Software Foundation; either version 2 of the License, or | |
11 | (at your option) any later version. | |
12 | ||
13 | This program is distributed in the hope that it will be useful, | |
14 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | GNU General Public License for more details. | |
17 | ||
18 | You should have received a copy of the GNU General Public License | |
19 | along with this program; if not, write to the Free Software | |
20 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
23 | #include <linux/slab.h> | |
24 | #include <linux/kernel.h> | |
25 | #include <linux/module.h> | |
26 | #include <linux/moduleparam.h> | |
27 | #include <linux/init.h> | |
28 | ||
29 | #include "dvb_frontend.h" | |
30 | #include "cx24123.h" | |
31 | ||
a74b51fc VC |
32 | #define XTAL 10111000 |
33 | ||
70047f9c | 34 | static int force_band; |
b79cb653 ST |
35 | static int debug; |
36 | #define dprintk(args...) \ | |
37 | do { \ | |
38 | if (debug) printk (KERN_DEBUG "cx24123: " args); \ | |
39 | } while (0) | |
40 | ||
e3b152bc JS |
41 | struct cx24123_state |
42 | { | |
b79cb653 ST |
43 | struct i2c_adapter* i2c; |
44 | struct dvb_frontend_ops ops; | |
45 | const struct cx24123_config* config; | |
46 | ||
47 | struct dvb_frontend frontend; | |
48 | ||
49 | u32 lastber; | |
50 | u16 snr; | |
b79cb653 ST |
51 | |
52 | /* Some PLL specifics for tuning */ | |
53 | u32 VCAarg; | |
54 | u32 VGAarg; | |
55 | u32 bandselectarg; | |
56 | u32 pllarg; | |
a74b51fc | 57 | u32 FILTune; |
b79cb653 ST |
58 | |
59 | /* The Demod/Tuner can't easily provide these, we cache them */ | |
60 | u32 currentfreq; | |
61 | u32 currentsymbolrate; | |
62 | }; | |
63 | ||
e3b152bc JS |
64 | /* Various tuner defaults need to be established for a given symbol rate Sps */ |
65 | static struct | |
66 | { | |
67 | u32 symbolrate_low; | |
68 | u32 symbolrate_high; | |
e3b152bc JS |
69 | u32 VCAprogdata; |
70 | u32 VGAprogdata; | |
a74b51fc | 71 | u32 FILTune; |
e3b152bc JS |
72 | } cx24123_AGC_vals[] = |
73 | { | |
74 | { | |
75 | .symbolrate_low = 1000000, | |
76 | .symbolrate_high = 4999999, | |
a74b51fc VC |
77 | /* the specs recommend other values for VGA offsets, |
78 | but tests show they are wrong */ | |
0e4558ab YP |
79 | .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, |
80 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x07, | |
81 | .FILTune = 0x27f /* 0.41 V */ | |
e3b152bc JS |
82 | }, |
83 | { | |
84 | .symbolrate_low = 5000000, | |
85 | .symbolrate_high = 14999999, | |
0e4558ab YP |
86 | .VGAprogdata = (1 << 19) | (0x180 << 9) | 0x1e0, |
87 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x1f, | |
a74b51fc | 88 | .FILTune = 0x317 /* 0.90 V */ |
e3b152bc JS |
89 | }, |
90 | { | |
91 | .symbolrate_low = 15000000, | |
92 | .symbolrate_high = 45000000, | |
0e4558ab YP |
93 | .VGAprogdata = (1 << 19) | (0x100 << 9) | 0x180, |
94 | .VCAprogdata = (2 << 19) | (0x07 << 9) | 0x3f, | |
95 | .FILTune = 0x145 /* 2.70 V */ | |
e3b152bc JS |
96 | }, |
97 | }; | |
98 | ||
99 | /* | |
100 | * Various tuner defaults need to be established for a given frequency kHz. | |
101 | * fixme: The bounds on the bands do not match the doc in real life. | |
102 | * fixme: Some of them have been moved, other might need adjustment. | |
103 | */ | |
104 | static struct | |
105 | { | |
106 | u32 freq_low; | |
107 | u32 freq_high; | |
e3b152bc | 108 | u32 VCOdivider; |
e3b152bc JS |
109 | u32 progdata; |
110 | } cx24123_bandselect_vals[] = | |
111 | { | |
70047f9c | 112 | /* band 1 */ |
e3b152bc JS |
113 | { |
114 | .freq_low = 950000, | |
e3b152bc | 115 | .freq_high = 1074999, |
e3b152bc | 116 | .VCOdivider = 4, |
70047f9c | 117 | .progdata = (0 << 19) | (0 << 9) | 0x40, |
e3b152bc | 118 | }, |
70047f9c YP |
119 | |
120 | /* band 2 */ | |
e3b152bc JS |
121 | { |
122 | .freq_low = 1075000, | |
70047f9c YP |
123 | .freq_high = 1177999, |
124 | .VCOdivider = 4, | |
125 | .progdata = (0 << 19) | (0 << 9) | 0x80, | |
e3b152bc | 126 | }, |
70047f9c YP |
127 | |
128 | /* band 3 */ | |
e3b152bc | 129 | { |
70047f9c YP |
130 | .freq_low = 1178000, |
131 | .freq_high = 1295999, | |
e3b152bc | 132 | .VCOdivider = 2, |
70047f9c | 133 | .progdata = (0 << 19) | (1 << 9) | 0x01, |
e3b152bc | 134 | }, |
70047f9c YP |
135 | |
136 | /* band 4 */ | |
e3b152bc | 137 | { |
70047f9c YP |
138 | .freq_low = 1296000, |
139 | .freq_high = 1431999, | |
e3b152bc | 140 | .VCOdivider = 2, |
70047f9c | 141 | .progdata = (0 << 19) | (1 << 9) | 0x02, |
e3b152bc | 142 | }, |
70047f9c YP |
143 | |
144 | /* band 5 */ | |
e3b152bc | 145 | { |
70047f9c YP |
146 | .freq_low = 1432000, |
147 | .freq_high = 1575999, | |
e3b152bc | 148 | .VCOdivider = 2, |
70047f9c | 149 | .progdata = (0 << 19) | (1 << 9) | 0x04, |
e3b152bc | 150 | }, |
70047f9c YP |
151 | |
152 | /* band 6 */ | |
e3b152bc | 153 | { |
70047f9c | 154 | .freq_low = 1576000, |
e3b152bc | 155 | .freq_high = 1717999, |
e3b152bc | 156 | .VCOdivider = 2, |
70047f9c | 157 | .progdata = (0 << 19) | (1 << 9) | 0x08, |
e3b152bc | 158 | }, |
70047f9c YP |
159 | |
160 | /* band 7 */ | |
e3b152bc JS |
161 | { |
162 | .freq_low = 1718000, | |
163 | .freq_high = 1855999, | |
e3b152bc | 164 | .VCOdivider = 2, |
70047f9c | 165 | .progdata = (0 << 19) | (1 << 9) | 0x10, |
e3b152bc | 166 | }, |
70047f9c YP |
167 | |
168 | /* band 8 */ | |
e3b152bc JS |
169 | { |
170 | .freq_low = 1856000, | |
171 | .freq_high = 2035999, | |
e3b152bc | 172 | .VCOdivider = 2, |
70047f9c | 173 | .progdata = (0 << 19) | (1 << 9) | 0x20, |
e3b152bc | 174 | }, |
70047f9c YP |
175 | |
176 | /* band 9 */ | |
e3b152bc JS |
177 | { |
178 | .freq_low = 2036000, | |
70047f9c | 179 | .freq_high = 2150000, |
e3b152bc | 180 | .VCOdivider = 2, |
70047f9c | 181 | .progdata = (0 << 19) | (1 << 9) | 0x40, |
e3b152bc JS |
182 | }, |
183 | }; | |
184 | ||
b79cb653 ST |
185 | static struct { |
186 | u8 reg; | |
187 | u8 data; | |
188 | } cx24123_regdata[] = | |
189 | { | |
190 | {0x00, 0x03}, /* Reset system */ | |
191 | {0x00, 0x00}, /* Clear reset */ | |
0e4558ab YP |
192 | {0x03, 0x07}, /* QPSK, DVB, Auto Acquisition (default) */ |
193 | {0x04, 0x10}, /* MPEG */ | |
194 | {0x05, 0x04}, /* MPEG */ | |
195 | {0x06, 0x31}, /* MPEG (default) */ | |
196 | {0x0b, 0x00}, /* Freq search start point (default) */ | |
197 | {0x0c, 0x00}, /* Demodulator sample gain (default) */ | |
198 | {0x0d, 0x02}, /* Frequency search range = Fsymbol / 4 (default) */ | |
199 | {0x0e, 0x03}, /* Default non-inverted, FEC 3/4 (default) */ | |
200 | {0x0f, 0xfe}, /* FEC search mask (all supported codes) */ | |
201 | {0x10, 0x01}, /* Default search inversion, no repeat (default) */ | |
202 | {0x16, 0x00}, /* Enable reading of frequency */ | |
203 | {0x17, 0x01}, /* Enable EsNO Ready Counter */ | |
204 | {0x1c, 0x80}, /* Enable error counter */ | |
205 | {0x20, 0x00}, /* Tuner burst clock rate = 500KHz */ | |
206 | {0x21, 0x15}, /* Tuner burst mode, word length = 0x15 */ | |
207 | {0x28, 0x00}, /* Enable FILTERV with positive pol., DiSEqC 2.x off */ | |
208 | {0x29, 0x00}, /* DiSEqC LNB_DC off */ | |
209 | {0x2a, 0xb0}, /* DiSEqC Parameters (default) */ | |
210 | {0x2b, 0x73}, /* DiSEqC Tone Frequency (default) */ | |
211 | {0x2c, 0x00}, /* DiSEqC Message (0x2c - 0x31) */ | |
b79cb653 ST |
212 | {0x2d, 0x00}, |
213 | {0x2e, 0x00}, | |
214 | {0x2f, 0x00}, | |
215 | {0x30, 0x00}, | |
216 | {0x31, 0x00}, | |
0e4558ab YP |
217 | {0x32, 0x8c}, /* DiSEqC Parameters (default) */ |
218 | {0x33, 0x00}, /* Interrupts off (0x33 - 0x34) */ | |
b79cb653 | 219 | {0x34, 0x00}, |
0e4558ab YP |
220 | {0x35, 0x03}, /* DiSEqC Tone Amplitude (default) */ |
221 | {0x36, 0x02}, /* DiSEqC Parameters (default) */ | |
222 | {0x37, 0x3a}, /* DiSEqC Parameters (default) */ | |
223 | {0x3a, 0x00}, /* Enable AGC accumulator (for signal strength) */ | |
224 | {0x44, 0x00}, /* Constellation (default) */ | |
225 | {0x45, 0x00}, /* Symbol count (default) */ | |
226 | {0x46, 0x0d}, /* Symbol rate estimator on (default) */ | |
227 | {0x56, 0x41}, /* Various (default) */ | |
228 | {0x57, 0xff}, /* Error Counter Window (default) */ | |
229 | {0x67, 0x83}, /* Non-DCII symbol clock */ | |
b79cb653 ST |
230 | }; |
231 | ||
232 | static int cx24123_writereg(struct cx24123_state* state, int reg, int data) | |
233 | { | |
234 | u8 buf[] = { reg, data }; | |
235 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | |
236 | int err; | |
237 | ||
caf970e0 MCC |
238 | if (debug>1) |
239 | printk("cx24123: %s: write reg 0x%02x, value 0x%02x\n", | |
240 | __FUNCTION__,reg, data); | |
241 | ||
b79cb653 ST |
242 | if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) { |
243 | printk("%s: writereg error(err == %i, reg == 0x%02x," | |
244 | " data == 0x%02x)\n", __FUNCTION__, err, reg, data); | |
245 | return -EREMOTEIO; | |
246 | } | |
247 | ||
248 | return 0; | |
249 | } | |
250 | ||
b79cb653 ST |
251 | static int cx24123_readreg(struct cx24123_state* state, u8 reg) |
252 | { | |
253 | int ret; | |
254 | u8 b0[] = { reg }; | |
255 | u8 b1[] = { 0 }; | |
256 | struct i2c_msg msg[] = { | |
257 | { .addr = state->config->demod_address, .flags = 0, .buf = b0, .len = 1 }, | |
258 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b1, .len = 1 } | |
259 | }; | |
260 | ||
261 | ret = i2c_transfer(state->i2c, msg, 2); | |
262 | ||
263 | if (ret != 2) { | |
264 | printk("%s: reg=0x%x (error=%d)\n", __FUNCTION__, reg, ret); | |
265 | return ret; | |
266 | } | |
267 | ||
caf970e0 MCC |
268 | if (debug>1) |
269 | printk("cx24123: read reg 0x%02x, value 0x%02x\n",reg, ret); | |
270 | ||
b79cb653 ST |
271 | return b1[0]; |
272 | } | |
273 | ||
b79cb653 ST |
274 | static int cx24123_set_inversion(struct cx24123_state* state, fe_spectral_inversion_t inversion) |
275 | { | |
0e4558ab YP |
276 | u8 nom_reg = cx24123_readreg(state, 0x0e); |
277 | u8 auto_reg = cx24123_readreg(state, 0x10); | |
278 | ||
b79cb653 ST |
279 | switch (inversion) { |
280 | case INVERSION_OFF: | |
caf970e0 | 281 | dprintk("%s: inversion off\n",__FUNCTION__); |
0e4558ab YP |
282 | cx24123_writereg(state, 0x0e, nom_reg & ~0x80); |
283 | cx24123_writereg(state, 0x10, auto_reg | 0x80); | |
b79cb653 ST |
284 | break; |
285 | case INVERSION_ON: | |
caf970e0 | 286 | dprintk("%s: inversion on\n",__FUNCTION__); |
0e4558ab YP |
287 | cx24123_writereg(state, 0x0e, nom_reg | 0x80); |
288 | cx24123_writereg(state, 0x10, auto_reg | 0x80); | |
b79cb653 ST |
289 | break; |
290 | case INVERSION_AUTO: | |
caf970e0 | 291 | dprintk("%s: inversion auto\n",__FUNCTION__); |
0e4558ab | 292 | cx24123_writereg(state, 0x10, auto_reg & ~0x80); |
b79cb653 ST |
293 | break; |
294 | default: | |
295 | return -EINVAL; | |
296 | } | |
297 | ||
298 | return 0; | |
299 | } | |
300 | ||
301 | static int cx24123_get_inversion(struct cx24123_state* state, fe_spectral_inversion_t *inversion) | |
302 | { | |
303 | u8 val; | |
304 | ||
305 | val = cx24123_readreg(state, 0x1b) >> 7; | |
306 | ||
caf970e0 MCC |
307 | if (val == 0) { |
308 | dprintk("%s: read inversion off\n",__FUNCTION__); | |
e3b152bc | 309 | *inversion = INVERSION_OFF; |
caf970e0 MCC |
310 | } else { |
311 | dprintk("%s: read inversion on\n",__FUNCTION__); | |
e3b152bc | 312 | *inversion = INVERSION_ON; |
caf970e0 | 313 | } |
b79cb653 ST |
314 | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static int cx24123_set_fec(struct cx24123_state* state, fe_code_rate_t fec) | |
319 | { | |
0e4558ab YP |
320 | u8 nom_reg = cx24123_readreg(state, 0x0e) & ~0x07; |
321 | ||
b79cb653 | 322 | if ( (fec < FEC_NONE) || (fec > FEC_AUTO) ) |
e3b152bc | 323 | fec = FEC_AUTO; |
b79cb653 | 324 | |
b79cb653 | 325 | switch (fec) { |
b79cb653 | 326 | case FEC_1_2: |
caf970e0 | 327 | dprintk("%s: set FEC to 1/2\n",__FUNCTION__); |
0e4558ab YP |
328 | cx24123_writereg(state, 0x0e, nom_reg | 0x01); |
329 | cx24123_writereg(state, 0x0f, 0x02); | |
330 | break; | |
b79cb653 | 331 | case FEC_2_3: |
caf970e0 | 332 | dprintk("%s: set FEC to 2/3\n",__FUNCTION__); |
0e4558ab YP |
333 | cx24123_writereg(state, 0x0e, nom_reg | 0x02); |
334 | cx24123_writereg(state, 0x0f, 0x04); | |
335 | break; | |
b79cb653 | 336 | case FEC_3_4: |
caf970e0 | 337 | dprintk("%s: set FEC to 3/4\n",__FUNCTION__); |
0e4558ab YP |
338 | cx24123_writereg(state, 0x0e, nom_reg | 0x03); |
339 | cx24123_writereg(state, 0x0f, 0x08); | |
340 | break; | |
341 | case FEC_4_5: | |
caf970e0 | 342 | dprintk("%s: set FEC to 4/5\n",__FUNCTION__); |
0e4558ab YP |
343 | cx24123_writereg(state, 0x0e, nom_reg | 0x04); |
344 | cx24123_writereg(state, 0x0f, 0x10); | |
345 | break; | |
346 | case FEC_5_6: | |
caf970e0 | 347 | dprintk("%s: set FEC to 5/6\n",__FUNCTION__); |
0e4558ab YP |
348 | cx24123_writereg(state, 0x0e, nom_reg | 0x05); |
349 | cx24123_writereg(state, 0x0f, 0x20); | |
350 | break; | |
351 | case FEC_6_7: | |
352 | dprintk("%s: set FEC to 6/7\n",__FUNCTION__); | |
353 | cx24123_writereg(state, 0x0e, nom_reg | 0x06); | |
354 | cx24123_writereg(state, 0x0f, 0x40); | |
355 | break; | |
356 | case FEC_7_8: | |
357 | dprintk("%s: set FEC to 7/8\n",__FUNCTION__); | |
358 | cx24123_writereg(state, 0x0e, nom_reg | 0x07); | |
359 | cx24123_writereg(state, 0x0f, 0x80); | |
360 | break; | |
b79cb653 | 361 | case FEC_AUTO: |
caf970e0 | 362 | dprintk("%s: set FEC to auto\n",__FUNCTION__); |
0e4558ab YP |
363 | cx24123_writereg(state, 0x0f, 0xfe); |
364 | break; | |
b79cb653 ST |
365 | default: |
366 | return -EOPNOTSUPP; | |
367 | } | |
0e4558ab YP |
368 | |
369 | return 0; | |
b79cb653 ST |
370 | } |
371 | ||
372 | static int cx24123_get_fec(struct cx24123_state* state, fe_code_rate_t *fec) | |
373 | { | |
e3b152bc | 374 | int ret; |
b79cb653 | 375 | |
e3b152bc JS |
376 | ret = cx24123_readreg (state, 0x1b); |
377 | if (ret < 0) | |
378 | return ret; | |
a74b51fc VC |
379 | ret = ret & 0x07; |
380 | ||
381 | switch (ret) { | |
b79cb653 | 382 | case 1: |
e3b152bc JS |
383 | *fec = FEC_1_2; |
384 | break; | |
a74b51fc | 385 | case 2: |
e3b152bc JS |
386 | *fec = FEC_2_3; |
387 | break; | |
a74b51fc | 388 | case 3: |
e3b152bc JS |
389 | *fec = FEC_3_4; |
390 | break; | |
a74b51fc | 391 | case 4: |
e3b152bc JS |
392 | *fec = FEC_4_5; |
393 | break; | |
a74b51fc | 394 | case 5: |
e3b152bc JS |
395 | *fec = FEC_5_6; |
396 | break; | |
a74b51fc VC |
397 | case 6: |
398 | *fec = FEC_6_7; | |
399 | break; | |
b79cb653 | 400 | case 7: |
e3b152bc JS |
401 | *fec = FEC_7_8; |
402 | break; | |
b79cb653 | 403 | default: |
0e4558ab YP |
404 | /* this can happen when there's no lock */ |
405 | *fec = FEC_NONE; | |
b79cb653 ST |
406 | } |
407 | ||
e3b152bc | 408 | return 0; |
b79cb653 ST |
409 | } |
410 | ||
0e4558ab YP |
411 | /* Approximation of closest integer of log2(a/b). It actually gives the |
412 | lowest integer i such that 2^i >= round(a/b) */ | |
413 | static u32 cx24123_int_log2(u32 a, u32 b) | |
414 | { | |
415 | u32 exp, nearest = 0; | |
416 | u32 div = a / b; | |
417 | if(a % b >= b / 2) ++div; | |
418 | if(div < (1 << 31)) | |
419 | { | |
420 | for(exp = 1; div > exp; nearest++) | |
421 | exp += exp; | |
422 | } | |
423 | return nearest; | |
424 | } | |
425 | ||
b79cb653 ST |
426 | static int cx24123_set_symbolrate(struct cx24123_state* state, u32 srate) |
427 | { | |
0e4558ab | 428 | u32 tmp, sample_rate, ratio, sample_gain; |
a74b51fc VC |
429 | u8 pll_mult; |
430 | ||
431 | /* check if symbol rate is within limits */ | |
432 | if ((srate > state->ops.info.symbol_rate_max) || | |
433 | (srate < state->ops.info.symbol_rate_min)) | |
434 | return -EOPNOTSUPP;; | |
435 | ||
436 | /* choose the sampling rate high enough for the required operation, | |
437 | while optimizing the power consumed by the demodulator */ | |
438 | if (srate < (XTAL*2)/2) | |
439 | pll_mult = 2; | |
440 | else if (srate < (XTAL*3)/2) | |
441 | pll_mult = 3; | |
442 | else if (srate < (XTAL*4)/2) | |
443 | pll_mult = 4; | |
444 | else if (srate < (XTAL*5)/2) | |
445 | pll_mult = 5; | |
446 | else if (srate < (XTAL*6)/2) | |
447 | pll_mult = 6; | |
448 | else if (srate < (XTAL*7)/2) | |
449 | pll_mult = 7; | |
450 | else if (srate < (XTAL*8)/2) | |
451 | pll_mult = 8; | |
452 | else | |
453 | pll_mult = 9; | |
454 | ||
455 | ||
456 | sample_rate = pll_mult * XTAL; | |
b79cb653 | 457 | |
a74b51fc VC |
458 | /* |
459 | SYSSymbolRate[21:0] = (srate << 23) / sample_rate | |
b79cb653 | 460 | |
a74b51fc VC |
461 | We have to use 32 bit unsigned arithmetic without precision loss. |
462 | The maximum srate is 45000000 or 0x02AEA540. This number has | |
463 | only 6 clear bits on top, hence we can shift it left only 6 bits | |
464 | at a time. Borrowed from cx24110.c | |
465 | */ | |
b79cb653 | 466 | |
a74b51fc VC |
467 | tmp = srate << 6; |
468 | ratio = tmp / sample_rate; | |
469 | ||
470 | tmp = (tmp % sample_rate) << 6; | |
471 | ratio = (ratio << 6) + (tmp / sample_rate); | |
472 | ||
473 | tmp = (tmp % sample_rate) << 6; | |
474 | ratio = (ratio << 6) + (tmp / sample_rate); | |
475 | ||
476 | tmp = (tmp % sample_rate) << 5; | |
477 | ratio = (ratio << 5) + (tmp / sample_rate); | |
478 | ||
479 | ||
480 | cx24123_writereg(state, 0x01, pll_mult * 6); | |
481 | ||
482 | cx24123_writereg(state, 0x08, (ratio >> 16) & 0x3f ); | |
483 | cx24123_writereg(state, 0x09, (ratio >> 8) & 0xff ); | |
484 | cx24123_writereg(state, 0x0a, (ratio ) & 0xff ); | |
485 | ||
0e4558ab YP |
486 | /* also set the demodulator sample gain */ |
487 | sample_gain = cx24123_int_log2(sample_rate, srate); | |
488 | tmp = cx24123_readreg(state, 0x0c) & ~0xe0; | |
489 | cx24123_writereg(state, 0x0c, tmp | sample_gain << 5); | |
490 | ||
491 | dprintk("%s: srate=%d, ratio=0x%08x, sample_rate=%i sample_gain=%d\n", __FUNCTION__, srate, ratio, sample_rate, sample_gain); | |
b79cb653 ST |
492 | |
493 | return 0; | |
494 | } | |
495 | ||
496 | /* | |
497 | * Based on the required frequency and symbolrate, the tuner AGC has to be configured | |
498 | * and the correct band selected. Calculate those values | |
499 | */ | |
500 | static int cx24123_pll_calculate(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
501 | { | |
502 | struct cx24123_state *state = fe->demodulator_priv; | |
e3b152bc JS |
503 | u32 ndiv = 0, adiv = 0, vco_div = 0; |
504 | int i = 0; | |
a74b51fc | 505 | int pump = 2; |
70047f9c YP |
506 | int band = 0; |
507 | int num_bands = sizeof(cx24123_bandselect_vals) / sizeof(cx24123_bandselect_vals[0]); | |
b79cb653 ST |
508 | |
509 | /* Defaults for low freq, low rate */ | |
510 | state->VCAarg = cx24123_AGC_vals[0].VCAprogdata; | |
511 | state->VGAarg = cx24123_AGC_vals[0].VGAprogdata; | |
512 | state->bandselectarg = cx24123_bandselect_vals[0].progdata; | |
513 | vco_div = cx24123_bandselect_vals[0].VCOdivider; | |
514 | ||
a74b51fc | 515 | /* For the given symbol rate, determine the VCA, VGA and FILTUNE programming bits */ |
e3b152bc | 516 | for (i = 0; i < sizeof(cx24123_AGC_vals) / sizeof(cx24123_AGC_vals[0]); i++) |
b79cb653 ST |
517 | { |
518 | if ((cx24123_AGC_vals[i].symbolrate_low <= p->u.qpsk.symbol_rate) && | |
a74b51fc | 519 | (cx24123_AGC_vals[i].symbolrate_high >= p->u.qpsk.symbol_rate) ) { |
b79cb653 ST |
520 | state->VCAarg = cx24123_AGC_vals[i].VCAprogdata; |
521 | state->VGAarg = cx24123_AGC_vals[i].VGAprogdata; | |
a74b51fc | 522 | state->FILTune = cx24123_AGC_vals[i].FILTune; |
b79cb653 ST |
523 | } |
524 | } | |
525 | ||
70047f9c YP |
526 | /* determine the band to use */ |
527 | if(force_band < 1 || force_band > num_bands) | |
b79cb653 | 528 | { |
70047f9c YP |
529 | for (i = 0; i < num_bands; i++) |
530 | { | |
531 | if ((cx24123_bandselect_vals[i].freq_low <= p->frequency) && | |
532 | (cx24123_bandselect_vals[i].freq_high >= p->frequency) ) | |
533 | band = i; | |
b79cb653 ST |
534 | } |
535 | } | |
70047f9c YP |
536 | else |
537 | band = force_band - 1; | |
538 | ||
539 | state->bandselectarg = cx24123_bandselect_vals[band].progdata; | |
540 | vco_div = cx24123_bandselect_vals[band].VCOdivider; | |
541 | ||
542 | /* determine the charge pump current */ | |
543 | if ( p->frequency < (cx24123_bandselect_vals[band].freq_low + cx24123_bandselect_vals[band].freq_high)/2 ) | |
544 | pump = 0x01; | |
545 | else | |
546 | pump = 0x02; | |
b79cb653 ST |
547 | |
548 | /* Determine the N/A dividers for the requested lband freq (in kHz). */ | |
a74b51fc VC |
549 | /* Note: the reference divider R=10, frequency is in KHz, XTAL is in Hz */ |
550 | ndiv = ( ((p->frequency * vco_div * 10) / (2 * XTAL / 1000)) / 32) & 0x1ff; | |
551 | adiv = ( ((p->frequency * vco_div * 10) / (2 * XTAL / 1000)) % 32) & 0x1f; | |
b79cb653 ST |
552 | |
553 | if (adiv == 0) | |
a74b51fc | 554 | ndiv++; |
b79cb653 | 555 | |
a74b51fc VC |
556 | /* control bits 11, refdiv 11, charge pump polarity 1, charge pump current, ndiv, adiv */ |
557 | state->pllarg = (3 << 19) | (3 << 17) | (1 << 16) | (pump << 14) | (ndiv << 5) | adiv; | |
b79cb653 ST |
558 | |
559 | return 0; | |
560 | } | |
561 | ||
562 | /* | |
563 | * Tuner data is 21 bits long, must be left-aligned in data. | |
564 | * Tuner cx24109 is written through a dedicated 3wire interface on the demod chip. | |
565 | */ | |
566 | static int cx24123_pll_writereg(struct dvb_frontend* fe, struct dvb_frontend_parameters *p, u32 data) | |
567 | { | |
568 | struct cx24123_state *state = fe->demodulator_priv; | |
0144f314 | 569 | unsigned long timeout; |
b79cb653 | 570 | |
caf970e0 MCC |
571 | dprintk("%s: pll writereg called, data=0x%08x\n",__FUNCTION__,data); |
572 | ||
b79cb653 ST |
573 | /* align the 21 bytes into to bit23 boundary */ |
574 | data = data << 3; | |
575 | ||
576 | /* Reset the demod pll word length to 0x15 bits */ | |
577 | cx24123_writereg(state, 0x21, 0x15); | |
578 | ||
b79cb653 | 579 | /* write the msb 8 bits, wait for the send to be completed */ |
0144f314 | 580 | timeout = jiffies + msecs_to_jiffies(40); |
e3b152bc | 581 | cx24123_writereg(state, 0x22, (data >> 16) & 0xff); |
0144f314 ST |
582 | while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { |
583 | if (time_after(jiffies, timeout)) { | |
584 | printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); | |
b79cb653 ST |
585 | return -EREMOTEIO; |
586 | } | |
0144f314 | 587 | msleep(10); |
b79cb653 ST |
588 | } |
589 | ||
b79cb653 | 590 | /* send another 8 bytes, wait for the send to be completed */ |
0144f314 | 591 | timeout = jiffies + msecs_to_jiffies(40); |
b79cb653 | 592 | cx24123_writereg(state, 0x22, (data>>8) & 0xff ); |
0144f314 ST |
593 | while ((cx24123_readreg(state, 0x20) & 0x40) == 0) { |
594 | if (time_after(jiffies, timeout)) { | |
595 | printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); | |
b79cb653 ST |
596 | return -EREMOTEIO; |
597 | } | |
0144f314 | 598 | msleep(10); |
b79cb653 ST |
599 | } |
600 | ||
b79cb653 | 601 | /* send the lower 5 bits of this byte, padded with 3 LBB, wait for the send to be completed */ |
0144f314 | 602 | timeout = jiffies + msecs_to_jiffies(40); |
b79cb653 | 603 | cx24123_writereg(state, 0x22, (data) & 0xff ); |
0144f314 ST |
604 | while ((cx24123_readreg(state, 0x20) & 0x80)) { |
605 | if (time_after(jiffies, timeout)) { | |
606 | printk("%s: demodulator is not responding, possibly hung, aborting.\n", __FUNCTION__); | |
b79cb653 ST |
607 | return -EREMOTEIO; |
608 | } | |
0144f314 | 609 | msleep(10); |
b79cb653 ST |
610 | } |
611 | ||
612 | /* Trigger the demod to configure the tuner */ | |
613 | cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) | 2); | |
614 | cx24123_writereg(state, 0x20, cx24123_readreg(state, 0x20) & 0xfd); | |
615 | ||
616 | return 0; | |
617 | } | |
618 | ||
619 | static int cx24123_pll_tune(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
620 | { | |
621 | struct cx24123_state *state = fe->demodulator_priv; | |
a74b51fc VC |
622 | u8 val; |
623 | ||
624 | dprintk("frequency=%i\n", p->frequency); | |
b79cb653 | 625 | |
e3b152bc | 626 | if (cx24123_pll_calculate(fe, p) != 0) { |
b79cb653 ST |
627 | printk("%s: cx24123_pll_calcutate failed\n",__FUNCTION__); |
628 | return -EINVAL; | |
629 | } | |
630 | ||
631 | /* Write the new VCO/VGA */ | |
632 | cx24123_pll_writereg(fe, p, state->VCAarg); | |
633 | cx24123_pll_writereg(fe, p, state->VGAarg); | |
634 | ||
635 | /* Write the new bandselect and pll args */ | |
636 | cx24123_pll_writereg(fe, p, state->bandselectarg); | |
637 | cx24123_pll_writereg(fe, p, state->pllarg); | |
638 | ||
a74b51fc VC |
639 | /* set the FILTUNE voltage */ |
640 | val = cx24123_readreg(state, 0x28) & ~0x3; | |
641 | cx24123_writereg(state, 0x27, state->FILTune >> 2); | |
642 | cx24123_writereg(state, 0x28, val | (state->FILTune & 0x3)); | |
643 | ||
caf970e0 MCC |
644 | dprintk("%s: pll tune VCA=%d, band=%d, pll=%d\n",__FUNCTION__,state->VCAarg, |
645 | state->bandselectarg,state->pllarg); | |
646 | ||
b79cb653 ST |
647 | return 0; |
648 | } | |
649 | ||
650 | static int cx24123_initfe(struct dvb_frontend* fe) | |
651 | { | |
652 | struct cx24123_state *state = fe->demodulator_priv; | |
653 | int i; | |
654 | ||
caf970e0 MCC |
655 | dprintk("%s: init frontend\n",__FUNCTION__); |
656 | ||
b79cb653 | 657 | /* Configure the demod to a good set of defaults */ |
e3b152bc | 658 | for (i = 0; i < sizeof(cx24123_regdata) / sizeof(cx24123_regdata[0]); i++) |
b79cb653 ST |
659 | cx24123_writereg(state, cx24123_regdata[i].reg, cx24123_regdata[i].data); |
660 | ||
b79cb653 ST |
661 | return 0; |
662 | } | |
663 | ||
664 | static int cx24123_set_voltage(struct dvb_frontend* fe, fe_sec_voltage_t voltage) | |
665 | { | |
666 | struct cx24123_state *state = fe->demodulator_priv; | |
667 | u8 val; | |
668 | ||
cd20ca9f | 669 | val = cx24123_readreg(state, 0x29) & ~0x40; |
1c956a3a | 670 | |
cd20ca9f AQ |
671 | switch (voltage) { |
672 | case SEC_VOLTAGE_13: | |
673 | dprintk("%s: setting voltage 13V\n", __FUNCTION__); | |
674 | return cx24123_writereg(state, 0x29, val | 0x80); | |
675 | case SEC_VOLTAGE_18: | |
676 | dprintk("%s: setting voltage 18V\n", __FUNCTION__); | |
677 | return cx24123_writereg(state, 0x29, val & 0x7f); | |
678 | default: | |
679 | return -EINVAL; | |
680 | }; | |
1c956a3a VC |
681 | |
682 | return 0; | |
b79cb653 ST |
683 | } |
684 | ||
dce1dfc2 YP |
685 | /* wait for diseqc queue to become ready (or timeout) */ |
686 | static void cx24123_wait_for_diseqc(struct cx24123_state *state) | |
687 | { | |
688 | unsigned long timeout = jiffies + msecs_to_jiffies(200); | |
689 | while (!(cx24123_readreg(state, 0x29) & 0x40)) { | |
690 | if(time_after(jiffies, timeout)) { | |
691 | printk("%s: diseqc queue not ready, command may be lost.\n", __FUNCTION__); | |
692 | break; | |
693 | } | |
694 | msleep(10); | |
695 | } | |
696 | } | |
697 | ||
a74b51fc | 698 | static int cx24123_send_diseqc_msg(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd *cmd) |
b79cb653 | 699 | { |
a74b51fc | 700 | struct cx24123_state *state = fe->demodulator_priv; |
cd20ca9f | 701 | int i, val, tone; |
a74b51fc VC |
702 | |
703 | dprintk("%s:\n",__FUNCTION__); | |
b79cb653 | 704 | |
cd20ca9f AQ |
705 | /* stop continuous tone if enabled */ |
706 | tone = cx24123_readreg(state, 0x29); | |
707 | if (tone & 0x10) | |
708 | cx24123_writereg(state, 0x29, tone & ~0x50); | |
a74b51fc | 709 | |
dce1dfc2 YP |
710 | /* wait for diseqc queue ready */ |
711 | cx24123_wait_for_diseqc(state); | |
712 | ||
a74b51fc | 713 | /* select tone mode */ |
cd20ca9f | 714 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); |
a74b51fc VC |
715 | |
716 | for (i = 0; i < cmd->msg_len; i++) | |
717 | cx24123_writereg(state, 0x2C + i, cmd->msg[i]); | |
718 | ||
719 | val = cx24123_readreg(state, 0x29); | |
720 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40) | ((cmd->msg_len-3) & 3)); | |
721 | ||
dce1dfc2 YP |
722 | /* wait for diseqc message to finish sending */ |
723 | cx24123_wait_for_diseqc(state); | |
a74b51fc | 724 | |
cd20ca9f AQ |
725 | /* restart continuous tone if enabled */ |
726 | if (tone & 0x10) { | |
727 | cx24123_writereg(state, 0x29, tone & ~0x40); | |
728 | } | |
729 | ||
a74b51fc VC |
730 | return 0; |
731 | } | |
732 | ||
733 | static int cx24123_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t burst) | |
734 | { | |
735 | struct cx24123_state *state = fe->demodulator_priv; | |
cd20ca9f | 736 | int val, tone; |
a74b51fc VC |
737 | |
738 | dprintk("%s:\n", __FUNCTION__); | |
739 | ||
cd20ca9f AQ |
740 | /* stop continuous tone if enabled */ |
741 | tone = cx24123_readreg(state, 0x29); | |
742 | if (tone & 0x10) | |
743 | cx24123_writereg(state, 0x29, tone & ~0x50); | |
a74b51fc | 744 | |
cd20ca9f | 745 | /* wait for diseqc queue ready */ |
dce1dfc2 YP |
746 | cx24123_wait_for_diseqc(state); |
747 | ||
a74b51fc | 748 | /* select tone mode */ |
cd20ca9f AQ |
749 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) | 0x4); |
750 | msleep(30); | |
a74b51fc | 751 | val = cx24123_readreg(state, 0x29); |
a74b51fc VC |
752 | if (burst == SEC_MINI_A) |
753 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x00)); | |
754 | else if (burst == SEC_MINI_B) | |
755 | cx24123_writereg(state, 0x29, ((val & 0x90) | 0x40 | 0x08)); | |
756 | else | |
757 | return -EINVAL; | |
758 | ||
dce1dfc2 | 759 | cx24123_wait_for_diseqc(state); |
cd20ca9f | 760 | cx24123_writereg(state, 0x2a, cx24123_readreg(state, 0x2a) & 0xfb); |
a74b51fc | 761 | |
cd20ca9f AQ |
762 | /* restart continuous tone if enabled */ |
763 | if (tone & 0x10) { | |
764 | cx24123_writereg(state, 0x29, tone & ~0x40); | |
765 | } | |
a74b51fc | 766 | return 0; |
b79cb653 ST |
767 | } |
768 | ||
769 | static int cx24123_read_status(struct dvb_frontend* fe, fe_status_t* status) | |
770 | { | |
771 | struct cx24123_state *state = fe->demodulator_priv; | |
772 | ||
773 | int sync = cx24123_readreg(state, 0x14); | |
774 | int lock = cx24123_readreg(state, 0x20); | |
775 | ||
776 | *status = 0; | |
777 | if (lock & 0x01) | |
a74b51fc VC |
778 | *status |= FE_HAS_SIGNAL; |
779 | if (sync & 0x02) | |
780 | *status |= FE_HAS_CARRIER; | |
b79cb653 ST |
781 | if (sync & 0x04) |
782 | *status |= FE_HAS_VITERBI; | |
783 | if (sync & 0x08) | |
a74b51fc | 784 | *status |= FE_HAS_SYNC; |
b79cb653 | 785 | if (sync & 0x80) |
a74b51fc | 786 | *status |= FE_HAS_LOCK; |
b79cb653 ST |
787 | |
788 | return 0; | |
789 | } | |
790 | ||
791 | /* | |
792 | * Configured to return the measurement of errors in blocks, because no UCBLOCKS value | |
793 | * is available, so this value doubles up to satisfy both measurements | |
794 | */ | |
795 | static int cx24123_read_ber(struct dvb_frontend* fe, u32* ber) | |
796 | { | |
797 | struct cx24123_state *state = fe->demodulator_priv; | |
798 | ||
799 | state->lastber = | |
800 | ((cx24123_readreg(state, 0x1c) & 0x3f) << 16) | | |
801 | (cx24123_readreg(state, 0x1d) << 8 | | |
802 | cx24123_readreg(state, 0x1e)); | |
803 | ||
804 | /* Do the signal quality processing here, it's derived from the BER. */ | |
805 | /* Scale the BER from a 24bit to a SNR 16 bit where higher = better */ | |
806 | if (state->lastber < 5000) | |
807 | state->snr = 655*100; | |
808 | else if ( (state->lastber >= 5000) && (state->lastber < 55000) ) | |
809 | state->snr = 655*90; | |
810 | else if ( (state->lastber >= 55000) && (state->lastber < 150000) ) | |
811 | state->snr = 655*80; | |
812 | else if ( (state->lastber >= 150000) && (state->lastber < 250000) ) | |
813 | state->snr = 655*70; | |
814 | else if ( (state->lastber >= 250000) && (state->lastber < 450000) ) | |
815 | state->snr = 655*65; | |
816 | else | |
817 | state->snr = 0; | |
818 | ||
caf970e0 MCC |
819 | dprintk("%s: BER = %d, S/N index = %d\n",__FUNCTION__,state->lastber, state->snr); |
820 | ||
b79cb653 ST |
821 | *ber = state->lastber; |
822 | ||
823 | return 0; | |
824 | } | |
825 | ||
826 | static int cx24123_read_signal_strength(struct dvb_frontend* fe, u16* signal_strength) | |
827 | { | |
828 | struct cx24123_state *state = fe->demodulator_priv; | |
829 | *signal_strength = cx24123_readreg(state, 0x3b) << 8; /* larger = better */ | |
830 | ||
caf970e0 MCC |
831 | dprintk("%s: Signal strength = %d\n",__FUNCTION__,*signal_strength); |
832 | ||
b79cb653 ST |
833 | return 0; |
834 | } | |
835 | ||
836 | static int cx24123_read_snr(struct dvb_frontend* fe, u16* snr) | |
837 | { | |
838 | struct cx24123_state *state = fe->demodulator_priv; | |
839 | *snr = state->snr; | |
840 | ||
caf970e0 MCC |
841 | dprintk("%s: read S/N index = %d\n",__FUNCTION__,*snr); |
842 | ||
b79cb653 ST |
843 | return 0; |
844 | } | |
845 | ||
846 | static int cx24123_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
847 | { | |
848 | struct cx24123_state *state = fe->demodulator_priv; | |
849 | *ucblocks = state->lastber; | |
850 | ||
caf970e0 MCC |
851 | dprintk("%s: ucblocks (ber) = %d\n",__FUNCTION__,*ucblocks); |
852 | ||
b79cb653 ST |
853 | return 0; |
854 | } | |
855 | ||
856 | static int cx24123_set_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
857 | { | |
858 | struct cx24123_state *state = fe->demodulator_priv; | |
859 | ||
caf970e0 MCC |
860 | dprintk("%s: set_frontend\n",__FUNCTION__); |
861 | ||
b79cb653 ST |
862 | if (state->config->set_ts_params) |
863 | state->config->set_ts_params(fe, 0); | |
864 | ||
865 | state->currentfreq=p->frequency; | |
e3b152bc | 866 | state->currentsymbolrate = p->u.qpsk.symbol_rate; |
b79cb653 ST |
867 | |
868 | cx24123_set_inversion(state, p->inversion); | |
869 | cx24123_set_fec(state, p->u.qpsk.fec_inner); | |
870 | cx24123_set_symbolrate(state, p->u.qpsk.symbol_rate); | |
871 | cx24123_pll_tune(fe, p); | |
872 | ||
873 | /* Enable automatic aquisition and reset cycle */ | |
e3b152bc | 874 | cx24123_writereg(state, 0x03, (cx24123_readreg(state, 0x03) | 0x07)); |
b79cb653 ST |
875 | cx24123_writereg(state, 0x00, 0x10); |
876 | cx24123_writereg(state, 0x00, 0); | |
877 | ||
878 | return 0; | |
879 | } | |
880 | ||
881 | static int cx24123_get_frontend(struct dvb_frontend* fe, struct dvb_frontend_parameters *p) | |
882 | { | |
883 | struct cx24123_state *state = fe->demodulator_priv; | |
884 | ||
caf970e0 MCC |
885 | dprintk("%s: get_frontend\n",__FUNCTION__); |
886 | ||
b79cb653 ST |
887 | if (cx24123_get_inversion(state, &p->inversion) != 0) { |
888 | printk("%s: Failed to get inversion status\n",__FUNCTION__); | |
889 | return -EREMOTEIO; | |
890 | } | |
891 | if (cx24123_get_fec(state, &p->u.qpsk.fec_inner) != 0) { | |
892 | printk("%s: Failed to get fec status\n",__FUNCTION__); | |
893 | return -EREMOTEIO; | |
894 | } | |
895 | p->frequency = state->currentfreq; | |
896 | p->u.qpsk.symbol_rate = state->currentsymbolrate; | |
897 | ||
898 | return 0; | |
899 | } | |
900 | ||
901 | static int cx24123_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
902 | { | |
903 | struct cx24123_state *state = fe->demodulator_priv; | |
904 | u8 val; | |
905 | ||
cd20ca9f AQ |
906 | /* wait for diseqc queue ready */ |
907 | cx24123_wait_for_diseqc(state); | |
1c956a3a | 908 | |
cd20ca9f | 909 | val = cx24123_readreg(state, 0x29) & ~0x40; |
1c956a3a | 910 | |
cd20ca9f AQ |
911 | switch (tone) { |
912 | case SEC_TONE_ON: | |
913 | dprintk("%s: setting tone on\n", __FUNCTION__); | |
914 | return cx24123_writereg(state, 0x29, val | 0x10); | |
915 | case SEC_TONE_OFF: | |
916 | dprintk("%s: setting tone off\n",__FUNCTION__); | |
917 | return cx24123_writereg(state, 0x29, val & 0xef); | |
918 | default: | |
919 | printk("%s: CASE reached default with tone=%d\n", __FUNCTION__, tone); | |
920 | return -EINVAL; | |
b79cb653 | 921 | } |
1c956a3a VC |
922 | |
923 | return 0; | |
b79cb653 ST |
924 | } |
925 | ||
926 | static void cx24123_release(struct dvb_frontend* fe) | |
927 | { | |
928 | struct cx24123_state* state = fe->demodulator_priv; | |
929 | dprintk("%s\n",__FUNCTION__); | |
930 | kfree(state); | |
931 | } | |
932 | ||
933 | static struct dvb_frontend_ops cx24123_ops; | |
934 | ||
e3b152bc JS |
935 | struct dvb_frontend* cx24123_attach(const struct cx24123_config* config, |
936 | struct i2c_adapter* i2c) | |
b79cb653 ST |
937 | { |
938 | struct cx24123_state* state = NULL; | |
939 | int ret; | |
940 | ||
941 | dprintk("%s\n",__FUNCTION__); | |
942 | ||
943 | /* allocate memory for the internal state */ | |
944 | state = kmalloc(sizeof(struct cx24123_state), GFP_KERNEL); | |
945 | if (state == NULL) { | |
946 | printk("Unable to kmalloc\n"); | |
947 | goto error; | |
948 | } | |
949 | ||
950 | /* setup the state */ | |
951 | state->config = config; | |
952 | state->i2c = i2c; | |
953 | memcpy(&state->ops, &cx24123_ops, sizeof(struct dvb_frontend_ops)); | |
954 | state->lastber = 0; | |
955 | state->snr = 0; | |
b79cb653 ST |
956 | state->VCAarg = 0; |
957 | state->VGAarg = 0; | |
958 | state->bandselectarg = 0; | |
959 | state->pllarg = 0; | |
960 | state->currentfreq = 0; | |
961 | state->currentsymbolrate = 0; | |
962 | ||
963 | /* check if the demod is there */ | |
964 | ret = cx24123_readreg(state, 0x00); | |
965 | if ((ret != 0xd1) && (ret != 0xe1)) { | |
966 | printk("Version != d1 or e1\n"); | |
967 | goto error; | |
968 | } | |
969 | ||
970 | /* create dvb_frontend */ | |
971 | state->frontend.ops = &state->ops; | |
972 | state->frontend.demodulator_priv = state; | |
973 | return &state->frontend; | |
974 | ||
975 | error: | |
976 | kfree(state); | |
977 | ||
978 | return NULL; | |
979 | } | |
980 | ||
981 | static struct dvb_frontend_ops cx24123_ops = { | |
982 | ||
983 | .info = { | |
984 | .name = "Conexant CX24123/CX24109", | |
985 | .type = FE_QPSK, | |
986 | .frequency_min = 950000, | |
987 | .frequency_max = 2150000, | |
988 | .frequency_stepsize = 1011, /* kHz for QPSK frontends */ | |
0e4558ab | 989 | .frequency_tolerance = 5000, |
b79cb653 ST |
990 | .symbol_rate_min = 1000000, |
991 | .symbol_rate_max = 45000000, | |
992 | .caps = FE_CAN_INVERSION_AUTO | | |
993 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
0e4558ab YP |
994 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | |
995 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
b79cb653 ST |
996 | FE_CAN_QPSK | FE_CAN_RECOVER |
997 | }, | |
998 | ||
999 | .release = cx24123_release, | |
1000 | ||
1001 | .init = cx24123_initfe, | |
1002 | .set_frontend = cx24123_set_frontend, | |
1003 | .get_frontend = cx24123_get_frontend, | |
1004 | .read_status = cx24123_read_status, | |
1005 | .read_ber = cx24123_read_ber, | |
1006 | .read_signal_strength = cx24123_read_signal_strength, | |
1007 | .read_snr = cx24123_read_snr, | |
1008 | .read_ucblocks = cx24123_read_ucblocks, | |
1009 | .diseqc_send_master_cmd = cx24123_send_diseqc_msg, | |
a74b51fc | 1010 | .diseqc_send_burst = cx24123_diseqc_send_burst, |
b79cb653 ST |
1011 | .set_tone = cx24123_set_tone, |
1012 | .set_voltage = cx24123_set_voltage, | |
1013 | }; | |
1014 | ||
1015 | module_param(debug, int, 0644); | |
caf970e0 | 1016 | MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)"); |
b79cb653 | 1017 | |
70047f9c YP |
1018 | module_param(force_band, int, 0644); |
1019 | MODULE_PARM_DESC(force_band, "Force a specific band select (1-9, default:off)."); | |
1020 | ||
b79cb653 ST |
1021 | MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24123/cx24109 hardware"); |
1022 | MODULE_AUTHOR("Steven Toth"); | |
1023 | MODULE_LICENSE("GPL"); | |
1024 | ||
1025 | EXPORT_SYMBOL(cx24123_attach); |