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[media] dvb: remove dvb_frontend_parameters from calc_regs()
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1da177e4 1/*
1da177e4
LT
2 * descriptions + helper functions for simple dvb plls.
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
5a0e3ad6 21#include <linux/slab.h>
1da177e4
LT
22#include <linux/module.h>
23#include <linux/dvb/frontend.h>
24#include <asm/types.h>
25
26#include "dvb-pll.h"
27
05a4611b
MK
28struct dvb_pll_priv {
29 /* pll number */
30 int nr;
31
32 /* i2c details */
33 int pll_i2c_address;
34 struct i2c_adapter *i2c;
35
36 /* the PLL descriptor */
37 struct dvb_pll_desc *pll_desc;
38
39 /* cached frequency/bandwidth */
40 u32 frequency;
41 u32 bandwidth;
42};
43
ff3e7dd5 44#define DVB_PLL_MAX 64
05a4611b
MK
45
46static unsigned int dvb_pll_devcount;
47
ff699e6b 48static int debug;
05a4611b
MK
49module_param(debug, int, 0644);
50MODULE_PARM_DESC(debug, "enable verbose debug messages");
51
704e39bf
MK
52static unsigned int id[DVB_PLL_MAX] =
53 { [ 0 ... (DVB_PLL_MAX-1) ] = DVB_PLL_UNDEFINED };
54module_param_array(id, int, NULL, 0644);
55MODULE_PARM_DESC(id, "force pll id to use (DEBUG ONLY)");
56
05a4611b
MK
57/* ----------------------------------------------------------- */
58
47a9991e
MK
59struct dvb_pll_desc {
60 char *name;
61 u32 min;
62 u32 max;
63 u32 iffreq;
80d8d498 64 void (*set)(struct dvb_frontend *fe, u8 *buf);
47a9991e 65 u8 *initdata;
2b74334d 66 u8 *initdata2;
47a9991e
MK
67 u8 *sleepdata;
68 int count;
69 struct {
70 u32 limit;
71 u32 stepsize;
72 u8 config;
73 u8 cb;
74 } entries[12];
75};
76
1da177e4
LT
77/* ----------------------------------------------------------- */
78/* descriptions */
79
47a9991e 80static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
1da177e4
LT
81 .name = "Thomson dtt7579",
82 .min = 177000000,
83 .max = 858000000,
df78cb0a 84 .iffreq= 36166667,
d519dcf6
TP
85 .sleepdata = (u8[]){ 2, 0xb4, 0x03 },
86 .count = 4,
1da177e4 87 .entries = {
df78cb0a
TP
88 { 443250000, 166667, 0xb4, 0x02 },
89 { 542000000, 166667, 0xb4, 0x08 },
90 { 771000000, 166667, 0xbc, 0x08 },
91 { 999999999, 166667, 0xf4, 0x08 },
1da177e4
LT
92 },
93};
1da177e4 94
80d8d498 95static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf)
1da177e4 96{
80d8d498
MCC
97 u32 bw = fe->dtv_property_cache.bandwidth_hz;
98 if (bw == 7000000)
1da177e4
LT
99 buf[3] |= 0x10;
100}
101
47a9991e 102static struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
1da177e4
LT
103 .name = "Thomson dtt759x",
104 .min = 177000000,
105 .max = 896000000,
77d67504 106 .set = thomson_dtt759x_bw,
df78cb0a 107 .iffreq= 36166667,
d519dcf6
TP
108 .sleepdata = (u8[]){ 2, 0x84, 0x03 },
109 .count = 5,
1da177e4 110 .entries = {
df78cb0a
TP
111 { 264000000, 166667, 0xb4, 0x02 },
112 { 470000000, 166667, 0xbc, 0x02 },
113 { 735000000, 166667, 0xbc, 0x08 },
114 { 835000000, 166667, 0xf4, 0x08 },
115 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT
116 },
117};
1da177e4 118
47a9991e 119static struct dvb_pll_desc dvb_pll_lg_z201 = {
1da177e4
LT
120 .name = "LG z201",
121 .min = 174000000,
122 .max = 862000000,
df78cb0a 123 .iffreq= 36166667,
d519dcf6
TP
124 .sleepdata = (u8[]){ 2, 0xbc, 0x03 },
125 .count = 5,
1da177e4 126 .entries = {
df78cb0a
TP
127 { 157500000, 166667, 0xbc, 0x01 },
128 { 443250000, 166667, 0xbc, 0x02 },
129 { 542000000, 166667, 0xbc, 0x04 },
130 { 830000000, 166667, 0xf4, 0x04 },
131 { 999999999, 166667, 0xfc, 0x04 },
1da177e4
LT
132 },
133};
1da177e4 134
47a9991e 135static struct dvb_pll_desc dvb_pll_unknown_1 = {
1da177e4
LT
136 .name = "unknown 1", /* used by dntv live dvb-t */
137 .min = 174000000,
138 .max = 862000000,
df78cb0a 139 .iffreq= 36166667,
1da177e4
LT
140 .count = 9,
141 .entries = {
df78cb0a
TP
142 { 150000000, 166667, 0xb4, 0x01 },
143 { 173000000, 166667, 0xbc, 0x01 },
144 { 250000000, 166667, 0xb4, 0x02 },
145 { 400000000, 166667, 0xbc, 0x02 },
146 { 420000000, 166667, 0xf4, 0x02 },
147 { 470000000, 166667, 0xfc, 0x02 },
148 { 600000000, 166667, 0xbc, 0x08 },
149 { 730000000, 166667, 0xf4, 0x08 },
150 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT
151 },
152};
1da177e4 153
776338e1
JS
154/* Infineon TUA6010XS
155 * used in Thomson Cable Tuner
156 */
47a9991e 157static struct dvb_pll_desc dvb_pll_tua6010xs = {
776338e1
JS
158 .name = "Infineon TUA6010XS",
159 .min = 44250000,
160 .max = 858000000,
df78cb0a 161 .iffreq= 36125000,
776338e1
JS
162 .count = 3,
163 .entries = {
df78cb0a
TP
164 { 115750000, 62500, 0x8e, 0x03 },
165 { 403250000, 62500, 0x8e, 0x06 },
166 { 999999999, 62500, 0x8e, 0x85 },
776338e1
JS
167 },
168};
776338e1
JS
169
170/* Panasonic env57h1xd5 (some Philips PLL ?) */
47a9991e 171static struct dvb_pll_desc dvb_pll_env57h1xd5 = {
776338e1
JS
172 .name = "Panasonic ENV57H1XD5",
173 .min = 44250000,
174 .max = 858000000,
df78cb0a 175 .iffreq= 36125000,
776338e1
JS
176 .count = 4,
177 .entries = {
df78cb0a
TP
178 { 153000000, 166667, 0xc2, 0x41 },
179 { 470000000, 166667, 0xc2, 0x42 },
180 { 526000000, 166667, 0xc2, 0x84 },
181 { 999999999, 166667, 0xc2, 0xa4 },
776338e1
JS
182 },
183};
776338e1
JS
184
185/* Philips TDA6650/TDA6651
186 * used in Panasonic ENV77H11D5
187 */
80d8d498 188static void tda665x_bw(struct dvb_frontend *fe, u8 *buf)
776338e1 189{
80d8d498
MCC
190 u32 bw = fe->dtv_property_cache.bandwidth_hz;
191 if (bw == 8000000)
776338e1
JS
192 buf[3] |= 0x08;
193}
194
47a9991e 195static struct dvb_pll_desc dvb_pll_tda665x = {
776338e1
JS
196 .name = "Philips TDA6650/TDA6651",
197 .min = 44250000,
198 .max = 858000000,
77d67504 199 .set = tda665x_bw,
df78cb0a 200 .iffreq= 36166667,
fbfee868 201 .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab },
776338e1
JS
202 .count = 12,
203 .entries = {
df78cb0a
TP
204 { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ },
205 { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
206 { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
207 { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
208 { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ },
209 { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ },
210 { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
211 { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
212 { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ },
213 { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ },
214 { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
215 { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ },
776338e1
JS
216 }
217};
776338e1
JS
218
219/* Infineon TUA6034
220 * used in LG TDTP E102P
221 */
80d8d498 222static void tua6034_bw(struct dvb_frontend *fe, u8 *buf)
776338e1 223{
80d8d498
MCC
224 u32 bw = fe->dtv_property_cache.bandwidth_hz;
225 if (bw == 7000000)
776338e1
JS
226 buf[3] |= 0x08;
227}
228
47a9991e 229static struct dvb_pll_desc dvb_pll_tua6034 = {
776338e1
JS
230 .name = "Infineon TUA6034",
231 .min = 44250000,
232 .max = 858000000,
df78cb0a 233 .iffreq= 36166667,
776338e1 234 .count = 3,
77d67504 235 .set = tua6034_bw,
776338e1 236 .entries = {
df78cb0a
TP
237 { 174500000, 62500, 0xce, 0x01 },
238 { 230000000, 62500, 0xce, 0x02 },
239 { 999999999, 62500, 0xce, 0x04 },
776338e1
JS
240 },
241};
776338e1 242
0589b8e4
PB
243/* ALPS TDED4
244 * used in Nebula-Cards and USB boxes
245 */
80d8d498 246static void tded4_bw(struct dvb_frontend *fe, u8 *buf)
0589b8e4 247{
80d8d498
MCC
248 u32 bw = fe->dtv_property_cache.bandwidth_hz;
249 if (bw == 8000000)
0589b8e4
PB
250 buf[3] |= 0x04;
251}
252
47a9991e 253static struct dvb_pll_desc dvb_pll_tded4 = {
0589b8e4
PB
254 .name = "ALPS TDED4",
255 .min = 47000000,
256 .max = 863000000,
df78cb0a 257 .iffreq= 36166667,
77d67504 258 .set = tded4_bw,
0589b8e4
PB
259 .count = 4,
260 .entries = {
df78cb0a
TP
261 { 153000000, 166667, 0x85, 0x01 },
262 { 470000000, 166667, 0x85, 0x02 },
263 { 823000000, 166667, 0x85, 0x08 },
264 { 999999999, 166667, 0x85, 0x88 },
0589b8e4
PB
265 }
266};
0589b8e4 267
147418c9
KL
268/* ALPS TDHU2
269 * used in AverTVHD MCE A180
270 */
47a9991e 271static struct dvb_pll_desc dvb_pll_tdhu2 = {
147418c9
KL
272 .name = "ALPS TDHU2",
273 .min = 54000000,
274 .max = 864000000,
df78cb0a 275 .iffreq= 44000000,
147418c9
KL
276 .count = 4,
277 .entries = {
df78cb0a
TP
278 { 162000000, 62500, 0x85, 0x01 },
279 { 426000000, 62500, 0x85, 0x02 },
280 { 782000000, 62500, 0x85, 0x08 },
281 { 999999999, 62500, 0x85, 0x88 },
147418c9
KL
282 }
283};
147418c9 284
d76a6179 285/* Samsung TBMV30111IN / TBMV30712IN1
147418c9
KL
286 * used in Air2PC ATSC - 2nd generation (nxt2002)
287 */
47a9991e 288static struct dvb_pll_desc dvb_pll_samsung_tbmv = {
28f3d4b3 289 .name = "Samsung TBMV30111IN / TBMV30712IN1",
147418c9
KL
290 .min = 54000000,
291 .max = 860000000,
df78cb0a 292 .iffreq= 44000000,
17c37efb 293 .count = 6,
147418c9 294 .entries = {
df78cb0a
TP
295 { 172000000, 166667, 0xb4, 0x01 },
296 { 214000000, 166667, 0xb4, 0x02 },
297 { 467000000, 166667, 0xbc, 0x02 },
298 { 721000000, 166667, 0xbc, 0x08 },
299 { 841000000, 166667, 0xf4, 0x08 },
300 { 999999999, 166667, 0xfc, 0x02 },
147418c9
KL
301 }
302};
147418c9 303
f8bf134d
RP
304/*
305 * Philips SD1878 Tuner.
306 */
47a9991e 307static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
f8bf134d
RP
308 .name = "Philips SD1878",
309 .min = 950000,
310 .max = 2150000,
df78cb0a 311 .iffreq= 249, /* zero-IF, offset 249 is to round up */
f8bf134d
RP
312 .count = 4,
313 .entries = {
df78cb0a 314 { 1250000, 500, 0xc4, 0x00},
b3332a98 315 { 1450000, 500, 0xc4, 0x40},
df78cb0a
TP
316 { 2050000, 500, 0xc4, 0x80},
317 { 2150000, 500, 0xc4, 0xc0},
f8bf134d
RP
318 },
319};
f8bf134d 320
80d8d498 321static void opera1_bw(struct dvb_frontend *fe, u8 *buf)
941491f3 322{
80d8d498 323 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
2b74334d 324 struct dvb_pll_priv *priv = fe->tuner_priv;
80d8d498 325 u32 b_w = (c->symbol_rate * 27) / 32000;
2b74334d
MP
326 struct i2c_msg msg = {
327 .addr = priv->pll_i2c_address,
328 .flags = 0,
329 .buf = buf,
330 .len = 4
331 };
332 int result;
333 u8 lpf;
334
335 if (fe->ops.i2c_gate_ctrl)
336 fe->ops.i2c_gate_ctrl(fe, 1);
337
338 result = i2c_transfer(priv->i2c, &msg, 1);
339 if (result != 1)
340 printk(KERN_ERR "%s: i2c_transfer failed:%d",
341 __func__, result);
342
343 if (b_w <= 10000)
344 lpf = 0xc;
345 else if (b_w <= 12000)
346 lpf = 0x2;
347 else if (b_w <= 14000)
348 lpf = 0xa;
349 else if (b_w <= 16000)
350 lpf = 0x6;
351 else if (b_w <= 18000)
352 lpf = 0xe;
353 else if (b_w <= 20000)
354 lpf = 0x1;
355 else if (b_w <= 22000)
356 lpf = 0x9;
357 else if (b_w <= 24000)
358 lpf = 0x5;
359 else if (b_w <= 26000)
360 lpf = 0xd;
361 else if (b_w <= 28000)
362 lpf = 0x3;
363 else
364 lpf = 0xb;
365 buf[2] ^= 0x1c; /* Flip bits 3-5 */
366 /* Set lpf */
367 buf[2] |= ((lpf >> 2) & 0x3) << 3;
368 buf[3] |= (lpf & 0x3) << 2;
369
370 return;
941491f3
MG
371}
372
47a9991e 373static struct dvb_pll_desc dvb_pll_opera1 = {
941491f3
MG
374 .name = "Opera Tuner",
375 .min = 900000,
376 .max = 2250000,
2b74334d
MP
377 .initdata = (u8[]){ 4, 0x08, 0xe5, 0xe1, 0x00 },
378 .initdata2 = (u8[]){ 4, 0x08, 0xe5, 0xe5, 0x00 },
941491f3 379 .iffreq= 0,
77d67504 380 .set = opera1_bw,
941491f3
MG
381 .count = 8,
382 .entries = {
2b74334d
MP
383 { 1064000, 500, 0xf9, 0xc2 },
384 { 1169000, 500, 0xf9, 0xe2 },
385 { 1299000, 500, 0xf9, 0x20 },
386 { 1444000, 500, 0xf9, 0x40 },
387 { 1606000, 500, 0xf9, 0x60 },
388 { 1777000, 500, 0xf9, 0x80 },
389 { 1941000, 500, 0xf9, 0xa0 },
390 { 2250000, 500, 0xf9, 0xc0 },
941491f3
MG
391 }
392};
47a9991e 393
80d8d498 394static void samsung_dtos403ih102a_set(struct dvb_frontend *fe, u8 *buf)
139dfeb2
AP
395{
396 struct dvb_pll_priv *priv = fe->tuner_priv;
397 struct i2c_msg msg = {
398 .addr = priv->pll_i2c_address,
399 .flags = 0,
400 .buf = buf,
401 .len = 4
402 };
403 int result;
404
405 if (fe->ops.i2c_gate_ctrl)
406 fe->ops.i2c_gate_ctrl(fe, 1);
407
408 result = i2c_transfer(priv->i2c, &msg, 1);
409 if (result != 1)
410 printk(KERN_ERR "%s: i2c_transfer failed:%d",
411 __func__, result);
412
413 buf[2] = 0x9e;
414 buf[3] = 0x90;
415
416 return;
417}
418
419/* unknown pll used in Samsung DTOS403IH102A DVB-C tuner */
420static struct dvb_pll_desc dvb_pll_samsung_dtos403ih102a = {
421 .name = "Samsung DTOS403IH102A",
422 .min = 44250000,
423 .max = 858000000,
424 .iffreq = 36125000,
425 .count = 8,
426 .set = samsung_dtos403ih102a_set,
427 .entries = {
428 { 135000000, 62500, 0xbe, 0x01 },
429 { 177000000, 62500, 0xf6, 0x01 },
430 { 370000000, 62500, 0xbe, 0x02 },
431 { 450000000, 62500, 0xf6, 0x02 },
432 { 466000000, 62500, 0xfe, 0x02 },
433 { 538000000, 62500, 0xbe, 0x08 },
434 { 826000000, 62500, 0xf6, 0x08 },
435 { 999999999, 62500, 0xfe, 0x08 },
436 }
437};
438
a104ed07
TP
439/* Samsung TDTC9251DH0 DVB-T NIM, as used on AirStar 2 */
440static struct dvb_pll_desc dvb_pll_samsung_tdtc9251dh0 = {
441 .name = "Samsung TDTC9251DH0",
442 .min = 48000000,
443 .max = 863000000,
444 .iffreq = 36166667,
445 .count = 3,
446 .entries = {
447 { 157500000, 166667, 0xcc, 0x09 },
448 { 443000000, 166667, 0xcc, 0x0a },
449 { 863000000, 166667, 0xcc, 0x08 },
450 }
451};
452
f52c4853
TP
453/* Samsung TBDU18132 DVB-S NIM with TSA5059 PLL, used in SkyStar2 DVB-S 2.3 */
454static struct dvb_pll_desc dvb_pll_samsung_tbdu18132 = {
455 .name = "Samsung TBDU18132",
456 .min = 950000,
457 .max = 2150000, /* guesses */
458 .iffreq = 0,
459 .count = 2,
460 .entries = {
461 { 1550000, 125, 0x84, 0x82 },
462 { 4095937, 125, 0x84, 0x80 },
463 }
464 /* TSA5059 PLL has a 17 bit divisor rather than the 15 bits supported
465 * by this driver. The two extra bits are 0x60 in the third byte. 15
466 * bits is enough for over 4 GHz, which is enough to cover the range
467 * of this tuner. We could use the additional divisor bits by adding
468 * more entries, e.g.
469 { 0x0ffff * 125 + 125/2, 125, 0x84 | 0x20, },
470 { 0x17fff * 125 + 125/2, 125, 0x84 | 0x40, },
471 { 0x1ffff * 125 + 125/2, 125, 0x84 | 0x60, }, */
472};
473
9d5d75a9
TP
474/* Samsung TBMU24112 DVB-S NIM with SL1935 zero-IF tuner */
475static struct dvb_pll_desc dvb_pll_samsung_tbmu24112 = {
476 .name = "Samsung TBMU24112",
477 .min = 950000,
478 .max = 2150000, /* guesses */
479 .iffreq = 0,
480 .count = 2,
481 .entries = {
482 { 1500000, 125, 0x84, 0x18 },
483 { 9999999, 125, 0x84, 0x08 },
484 }
485};
486
d799ce57
TP
487/* Alps TDEE4 DVB-C NIM, used on Cablestar 2 */
488/* byte 4 : 1 * * AGD R3 R2 R1 R0
489 * byte 5 : C1 * RE RTS BS4 BS3 BS2 BS1
490 * AGD = 1, R3 R2 R1 R0 = 0 1 0 1 => byte 4 = 1**10101 = 0x95
491 * Range(MHz) C1 * RE RTS BS4 BS3 BS2 BS1 Byte 5
492 * 47 - 153 0 * 0 0 0 0 0 1 0x01
493 * 153 - 430 0 * 0 0 0 0 1 0 0x02
494 * 430 - 822 0 * 0 0 1 0 0 0 0x08
495 * 822 - 862 1 * 0 0 1 0 0 0 0x88 */
496static struct dvb_pll_desc dvb_pll_alps_tdee4 = {
497 .name = "ALPS TDEE4",
498 .min = 47000000,
499 .max = 862000000,
500 .iffreq = 36125000,
501 .count = 4,
502 .entries = {
503 { 153000000, 62500, 0x95, 0x01 },
504 { 430000000, 62500, 0x95, 0x02 },
505 { 822000000, 62500, 0x95, 0x08 },
506 { 999999999, 62500, 0x95, 0x88 },
507 }
508};
509
47a9991e
MK
510/* ----------------------------------------------------------- */
511
512static struct dvb_pll_desc *pll_list[] = {
513 [DVB_PLL_UNDEFINED] = NULL,
514 [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579,
515 [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x,
47a9991e 516 [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201,
47a9991e
MK
517 [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1,
518 [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs,
519 [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5,
520 [DVB_PLL_TUA6034] = &dvb_pll_tua6034,
47a9991e 521 [DVB_PLL_TDA665X] = &dvb_pll_tda665x,
47a9991e 522 [DVB_PLL_TDED4] = &dvb_pll_tded4,
d799ce57 523 [DVB_PLL_TDEE4] = &dvb_pll_alps_tdee4,
47a9991e
MK
524 [DVB_PLL_TDHU2] = &dvb_pll_tdhu2,
525 [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv,
526 [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261,
47a9991e 527 [DVB_PLL_OPERA1] = &dvb_pll_opera1,
139dfeb2 528 [DVB_PLL_SAMSUNG_DTOS403IH102A] = &dvb_pll_samsung_dtos403ih102a,
a104ed07 529 [DVB_PLL_SAMSUNG_TDTC9251DH0] = &dvb_pll_samsung_tdtc9251dh0,
f52c4853 530 [DVB_PLL_SAMSUNG_TBDU18132] = &dvb_pll_samsung_tbdu18132,
9d5d75a9 531 [DVB_PLL_SAMSUNG_TBMU24112] = &dvb_pll_samsung_tbmu24112,
47a9991e
MK
532};
533
1da177e4
LT
534/* ----------------------------------------------------------- */
535/* code */
536
5d7802b2 537static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
80d8d498 538 const u32 frequency)
1da177e4 539{
5d7802b2
MK
540 struct dvb_pll_priv *priv = fe->tuner_priv;
541 struct dvb_pll_desc *desc = priv->pll_desc;
1da177e4
LT
542 u32 div;
543 int i;
544
80d8d498 545 if (frequency && (frequency < desc->min || frequency > desc->max))
77d67504 546 return -EINVAL;
1da177e4
LT
547
548 for (i = 0; i < desc->count; i++) {
80d8d498 549 if (frequency > desc->entries[i].limit)
1da177e4
LT
550 continue;
551 break;
552 }
77d67504 553
1da177e4 554 if (debug)
77d67504 555 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
80d8d498 556 frequency, i, desc->count);
272bc4db
AQ
557 if (i == desc->count)
558 return -EINVAL;
1da177e4 559
80d8d498 560 div = (frequency + desc->iffreq +
77d67504 561 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
1da177e4
LT
562 buf[0] = div >> 8;
563 buf[1] = div & 0xff;
ab66b22f
MK
564 buf[2] = desc->entries[i].config;
565 buf[3] = desc->entries[i].cb;
1da177e4 566
77d67504 567 if (desc->set)
80d8d498 568 desc->set(fe, buf);
1da177e4
LT
569
570 if (debug)
571 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
572 desc->name, div, buf[0], buf[1], buf[2], buf[3]);
573
89faeefc 574 // calculate the frequency we set it to
df78cb0a 575 return (div * desc->entries[i].stepsize) - desc->iffreq;
1da177e4 576}
1da177e4 577
272bc4db
AQ
578static int dvb_pll_release(struct dvb_frontend *fe)
579{
2213918a 580 kfree(fe->tuner_priv);
272bc4db
AQ
581 fe->tuner_priv = NULL;
582 return 0;
583}
584
585static int dvb_pll_sleep(struct dvb_frontend *fe)
586{
587 struct dvb_pll_priv *priv = fe->tuner_priv;
272bc4db 588
c162dff6
CP
589 if (priv->i2c == NULL)
590 return -EINVAL;
591
d519dcf6
TP
592 if (priv->pll_desc->sleepdata) {
593 struct i2c_msg msg = { .flags = 0,
594 .addr = priv->pll_i2c_address,
595 .buf = priv->pll_desc->sleepdata + 1,
596 .len = priv->pll_desc->sleepdata[0] };
272bc4db 597
d519dcf6 598 int result;
272bc4db 599
d519dcf6
TP
600 if (fe->ops.i2c_gate_ctrl)
601 fe->ops.i2c_gate_ctrl(fe, 1);
602 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
603 return result;
604 }
605 return 0;
272bc4db 606 }
d519dcf6
TP
607 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
608 return -EINVAL;
272bc4db
AQ
609}
610
47ae9ae8
MK
611static int dvb_pll_set_params(struct dvb_frontend *fe,
612 struct dvb_frontend_parameters *params)
272bc4db 613{
80d8d498 614 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272bc4db
AQ
615 struct dvb_pll_priv *priv = fe->tuner_priv;
616 u8 buf[4];
617 struct i2c_msg msg =
47ae9ae8
MK
618 { .addr = priv->pll_i2c_address, .flags = 0,
619 .buf = buf, .len = sizeof(buf) };
272bc4db 620 int result;
77d67504 621 u32 frequency = 0;
272bc4db
AQ
622
623 if (priv->i2c == NULL)
624 return -EINVAL;
625
80d8d498
MCC
626 result = dvb_pll_configure(fe, buf, c->frequency);
627 if (result < 0)
272bc4db 628 return result;
89faeefc
MK
629 else
630 frequency = result;
272bc4db 631
dea74869
PB
632 if (fe->ops.i2c_gate_ctrl)
633 fe->ops.i2c_gate_ctrl(fe, 1);
272bc4db
AQ
634 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
635 return result;
636 }
637
89faeefc 638 priv->frequency = frequency;
80d8d498
MCC
639 if (c->bandwidth_hz <= 6000000)
640 priv->bandwidth = BANDWIDTH_6_MHZ;
641 else if (c->bandwidth_hz <= 7000000)
642 priv->bandwidth = BANDWIDTH_7_MHZ;
643 if (c->bandwidth_hz <= 8000000)
644 priv->bandwidth = BANDWIDTH_8_MHZ;
272bc4db
AQ
645
646 return 0;
647}
648
47ae9ae8 649static int dvb_pll_calc_regs(struct dvb_frontend *fe,
47ae9ae8 650 u8 *buf, int buf_len)
272bc4db 651{
249fa0b0 652 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
272bc4db
AQ
653 struct dvb_pll_priv *priv = fe->tuner_priv;
654 int result;
77d67504 655 u32 frequency = 0;
272bc4db
AQ
656
657 if (buf_len < 5)
658 return -EINVAL;
659
249fa0b0 660 result = dvb_pll_configure(fe, buf + 1, c->frequency);
80d8d498 661 if (result < 0)
272bc4db 662 return result;
89faeefc
MK
663 else
664 frequency = result;
665
272bc4db
AQ
666 buf[0] = priv->pll_i2c_address;
667
89faeefc 668 priv->frequency = frequency;
249fa0b0 669 priv->bandwidth = c->bandwidth_hz;
272bc4db
AQ
670
671 return 5;
672}
673
674static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency)
675{
676 struct dvb_pll_priv *priv = fe->tuner_priv;
677 *frequency = priv->frequency;
678 return 0;
679}
680
681static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
682{
683 struct dvb_pll_priv *priv = fe->tuner_priv;
684 *bandwidth = priv->bandwidth;
685 return 0;
686}
687
26aed922
TP
688static int dvb_pll_init(struct dvb_frontend *fe)
689{
690 struct dvb_pll_priv *priv = fe->tuner_priv;
691
692 if (priv->i2c == NULL)
693 return -EINVAL;
694
695 if (priv->pll_desc->initdata) {
696 struct i2c_msg msg = { .flags = 0,
697 .addr = priv->pll_i2c_address,
698 .buf = priv->pll_desc->initdata + 1,
699 .len = priv->pll_desc->initdata[0] };
700
701 int result;
702 if (fe->ops.i2c_gate_ctrl)
703 fe->ops.i2c_gate_ctrl(fe, 1);
2b74334d
MP
704 result = i2c_transfer(priv->i2c, &msg, 1);
705 if (result != 1)
26aed922 706 return result;
2b74334d
MP
707 if (priv->pll_desc->initdata2) {
708 msg.buf = priv->pll_desc->initdata2 + 1;
709 msg.len = priv->pll_desc->initdata2[0];
710 if (fe->ops.i2c_gate_ctrl)
711 fe->ops.i2c_gate_ctrl(fe, 1);
712 result = i2c_transfer(priv->i2c, &msg, 1);
713 if (result != 1)
714 return result;
26aed922
TP
715 }
716 return 0;
717 }
718 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
719 return -EINVAL;
720}
721
272bc4db
AQ
722static struct dvb_tuner_ops dvb_pll_tuner_ops = {
723 .release = dvb_pll_release,
724 .sleep = dvb_pll_sleep,
d519dcf6 725 .init = dvb_pll_init,
272bc4db 726 .set_params = dvb_pll_set_params,
bd4956b8 727 .calc_regs = dvb_pll_calc_regs,
272bc4db
AQ
728 .get_frequency = dvb_pll_get_frequency,
729 .get_bandwidth = dvb_pll_get_bandwidth,
730};
731
47ae9ae8
MK
732struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
733 struct i2c_adapter *i2c,
47a9991e 734 unsigned int pll_desc_id)
272bc4db 735{
061b623c 736 u8 b1 [] = { 0 };
47ae9ae8
MK
737 struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD,
738 .buf = b1, .len = 1 };
272bc4db 739 struct dvb_pll_priv *priv = NULL;
061b623c 740 int ret;
47a9991e
MK
741 struct dvb_pll_desc *desc;
742
704e39bf
MK
743 if ((id[dvb_pll_devcount] > DVB_PLL_UNDEFINED) &&
744 (id[dvb_pll_devcount] < ARRAY_SIZE(pll_list)))
745 pll_desc_id = id[dvb_pll_devcount];
746
47a9991e
MK
747 BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list));
748
749 desc = pll_list[pll_desc_id];
061b623c 750
55c05b6d
AQ
751 if (i2c != NULL) {
752 if (fe->ops.i2c_gate_ctrl)
753 fe->ops.i2c_gate_ctrl(fe, 1);
754
95faba22
AQ
755 ret = i2c_transfer (i2c, &msg, 1);
756 if (ret != 1)
2bfe031d 757 return NULL;
55c05b6d
AQ
758 if (fe->ops.i2c_gate_ctrl)
759 fe->ops.i2c_gate_ctrl(fe, 0);
760 }
272bc4db
AQ
761
762 priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL);
763 if (priv == NULL)
2bfe031d 764 return NULL;
272bc4db
AQ
765
766 priv->pll_i2c_address = pll_addr;
767 priv->i2c = i2c;
768 priv->pll_desc = desc;
a27e5e76 769 priv->nr = dvb_pll_devcount++;
272bc4db 770
47ae9ae8
MK
771 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
772 sizeof(struct dvb_tuner_ops));
773
982dd1bd
TP
774 strncpy(fe->ops.tuner_ops.info.name, desc->name,
775 sizeof(fe->ops.tuner_ops.info.name));
dea74869 776 fe->ops.tuner_ops.info.frequency_min = desc->min;
0d84a62b 777 fe->ops.tuner_ops.info.frequency_max = desc->max;
d519dcf6
TP
778 if (!desc->initdata)
779 fe->ops.tuner_ops.init = NULL;
780 if (!desc->sleepdata)
781 fe->ops.tuner_ops.sleep = NULL;
272bc4db
AQ
782
783 fe->tuner_priv = priv;
a27e5e76 784
8528fa41 785 if ((debug) || (id[priv->nr] == pll_desc_id)) {
a27e5e76
MK
786 printk("dvb-pll[%d]", priv->nr);
787 if (i2c != NULL)
788 printk(" %d-%04x", i2c_adapter_id(i2c), pll_addr);
704e39bf
MK
789 printk(": id# %d (%s) attached, %s\n", pll_desc_id, desc->name,
790 id[priv->nr] == pll_desc_id ?
791 "insmod option" : "autodetected");
4562fbea 792 }
a27e5e76 793
2bfe031d 794 return fe;
272bc4db
AQ
795}
796EXPORT_SYMBOL(dvb_pll_attach);
797
1da177e4
LT
798MODULE_DESCRIPTION("dvb pll library");
799MODULE_AUTHOR("Gerd Knorr");
800MODULE_LICENSE("GPL");