]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/dvb/frontends/dvb-pll.c
projects / mirror_ubuntu-artful-kernel.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
V4L/DVB (5628): Add support for A-LINK DTU dvb-t adapter
[mirror_ubuntu-artful-kernel.git] / drivers / media / dvb / frontends / dvb-pll.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * descriptions + helper functions for simple dvb plls.
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/dvb/frontend.h>
23#include <asm/types.h>
24
25#include "dvb-pll.h"
26
27/* ----------------------------------------------------------- */
28/* descriptions */
29
26aed922
TP		 30/* Set AGC TOP value to 103 dBuV:
31 0x80 = Control Byte
32 0x40 = 250 uA charge pump (irrelevant)
33 0x18 = Aux Byte to follow
34 0x06 = 64.5 kHz divider (irrelevant)
35 0x01 = Disable Vt (aka sleep)
36
37 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA)
38 0x50 = AGC Take over point = 103 dBuV */
39static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 };
40
1da177e4
LT		 41struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
42 .name = "Thomson dtt7579",
43 .min = 177000000,
44 .max = 858000000,
df78cb0a 45 .iffreq= 36166667,
d519dcf6
TP		 46 .sleepdata = (u8[]){ 2, 0xb4, 0x03 },
47 .count = 4,
1da177e4 48 .entries = {
df78cb0a
TP		 49 { 443250000, 166667, 0xb4, 0x02 },
50 { 542000000, 166667, 0xb4, 0x08 },
51 { 771000000, 166667, 0xbc, 0x08 },
52 { 999999999, 166667, 0xf4, 0x08 },
1da177e4
LT		 53 },
54};
55EXPORT_SYMBOL(dvb_pll_thomson_dtt7579);
56
57struct dvb_pll_desc dvb_pll_thomson_dtt7610 = {
58 .name = "Thomson dtt7610",
59 .min = 44000000,
60 .max = 958000000,
df78cb0a 61 .iffreq= 44000000,
1da177e4
LT		 62 .count = 3,
63 .entries = {
df78cb0a
TP		 64 { 157250000, 62500, 0x8e, 0x39 },
65 { 454000000, 62500, 0x8e, 0x3a },
66 { 999999999, 62500, 0x8e, 0x3c },
1da177e4
LT		 67 },
68};
69EXPORT_SYMBOL(dvb_pll_thomson_dtt7610);
70
77d67504
MK		 71static void thomson_dtt759x_bw(u8 *buf,
72 const struct dvb_frontend_parameters *params)
1da177e4 73{
77d67504 74 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth)
1da177e4
LT		 75 buf[3] |= 0x10;
76}
77
78struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
79 .name = "Thomson dtt759x",
80 .min = 177000000,
81 .max = 896000000,
77d67504 82 .set = thomson_dtt759x_bw,
df78cb0a 83 .iffreq= 36166667,
d519dcf6
TP		 84 .sleepdata = (u8[]){ 2, 0x84, 0x03 },
85 .count = 5,
1da177e4 86 .entries = {
df78cb0a
TP		 87 { 264000000, 166667, 0xb4, 0x02 },
88 { 470000000, 166667, 0xbc, 0x02 },
89 { 735000000, 166667, 0xbc, 0x08 },
90 { 835000000, 166667, 0xf4, 0x08 },
91 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 92 },
93};
94EXPORT_SYMBOL(dvb_pll_thomson_dtt759x);
95
96struct dvb_pll_desc dvb_pll_lg_z201 = {
97 .name = "LG z201",
98 .min = 174000000,
99 .max = 862000000,
df78cb0a 100 .iffreq= 36166667,
d519dcf6
TP		 101 .sleepdata = (u8[]){ 2, 0xbc, 0x03 },
102 .count = 5,
1da177e4 103 .entries = {
df78cb0a
TP		 104 { 157500000, 166667, 0xbc, 0x01 },
105 { 443250000, 166667, 0xbc, 0x02 },
106 { 542000000, 166667, 0xbc, 0x04 },
107 { 830000000, 166667, 0xf4, 0x04 },
108 { 999999999, 166667, 0xfc, 0x04 },
1da177e4
LT		 109 },
110};
111EXPORT_SYMBOL(dvb_pll_lg_z201);
112
d8667cbb
MM		 113struct dvb_pll_desc dvb_pll_microtune_4042 = {
114 .name = "Microtune 4042 FI5",
115 .min = 57000000,
116 .max = 858000000,
df78cb0a 117 .iffreq= 44000000,
d8667cbb
MM		 118 .count = 3,
119 .entries = {
df78cb0a
TP		 120 { 162000000, 62500, 0x8e, 0xa1 },
121 { 457000000, 62500, 0x8e, 0x91 },
122 { 999999999, 62500, 0x8e, 0x31 },
d8667cbb
MM		 123 },
124};
125EXPORT_SYMBOL(dvb_pll_microtune_4042);
126
83ac8722
MK		 127struct dvb_pll_desc dvb_pll_thomson_dtt761x = {
128 /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
129 .name = "Thomson dtt761x",
130 .min = 57000000,
131 .max = 863000000,
df78cb0a 132 .iffreq= 44000000,
0d723c09 133 .count = 3,
26aed922 134 .initdata = tua603x_agc103,
0d723c09 135 .entries = {
df78cb0a
TP		 136 { 147000000, 62500, 0x8e, 0x39 },
137 { 417000000, 62500, 0x8e, 0x3a },
138 { 999999999, 62500, 0x8e, 0x3c },
0d723c09
MK		 139 },
140};
83ac8722 141EXPORT_SYMBOL(dvb_pll_thomson_dtt761x);
0d723c09 142
1da177e4
LT		 143struct dvb_pll_desc dvb_pll_unknown_1 = {
144 .name = "unknown 1", /* used by dntv live dvb-t */
145 .min = 174000000,
146 .max = 862000000,
df78cb0a 147 .iffreq= 36166667,
1da177e4
LT		 148 .count = 9,
149 .entries = {
df78cb0a
TP		 150 { 150000000, 166667, 0xb4, 0x01 },
151 { 173000000, 166667, 0xbc, 0x01 },
152 { 250000000, 166667, 0xb4, 0x02 },
153 { 400000000, 166667, 0xbc, 0x02 },
154 { 420000000, 166667, 0xf4, 0x02 },
155 { 470000000, 166667, 0xfc, 0x02 },
156 { 600000000, 166667, 0xbc, 0x08 },
157 { 730000000, 166667, 0xf4, 0x08 },
158 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 159 },
160};
161EXPORT_SYMBOL(dvb_pll_unknown_1);
162
776338e1
JS		 163/* Infineon TUA6010XS
164 * used in Thomson Cable Tuner
165 */
166struct dvb_pll_desc dvb_pll_tua6010xs = {
167 .name = "Infineon TUA6010XS",
168 .min = 44250000,
169 .max = 858000000,
df78cb0a 170 .iffreq= 36125000,
776338e1
JS		 171 .count = 3,
172 .entries = {
df78cb0a
TP		 173 { 115750000, 62500, 0x8e, 0x03 },
174 { 403250000, 62500, 0x8e, 0x06 },
175 { 999999999, 62500, 0x8e, 0x85 },
776338e1
JS		 176 },
177};
178EXPORT_SYMBOL(dvb_pll_tua6010xs);
179
180/* Panasonic env57h1xd5 (some Philips PLL ?) */
181struct dvb_pll_desc dvb_pll_env57h1xd5 = {
182 .name = "Panasonic ENV57H1XD5",
183 .min = 44250000,
184 .max = 858000000,
df78cb0a 185 .iffreq= 36125000,
776338e1
JS		 186 .count = 4,
187 .entries = {
df78cb0a
TP		 188 { 153000000, 166667, 0xc2, 0x41 },
189 { 470000000, 166667, 0xc2, 0x42 },
190 { 526000000, 166667, 0xc2, 0x84 },
191 { 999999999, 166667, 0xc2, 0xa4 },
776338e1
JS		 192 },
193};
194EXPORT_SYMBOL(dvb_pll_env57h1xd5);
195
196/* Philips TDA6650/TDA6651
197 * used in Panasonic ENV77H11D5
198 */
77d67504 199static void tda665x_bw(u8 *buf, const struct dvb_frontend_parameters *params)
776338e1 200{
77d67504 201 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
776338e1
JS		 202 buf[3] |= 0x08;
203}
204
205struct dvb_pll_desc dvb_pll_tda665x = {
206 .name = "Philips TDA6650/TDA6651",
207 .min = 44250000,
208 .max = 858000000,
77d67504 209 .set = tda665x_bw,
df78cb0a 210 .iffreq= 36166667,
fbfee868 211 .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab },
776338e1
JS		 212 .count = 12,
213 .entries = {
df78cb0a
TP		 214 { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ },
215 { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
216 { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
217 { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
218 { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ },
219 { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ },
220 { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
221 { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
222 { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ },
223 { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ },
224 { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
225 { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ },
776338e1
JS		 226 }
227};
228EXPORT_SYMBOL(dvb_pll_tda665x);
229
230/* Infineon TUA6034
231 * used in LG TDTP E102P
232 */
77d67504 233static void tua6034_bw(u8 *buf, const struct dvb_frontend_parameters *params)
776338e1 234{
77d67504 235 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth)
776338e1
JS		 236 buf[3] |= 0x08;
237}
238
239struct dvb_pll_desc dvb_pll_tua6034 = {
240 .name = "Infineon TUA6034",
241 .min = 44250000,
242 .max = 858000000,
df78cb0a 243 .iffreq= 36166667,
776338e1 244 .count = 3,
77d67504 245 .set = tua6034_bw,
776338e1 246 .entries = {
df78cb0a
TP		 247 { 174500000, 62500, 0xce, 0x01 },
248 { 230000000, 62500, 0xce, 0x02 },
249 { 999999999, 62500, 0xce, 0x04 },
776338e1
JS		 250 },
251};
252EXPORT_SYMBOL(dvb_pll_tua6034);
253
1963c907 254/* Infineon TUA6034
d9e12f25 255 * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F
1963c907 256 */
30fa61a5 257struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = {
d9e12f25 258 .name = "LG TDVS-H06xF",
1963c907
MK		 259 .min = 54000000,
260 .max = 863000000,
df78cb0a 261 .iffreq= 44000000,
6bdcc6e6 262 .initdata = tua603x_agc103,
1963c907
MK		 263 .count = 3,
264 .entries = {
df78cb0a
TP		 265 { 165000000, 62500, 0xce, 0x01 },
266 { 450000000, 62500, 0xce, 0x02 },
267 { 999999999, 62500, 0xce, 0x04 },
1963c907
MK		 268 },
269};
30fa61a5 270EXPORT_SYMBOL(dvb_pll_lg_tdvs_h06xf);
1963c907 271
49dc82fd
PB		 272/* Philips FMD1216ME
273 * used in Medion Hybrid PCMCIA card and USB Box
274 */
77d67504 275static void fmd1216me_bw(u8 *buf, const struct dvb_frontend_parameters *params)
49dc82fd 276{
77d67504
MK		 277 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ &&
278 params->frequency >= 158870000)
49dc82fd
PB		 279 buf[3] |= 0x08;
280}
281
282struct dvb_pll_desc dvb_pll_fmd1216me = {
0589b8e4 283 .name = "Philips FMD1216ME",
49dc82fd
PB		 284 .min = 50870000,
285 .max = 858000000,
df78cb0a 286 .iffreq= 36125000,
77d67504 287 .set = fmd1216me_bw,
49dc82fd
PB		 288 .count = 7,
289 .entries = {
df78cb0a
TP		 290 { 143870000, 166667, 0xbc, 0x41 },
291 { 158870000, 166667, 0xf4, 0x41 },
292 { 329870000, 166667, 0xbc, 0x42 },
293 { 441870000, 166667, 0xf4, 0x42 },
294 { 625870000, 166667, 0xbc, 0x44 },
295 { 803870000, 166667, 0xf4, 0x44 },
296 { 999999999, 166667, 0xfc, 0x44 },
49dc82fd
PB		 297 }
298};
299EXPORT_SYMBOL(dvb_pll_fmd1216me);
300
0589b8e4
PB		 301/* ALPS TDED4
302 * used in Nebula-Cards and USB boxes
303 */
77d67504 304static void tded4_bw(u8 *buf, const struct dvb_frontend_parameters *params)
0589b8e4 305{
77d67504 306 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
0589b8e4
PB		 307 buf[3] |= 0x04;
308}
309
310struct dvb_pll_desc dvb_pll_tded4 = {
311 .name = "ALPS TDED4",
312 .min = 47000000,
313 .max = 863000000,
df78cb0a 314 .iffreq= 36166667,
77d67504 315 .set = tded4_bw,
0589b8e4
PB		 316 .count = 4,
317 .entries = {
df78cb0a
TP		 318 { 153000000, 166667, 0x85, 0x01 },
319 { 470000000, 166667, 0x85, 0x02 },
320 { 823000000, 166667, 0x85, 0x08 },
321 { 999999999, 166667, 0x85, 0x88 },
0589b8e4
PB		 322 }
323};
324EXPORT_SYMBOL(dvb_pll_tded4);
325
147418c9
KL		 326/* ALPS TDHU2
327 * used in AverTVHD MCE A180
328 */
329struct dvb_pll_desc dvb_pll_tdhu2 = {
330 .name = "ALPS TDHU2",
331 .min = 54000000,
332 .max = 864000000,
df78cb0a 333 .iffreq= 44000000,
147418c9
KL		 334 .count = 4,
335 .entries = {
df78cb0a
TP		 336 { 162000000, 62500, 0x85, 0x01 },
337 { 426000000, 62500, 0x85, 0x02 },
338 { 782000000, 62500, 0x85, 0x08 },
339 { 999999999, 62500, 0x85, 0x88 },
147418c9
KL		 340 }
341};
342EXPORT_SYMBOL(dvb_pll_tdhu2);
343
344/* Philips TUV1236D
345 * used in ATI HDTV Wonder
346 */
4abe9f9d
MK		 347static void tuv1236d_rf(u8 *buf, const struct dvb_frontend_parameters *params)
348{
349 switch (params->u.vsb.modulation) {
350 case QAM_64:
351 case QAM_256:
352 buf[3] |= 0x08;
353 break;
354 case VSB_8:
355 default:
356 buf[3] &= ~0x08;
357 }
358}
359
147418c9
KL		 360struct dvb_pll_desc dvb_pll_tuv1236d = {
361 .name = "Philips TUV1236D",
04a45929 362 .min = 54000000,
147418c9 363 .max = 864000000,
df78cb0a 364 .iffreq= 44000000,
4abe9f9d 365 .set = tuv1236d_rf,
147418c9
KL		 366 .count = 3,
367 .entries = {
df78cb0a
TP		 368 { 157250000, 62500, 0xc6, 0x41 },
369 { 454000000, 62500, 0xc6, 0x42 },
370 { 999999999, 62500, 0xc6, 0x44 },
147418c9
KL		 371 },
372};
373EXPORT_SYMBOL(dvb_pll_tuv1236d);
374
d76a6179 375/* Samsung TBMV30111IN / TBMV30712IN1
147418c9
KL		 376 * used in Air2PC ATSC - 2nd generation (nxt2002)
377 */
28f3d4b3
MK		 378struct dvb_pll_desc dvb_pll_samsung_tbmv = {
379 .name = "Samsung TBMV30111IN / TBMV30712IN1",
147418c9
KL		 380 .min = 54000000,
381 .max = 860000000,
df78cb0a 382 .iffreq= 44000000,
17c37efb 383 .count = 6,
147418c9 384 .entries = {
df78cb0a
TP		 385 { 172000000, 166667, 0xb4, 0x01 },
386 { 214000000, 166667, 0xb4, 0x02 },
387 { 467000000, 166667, 0xbc, 0x02 },
388 { 721000000, 166667, 0xbc, 0x08 },
389 { 841000000, 166667, 0xf4, 0x08 },
390 { 999999999, 166667, 0xfc, 0x02 },
147418c9
KL		 391 }
392};
28f3d4b3 393EXPORT_SYMBOL(dvb_pll_samsung_tbmv);
147418c9 394
f8bf134d
RP		 395/*
396 * Philips SD1878 Tuner.
397 */
398struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
399 .name = "Philips SD1878",
400 .min = 950000,
401 .max = 2150000,
df78cb0a 402 .iffreq= 249, /* zero-IF, offset 249 is to round up */
f8bf134d
RP		 403 .count = 4,
404 .entries = {
df78cb0a
TP		 405 { 1250000, 500, 0xc4, 0x00},
406 { 1550000, 500, 0xc4, 0x40},
407 { 2050000, 500, 0xc4, 0x80},
408 { 2150000, 500, 0xc4, 0xc0},
f8bf134d
RP		 409 },
410};
411EXPORT_SYMBOL(dvb_pll_philips_sd1878_tda8261);
412
a78d0bfa
JAR		 413/*
414 * Philips TD1316 Tuner.
415 */
77d67504 416static void td1316_bw(u8 *buf, const struct dvb_frontend_parameters *params)
a78d0bfa
JAR		 417{
418 u8 band;
419
420 /* determine band */
77d67504 421 if (params->frequency < 161000000)
a78d0bfa 422 band = 1;
77d67504 423 else if (params->frequency < 444000000)
a78d0bfa
JAR		 424 band = 2;
425 else
426 band = 4;
427
428 buf[3] |= band;
429
430 /* setup PLL filter */
77d67504 431 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
a78d0bfa
JAR		 432 buf[3] |= 1 << 3;
433}
434
435struct dvb_pll_desc dvb_pll_philips_td1316 = {
436 .name = "Philips TD1316",
437 .min = 87000000,
438 .max = 895000000,
df78cb0a 439 .iffreq= 36166667,
77d67504 440 .set = td1316_bw,
a78d0bfa
JAR		 441 .count = 9,
442 .entries = {
df78cb0a
TP		 443 { 93834000, 166667, 0xca, 0x60},
444 { 123834000, 166667, 0xca, 0xa0},
445 { 163834000, 166667, 0xca, 0xc0},
446 { 253834000, 166667, 0xca, 0x60},
447 { 383834000, 166667, 0xca, 0xa0},
448 { 443834000, 166667, 0xca, 0xc0},
449 { 583834000, 166667, 0xca, 0x60},
450 { 793834000, 166667, 0xca, 0xa0},
451 { 858834000, 166667, 0xca, 0xe0},
a78d0bfa
JAR		 452 },
453};
454EXPORT_SYMBOL(dvb_pll_philips_td1316);
455
780dfef3 456/* FE6600 used on DViCO Hybrid */
91ae3299
MK		 457struct dvb_pll_desc dvb_pll_thomson_fe6600 = {
458 .name = "Thomson FE6600",
780dfef3
CP		 459 .min = 44250000,
460 .max = 858000000,
df78cb0a 461 .iffreq= 36125000,
780dfef3
CP		 462 .count = 4,
463 .entries = {
df78cb0a
TP		 464 { 250000000, 166667, 0xb4, 0x12 },
465 { 455000000, 166667, 0xfe, 0x11 },
466 { 775500000, 166667, 0xbc, 0x18 },
467 { 999999999, 166667, 0xf4, 0x18 },
780dfef3
CP		 468 }
469};
91ae3299 470EXPORT_SYMBOL(dvb_pll_thomson_fe6600);
77d67504 471static void opera1_bw(u8 *buf, const struct dvb_frontend_parameters *params)
941491f3 472{
77d67504 473 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
941491f3
MG		 474 buf[2] |= 0x08;
475}
476
477struct dvb_pll_desc dvb_pll_opera1 = {
478 .name = "Opera Tuner",
479 .min = 900000,
480 .max = 2250000,
481 .iffreq= 0,
77d67504 482 .set = opera1_bw,
941491f3
MG		 483 .count = 8,
484 .entries = {
485 { 1064000, 500, 0xe5, 0xc6 },
486 { 1169000, 500, 0xe5, 0xe6 },
487 { 1299000, 500, 0xe5, 0x24 },
488 { 1444000, 500, 0xe5, 0x44 },
489 { 1606000, 500, 0xe5, 0x64 },
490 { 1777000, 500, 0xe5, 0x84 },
491 { 1941000, 500, 0xe5, 0xa4 },
492 { 2250000, 500, 0xe5, 0xc4 },
493 }
494};
495EXPORT_SYMBOL(dvb_pll_opera1);
780dfef3 496
272bc4db
AQ		 497struct dvb_pll_priv {
498 /* i2c details */
499 int pll_i2c_address;
500 struct i2c_adapter *i2c;
501
502 /* the PLL descriptor */
503 struct dvb_pll_desc *pll_desc;
504
505 /* cached frequency/bandwidth */
506 u32 frequency;
507 u32 bandwidth;
508};
509
1da177e4
LT		 510/* ----------------------------------------------------------- */
511/* code */
512
513static int debug = 0;
514module_param(debug, int, 0644);
515MODULE_PARM_DESC(debug, "enable verbose debug messages");
516
517int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
77d67504 518 const struct dvb_frontend_parameters *params)
1da177e4
LT		 519{
520 u32 div;
521 int i;
522
77d67504
MK		 523 if (params->frequency != 0 && (params->frequency < desc->min ||
524 params->frequency > desc->max))
525 return -EINVAL;
1da177e4
LT		 526
527 for (i = 0; i < desc->count; i++) {
77d67504 528 if (params->frequency > desc->entries[i].limit)
1da177e4
LT		 529 continue;
530 break;
531 }
77d67504 532
1da177e4 533 if (debug)
77d67504
MK		 534 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
535 params->frequency, i, desc->count);
272bc4db
AQ		 536 if (i == desc->count)
537 return -EINVAL;
1da177e4 538
77d67504
MK		 539 div = (params->frequency + desc->iffreq +
540 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
1da177e4
LT		 541 buf[0] = div >> 8;
542 buf[1] = div & 0xff;
ab66b22f
MK		 543 buf[2] = desc->entries[i].config;
544 buf[3] = desc->entries[i].cb;
1da177e4 545
77d67504
MK		 546 if (desc->set)
547 desc->set(buf, params);
1da177e4
LT		 548
549 if (debug)
550 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
551 desc->name, div, buf[0], buf[1], buf[2], buf[3]);
552
89faeefc 553 // calculate the frequency we set it to
df78cb0a 554 return (div * desc->entries[i].stepsize) - desc->iffreq;
1da177e4
LT		 555}
556EXPORT_SYMBOL(dvb_pll_configure);
557
272bc4db
AQ		 558static int dvb_pll_release(struct dvb_frontend *fe)
559{
2213918a 560 kfree(fe->tuner_priv);
272bc4db
AQ		 561 fe->tuner_priv = NULL;
562 return 0;
563}
564
565static int dvb_pll_sleep(struct dvb_frontend *fe)
566{
567 struct dvb_pll_priv *priv = fe->tuner_priv;
272bc4db 568
c162dff6
CP		 569 if (priv->i2c == NULL)
570 return -EINVAL;
571
d519dcf6
TP		 572 if (priv->pll_desc->sleepdata) {
573 struct i2c_msg msg = { .flags = 0,
574 .addr = priv->pll_i2c_address,
575 .buf = priv->pll_desc->sleepdata + 1,
576 .len = priv->pll_desc->sleepdata[0] };
272bc4db 577
d519dcf6 578 int result;
272bc4db 579
d519dcf6
TP		 580 if (fe->ops.i2c_gate_ctrl)
581 fe->ops.i2c_gate_ctrl(fe, 1);
582 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
583 return result;
584 }
585 return 0;
272bc4db 586 }
d519dcf6
TP		 587 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
588 return -EINVAL;
272bc4db
AQ		 589}
590
47ae9ae8
MK		 591static int dvb_pll_set_params(struct dvb_frontend *fe,
592 struct dvb_frontend_parameters *params)
272bc4db
AQ		 593{
594 struct dvb_pll_priv *priv = fe->tuner_priv;
595 u8 buf[4];
596 struct i2c_msg msg =
47ae9ae8
MK		 597 { .addr = priv->pll_i2c_address, .flags = 0,
598 .buf = buf, .len = sizeof(buf) };
272bc4db 599 int result;
77d67504 600 u32 frequency = 0;
272bc4db
AQ		 601
602 if (priv->i2c == NULL)
603 return -EINVAL;
604
77d67504 605 if ((result = dvb_pll_configure(priv->pll_desc, buf, params)) < 0)
272bc4db 606 return result;
89faeefc
MK		 607 else
608 frequency = result;
272bc4db 609
dea74869
PB		 610 if (fe->ops.i2c_gate_ctrl)
611 fe->ops.i2c_gate_ctrl(fe, 1);
272bc4db
AQ		 612 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
613 return result;
614 }
615
89faeefc 616 priv->frequency = frequency;
77d67504 617 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ		 618
619 return 0;
620}
621
47ae9ae8
MK		 622static int dvb_pll_calc_regs(struct dvb_frontend *fe,
623 struct dvb_frontend_parameters *params,
624 u8 *buf, int buf_len)
272bc4db
AQ		 625{
626 struct dvb_pll_priv *priv = fe->tuner_priv;
627 int result;
77d67504 628 u32 frequency = 0;
272bc4db
AQ		 629
630 if (buf_len < 5)
631 return -EINVAL;
632
77d67504 633 if ((result = dvb_pll_configure(priv->pll_desc, buf+1, params)) < 0)
272bc4db 634 return result;
89faeefc
MK		 635 else
636 frequency = result;
637
272bc4db
AQ		 638 buf[0] = priv->pll_i2c_address;
639
89faeefc 640 priv->frequency = frequency;
77d67504 641 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ		 642
643 return 5;
644}
645
646static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency)
647{
648 struct dvb_pll_priv *priv = fe->tuner_priv;
649 *frequency = priv->frequency;
650 return 0;
651}
652
653static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
654{
655 struct dvb_pll_priv *priv = fe->tuner_priv;
656 *bandwidth = priv->bandwidth;
657 return 0;
658}
659
26aed922
TP		 660static int dvb_pll_init(struct dvb_frontend *fe)
661{
662 struct dvb_pll_priv *priv = fe->tuner_priv;
663
664 if (priv->i2c == NULL)
665 return -EINVAL;
666
667 if (priv->pll_desc->initdata) {
668 struct i2c_msg msg = { .flags = 0,
669 .addr = priv->pll_i2c_address,
670 .buf = priv->pll_desc->initdata + 1,
671 .len = priv->pll_desc->initdata[0] };
672
673 int result;
674 if (fe->ops.i2c_gate_ctrl)
675 fe->ops.i2c_gate_ctrl(fe, 1);
676 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
677 return result;
678 }
679 return 0;
680 }
681 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
682 return -EINVAL;
683}
684
272bc4db
AQ		 685static struct dvb_tuner_ops dvb_pll_tuner_ops = {
686 .release = dvb_pll_release,
687 .sleep = dvb_pll_sleep,
d519dcf6 688 .init = dvb_pll_init,
272bc4db 689 .set_params = dvb_pll_set_params,
bd4956b8 690 .calc_regs = dvb_pll_calc_regs,
272bc4db
AQ		 691 .get_frequency = dvb_pll_get_frequency,
692 .get_bandwidth = dvb_pll_get_bandwidth,
693};
694
47ae9ae8
MK		 695struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
696 struct i2c_adapter *i2c,
697 struct dvb_pll_desc *desc)
272bc4db 698{
061b623c 699 u8 b1 [] = { 0 };
47ae9ae8
MK		 700 struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD,
701 .buf = b1, .len = 1 };
272bc4db 702 struct dvb_pll_priv *priv = NULL;
061b623c
AQ		 703 int ret;
704
55c05b6d
AQ		 705 if (i2c != NULL) {
706 if (fe->ops.i2c_gate_ctrl)
707 fe->ops.i2c_gate_ctrl(fe, 1);
708
95faba22
AQ		 709 ret = i2c_transfer (i2c, &msg, 1);
710 if (ret != 1)
2bfe031d 711 return NULL;
55c05b6d
AQ		 712 if (fe->ops.i2c_gate_ctrl)
713 fe->ops.i2c_gate_ctrl(fe, 0);
714 }
272bc4db
AQ		 715
716 priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL);
717 if (priv == NULL)
2bfe031d 718 return NULL;
272bc4db
AQ		 719
720 priv->pll_i2c_address = pll_addr;
721 priv->i2c = i2c;
722 priv->pll_desc = desc;
723
47ae9ae8
MK		 724 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
725 sizeof(struct dvb_tuner_ops));
726
982dd1bd
TP		 727 strncpy(fe->ops.tuner_ops.info.name, desc->name,
728 sizeof(fe->ops.tuner_ops.info.name));
dea74869
PB		 729 fe->ops.tuner_ops.info.frequency_min = desc->min;
730 fe->ops.tuner_ops.info.frequency_min = desc->max;
d519dcf6
TP		 731 if (!desc->initdata)
732 fe->ops.tuner_ops.init = NULL;
733 if (!desc->sleepdata)
734 fe->ops.tuner_ops.sleep = NULL;
272bc4db
AQ		 735
736 fe->tuner_priv = priv;
2bfe031d 737 return fe;
272bc4db
AQ		 738}
739EXPORT_SYMBOL(dvb_pll_attach);
740
1da177e4
LT		 741MODULE_DESCRIPTION("dvb pll library");
742MODULE_AUTHOR("Gerd Knorr");
743MODULE_LICENSE("GPL");
Ubuntu Artful kernel mirror