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V4L/DVB (6226): dvb-pll: pass fe pointer into dvb_pll_configure() and set() functions
[mirror_ubuntu-artful-kernel.git] / drivers / media / dvb / frontends / dvb-pll.c
CommitLineData
1da177e4 1/*
1da177e4
LT
2 * descriptions + helper functions for simple dvb plls.
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/dvb/frontend.h>
23#include <asm/types.h>
24
25#include "dvb-pll.h"
26
47a9991e
MK
27struct dvb_pll_desc {
28 char *name;
29 u32 min;
30 u32 max;
31 u32 iffreq;
5d7802b2
MK
32 void (*set)(struct dvb_frontend *fe, u8 *buf,
33 const struct dvb_frontend_parameters *params);
47a9991e
MK
34 u8 *initdata;
35 u8 *sleepdata;
36 int count;
37 struct {
38 u32 limit;
39 u32 stepsize;
40 u8 config;
41 u8 cb;
42 } entries[12];
43};
44
1da177e4
LT
45/* ----------------------------------------------------------- */
46/* descriptions */
47
26aed922
TP
48/* Set AGC TOP value to 103 dBuV:
49 0x80 = Control Byte
50 0x40 = 250 uA charge pump (irrelevant)
51 0x18 = Aux Byte to follow
52 0x06 = 64.5 kHz divider (irrelevant)
53 0x01 = Disable Vt (aka sleep)
54
55 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA)
56 0x50 = AGC Take over point = 103 dBuV */
57static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 };
58
b7754d74
TP
59/* 0x04 = 166.67 kHz divider
60
61 0x80 = AGC Time constant 50ms Iagc = 9 uA
62 0x20 = AGC Take over point = 112 dBuV */
63static u8 tua603x_agc112[] = { 2, 0x80|0x40|0x18|0x04|0x01, 0x80|0x20 };
64
47a9991e 65static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
1da177e4
LT
66 .name = "Thomson dtt7579",
67 .min = 177000000,
68 .max = 858000000,
df78cb0a 69 .iffreq= 36166667,
d519dcf6
TP
70 .sleepdata = (u8[]){ 2, 0xb4, 0x03 },
71 .count = 4,
1da177e4 72 .entries = {
df78cb0a
TP
73 { 443250000, 166667, 0xb4, 0x02 },
74 { 542000000, 166667, 0xb4, 0x08 },
75 { 771000000, 166667, 0xbc, 0x08 },
76 { 999999999, 166667, 0xf4, 0x08 },
1da177e4
LT
77 },
78};
1da177e4 79
47a9991e 80static struct dvb_pll_desc dvb_pll_thomson_dtt7610 = {
1da177e4
LT
81 .name = "Thomson dtt7610",
82 .min = 44000000,
83 .max = 958000000,
df78cb0a 84 .iffreq= 44000000,
1da177e4
LT
85 .count = 3,
86 .entries = {
df78cb0a
TP
87 { 157250000, 62500, 0x8e, 0x39 },
88 { 454000000, 62500, 0x8e, 0x3a },
89 { 999999999, 62500, 0x8e, 0x3c },
1da177e4
LT
90 },
91};
1da177e4 92
5d7802b2 93static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf,
77d67504 94 const struct dvb_frontend_parameters *params)
1da177e4 95{
77d67504 96 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth)
1da177e4
LT
97 buf[3] |= 0x10;
98}
99
47a9991e 100static struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
1da177e4
LT
101 .name = "Thomson dtt759x",
102 .min = 177000000,
103 .max = 896000000,
77d67504 104 .set = thomson_dtt759x_bw,
df78cb0a 105 .iffreq= 36166667,
d519dcf6
TP
106 .sleepdata = (u8[]){ 2, 0x84, 0x03 },
107 .count = 5,
1da177e4 108 .entries = {
df78cb0a
TP
109 { 264000000, 166667, 0xb4, 0x02 },
110 { 470000000, 166667, 0xbc, 0x02 },
111 { 735000000, 166667, 0xbc, 0x08 },
112 { 835000000, 166667, 0xf4, 0x08 },
113 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT
114 },
115};
1da177e4 116
47a9991e 117static struct dvb_pll_desc dvb_pll_lg_z201 = {
1da177e4
LT
118 .name = "LG z201",
119 .min = 174000000,
120 .max = 862000000,
df78cb0a 121 .iffreq= 36166667,
d519dcf6
TP
122 .sleepdata = (u8[]){ 2, 0xbc, 0x03 },
123 .count = 5,
1da177e4 124 .entries = {
df78cb0a
TP
125 { 157500000, 166667, 0xbc, 0x01 },
126 { 443250000, 166667, 0xbc, 0x02 },
127 { 542000000, 166667, 0xbc, 0x04 },
128 { 830000000, 166667, 0xf4, 0x04 },
129 { 999999999, 166667, 0xfc, 0x04 },
1da177e4
LT
130 },
131};
1da177e4 132
47a9991e 133static struct dvb_pll_desc dvb_pll_microtune_4042 = {
d8667cbb
MM
134 .name = "Microtune 4042 FI5",
135 .min = 57000000,
136 .max = 858000000,
df78cb0a 137 .iffreq= 44000000,
d8667cbb
MM
138 .count = 3,
139 .entries = {
df78cb0a
TP
140 { 162000000, 62500, 0x8e, 0xa1 },
141 { 457000000, 62500, 0x8e, 0x91 },
142 { 999999999, 62500, 0x8e, 0x31 },
d8667cbb
MM
143 },
144};
d8667cbb 145
47a9991e 146static struct dvb_pll_desc dvb_pll_thomson_dtt761x = {
83ac8722
MK
147 /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
148 .name = "Thomson dtt761x",
149 .min = 57000000,
150 .max = 863000000,
df78cb0a 151 .iffreq= 44000000,
0d723c09 152 .count = 3,
26aed922 153 .initdata = tua603x_agc103,
0d723c09 154 .entries = {
df78cb0a
TP
155 { 147000000, 62500, 0x8e, 0x39 },
156 { 417000000, 62500, 0x8e, 0x3a },
157 { 999999999, 62500, 0x8e, 0x3c },
0d723c09
MK
158 },
159};
0d723c09 160
47a9991e 161static struct dvb_pll_desc dvb_pll_unknown_1 = {
1da177e4
LT
162 .name = "unknown 1", /* used by dntv live dvb-t */
163 .min = 174000000,
164 .max = 862000000,
df78cb0a 165 .iffreq= 36166667,
1da177e4
LT
166 .count = 9,
167 .entries = {
df78cb0a
TP
168 { 150000000, 166667, 0xb4, 0x01 },
169 { 173000000, 166667, 0xbc, 0x01 },
170 { 250000000, 166667, 0xb4, 0x02 },
171 { 400000000, 166667, 0xbc, 0x02 },
172 { 420000000, 166667, 0xf4, 0x02 },
173 { 470000000, 166667, 0xfc, 0x02 },
174 { 600000000, 166667, 0xbc, 0x08 },
175 { 730000000, 166667, 0xf4, 0x08 },
176 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT
177 },
178};
1da177e4 179
776338e1
JS
180/* Infineon TUA6010XS
181 * used in Thomson Cable Tuner
182 */
47a9991e 183static struct dvb_pll_desc dvb_pll_tua6010xs = {
776338e1
JS
184 .name = "Infineon TUA6010XS",
185 .min = 44250000,
186 .max = 858000000,
df78cb0a 187 .iffreq= 36125000,
776338e1
JS
188 .count = 3,
189 .entries = {
df78cb0a
TP
190 { 115750000, 62500, 0x8e, 0x03 },
191 { 403250000, 62500, 0x8e, 0x06 },
192 { 999999999, 62500, 0x8e, 0x85 },
776338e1
JS
193 },
194};
776338e1
JS
195
196/* Panasonic env57h1xd5 (some Philips PLL ?) */
47a9991e 197static struct dvb_pll_desc dvb_pll_env57h1xd5 = {
776338e1
JS
198 .name = "Panasonic ENV57H1XD5",
199 .min = 44250000,
200 .max = 858000000,
df78cb0a 201 .iffreq= 36125000,
776338e1
JS
202 .count = 4,
203 .entries = {
df78cb0a
TP
204 { 153000000, 166667, 0xc2, 0x41 },
205 { 470000000, 166667, 0xc2, 0x42 },
206 { 526000000, 166667, 0xc2, 0x84 },
207 { 999999999, 166667, 0xc2, 0xa4 },
776338e1
JS
208 },
209};
776338e1
JS
210
211/* Philips TDA6650/TDA6651
212 * used in Panasonic ENV77H11D5
213 */
5d7802b2
MK
214static void tda665x_bw(struct dvb_frontend *fe, u8 *buf,
215 const struct dvb_frontend_parameters *params)
776338e1 216{
77d67504 217 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
776338e1
JS
218 buf[3] |= 0x08;
219}
220
47a9991e 221static struct dvb_pll_desc dvb_pll_tda665x = {
776338e1
JS
222 .name = "Philips TDA6650/TDA6651",
223 .min = 44250000,
224 .max = 858000000,
77d67504 225 .set = tda665x_bw,
df78cb0a 226 .iffreq= 36166667,
fbfee868 227 .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab },
776338e1
JS
228 .count = 12,
229 .entries = {
df78cb0a
TP
230 { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ },
231 { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
232 { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
233 { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
234 { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ },
235 { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ },
236 { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
237 { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
238 { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ },
239 { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ },
240 { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
241 { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ },
776338e1
JS
242 }
243};
776338e1
JS
244
245/* Infineon TUA6034
246 * used in LG TDTP E102P
247 */
5d7802b2
MK
248static void tua6034_bw(struct dvb_frontend *fe, u8 *buf,
249 const struct dvb_frontend_parameters *params)
776338e1 250{
77d67504 251 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth)
776338e1
JS
252 buf[3] |= 0x08;
253}
254
47a9991e 255static struct dvb_pll_desc dvb_pll_tua6034 = {
776338e1
JS
256 .name = "Infineon TUA6034",
257 .min = 44250000,
258 .max = 858000000,
df78cb0a 259 .iffreq= 36166667,
776338e1 260 .count = 3,
77d67504 261 .set = tua6034_bw,
776338e1 262 .entries = {
df78cb0a
TP
263 { 174500000, 62500, 0xce, 0x01 },
264 { 230000000, 62500, 0xce, 0x02 },
265 { 999999999, 62500, 0xce, 0x04 },
776338e1
JS
266 },
267};
776338e1 268
1963c907 269/* Infineon TUA6034
d9e12f25 270 * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F
1963c907 271 */
47a9991e 272static struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = {
d9e12f25 273 .name = "LG TDVS-H06xF",
1963c907
MK
274 .min = 54000000,
275 .max = 863000000,
df78cb0a 276 .iffreq= 44000000,
6bdcc6e6 277 .initdata = tua603x_agc103,
1963c907
MK
278 .count = 3,
279 .entries = {
df78cb0a
TP
280 { 165000000, 62500, 0xce, 0x01 },
281 { 450000000, 62500, 0xce, 0x02 },
282 { 999999999, 62500, 0xce, 0x04 },
1963c907
MK
283 },
284};
1963c907 285
49dc82fd
PB
286/* Philips FMD1216ME
287 * used in Medion Hybrid PCMCIA card and USB Box
288 */
5d7802b2
MK
289static void fmd1216me_bw(struct dvb_frontend *fe, u8 *buf,
290 const struct dvb_frontend_parameters *params)
49dc82fd 291{
77d67504
MK
292 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ &&
293 params->frequency >= 158870000)
49dc82fd
PB
294 buf[3] |= 0x08;
295}
296
47a9991e 297static struct dvb_pll_desc dvb_pll_fmd1216me = {
0589b8e4 298 .name = "Philips FMD1216ME",
49dc82fd
PB
299 .min = 50870000,
300 .max = 858000000,
df78cb0a 301 .iffreq= 36125000,
77d67504 302 .set = fmd1216me_bw,
b7754d74
TP
303 .initdata = tua603x_agc112,
304 .sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 },
49dc82fd
PB
305 .count = 7,
306 .entries = {
df78cb0a
TP
307 { 143870000, 166667, 0xbc, 0x41 },
308 { 158870000, 166667, 0xf4, 0x41 },
309 { 329870000, 166667, 0xbc, 0x42 },
310 { 441870000, 166667, 0xf4, 0x42 },
311 { 625870000, 166667, 0xbc, 0x44 },
312 { 803870000, 166667, 0xf4, 0x44 },
313 { 999999999, 166667, 0xfc, 0x44 },
49dc82fd
PB
314 }
315};
49dc82fd 316
0589b8e4
PB
317/* ALPS TDED4
318 * used in Nebula-Cards and USB boxes
319 */
5d7802b2
MK
320static void tded4_bw(struct dvb_frontend *fe, u8 *buf,
321 const struct dvb_frontend_parameters *params)
0589b8e4 322{
77d67504 323 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
0589b8e4
PB
324 buf[3] |= 0x04;
325}
326
47a9991e 327static struct dvb_pll_desc dvb_pll_tded4 = {
0589b8e4
PB
328 .name = "ALPS TDED4",
329 .min = 47000000,
330 .max = 863000000,
df78cb0a 331 .iffreq= 36166667,
77d67504 332 .set = tded4_bw,
0589b8e4
PB
333 .count = 4,
334 .entries = {
df78cb0a
TP
335 { 153000000, 166667, 0x85, 0x01 },
336 { 470000000, 166667, 0x85, 0x02 },
337 { 823000000, 166667, 0x85, 0x08 },
338 { 999999999, 166667, 0x85, 0x88 },
0589b8e4
PB
339 }
340};
0589b8e4 341
147418c9
KL
342/* ALPS TDHU2
343 * used in AverTVHD MCE A180
344 */
47a9991e 345static struct dvb_pll_desc dvb_pll_tdhu2 = {
147418c9
KL
346 .name = "ALPS TDHU2",
347 .min = 54000000,
348 .max = 864000000,
df78cb0a 349 .iffreq= 44000000,
147418c9
KL
350 .count = 4,
351 .entries = {
df78cb0a
TP
352 { 162000000, 62500, 0x85, 0x01 },
353 { 426000000, 62500, 0x85, 0x02 },
354 { 782000000, 62500, 0x85, 0x08 },
355 { 999999999, 62500, 0x85, 0x88 },
147418c9
KL
356 }
357};
147418c9
KL
358
359/* Philips TUV1236D
360 * used in ATI HDTV Wonder
361 */
5d7802b2
MK
362static void tuv1236d_rf(struct dvb_frontend *fe, u8 *buf,
363 const struct dvb_frontend_parameters *params)
4abe9f9d
MK
364{
365 switch (params->u.vsb.modulation) {
366 case QAM_64:
367 case QAM_256:
368 buf[3] |= 0x08;
369 break;
370 case VSB_8:
371 default:
372 buf[3] &= ~0x08;
373 }
374}
375
47a9991e 376static struct dvb_pll_desc dvb_pll_tuv1236d = {
147418c9 377 .name = "Philips TUV1236D",
04a45929 378 .min = 54000000,
147418c9 379 .max = 864000000,
df78cb0a 380 .iffreq= 44000000,
4abe9f9d 381 .set = tuv1236d_rf,
147418c9
KL
382 .count = 3,
383 .entries = {
df78cb0a
TP
384 { 157250000, 62500, 0xc6, 0x41 },
385 { 454000000, 62500, 0xc6, 0x42 },
386 { 999999999, 62500, 0xc6, 0x44 },
147418c9
KL
387 },
388};
147418c9 389
d76a6179 390/* Samsung TBMV30111IN / TBMV30712IN1
147418c9
KL
391 * used in Air2PC ATSC - 2nd generation (nxt2002)
392 */
47a9991e 393static struct dvb_pll_desc dvb_pll_samsung_tbmv = {
28f3d4b3 394 .name = "Samsung TBMV30111IN / TBMV30712IN1",
147418c9
KL
395 .min = 54000000,
396 .max = 860000000,
df78cb0a 397 .iffreq= 44000000,
17c37efb 398 .count = 6,
147418c9 399 .entries = {
df78cb0a
TP
400 { 172000000, 166667, 0xb4, 0x01 },
401 { 214000000, 166667, 0xb4, 0x02 },
402 { 467000000, 166667, 0xbc, 0x02 },
403 { 721000000, 166667, 0xbc, 0x08 },
404 { 841000000, 166667, 0xf4, 0x08 },
405 { 999999999, 166667, 0xfc, 0x02 },
147418c9
KL
406 }
407};
147418c9 408
f8bf134d
RP
409/*
410 * Philips SD1878 Tuner.
411 */
47a9991e 412static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
f8bf134d
RP
413 .name = "Philips SD1878",
414 .min = 950000,
415 .max = 2150000,
df78cb0a 416 .iffreq= 249, /* zero-IF, offset 249 is to round up */
f8bf134d
RP
417 .count = 4,
418 .entries = {
df78cb0a
TP
419 { 1250000, 500, 0xc4, 0x00},
420 { 1550000, 500, 0xc4, 0x40},
421 { 2050000, 500, 0xc4, 0x80},
422 { 2150000, 500, 0xc4, 0xc0},
f8bf134d
RP
423 },
424};
f8bf134d 425
a78d0bfa
JAR
426/*
427 * Philips TD1316 Tuner.
428 */
5d7802b2
MK
429static void td1316_bw(struct dvb_frontend *fe, u8 *buf,
430 const struct dvb_frontend_parameters *params)
a78d0bfa
JAR
431{
432 u8 band;
433
434 /* determine band */
77d67504 435 if (params->frequency < 161000000)
a78d0bfa 436 band = 1;
77d67504 437 else if (params->frequency < 444000000)
a78d0bfa
JAR
438 band = 2;
439 else
440 band = 4;
441
442 buf[3] |= band;
443
444 /* setup PLL filter */
77d67504 445 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
a78d0bfa
JAR
446 buf[3] |= 1 << 3;
447}
448
47a9991e 449static struct dvb_pll_desc dvb_pll_philips_td1316 = {
a78d0bfa
JAR
450 .name = "Philips TD1316",
451 .min = 87000000,
452 .max = 895000000,
df78cb0a 453 .iffreq= 36166667,
77d67504 454 .set = td1316_bw,
a78d0bfa
JAR
455 .count = 9,
456 .entries = {
df78cb0a
TP
457 { 93834000, 166667, 0xca, 0x60},
458 { 123834000, 166667, 0xca, 0xa0},
459 { 163834000, 166667, 0xca, 0xc0},
460 { 253834000, 166667, 0xca, 0x60},
461 { 383834000, 166667, 0xca, 0xa0},
462 { 443834000, 166667, 0xca, 0xc0},
463 { 583834000, 166667, 0xca, 0x60},
464 { 793834000, 166667, 0xca, 0xa0},
465 { 858834000, 166667, 0xca, 0xe0},
a78d0bfa
JAR
466 },
467};
a78d0bfa 468
780dfef3 469/* FE6600 used on DViCO Hybrid */
47a9991e 470static struct dvb_pll_desc dvb_pll_thomson_fe6600 = {
91ae3299 471 .name = "Thomson FE6600",
780dfef3
CP
472 .min = 44250000,
473 .max = 858000000,
df78cb0a 474 .iffreq= 36125000,
780dfef3
CP
475 .count = 4,
476 .entries = {
df78cb0a
TP
477 { 250000000, 166667, 0xb4, 0x12 },
478 { 455000000, 166667, 0xfe, 0x11 },
479 { 775500000, 166667, 0xbc, 0x18 },
480 { 999999999, 166667, 0xf4, 0x18 },
780dfef3
CP
481 }
482};
47a9991e 483
5d7802b2
MK
484static void opera1_bw(struct dvb_frontend *fe, u8 *buf,
485 const struct dvb_frontend_parameters *params)
941491f3 486{
77d67504 487 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
941491f3
MG
488 buf[2] |= 0x08;
489}
490
47a9991e 491static struct dvb_pll_desc dvb_pll_opera1 = {
941491f3
MG
492 .name = "Opera Tuner",
493 .min = 900000,
494 .max = 2250000,
495 .iffreq= 0,
77d67504 496 .set = opera1_bw,
941491f3
MG
497 .count = 8,
498 .entries = {
499 { 1064000, 500, 0xe5, 0xc6 },
500 { 1169000, 500, 0xe5, 0xe6 },
501 { 1299000, 500, 0xe5, 0x24 },
502 { 1444000, 500, 0xe5, 0x44 },
503 { 1606000, 500, 0xe5, 0x64 },
504 { 1777000, 500, 0xe5, 0x84 },
505 { 1941000, 500, 0xe5, 0xa4 },
506 { 2250000, 500, 0xe5, 0xc4 },
507 }
508};
47a9991e 509
f1b24397
MK
510/* Philips FCV1236D
511 */
0a0f2c87 512static struct dvb_pll_desc dvb_pll_fcv1236d = {
f1b24397
MK
513/* Bit_0: RF Input select
514 * Bit_1: 0=digital, 1=analog
515 */
516 .name = "Philips FCV1236D",
517 .min = 53000000,
518 .max = 803000000,
519 .iffreq= 44000000,
520 .count = 3,
521 .entries = {
522 { 159000000, 62500, 0x8e, 0xa0 },
523 { 453000000, 62500, 0x8e, 0x90 },
524 { 999999999, 62500, 0x8e, 0x30 },
525 },
526};
527
47a9991e
MK
528/* ----------------------------------------------------------- */
529
530static struct dvb_pll_desc *pll_list[] = {
531 [DVB_PLL_UNDEFINED] = NULL,
532 [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579,
533 [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x,
534 [DVB_PLL_THOMSON_DTT7610] = &dvb_pll_thomson_dtt7610,
535 [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201,
536 [DVB_PLL_MICROTUNE_4042] = &dvb_pll_microtune_4042,
537 [DVB_PLL_THOMSON_DTT761X] = &dvb_pll_thomson_dtt761x,
538 [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1,
539 [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs,
540 [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5,
541 [DVB_PLL_TUA6034] = &dvb_pll_tua6034,
542 [DVB_PLL_LG_TDVS_H06XF] = &dvb_pll_lg_tdvs_h06xf,
543 [DVB_PLL_TDA665X] = &dvb_pll_tda665x,
544 [DVB_PLL_FMD1216ME] = &dvb_pll_fmd1216me,
545 [DVB_PLL_TDED4] = &dvb_pll_tded4,
546 [DVB_PLL_TUV1236D] = &dvb_pll_tuv1236d,
547 [DVB_PLL_TDHU2] = &dvb_pll_tdhu2,
548 [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv,
549 [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261,
550 [DVB_PLL_PHILIPS_TD1316] = &dvb_pll_philips_td1316,
551 [DVB_PLL_THOMSON_FE6600] = &dvb_pll_thomson_fe6600,
552 [DVB_PLL_OPERA1] = &dvb_pll_opera1,
f1b24397 553 [DVB_PLL_FCV1236D] = &dvb_pll_fcv1236d,
47a9991e
MK
554};
555
556/* ----------------------------------------------------------- */
780dfef3 557
272bc4db
AQ
558struct dvb_pll_priv {
559 /* i2c details */
560 int pll_i2c_address;
561 struct i2c_adapter *i2c;
562
563 /* the PLL descriptor */
564 struct dvb_pll_desc *pll_desc;
565
566 /* cached frequency/bandwidth */
567 u32 frequency;
568 u32 bandwidth;
569};
570
1da177e4
LT
571/* ----------------------------------------------------------- */
572/* code */
573
574static int debug = 0;
575module_param(debug, int, 0644);
576MODULE_PARM_DESC(debug, "enable verbose debug messages");
577
5d7802b2 578static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf,
4ce15678 579 const struct dvb_frontend_parameters *params)
1da177e4 580{
5d7802b2
MK
581 struct dvb_pll_priv *priv = fe->tuner_priv;
582 struct dvb_pll_desc *desc = priv->pll_desc;
1da177e4
LT
583 u32 div;
584 int i;
585
77d67504
MK
586 if (params->frequency != 0 && (params->frequency < desc->min ||
587 params->frequency > desc->max))
588 return -EINVAL;
1da177e4
LT
589
590 for (i = 0; i < desc->count; i++) {
77d67504 591 if (params->frequency > desc->entries[i].limit)
1da177e4
LT
592 continue;
593 break;
594 }
77d67504 595
1da177e4 596 if (debug)
77d67504
MK
597 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
598 params->frequency, i, desc->count);
272bc4db
AQ
599 if (i == desc->count)
600 return -EINVAL;
1da177e4 601
77d67504
MK
602 div = (params->frequency + desc->iffreq +
603 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
1da177e4
LT
604 buf[0] = div >> 8;
605 buf[1] = div & 0xff;
ab66b22f
MK
606 buf[2] = desc->entries[i].config;
607 buf[3] = desc->entries[i].cb;
1da177e4 608
77d67504 609 if (desc->set)
5d7802b2 610 desc->set(fe, buf, params);
1da177e4
LT
611
612 if (debug)
613 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
614 desc->name, div, buf[0], buf[1], buf[2], buf[3]);
615
89faeefc 616 // calculate the frequency we set it to
df78cb0a 617 return (div * desc->entries[i].stepsize) - desc->iffreq;
1da177e4 618}
1da177e4 619
272bc4db
AQ
620static int dvb_pll_release(struct dvb_frontend *fe)
621{
2213918a 622 kfree(fe->tuner_priv);
272bc4db
AQ
623 fe->tuner_priv = NULL;
624 return 0;
625}
626
627static int dvb_pll_sleep(struct dvb_frontend *fe)
628{
629 struct dvb_pll_priv *priv = fe->tuner_priv;
272bc4db 630
c162dff6
CP
631 if (priv->i2c == NULL)
632 return -EINVAL;
633
d519dcf6
TP
634 if (priv->pll_desc->sleepdata) {
635 struct i2c_msg msg = { .flags = 0,
636 .addr = priv->pll_i2c_address,
637 .buf = priv->pll_desc->sleepdata + 1,
638 .len = priv->pll_desc->sleepdata[0] };
272bc4db 639
d519dcf6 640 int result;
272bc4db 641
d519dcf6
TP
642 if (fe->ops.i2c_gate_ctrl)
643 fe->ops.i2c_gate_ctrl(fe, 1);
644 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
645 return result;
646 }
647 return 0;
272bc4db 648 }
d519dcf6
TP
649 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
650 return -EINVAL;
272bc4db
AQ
651}
652
47ae9ae8
MK
653static int dvb_pll_set_params(struct dvb_frontend *fe,
654 struct dvb_frontend_parameters *params)
272bc4db
AQ
655{
656 struct dvb_pll_priv *priv = fe->tuner_priv;
657 u8 buf[4];
658 struct i2c_msg msg =
47ae9ae8
MK
659 { .addr = priv->pll_i2c_address, .flags = 0,
660 .buf = buf, .len = sizeof(buf) };
272bc4db 661 int result;
77d67504 662 u32 frequency = 0;
272bc4db
AQ
663
664 if (priv->i2c == NULL)
665 return -EINVAL;
666
5d7802b2 667 if ((result = dvb_pll_configure(fe, buf, params)) < 0)
272bc4db 668 return result;
89faeefc
MK
669 else
670 frequency = result;
272bc4db 671
dea74869
PB
672 if (fe->ops.i2c_gate_ctrl)
673 fe->ops.i2c_gate_ctrl(fe, 1);
272bc4db
AQ
674 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
675 return result;
676 }
677
89faeefc 678 priv->frequency = frequency;
77d67504 679 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ
680
681 return 0;
682}
683
47ae9ae8
MK
684static int dvb_pll_calc_regs(struct dvb_frontend *fe,
685 struct dvb_frontend_parameters *params,
686 u8 *buf, int buf_len)
272bc4db
AQ
687{
688 struct dvb_pll_priv *priv = fe->tuner_priv;
689 int result;
77d67504 690 u32 frequency = 0;
272bc4db
AQ
691
692 if (buf_len < 5)
693 return -EINVAL;
694
5d7802b2 695 if ((result = dvb_pll_configure(fe, buf+1, params)) < 0)
272bc4db 696 return result;
89faeefc
MK
697 else
698 frequency = result;
699
272bc4db
AQ
700 buf[0] = priv->pll_i2c_address;
701
89faeefc 702 priv->frequency = frequency;
77d67504 703 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ
704
705 return 5;
706}
707
708static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency)
709{
710 struct dvb_pll_priv *priv = fe->tuner_priv;
711 *frequency = priv->frequency;
712 return 0;
713}
714
715static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
716{
717 struct dvb_pll_priv *priv = fe->tuner_priv;
718 *bandwidth = priv->bandwidth;
719 return 0;
720}
721
26aed922
TP
722static int dvb_pll_init(struct dvb_frontend *fe)
723{
724 struct dvb_pll_priv *priv = fe->tuner_priv;
725
726 if (priv->i2c == NULL)
727 return -EINVAL;
728
729 if (priv->pll_desc->initdata) {
730 struct i2c_msg msg = { .flags = 0,
731 .addr = priv->pll_i2c_address,
732 .buf = priv->pll_desc->initdata + 1,
733 .len = priv->pll_desc->initdata[0] };
734
735 int result;
736 if (fe->ops.i2c_gate_ctrl)
737 fe->ops.i2c_gate_ctrl(fe, 1);
738 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
739 return result;
740 }
741 return 0;
742 }
743 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
744 return -EINVAL;
745}
746
272bc4db
AQ
747static struct dvb_tuner_ops dvb_pll_tuner_ops = {
748 .release = dvb_pll_release,
749 .sleep = dvb_pll_sleep,
d519dcf6 750 .init = dvb_pll_init,
272bc4db 751 .set_params = dvb_pll_set_params,
bd4956b8 752 .calc_regs = dvb_pll_calc_regs,
272bc4db
AQ
753 .get_frequency = dvb_pll_get_frequency,
754 .get_bandwidth = dvb_pll_get_bandwidth,
755};
756
47ae9ae8
MK
757struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
758 struct i2c_adapter *i2c,
47a9991e 759 unsigned int pll_desc_id)
272bc4db 760{
061b623c 761 u8 b1 [] = { 0 };
47ae9ae8
MK
762 struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD,
763 .buf = b1, .len = 1 };
272bc4db 764 struct dvb_pll_priv *priv = NULL;
061b623c 765 int ret;
47a9991e
MK
766 struct dvb_pll_desc *desc;
767
768 BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list));
769
770 desc = pll_list[pll_desc_id];
061b623c 771
55c05b6d
AQ
772 if (i2c != NULL) {
773 if (fe->ops.i2c_gate_ctrl)
774 fe->ops.i2c_gate_ctrl(fe, 1);
775
95faba22
AQ
776 ret = i2c_transfer (i2c, &msg, 1);
777 if (ret != 1)
2bfe031d 778 return NULL;
55c05b6d
AQ
779 if (fe->ops.i2c_gate_ctrl)
780 fe->ops.i2c_gate_ctrl(fe, 0);
781 }
272bc4db
AQ
782
783 priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL);
784 if (priv == NULL)
2bfe031d 785 return NULL;
272bc4db
AQ
786
787 priv->pll_i2c_address = pll_addr;
788 priv->i2c = i2c;
789 priv->pll_desc = desc;
790
47ae9ae8
MK
791 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
792 sizeof(struct dvb_tuner_ops));
793
982dd1bd
TP
794 strncpy(fe->ops.tuner_ops.info.name, desc->name,
795 sizeof(fe->ops.tuner_ops.info.name));
dea74869 796 fe->ops.tuner_ops.info.frequency_min = desc->min;
0d84a62b 797 fe->ops.tuner_ops.info.frequency_max = desc->max;
d519dcf6
TP
798 if (!desc->initdata)
799 fe->ops.tuner_ops.init = NULL;
800 if (!desc->sleepdata)
801 fe->ops.tuner_ops.sleep = NULL;
272bc4db
AQ
802
803 fe->tuner_priv = priv;
2bfe031d 804 return fe;
272bc4db
AQ
805}
806EXPORT_SYMBOL(dvb_pll_attach);
807
1da177e4
LT
808MODULE_DESCRIPTION("dvb pll library");
809MODULE_AUTHOR("Gerd Knorr");
810MODULE_LICENSE("GPL");