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V4L/DVB (5779): Dibusb-mb: fix broken 'tuner_pass_ctrl' functionality
[mirror_ubuntu-jammy-kernel.git] / drivers / media / dvb / frontends / dvb-pll.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 * descriptions + helper functions for simple dvb plls.
3 *
4 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21#include <linux/module.h>
22#include <linux/dvb/frontend.h>
23#include <asm/types.h>
24
25#include "dvb-pll.h"
26
27/* ----------------------------------------------------------- */
28/* descriptions */
29
26aed922
TP		 30/* Set AGC TOP value to 103 dBuV:
31 0x80 = Control Byte
32 0x40 = 250 uA charge pump (irrelevant)
33 0x18 = Aux Byte to follow
34 0x06 = 64.5 kHz divider (irrelevant)
35 0x01 = Disable Vt (aka sleep)
36
37 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA)
38 0x50 = AGC Take over point = 103 dBuV */
39static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 };
40
b7754d74
TP		 41/* 0x04 = 166.67 kHz divider
42
43 0x80 = AGC Time constant 50ms Iagc = 9 uA
44 0x20 = AGC Take over point = 112 dBuV */
45static u8 tua603x_agc112[] = { 2, 0x80|0x40|0x18|0x04|0x01, 0x80|0x20 };
46
1da177e4
LT		 47struct dvb_pll_desc dvb_pll_thomson_dtt7579 = {
48 .name = "Thomson dtt7579",
49 .min = 177000000,
50 .max = 858000000,
df78cb0a 51 .iffreq= 36166667,
d519dcf6
TP		 52 .sleepdata = (u8[]){ 2, 0xb4, 0x03 },
53 .count = 4,
1da177e4 54 .entries = {
df78cb0a
TP		 55 { 443250000, 166667, 0xb4, 0x02 },
56 { 542000000, 166667, 0xb4, 0x08 },
57 { 771000000, 166667, 0xbc, 0x08 },
58 { 999999999, 166667, 0xf4, 0x08 },
1da177e4
LT		 59 },
60};
61EXPORT_SYMBOL(dvb_pll_thomson_dtt7579);
62
63struct dvb_pll_desc dvb_pll_thomson_dtt7610 = {
64 .name = "Thomson dtt7610",
65 .min = 44000000,
66 .max = 958000000,
df78cb0a 67 .iffreq= 44000000,
1da177e4
LT		 68 .count = 3,
69 .entries = {
df78cb0a
TP		 70 { 157250000, 62500, 0x8e, 0x39 },
71 { 454000000, 62500, 0x8e, 0x3a },
72 { 999999999, 62500, 0x8e, 0x3c },
1da177e4
LT		 73 },
74};
75EXPORT_SYMBOL(dvb_pll_thomson_dtt7610);
76
77d67504
MK		 77static void thomson_dtt759x_bw(u8 *buf,
78 const struct dvb_frontend_parameters *params)
1da177e4 79{
77d67504 80 if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth)
1da177e4
LT		 81 buf[3] |= 0x10;
82}
83
84struct dvb_pll_desc dvb_pll_thomson_dtt759x = {
85 .name = "Thomson dtt759x",
86 .min = 177000000,
87 .max = 896000000,
77d67504 88 .set = thomson_dtt759x_bw,
df78cb0a 89 .iffreq= 36166667,
d519dcf6
TP		 90 .sleepdata = (u8[]){ 2, 0x84, 0x03 },
91 .count = 5,
1da177e4 92 .entries = {
df78cb0a
TP		 93 { 264000000, 166667, 0xb4, 0x02 },
94 { 470000000, 166667, 0xbc, 0x02 },
95 { 735000000, 166667, 0xbc, 0x08 },
96 { 835000000, 166667, 0xf4, 0x08 },
97 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 98 },
99};
100EXPORT_SYMBOL(dvb_pll_thomson_dtt759x);
101
102struct dvb_pll_desc dvb_pll_lg_z201 = {
103 .name = "LG z201",
104 .min = 174000000,
105 .max = 862000000,
df78cb0a 106 .iffreq= 36166667,
d519dcf6
TP		 107 .sleepdata = (u8[]){ 2, 0xbc, 0x03 },
108 .count = 5,
1da177e4 109 .entries = {
df78cb0a
TP		 110 { 157500000, 166667, 0xbc, 0x01 },
111 { 443250000, 166667, 0xbc, 0x02 },
112 { 542000000, 166667, 0xbc, 0x04 },
113 { 830000000, 166667, 0xf4, 0x04 },
114 { 999999999, 166667, 0xfc, 0x04 },
1da177e4
LT		 115 },
116};
117EXPORT_SYMBOL(dvb_pll_lg_z201);
118
d8667cbb
MM		 119struct dvb_pll_desc dvb_pll_microtune_4042 = {
120 .name = "Microtune 4042 FI5",
121 .min = 57000000,
122 .max = 858000000,
df78cb0a 123 .iffreq= 44000000,
d8667cbb
MM		 124 .count = 3,
125 .entries = {
df78cb0a
TP		 126 { 162000000, 62500, 0x8e, 0xa1 },
127 { 457000000, 62500, 0x8e, 0x91 },
128 { 999999999, 62500, 0x8e, 0x31 },
d8667cbb
MM		 129 },
130};
131EXPORT_SYMBOL(dvb_pll_microtune_4042);
132
83ac8722
MK		 133struct dvb_pll_desc dvb_pll_thomson_dtt761x = {
134 /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */
135 .name = "Thomson dtt761x",
136 .min = 57000000,
137 .max = 863000000,
df78cb0a 138 .iffreq= 44000000,
0d723c09 139 .count = 3,
26aed922 140 .initdata = tua603x_agc103,
0d723c09 141 .entries = {
df78cb0a
TP		 142 { 147000000, 62500, 0x8e, 0x39 },
143 { 417000000, 62500, 0x8e, 0x3a },
144 { 999999999, 62500, 0x8e, 0x3c },
0d723c09
MK		 145 },
146};
83ac8722 147EXPORT_SYMBOL(dvb_pll_thomson_dtt761x);
0d723c09 148
1da177e4
LT		 149struct dvb_pll_desc dvb_pll_unknown_1 = {
150 .name = "unknown 1", /* used by dntv live dvb-t */
151 .min = 174000000,
152 .max = 862000000,
df78cb0a 153 .iffreq= 36166667,
1da177e4
LT		 154 .count = 9,
155 .entries = {
df78cb0a
TP		 156 { 150000000, 166667, 0xb4, 0x01 },
157 { 173000000, 166667, 0xbc, 0x01 },
158 { 250000000, 166667, 0xb4, 0x02 },
159 { 400000000, 166667, 0xbc, 0x02 },
160 { 420000000, 166667, 0xf4, 0x02 },
161 { 470000000, 166667, 0xfc, 0x02 },
162 { 600000000, 166667, 0xbc, 0x08 },
163 { 730000000, 166667, 0xf4, 0x08 },
164 { 999999999, 166667, 0xfc, 0x08 },
1da177e4
LT		 165 },
166};
167EXPORT_SYMBOL(dvb_pll_unknown_1);
168
776338e1
JS		 169/* Infineon TUA6010XS
170 * used in Thomson Cable Tuner
171 */
172struct dvb_pll_desc dvb_pll_tua6010xs = {
173 .name = "Infineon TUA6010XS",
174 .min = 44250000,
175 .max = 858000000,
df78cb0a 176 .iffreq= 36125000,
776338e1
JS		 177 .count = 3,
178 .entries = {
df78cb0a
TP		 179 { 115750000, 62500, 0x8e, 0x03 },
180 { 403250000, 62500, 0x8e, 0x06 },
181 { 999999999, 62500, 0x8e, 0x85 },
776338e1
JS		 182 },
183};
184EXPORT_SYMBOL(dvb_pll_tua6010xs);
185
186/* Panasonic env57h1xd5 (some Philips PLL ?) */
187struct dvb_pll_desc dvb_pll_env57h1xd5 = {
188 .name = "Panasonic ENV57H1XD5",
189 .min = 44250000,
190 .max = 858000000,
df78cb0a 191 .iffreq= 36125000,
776338e1
JS		 192 .count = 4,
193 .entries = {
df78cb0a
TP		 194 { 153000000, 166667, 0xc2, 0x41 },
195 { 470000000, 166667, 0xc2, 0x42 },
196 { 526000000, 166667, 0xc2, 0x84 },
197 { 999999999, 166667, 0xc2, 0xa4 },
776338e1
JS		 198 },
199};
200EXPORT_SYMBOL(dvb_pll_env57h1xd5);
201
202/* Philips TDA6650/TDA6651
203 * used in Panasonic ENV77H11D5
204 */
77d67504 205static void tda665x_bw(u8 *buf, const struct dvb_frontend_parameters *params)
776338e1 206{
77d67504 207 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
776338e1
JS		 208 buf[3] |= 0x08;
209}
210
211struct dvb_pll_desc dvb_pll_tda665x = {
212 .name = "Philips TDA6650/TDA6651",
213 .min = 44250000,
214 .max = 858000000,
77d67504 215 .set = tda665x_bw,
df78cb0a 216 .iffreq= 36166667,
fbfee868 217 .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab },
776338e1
JS		 218 .count = 12,
219 .entries = {
df78cb0a
TP		 220 { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ },
221 { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
222 { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ },
223 { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
224 { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ },
225 { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ },
226 { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ },
227 { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
228 { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ },
229 { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ },
230 { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ },
231 { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ },
776338e1
JS		 232 }
233};
234EXPORT_SYMBOL(dvb_pll_tda665x);
235
236/* Infineon TUA6034
237 * used in LG TDTP E102P
238 */
77d67504 239static void tua6034_bw(u8 *buf, const struct dvb_frontend_parameters *params)
776338e1 240{
77d67504 241 if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth)
776338e1
JS		 242 buf[3] |= 0x08;
243}
244
245struct dvb_pll_desc dvb_pll_tua6034 = {
246 .name = "Infineon TUA6034",
247 .min = 44250000,
248 .max = 858000000,
df78cb0a 249 .iffreq= 36166667,
776338e1 250 .count = 3,
77d67504 251 .set = tua6034_bw,
776338e1 252 .entries = {
df78cb0a
TP		 253 { 174500000, 62500, 0xce, 0x01 },
254 { 230000000, 62500, 0xce, 0x02 },
255 { 999999999, 62500, 0xce, 0x04 },
776338e1
JS		 256 },
257};
258EXPORT_SYMBOL(dvb_pll_tua6034);
259
1963c907 260/* Infineon TUA6034
d9e12f25 261 * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F
1963c907 262 */
30fa61a5 263struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = {
d9e12f25 264 .name = "LG TDVS-H06xF",
1963c907
MK		 265 .min = 54000000,
266 .max = 863000000,
df78cb0a 267 .iffreq= 44000000,
6bdcc6e6 268 .initdata = tua603x_agc103,
1963c907
MK		 269 .count = 3,
270 .entries = {
df78cb0a
TP		 271 { 165000000, 62500, 0xce, 0x01 },
272 { 450000000, 62500, 0xce, 0x02 },
273 { 999999999, 62500, 0xce, 0x04 },
1963c907
MK		 274 },
275};
30fa61a5 276EXPORT_SYMBOL(dvb_pll_lg_tdvs_h06xf);
1963c907 277
49dc82fd
PB		 278/* Philips FMD1216ME
279 * used in Medion Hybrid PCMCIA card and USB Box
280 */
77d67504 281static void fmd1216me_bw(u8 *buf, const struct dvb_frontend_parameters *params)
49dc82fd 282{
77d67504
MK		 283 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ &&
284 params->frequency >= 158870000)
49dc82fd
PB		 285 buf[3] |= 0x08;
286}
287
288struct dvb_pll_desc dvb_pll_fmd1216me = {
0589b8e4 289 .name = "Philips FMD1216ME",
49dc82fd
PB		 290 .min = 50870000,
291 .max = 858000000,
df78cb0a 292 .iffreq= 36125000,
77d67504 293 .set = fmd1216me_bw,
b7754d74
TP		 294 .initdata = tua603x_agc112,
295 .sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 },
49dc82fd
PB		 296 .count = 7,
297 .entries = {
df78cb0a
TP		 298 { 143870000, 166667, 0xbc, 0x41 },
299 { 158870000, 166667, 0xf4, 0x41 },
300 { 329870000, 166667, 0xbc, 0x42 },
301 { 441870000, 166667, 0xf4, 0x42 },
302 { 625870000, 166667, 0xbc, 0x44 },
303 { 803870000, 166667, 0xf4, 0x44 },
304 { 999999999, 166667, 0xfc, 0x44 },
49dc82fd
PB		 305 }
306};
307EXPORT_SYMBOL(dvb_pll_fmd1216me);
308
0589b8e4
PB		 309/* ALPS TDED4
310 * used in Nebula-Cards and USB boxes
311 */
77d67504 312static void tded4_bw(u8 *buf, const struct dvb_frontend_parameters *params)
0589b8e4 313{
77d67504 314 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
0589b8e4
PB		 315 buf[3] |= 0x04;
316}
317
318struct dvb_pll_desc dvb_pll_tded4 = {
319 .name = "ALPS TDED4",
320 .min = 47000000,
321 .max = 863000000,
df78cb0a 322 .iffreq= 36166667,
77d67504 323 .set = tded4_bw,
0589b8e4
PB		 324 .count = 4,
325 .entries = {
df78cb0a
TP		 326 { 153000000, 166667, 0x85, 0x01 },
327 { 470000000, 166667, 0x85, 0x02 },
328 { 823000000, 166667, 0x85, 0x08 },
329 { 999999999, 166667, 0x85, 0x88 },
0589b8e4
PB		 330 }
331};
332EXPORT_SYMBOL(dvb_pll_tded4);
333
147418c9
KL		 334/* ALPS TDHU2
335 * used in AverTVHD MCE A180
336 */
337struct dvb_pll_desc dvb_pll_tdhu2 = {
338 .name = "ALPS TDHU2",
339 .min = 54000000,
340 .max = 864000000,
df78cb0a 341 .iffreq= 44000000,
147418c9
KL		 342 .count = 4,
343 .entries = {
df78cb0a
TP		 344 { 162000000, 62500, 0x85, 0x01 },
345 { 426000000, 62500, 0x85, 0x02 },
346 { 782000000, 62500, 0x85, 0x08 },
347 { 999999999, 62500, 0x85, 0x88 },
147418c9
KL		 348 }
349};
350EXPORT_SYMBOL(dvb_pll_tdhu2);
351
352/* Philips TUV1236D
353 * used in ATI HDTV Wonder
354 */
4abe9f9d
MK		 355static void tuv1236d_rf(u8 *buf, const struct dvb_frontend_parameters *params)
356{
357 switch (params->u.vsb.modulation) {
358 case QAM_64:
359 case QAM_256:
360 buf[3] |= 0x08;
361 break;
362 case VSB_8:
363 default:
364 buf[3] &= ~0x08;
365 }
366}
367
147418c9
KL		 368struct dvb_pll_desc dvb_pll_tuv1236d = {
369 .name = "Philips TUV1236D",
04a45929 370 .min = 54000000,
147418c9 371 .max = 864000000,
df78cb0a 372 .iffreq= 44000000,
4abe9f9d 373 .set = tuv1236d_rf,
147418c9
KL		 374 .count = 3,
375 .entries = {
df78cb0a
TP		 376 { 157250000, 62500, 0xc6, 0x41 },
377 { 454000000, 62500, 0xc6, 0x42 },
378 { 999999999, 62500, 0xc6, 0x44 },
147418c9
KL		 379 },
380};
381EXPORT_SYMBOL(dvb_pll_tuv1236d);
382
d76a6179 383/* Samsung TBMV30111IN / TBMV30712IN1
147418c9
KL		 384 * used in Air2PC ATSC - 2nd generation (nxt2002)
385 */
28f3d4b3
MK		 386struct dvb_pll_desc dvb_pll_samsung_tbmv = {
387 .name = "Samsung TBMV30111IN / TBMV30712IN1",
147418c9
KL		 388 .min = 54000000,
389 .max = 860000000,
df78cb0a 390 .iffreq= 44000000,
17c37efb 391 .count = 6,
147418c9 392 .entries = {
df78cb0a
TP		 393 { 172000000, 166667, 0xb4, 0x01 },
394 { 214000000, 166667, 0xb4, 0x02 },
395 { 467000000, 166667, 0xbc, 0x02 },
396 { 721000000, 166667, 0xbc, 0x08 },
397 { 841000000, 166667, 0xf4, 0x08 },
398 { 999999999, 166667, 0xfc, 0x02 },
147418c9
KL		 399 }
400};
28f3d4b3 401EXPORT_SYMBOL(dvb_pll_samsung_tbmv);
147418c9 402
f8bf134d
RP		 403/*
404 * Philips SD1878 Tuner.
405 */
406struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = {
407 .name = "Philips SD1878",
408 .min = 950000,
409 .max = 2150000,
df78cb0a 410 .iffreq= 249, /* zero-IF, offset 249 is to round up */
f8bf134d
RP		 411 .count = 4,
412 .entries = {
df78cb0a
TP		 413 { 1250000, 500, 0xc4, 0x00},
414 { 1550000, 500, 0xc4, 0x40},
415 { 2050000, 500, 0xc4, 0x80},
416 { 2150000, 500, 0xc4, 0xc0},
f8bf134d
RP		 417 },
418};
419EXPORT_SYMBOL(dvb_pll_philips_sd1878_tda8261);
420
a78d0bfa
JAR		 421/*
422 * Philips TD1316 Tuner.
423 */
77d67504 424static void td1316_bw(u8 *buf, const struct dvb_frontend_parameters *params)
a78d0bfa
JAR		 425{
426 u8 band;
427
428 /* determine band */
77d67504 429 if (params->frequency < 161000000)
a78d0bfa 430 band = 1;
77d67504 431 else if (params->frequency < 444000000)
a78d0bfa
JAR		 432 band = 2;
433 else
434 band = 4;
435
436 buf[3] |= band;
437
438 /* setup PLL filter */
77d67504 439 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
a78d0bfa
JAR		 440 buf[3] |= 1 << 3;
441}
442
443struct dvb_pll_desc dvb_pll_philips_td1316 = {
444 .name = "Philips TD1316",
445 .min = 87000000,
446 .max = 895000000,
df78cb0a 447 .iffreq= 36166667,
77d67504 448 .set = td1316_bw,
a78d0bfa
JAR		 449 .count = 9,
450 .entries = {
df78cb0a
TP		 451 { 93834000, 166667, 0xca, 0x60},
452 { 123834000, 166667, 0xca, 0xa0},
453 { 163834000, 166667, 0xca, 0xc0},
454 { 253834000, 166667, 0xca, 0x60},
455 { 383834000, 166667, 0xca, 0xa0},
456 { 443834000, 166667, 0xca, 0xc0},
457 { 583834000, 166667, 0xca, 0x60},
458 { 793834000, 166667, 0xca, 0xa0},
459 { 858834000, 166667, 0xca, 0xe0},
a78d0bfa
JAR		 460 },
461};
462EXPORT_SYMBOL(dvb_pll_philips_td1316);
463
780dfef3 464/* FE6600 used on DViCO Hybrid */
91ae3299
MK		 465struct dvb_pll_desc dvb_pll_thomson_fe6600 = {
466 .name = "Thomson FE6600",
780dfef3
CP		 467 .min = 44250000,
468 .max = 858000000,
df78cb0a 469 .iffreq= 36125000,
780dfef3
CP		 470 .count = 4,
471 .entries = {
df78cb0a
TP		 472 { 250000000, 166667, 0xb4, 0x12 },
473 { 455000000, 166667, 0xfe, 0x11 },
474 { 775500000, 166667, 0xbc, 0x18 },
475 { 999999999, 166667, 0xf4, 0x18 },
780dfef3
CP		 476 }
477};
91ae3299 478EXPORT_SYMBOL(dvb_pll_thomson_fe6600);
77d67504 479static void opera1_bw(u8 *buf, const struct dvb_frontend_parameters *params)
941491f3 480{
77d67504 481 if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ)
941491f3
MG		 482 buf[2] |= 0x08;
483}
484
485struct dvb_pll_desc dvb_pll_opera1 = {
486 .name = "Opera Tuner",
487 .min = 900000,
488 .max = 2250000,
489 .iffreq= 0,
77d67504 490 .set = opera1_bw,
941491f3
MG		 491 .count = 8,
492 .entries = {
493 { 1064000, 500, 0xe5, 0xc6 },
494 { 1169000, 500, 0xe5, 0xe6 },
495 { 1299000, 500, 0xe5, 0x24 },
496 { 1444000, 500, 0xe5, 0x44 },
497 { 1606000, 500, 0xe5, 0x64 },
498 { 1777000, 500, 0xe5, 0x84 },
499 { 1941000, 500, 0xe5, 0xa4 },
500 { 2250000, 500, 0xe5, 0xc4 },
501 }
502};
503EXPORT_SYMBOL(dvb_pll_opera1);
780dfef3 504
272bc4db
AQ		 505struct dvb_pll_priv {
506 /* i2c details */
507 int pll_i2c_address;
508 struct i2c_adapter *i2c;
509
510 /* the PLL descriptor */
511 struct dvb_pll_desc *pll_desc;
512
513 /* cached frequency/bandwidth */
514 u32 frequency;
515 u32 bandwidth;
516};
517
1da177e4
LT		 518/* ----------------------------------------------------------- */
519/* code */
520
521static int debug = 0;
522module_param(debug, int, 0644);
523MODULE_PARM_DESC(debug, "enable verbose debug messages");
524
4ce15678
TP		 525static int dvb_pll_configure(struct dvb_pll_desc *desc, u8 *buf,
526 const struct dvb_frontend_parameters *params)
1da177e4
LT		 527{
528 u32 div;
529 int i;
530
77d67504
MK		 531 if (params->frequency != 0 && (params->frequency < desc->min ||
532 params->frequency > desc->max))
533 return -EINVAL;
1da177e4
LT		 534
535 for (i = 0; i < desc->count; i++) {
77d67504 536 if (params->frequency > desc->entries[i].limit)
1da177e4
LT		 537 continue;
538 break;
539 }
77d67504 540
1da177e4 541 if (debug)
77d67504
MK		 542 printk("pll: %s: freq=%d | i=%d/%d\n", desc->name,
543 params->frequency, i, desc->count);
272bc4db
AQ		 544 if (i == desc->count)
545 return -EINVAL;
1da177e4 546
77d67504
MK		 547 div = (params->frequency + desc->iffreq +
548 desc->entries[i].stepsize/2) / desc->entries[i].stepsize;
1da177e4
LT		 549 buf[0] = div >> 8;
550 buf[1] = div & 0xff;
ab66b22f
MK		 551 buf[2] = desc->entries[i].config;
552 buf[3] = desc->entries[i].cb;
1da177e4 553
77d67504
MK		 554 if (desc->set)
555 desc->set(buf, params);
1da177e4
LT		 556
557 if (debug)
558 printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n",
559 desc->name, div, buf[0], buf[1], buf[2], buf[3]);
560
89faeefc 561 // calculate the frequency we set it to
df78cb0a 562 return (div * desc->entries[i].stepsize) - desc->iffreq;
1da177e4
LT		 563}
564EXPORT_SYMBOL(dvb_pll_configure);
565
272bc4db
AQ		 566static int dvb_pll_release(struct dvb_frontend *fe)
567{
2213918a 568 kfree(fe->tuner_priv);
272bc4db
AQ		 569 fe->tuner_priv = NULL;
570 return 0;
571}
572
573static int dvb_pll_sleep(struct dvb_frontend *fe)
574{
575 struct dvb_pll_priv *priv = fe->tuner_priv;
272bc4db 576
c162dff6
CP		 577 if (priv->i2c == NULL)
578 return -EINVAL;
579
d519dcf6
TP		 580 if (priv->pll_desc->sleepdata) {
581 struct i2c_msg msg = { .flags = 0,
582 .addr = priv->pll_i2c_address,
583 .buf = priv->pll_desc->sleepdata + 1,
584 .len = priv->pll_desc->sleepdata[0] };
272bc4db 585
d519dcf6 586 int result;
272bc4db 587
d519dcf6
TP		 588 if (fe->ops.i2c_gate_ctrl)
589 fe->ops.i2c_gate_ctrl(fe, 1);
590 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
591 return result;
592 }
593 return 0;
272bc4db 594 }
d519dcf6
TP		 595 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
596 return -EINVAL;
272bc4db
AQ		 597}
598
47ae9ae8
MK		 599static int dvb_pll_set_params(struct dvb_frontend *fe,
600 struct dvb_frontend_parameters *params)
272bc4db
AQ		 601{
602 struct dvb_pll_priv *priv = fe->tuner_priv;
603 u8 buf[4];
604 struct i2c_msg msg =
47ae9ae8
MK		 605 { .addr = priv->pll_i2c_address, .flags = 0,
606 .buf = buf, .len = sizeof(buf) };
272bc4db 607 int result;
77d67504 608 u32 frequency = 0;
272bc4db
AQ		 609
610 if (priv->i2c == NULL)
611 return -EINVAL;
612
77d67504 613 if ((result = dvb_pll_configure(priv->pll_desc, buf, params)) < 0)
272bc4db 614 return result;
89faeefc
MK		 615 else
616 frequency = result;
272bc4db 617
dea74869
PB		 618 if (fe->ops.i2c_gate_ctrl)
619 fe->ops.i2c_gate_ctrl(fe, 1);
272bc4db
AQ		 620 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
621 return result;
622 }
623
89faeefc 624 priv->frequency = frequency;
77d67504 625 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ		 626
627 return 0;
628}
629
47ae9ae8
MK		 630static int dvb_pll_calc_regs(struct dvb_frontend *fe,
631 struct dvb_frontend_parameters *params,
632 u8 *buf, int buf_len)
272bc4db
AQ		 633{
634 struct dvb_pll_priv *priv = fe->tuner_priv;
635 int result;
77d67504 636 u32 frequency = 0;
272bc4db
AQ		 637
638 if (buf_len < 5)
639 return -EINVAL;
640
77d67504 641 if ((result = dvb_pll_configure(priv->pll_desc, buf+1, params)) < 0)
272bc4db 642 return result;
89faeefc
MK		 643 else
644 frequency = result;
645
272bc4db
AQ		 646 buf[0] = priv->pll_i2c_address;
647
89faeefc 648 priv->frequency = frequency;
77d67504 649 priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0;
272bc4db
AQ		 650
651 return 5;
652}
653
654static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency)
655{
656 struct dvb_pll_priv *priv = fe->tuner_priv;
657 *frequency = priv->frequency;
658 return 0;
659}
660
661static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
662{
663 struct dvb_pll_priv *priv = fe->tuner_priv;
664 *bandwidth = priv->bandwidth;
665 return 0;
666}
667
26aed922
TP		 668static int dvb_pll_init(struct dvb_frontend *fe)
669{
670 struct dvb_pll_priv *priv = fe->tuner_priv;
671
672 if (priv->i2c == NULL)
673 return -EINVAL;
674
675 if (priv->pll_desc->initdata) {
676 struct i2c_msg msg = { .flags = 0,
677 .addr = priv->pll_i2c_address,
678 .buf = priv->pll_desc->initdata + 1,
679 .len = priv->pll_desc->initdata[0] };
680
681 int result;
682 if (fe->ops.i2c_gate_ctrl)
683 fe->ops.i2c_gate_ctrl(fe, 1);
684 if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) {
685 return result;
686 }
687 return 0;
688 }
689 /* Shouldn't be called when initdata is NULL, maybe BUG()? */
690 return -EINVAL;
691}
692
272bc4db
AQ		 693static struct dvb_tuner_ops dvb_pll_tuner_ops = {
694 .release = dvb_pll_release,
695 .sleep = dvb_pll_sleep,
d519dcf6 696 .init = dvb_pll_init,
272bc4db 697 .set_params = dvb_pll_set_params,
bd4956b8 698 .calc_regs = dvb_pll_calc_regs,
272bc4db
AQ		 699 .get_frequency = dvb_pll_get_frequency,
700 .get_bandwidth = dvb_pll_get_bandwidth,
701};
702
47ae9ae8
MK		 703struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr,
704 struct i2c_adapter *i2c,
705 struct dvb_pll_desc *desc)
272bc4db 706{
061b623c 707 u8 b1 [] = { 0 };
47ae9ae8
MK		 708 struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD,
709 .buf = b1, .len = 1 };
272bc4db 710 struct dvb_pll_priv *priv = NULL;
061b623c
AQ		 711 int ret;
712
55c05b6d
AQ		 713 if (i2c != NULL) {
714 if (fe->ops.i2c_gate_ctrl)
715 fe->ops.i2c_gate_ctrl(fe, 1);
716
95faba22
AQ		 717 ret = i2c_transfer (i2c, &msg, 1);
718 if (ret != 1)
2bfe031d 719 return NULL;
55c05b6d
AQ		 720 if (fe->ops.i2c_gate_ctrl)
721 fe->ops.i2c_gate_ctrl(fe, 0);
722 }
272bc4db
AQ		 723
724 priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL);
725 if (priv == NULL)
2bfe031d 726 return NULL;
272bc4db
AQ		 727
728 priv->pll_i2c_address = pll_addr;
729 priv->i2c = i2c;
730 priv->pll_desc = desc;
731
47ae9ae8
MK		 732 memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops,
733 sizeof(struct dvb_tuner_ops));
734
982dd1bd
TP		 735 strncpy(fe->ops.tuner_ops.info.name, desc->name,
736 sizeof(fe->ops.tuner_ops.info.name));
dea74869
PB		 737 fe->ops.tuner_ops.info.frequency_min = desc->min;
738 fe->ops.tuner_ops.info.frequency_min = desc->max;
d519dcf6
TP		 739 if (!desc->initdata)
740 fe->ops.tuner_ops.init = NULL;
741 if (!desc->sleepdata)
742 fe->ops.tuner_ops.sleep = NULL;
272bc4db
AQ		 743
744 fe->tuner_priv = priv;
2bfe031d 745 return fe;
272bc4db
AQ		 746}
747EXPORT_SYMBOL(dvb_pll_attach);
748
1da177e4
LT		 749MODULE_DESCRIPTION("dvb pll library");
750MODULE_AUTHOR("Gerd Knorr");
751MODULE_LICENSE("GPL");
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