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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * descriptions + helper functions for simple dvb plls. |
3 | * | |
4 | * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | */ | |
20 | ||
21 | #include <linux/module.h> | |
22 | #include <linux/dvb/frontend.h> | |
23 | #include <asm/types.h> | |
24 | ||
25 | #include "dvb-pll.h" | |
26 | ||
05a4611b MK |
27 | struct dvb_pll_priv { |
28 | /* pll number */ | |
29 | int nr; | |
30 | ||
31 | /* i2c details */ | |
32 | int pll_i2c_address; | |
33 | struct i2c_adapter *i2c; | |
34 | ||
35 | /* the PLL descriptor */ | |
36 | struct dvb_pll_desc *pll_desc; | |
37 | ||
38 | /* cached frequency/bandwidth */ | |
39 | u32 frequency; | |
40 | u32 bandwidth; | |
41 | }; | |
42 | ||
ff3e7dd5 | 43 | #define DVB_PLL_MAX 64 |
05a4611b MK |
44 | |
45 | static unsigned int dvb_pll_devcount; | |
46 | ||
47 | static int debug = 0; | |
48 | module_param(debug, int, 0644); | |
49 | MODULE_PARM_DESC(debug, "enable verbose debug messages"); | |
50 | ||
51 | static unsigned int input[DVB_PLL_MAX] = { [ 0 ... (DVB_PLL_MAX-1) ] = 0 }; | |
52 | module_param_array(input, int, NULL, 0644); | |
53 | MODULE_PARM_DESC(input,"specify rf input choice, 0 for autoselect (default)"); | |
54 | ||
55 | /* ----------------------------------------------------------- */ | |
56 | ||
47a9991e MK |
57 | struct dvb_pll_desc { |
58 | char *name; | |
59 | u32 min; | |
60 | u32 max; | |
61 | u32 iffreq; | |
5d7802b2 MK |
62 | void (*set)(struct dvb_frontend *fe, u8 *buf, |
63 | const struct dvb_frontend_parameters *params); | |
47a9991e MK |
64 | u8 *initdata; |
65 | u8 *sleepdata; | |
66 | int count; | |
67 | struct { | |
68 | u32 limit; | |
69 | u32 stepsize; | |
70 | u8 config; | |
71 | u8 cb; | |
72 | } entries[12]; | |
73 | }; | |
74 | ||
1da177e4 LT |
75 | /* ----------------------------------------------------------- */ |
76 | /* descriptions */ | |
77 | ||
26aed922 TP |
78 | /* Set AGC TOP value to 103 dBuV: |
79 | 0x80 = Control Byte | |
80 | 0x40 = 250 uA charge pump (irrelevant) | |
81 | 0x18 = Aux Byte to follow | |
82 | 0x06 = 64.5 kHz divider (irrelevant) | |
83 | 0x01 = Disable Vt (aka sleep) | |
84 | ||
85 | 0x00 = AGC Time constant 2s Iagc = 300 nA (vs 0x80 = 9 nA) | |
86 | 0x50 = AGC Take over point = 103 dBuV */ | |
87 | static u8 tua603x_agc103[] = { 2, 0x80|0x40|0x18|0x06|0x01, 0x00|0x50 }; | |
88 | ||
b7754d74 TP |
89 | /* 0x04 = 166.67 kHz divider |
90 | ||
91 | 0x80 = AGC Time constant 50ms Iagc = 9 uA | |
92 | 0x20 = AGC Take over point = 112 dBuV */ | |
93 | static u8 tua603x_agc112[] = { 2, 0x80|0x40|0x18|0x04|0x01, 0x80|0x20 }; | |
94 | ||
47a9991e | 95 | static struct dvb_pll_desc dvb_pll_thomson_dtt7579 = { |
1da177e4 LT |
96 | .name = "Thomson dtt7579", |
97 | .min = 177000000, | |
98 | .max = 858000000, | |
df78cb0a | 99 | .iffreq= 36166667, |
d519dcf6 TP |
100 | .sleepdata = (u8[]){ 2, 0xb4, 0x03 }, |
101 | .count = 4, | |
1da177e4 | 102 | .entries = { |
df78cb0a TP |
103 | { 443250000, 166667, 0xb4, 0x02 }, |
104 | { 542000000, 166667, 0xb4, 0x08 }, | |
105 | { 771000000, 166667, 0xbc, 0x08 }, | |
106 | { 999999999, 166667, 0xf4, 0x08 }, | |
1da177e4 LT |
107 | }, |
108 | }; | |
1da177e4 | 109 | |
47a9991e | 110 | static struct dvb_pll_desc dvb_pll_thomson_dtt7610 = { |
1da177e4 LT |
111 | .name = "Thomson dtt7610", |
112 | .min = 44000000, | |
113 | .max = 958000000, | |
df78cb0a | 114 | .iffreq= 44000000, |
1da177e4 LT |
115 | .count = 3, |
116 | .entries = { | |
df78cb0a TP |
117 | { 157250000, 62500, 0x8e, 0x39 }, |
118 | { 454000000, 62500, 0x8e, 0x3a }, | |
119 | { 999999999, 62500, 0x8e, 0x3c }, | |
1da177e4 LT |
120 | }, |
121 | }; | |
1da177e4 | 122 | |
5d7802b2 | 123 | static void thomson_dtt759x_bw(struct dvb_frontend *fe, u8 *buf, |
77d67504 | 124 | const struct dvb_frontend_parameters *params) |
1da177e4 | 125 | { |
77d67504 | 126 | if (BANDWIDTH_7_MHZ == params->u.ofdm.bandwidth) |
1da177e4 LT |
127 | buf[3] |= 0x10; |
128 | } | |
129 | ||
47a9991e | 130 | static struct dvb_pll_desc dvb_pll_thomson_dtt759x = { |
1da177e4 LT |
131 | .name = "Thomson dtt759x", |
132 | .min = 177000000, | |
133 | .max = 896000000, | |
77d67504 | 134 | .set = thomson_dtt759x_bw, |
df78cb0a | 135 | .iffreq= 36166667, |
d519dcf6 TP |
136 | .sleepdata = (u8[]){ 2, 0x84, 0x03 }, |
137 | .count = 5, | |
1da177e4 | 138 | .entries = { |
df78cb0a TP |
139 | { 264000000, 166667, 0xb4, 0x02 }, |
140 | { 470000000, 166667, 0xbc, 0x02 }, | |
141 | { 735000000, 166667, 0xbc, 0x08 }, | |
142 | { 835000000, 166667, 0xf4, 0x08 }, | |
143 | { 999999999, 166667, 0xfc, 0x08 }, | |
1da177e4 LT |
144 | }, |
145 | }; | |
1da177e4 | 146 | |
47a9991e | 147 | static struct dvb_pll_desc dvb_pll_lg_z201 = { |
1da177e4 LT |
148 | .name = "LG z201", |
149 | .min = 174000000, | |
150 | .max = 862000000, | |
df78cb0a | 151 | .iffreq= 36166667, |
d519dcf6 TP |
152 | .sleepdata = (u8[]){ 2, 0xbc, 0x03 }, |
153 | .count = 5, | |
1da177e4 | 154 | .entries = { |
df78cb0a TP |
155 | { 157500000, 166667, 0xbc, 0x01 }, |
156 | { 443250000, 166667, 0xbc, 0x02 }, | |
157 | { 542000000, 166667, 0xbc, 0x04 }, | |
158 | { 830000000, 166667, 0xf4, 0x04 }, | |
159 | { 999999999, 166667, 0xfc, 0x04 }, | |
1da177e4 LT |
160 | }, |
161 | }; | |
1da177e4 | 162 | |
47a9991e | 163 | static struct dvb_pll_desc dvb_pll_microtune_4042 = { |
d8667cbb MM |
164 | .name = "Microtune 4042 FI5", |
165 | .min = 57000000, | |
166 | .max = 858000000, | |
df78cb0a | 167 | .iffreq= 44000000, |
d8667cbb MM |
168 | .count = 3, |
169 | .entries = { | |
df78cb0a TP |
170 | { 162000000, 62500, 0x8e, 0xa1 }, |
171 | { 457000000, 62500, 0x8e, 0x91 }, | |
172 | { 999999999, 62500, 0x8e, 0x31 }, | |
d8667cbb MM |
173 | }, |
174 | }; | |
d8667cbb | 175 | |
47a9991e | 176 | static struct dvb_pll_desc dvb_pll_thomson_dtt761x = { |
83ac8722 MK |
177 | /* DTT 7611 7611A 7612 7613 7613A 7614 7615 7615A */ |
178 | .name = "Thomson dtt761x", | |
179 | .min = 57000000, | |
180 | .max = 863000000, | |
df78cb0a | 181 | .iffreq= 44000000, |
0d723c09 | 182 | .count = 3, |
26aed922 | 183 | .initdata = tua603x_agc103, |
0d723c09 | 184 | .entries = { |
df78cb0a TP |
185 | { 147000000, 62500, 0x8e, 0x39 }, |
186 | { 417000000, 62500, 0x8e, 0x3a }, | |
187 | { 999999999, 62500, 0x8e, 0x3c }, | |
0d723c09 MK |
188 | }, |
189 | }; | |
0d723c09 | 190 | |
47a9991e | 191 | static struct dvb_pll_desc dvb_pll_unknown_1 = { |
1da177e4 LT |
192 | .name = "unknown 1", /* used by dntv live dvb-t */ |
193 | .min = 174000000, | |
194 | .max = 862000000, | |
df78cb0a | 195 | .iffreq= 36166667, |
1da177e4 LT |
196 | .count = 9, |
197 | .entries = { | |
df78cb0a TP |
198 | { 150000000, 166667, 0xb4, 0x01 }, |
199 | { 173000000, 166667, 0xbc, 0x01 }, | |
200 | { 250000000, 166667, 0xb4, 0x02 }, | |
201 | { 400000000, 166667, 0xbc, 0x02 }, | |
202 | { 420000000, 166667, 0xf4, 0x02 }, | |
203 | { 470000000, 166667, 0xfc, 0x02 }, | |
204 | { 600000000, 166667, 0xbc, 0x08 }, | |
205 | { 730000000, 166667, 0xf4, 0x08 }, | |
206 | { 999999999, 166667, 0xfc, 0x08 }, | |
1da177e4 LT |
207 | }, |
208 | }; | |
1da177e4 | 209 | |
776338e1 JS |
210 | /* Infineon TUA6010XS |
211 | * used in Thomson Cable Tuner | |
212 | */ | |
47a9991e | 213 | static struct dvb_pll_desc dvb_pll_tua6010xs = { |
776338e1 JS |
214 | .name = "Infineon TUA6010XS", |
215 | .min = 44250000, | |
216 | .max = 858000000, | |
df78cb0a | 217 | .iffreq= 36125000, |
776338e1 JS |
218 | .count = 3, |
219 | .entries = { | |
df78cb0a TP |
220 | { 115750000, 62500, 0x8e, 0x03 }, |
221 | { 403250000, 62500, 0x8e, 0x06 }, | |
222 | { 999999999, 62500, 0x8e, 0x85 }, | |
776338e1 JS |
223 | }, |
224 | }; | |
776338e1 JS |
225 | |
226 | /* Panasonic env57h1xd5 (some Philips PLL ?) */ | |
47a9991e | 227 | static struct dvb_pll_desc dvb_pll_env57h1xd5 = { |
776338e1 JS |
228 | .name = "Panasonic ENV57H1XD5", |
229 | .min = 44250000, | |
230 | .max = 858000000, | |
df78cb0a | 231 | .iffreq= 36125000, |
776338e1 JS |
232 | .count = 4, |
233 | .entries = { | |
df78cb0a TP |
234 | { 153000000, 166667, 0xc2, 0x41 }, |
235 | { 470000000, 166667, 0xc2, 0x42 }, | |
236 | { 526000000, 166667, 0xc2, 0x84 }, | |
237 | { 999999999, 166667, 0xc2, 0xa4 }, | |
776338e1 JS |
238 | }, |
239 | }; | |
776338e1 JS |
240 | |
241 | /* Philips TDA6650/TDA6651 | |
242 | * used in Panasonic ENV77H11D5 | |
243 | */ | |
5d7802b2 MK |
244 | static void tda665x_bw(struct dvb_frontend *fe, u8 *buf, |
245 | const struct dvb_frontend_parameters *params) | |
776338e1 | 246 | { |
77d67504 | 247 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
776338e1 JS |
248 | buf[3] |= 0x08; |
249 | } | |
250 | ||
47a9991e | 251 | static struct dvb_pll_desc dvb_pll_tda665x = { |
776338e1 JS |
252 | .name = "Philips TDA6650/TDA6651", |
253 | .min = 44250000, | |
254 | .max = 858000000, | |
77d67504 | 255 | .set = tda665x_bw, |
df78cb0a | 256 | .iffreq= 36166667, |
fbfee868 | 257 | .initdata = (u8[]){ 4, 0x0b, 0xf5, 0x85, 0xab }, |
776338e1 JS |
258 | .count = 12, |
259 | .entries = { | |
df78cb0a TP |
260 | { 93834000, 166667, 0xca, 0x61 /* 011 0 0 0 01 */ }, |
261 | { 123834000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, | |
262 | { 161000000, 166667, 0xca, 0xa1 /* 101 0 0 0 01 */ }, | |
263 | { 163834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, | |
264 | { 253834000, 166667, 0xca, 0x62 /* 011 0 0 0 10 */ }, | |
265 | { 383834000, 166667, 0xca, 0xa2 /* 101 0 0 0 10 */ }, | |
266 | { 443834000, 166667, 0xca, 0xc2 /* 110 0 0 0 10 */ }, | |
267 | { 444000000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, | |
268 | { 583834000, 166667, 0xca, 0x64 /* 011 0 0 1 00 */ }, | |
269 | { 793834000, 166667, 0xca, 0xa4 /* 101 0 0 1 00 */ }, | |
270 | { 444834000, 166667, 0xca, 0xc4 /* 110 0 0 1 00 */ }, | |
271 | { 861000000, 166667, 0xca, 0xe4 /* 111 0 0 1 00 */ }, | |
776338e1 JS |
272 | } |
273 | }; | |
776338e1 JS |
274 | |
275 | /* Infineon TUA6034 | |
276 | * used in LG TDTP E102P | |
277 | */ | |
5d7802b2 MK |
278 | static void tua6034_bw(struct dvb_frontend *fe, u8 *buf, |
279 | const struct dvb_frontend_parameters *params) | |
776338e1 | 280 | { |
77d67504 | 281 | if (BANDWIDTH_7_MHZ != params->u.ofdm.bandwidth) |
776338e1 JS |
282 | buf[3] |= 0x08; |
283 | } | |
284 | ||
47a9991e | 285 | static struct dvb_pll_desc dvb_pll_tua6034 = { |
776338e1 JS |
286 | .name = "Infineon TUA6034", |
287 | .min = 44250000, | |
288 | .max = 858000000, | |
df78cb0a | 289 | .iffreq= 36166667, |
776338e1 | 290 | .count = 3, |
77d67504 | 291 | .set = tua6034_bw, |
776338e1 | 292 | .entries = { |
df78cb0a TP |
293 | { 174500000, 62500, 0xce, 0x01 }, |
294 | { 230000000, 62500, 0xce, 0x02 }, | |
295 | { 999999999, 62500, 0xce, 0x04 }, | |
776338e1 JS |
296 | }, |
297 | }; | |
776338e1 | 298 | |
1963c907 | 299 | /* Infineon TUA6034 |
d9e12f25 | 300 | * used in LG TDVS-H061F, LG TDVS-H062F and LG TDVS-H064F |
1963c907 | 301 | */ |
47a9991e | 302 | static struct dvb_pll_desc dvb_pll_lg_tdvs_h06xf = { |
d9e12f25 | 303 | .name = "LG TDVS-H06xF", |
1963c907 MK |
304 | .min = 54000000, |
305 | .max = 863000000, | |
df78cb0a | 306 | .iffreq= 44000000, |
6bdcc6e6 | 307 | .initdata = tua603x_agc103, |
1963c907 MK |
308 | .count = 3, |
309 | .entries = { | |
df78cb0a TP |
310 | { 165000000, 62500, 0xce, 0x01 }, |
311 | { 450000000, 62500, 0xce, 0x02 }, | |
312 | { 999999999, 62500, 0xce, 0x04 }, | |
1963c907 MK |
313 | }, |
314 | }; | |
1963c907 | 315 | |
49dc82fd PB |
316 | /* Philips FMD1216ME |
317 | * used in Medion Hybrid PCMCIA card and USB Box | |
318 | */ | |
5d7802b2 MK |
319 | static void fmd1216me_bw(struct dvb_frontend *fe, u8 *buf, |
320 | const struct dvb_frontend_parameters *params) | |
49dc82fd | 321 | { |
77d67504 MK |
322 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ && |
323 | params->frequency >= 158870000) | |
49dc82fd PB |
324 | buf[3] |= 0x08; |
325 | } | |
326 | ||
47a9991e | 327 | static struct dvb_pll_desc dvb_pll_fmd1216me = { |
0589b8e4 | 328 | .name = "Philips FMD1216ME", |
49dc82fd PB |
329 | .min = 50870000, |
330 | .max = 858000000, | |
df78cb0a | 331 | .iffreq= 36125000, |
77d67504 | 332 | .set = fmd1216me_bw, |
b7754d74 TP |
333 | .initdata = tua603x_agc112, |
334 | .sleepdata = (u8[]){ 4, 0x9c, 0x60, 0x85, 0x54 }, | |
49dc82fd PB |
335 | .count = 7, |
336 | .entries = { | |
df78cb0a TP |
337 | { 143870000, 166667, 0xbc, 0x41 }, |
338 | { 158870000, 166667, 0xf4, 0x41 }, | |
339 | { 329870000, 166667, 0xbc, 0x42 }, | |
340 | { 441870000, 166667, 0xf4, 0x42 }, | |
341 | { 625870000, 166667, 0xbc, 0x44 }, | |
342 | { 803870000, 166667, 0xf4, 0x44 }, | |
343 | { 999999999, 166667, 0xfc, 0x44 }, | |
49dc82fd PB |
344 | } |
345 | }; | |
49dc82fd | 346 | |
0589b8e4 PB |
347 | /* ALPS TDED4 |
348 | * used in Nebula-Cards and USB boxes | |
349 | */ | |
5d7802b2 MK |
350 | static void tded4_bw(struct dvb_frontend *fe, u8 *buf, |
351 | const struct dvb_frontend_parameters *params) | |
0589b8e4 | 352 | { |
77d67504 | 353 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
0589b8e4 PB |
354 | buf[3] |= 0x04; |
355 | } | |
356 | ||
47a9991e | 357 | static struct dvb_pll_desc dvb_pll_tded4 = { |
0589b8e4 PB |
358 | .name = "ALPS TDED4", |
359 | .min = 47000000, | |
360 | .max = 863000000, | |
df78cb0a | 361 | .iffreq= 36166667, |
77d67504 | 362 | .set = tded4_bw, |
0589b8e4 PB |
363 | .count = 4, |
364 | .entries = { | |
df78cb0a TP |
365 | { 153000000, 166667, 0x85, 0x01 }, |
366 | { 470000000, 166667, 0x85, 0x02 }, | |
367 | { 823000000, 166667, 0x85, 0x08 }, | |
368 | { 999999999, 166667, 0x85, 0x88 }, | |
0589b8e4 PB |
369 | } |
370 | }; | |
0589b8e4 | 371 | |
147418c9 KL |
372 | /* ALPS TDHU2 |
373 | * used in AverTVHD MCE A180 | |
374 | */ | |
47a9991e | 375 | static struct dvb_pll_desc dvb_pll_tdhu2 = { |
147418c9 KL |
376 | .name = "ALPS TDHU2", |
377 | .min = 54000000, | |
378 | .max = 864000000, | |
df78cb0a | 379 | .iffreq= 44000000, |
147418c9 KL |
380 | .count = 4, |
381 | .entries = { | |
df78cb0a TP |
382 | { 162000000, 62500, 0x85, 0x01 }, |
383 | { 426000000, 62500, 0x85, 0x02 }, | |
384 | { 782000000, 62500, 0x85, 0x08 }, | |
385 | { 999999999, 62500, 0x85, 0x88 }, | |
147418c9 KL |
386 | } |
387 | }; | |
147418c9 KL |
388 | |
389 | /* Philips TUV1236D | |
390 | * used in ATI HDTV Wonder | |
391 | */ | |
5d7802b2 MK |
392 | static void tuv1236d_rf(struct dvb_frontend *fe, u8 *buf, |
393 | const struct dvb_frontend_parameters *params) | |
4abe9f9d | 394 | { |
05a4611b MK |
395 | struct dvb_pll_priv *priv = fe->tuner_priv; |
396 | unsigned int new_rf = input[priv->nr]; | |
397 | ||
398 | if ((new_rf == 0) || (new_rf > 2)) { | |
399 | switch (params->u.vsb.modulation) { | |
400 | case QAM_64: | |
401 | case QAM_256: | |
402 | new_rf = 1; | |
403 | break; | |
404 | case VSB_8: | |
405 | default: | |
406 | new_rf = 2; | |
407 | } | |
408 | } | |
409 | ||
410 | switch (new_rf) { | |
411 | case 1: | |
4abe9f9d MK |
412 | buf[3] |= 0x08; |
413 | break; | |
05a4611b | 414 | case 2: |
4abe9f9d | 415 | buf[3] &= ~0x08; |
05a4611b MK |
416 | break; |
417 | default: | |
418 | printk(KERN_WARNING | |
419 | "%s: unhandled rf input selection: %d", | |
420 | __FUNCTION__, new_rf); | |
4abe9f9d MK |
421 | } |
422 | } | |
423 | ||
47a9991e | 424 | static struct dvb_pll_desc dvb_pll_tuv1236d = { |
147418c9 | 425 | .name = "Philips TUV1236D", |
04a45929 | 426 | .min = 54000000, |
147418c9 | 427 | .max = 864000000, |
df78cb0a | 428 | .iffreq= 44000000, |
4abe9f9d | 429 | .set = tuv1236d_rf, |
147418c9 KL |
430 | .count = 3, |
431 | .entries = { | |
df78cb0a TP |
432 | { 157250000, 62500, 0xc6, 0x41 }, |
433 | { 454000000, 62500, 0xc6, 0x42 }, | |
434 | { 999999999, 62500, 0xc6, 0x44 }, | |
147418c9 KL |
435 | }, |
436 | }; | |
147418c9 | 437 | |
d76a6179 | 438 | /* Samsung TBMV30111IN / TBMV30712IN1 |
147418c9 KL |
439 | * used in Air2PC ATSC - 2nd generation (nxt2002) |
440 | */ | |
47a9991e | 441 | static struct dvb_pll_desc dvb_pll_samsung_tbmv = { |
28f3d4b3 | 442 | .name = "Samsung TBMV30111IN / TBMV30712IN1", |
147418c9 KL |
443 | .min = 54000000, |
444 | .max = 860000000, | |
df78cb0a | 445 | .iffreq= 44000000, |
17c37efb | 446 | .count = 6, |
147418c9 | 447 | .entries = { |
df78cb0a TP |
448 | { 172000000, 166667, 0xb4, 0x01 }, |
449 | { 214000000, 166667, 0xb4, 0x02 }, | |
450 | { 467000000, 166667, 0xbc, 0x02 }, | |
451 | { 721000000, 166667, 0xbc, 0x08 }, | |
452 | { 841000000, 166667, 0xf4, 0x08 }, | |
453 | { 999999999, 166667, 0xfc, 0x02 }, | |
147418c9 KL |
454 | } |
455 | }; | |
147418c9 | 456 | |
f8bf134d RP |
457 | /* |
458 | * Philips SD1878 Tuner. | |
459 | */ | |
47a9991e | 460 | static struct dvb_pll_desc dvb_pll_philips_sd1878_tda8261 = { |
f8bf134d RP |
461 | .name = "Philips SD1878", |
462 | .min = 950000, | |
463 | .max = 2150000, | |
df78cb0a | 464 | .iffreq= 249, /* zero-IF, offset 249 is to round up */ |
f8bf134d RP |
465 | .count = 4, |
466 | .entries = { | |
df78cb0a TP |
467 | { 1250000, 500, 0xc4, 0x00}, |
468 | { 1550000, 500, 0xc4, 0x40}, | |
469 | { 2050000, 500, 0xc4, 0x80}, | |
470 | { 2150000, 500, 0xc4, 0xc0}, | |
f8bf134d RP |
471 | }, |
472 | }; | |
f8bf134d | 473 | |
a78d0bfa JAR |
474 | /* |
475 | * Philips TD1316 Tuner. | |
476 | */ | |
5d7802b2 MK |
477 | static void td1316_bw(struct dvb_frontend *fe, u8 *buf, |
478 | const struct dvb_frontend_parameters *params) | |
a78d0bfa JAR |
479 | { |
480 | u8 band; | |
481 | ||
482 | /* determine band */ | |
77d67504 | 483 | if (params->frequency < 161000000) |
a78d0bfa | 484 | band = 1; |
77d67504 | 485 | else if (params->frequency < 444000000) |
a78d0bfa JAR |
486 | band = 2; |
487 | else | |
488 | band = 4; | |
489 | ||
490 | buf[3] |= band; | |
491 | ||
492 | /* setup PLL filter */ | |
77d67504 | 493 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
a78d0bfa JAR |
494 | buf[3] |= 1 << 3; |
495 | } | |
496 | ||
47a9991e | 497 | static struct dvb_pll_desc dvb_pll_philips_td1316 = { |
a78d0bfa JAR |
498 | .name = "Philips TD1316", |
499 | .min = 87000000, | |
500 | .max = 895000000, | |
df78cb0a | 501 | .iffreq= 36166667, |
77d67504 | 502 | .set = td1316_bw, |
a78d0bfa JAR |
503 | .count = 9, |
504 | .entries = { | |
df78cb0a TP |
505 | { 93834000, 166667, 0xca, 0x60}, |
506 | { 123834000, 166667, 0xca, 0xa0}, | |
507 | { 163834000, 166667, 0xca, 0xc0}, | |
508 | { 253834000, 166667, 0xca, 0x60}, | |
509 | { 383834000, 166667, 0xca, 0xa0}, | |
510 | { 443834000, 166667, 0xca, 0xc0}, | |
511 | { 583834000, 166667, 0xca, 0x60}, | |
512 | { 793834000, 166667, 0xca, 0xa0}, | |
513 | { 858834000, 166667, 0xca, 0xe0}, | |
a78d0bfa JAR |
514 | }, |
515 | }; | |
a78d0bfa | 516 | |
780dfef3 | 517 | /* FE6600 used on DViCO Hybrid */ |
47a9991e | 518 | static struct dvb_pll_desc dvb_pll_thomson_fe6600 = { |
91ae3299 | 519 | .name = "Thomson FE6600", |
780dfef3 CP |
520 | .min = 44250000, |
521 | .max = 858000000, | |
df78cb0a | 522 | .iffreq= 36125000, |
780dfef3 CP |
523 | .count = 4, |
524 | .entries = { | |
df78cb0a TP |
525 | { 250000000, 166667, 0xb4, 0x12 }, |
526 | { 455000000, 166667, 0xfe, 0x11 }, | |
527 | { 775500000, 166667, 0xbc, 0x18 }, | |
528 | { 999999999, 166667, 0xf4, 0x18 }, | |
780dfef3 CP |
529 | } |
530 | }; | |
47a9991e | 531 | |
5d7802b2 MK |
532 | static void opera1_bw(struct dvb_frontend *fe, u8 *buf, |
533 | const struct dvb_frontend_parameters *params) | |
941491f3 | 534 | { |
77d67504 | 535 | if (params->u.ofdm.bandwidth == BANDWIDTH_8_MHZ) |
941491f3 MG |
536 | buf[2] |= 0x08; |
537 | } | |
538 | ||
47a9991e | 539 | static struct dvb_pll_desc dvb_pll_opera1 = { |
941491f3 MG |
540 | .name = "Opera Tuner", |
541 | .min = 900000, | |
542 | .max = 2250000, | |
543 | .iffreq= 0, | |
77d67504 | 544 | .set = opera1_bw, |
941491f3 MG |
545 | .count = 8, |
546 | .entries = { | |
547 | { 1064000, 500, 0xe5, 0xc6 }, | |
548 | { 1169000, 500, 0xe5, 0xe6 }, | |
549 | { 1299000, 500, 0xe5, 0x24 }, | |
550 | { 1444000, 500, 0xe5, 0x44 }, | |
551 | { 1606000, 500, 0xe5, 0x64 }, | |
552 | { 1777000, 500, 0xe5, 0x84 }, | |
553 | { 1941000, 500, 0xe5, 0xa4 }, | |
554 | { 2250000, 500, 0xe5, 0xc4 }, | |
555 | } | |
556 | }; | |
47a9991e | 557 | |
f1b24397 MK |
558 | /* Philips FCV1236D |
559 | */ | |
0a0f2c87 | 560 | static struct dvb_pll_desc dvb_pll_fcv1236d = { |
f1b24397 MK |
561 | /* Bit_0: RF Input select |
562 | * Bit_1: 0=digital, 1=analog | |
563 | */ | |
564 | .name = "Philips FCV1236D", | |
565 | .min = 53000000, | |
566 | .max = 803000000, | |
567 | .iffreq= 44000000, | |
568 | .count = 3, | |
569 | .entries = { | |
570 | { 159000000, 62500, 0x8e, 0xa0 }, | |
571 | { 453000000, 62500, 0x8e, 0x90 }, | |
572 | { 999999999, 62500, 0x8e, 0x30 }, | |
573 | }, | |
574 | }; | |
575 | ||
47a9991e MK |
576 | /* ----------------------------------------------------------- */ |
577 | ||
578 | static struct dvb_pll_desc *pll_list[] = { | |
579 | [DVB_PLL_UNDEFINED] = NULL, | |
580 | [DVB_PLL_THOMSON_DTT7579] = &dvb_pll_thomson_dtt7579, | |
581 | [DVB_PLL_THOMSON_DTT759X] = &dvb_pll_thomson_dtt759x, | |
582 | [DVB_PLL_THOMSON_DTT7610] = &dvb_pll_thomson_dtt7610, | |
583 | [DVB_PLL_LG_Z201] = &dvb_pll_lg_z201, | |
584 | [DVB_PLL_MICROTUNE_4042] = &dvb_pll_microtune_4042, | |
585 | [DVB_PLL_THOMSON_DTT761X] = &dvb_pll_thomson_dtt761x, | |
586 | [DVB_PLL_UNKNOWN_1] = &dvb_pll_unknown_1, | |
587 | [DVB_PLL_TUA6010XS] = &dvb_pll_tua6010xs, | |
588 | [DVB_PLL_ENV57H1XD5] = &dvb_pll_env57h1xd5, | |
589 | [DVB_PLL_TUA6034] = &dvb_pll_tua6034, | |
590 | [DVB_PLL_LG_TDVS_H06XF] = &dvb_pll_lg_tdvs_h06xf, | |
591 | [DVB_PLL_TDA665X] = &dvb_pll_tda665x, | |
592 | [DVB_PLL_FMD1216ME] = &dvb_pll_fmd1216me, | |
593 | [DVB_PLL_TDED4] = &dvb_pll_tded4, | |
594 | [DVB_PLL_TUV1236D] = &dvb_pll_tuv1236d, | |
595 | [DVB_PLL_TDHU2] = &dvb_pll_tdhu2, | |
596 | [DVB_PLL_SAMSUNG_TBMV] = &dvb_pll_samsung_tbmv, | |
597 | [DVB_PLL_PHILIPS_SD1878_TDA8261] = &dvb_pll_philips_sd1878_tda8261, | |
598 | [DVB_PLL_PHILIPS_TD1316] = &dvb_pll_philips_td1316, | |
599 | [DVB_PLL_THOMSON_FE6600] = &dvb_pll_thomson_fe6600, | |
600 | [DVB_PLL_OPERA1] = &dvb_pll_opera1, | |
f1b24397 | 601 | [DVB_PLL_FCV1236D] = &dvb_pll_fcv1236d, |
47a9991e MK |
602 | }; |
603 | ||
1da177e4 LT |
604 | /* ----------------------------------------------------------- */ |
605 | /* code */ | |
606 | ||
5d7802b2 | 607 | static int dvb_pll_configure(struct dvb_frontend *fe, u8 *buf, |
4ce15678 | 608 | const struct dvb_frontend_parameters *params) |
1da177e4 | 609 | { |
5d7802b2 MK |
610 | struct dvb_pll_priv *priv = fe->tuner_priv; |
611 | struct dvb_pll_desc *desc = priv->pll_desc; | |
1da177e4 LT |
612 | u32 div; |
613 | int i; | |
614 | ||
77d67504 MK |
615 | if (params->frequency != 0 && (params->frequency < desc->min || |
616 | params->frequency > desc->max)) | |
617 | return -EINVAL; | |
1da177e4 LT |
618 | |
619 | for (i = 0; i < desc->count; i++) { | |
77d67504 | 620 | if (params->frequency > desc->entries[i].limit) |
1da177e4 LT |
621 | continue; |
622 | break; | |
623 | } | |
77d67504 | 624 | |
1da177e4 | 625 | if (debug) |
77d67504 MK |
626 | printk("pll: %s: freq=%d | i=%d/%d\n", desc->name, |
627 | params->frequency, i, desc->count); | |
272bc4db AQ |
628 | if (i == desc->count) |
629 | return -EINVAL; | |
1da177e4 | 630 | |
77d67504 MK |
631 | div = (params->frequency + desc->iffreq + |
632 | desc->entries[i].stepsize/2) / desc->entries[i].stepsize; | |
1da177e4 LT |
633 | buf[0] = div >> 8; |
634 | buf[1] = div & 0xff; | |
ab66b22f MK |
635 | buf[2] = desc->entries[i].config; |
636 | buf[3] = desc->entries[i].cb; | |
1da177e4 | 637 | |
77d67504 | 638 | if (desc->set) |
5d7802b2 | 639 | desc->set(fe, buf, params); |
1da177e4 LT |
640 | |
641 | if (debug) | |
642 | printk("pll: %s: div=%d | buf=0x%02x,0x%02x,0x%02x,0x%02x\n", | |
643 | desc->name, div, buf[0], buf[1], buf[2], buf[3]); | |
644 | ||
89faeefc | 645 | // calculate the frequency we set it to |
df78cb0a | 646 | return (div * desc->entries[i].stepsize) - desc->iffreq; |
1da177e4 | 647 | } |
1da177e4 | 648 | |
272bc4db AQ |
649 | static int dvb_pll_release(struct dvb_frontend *fe) |
650 | { | |
2213918a | 651 | kfree(fe->tuner_priv); |
272bc4db AQ |
652 | fe->tuner_priv = NULL; |
653 | return 0; | |
654 | } | |
655 | ||
656 | static int dvb_pll_sleep(struct dvb_frontend *fe) | |
657 | { | |
658 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
272bc4db | 659 | |
c162dff6 CP |
660 | if (priv->i2c == NULL) |
661 | return -EINVAL; | |
662 | ||
d519dcf6 TP |
663 | if (priv->pll_desc->sleepdata) { |
664 | struct i2c_msg msg = { .flags = 0, | |
665 | .addr = priv->pll_i2c_address, | |
666 | .buf = priv->pll_desc->sleepdata + 1, | |
667 | .len = priv->pll_desc->sleepdata[0] }; | |
272bc4db | 668 | |
d519dcf6 | 669 | int result; |
272bc4db | 670 | |
d519dcf6 TP |
671 | if (fe->ops.i2c_gate_ctrl) |
672 | fe->ops.i2c_gate_ctrl(fe, 1); | |
673 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { | |
674 | return result; | |
675 | } | |
676 | return 0; | |
272bc4db | 677 | } |
d519dcf6 TP |
678 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ |
679 | return -EINVAL; | |
272bc4db AQ |
680 | } |
681 | ||
47ae9ae8 MK |
682 | static int dvb_pll_set_params(struct dvb_frontend *fe, |
683 | struct dvb_frontend_parameters *params) | |
272bc4db AQ |
684 | { |
685 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
686 | u8 buf[4]; | |
687 | struct i2c_msg msg = | |
47ae9ae8 MK |
688 | { .addr = priv->pll_i2c_address, .flags = 0, |
689 | .buf = buf, .len = sizeof(buf) }; | |
272bc4db | 690 | int result; |
77d67504 | 691 | u32 frequency = 0; |
272bc4db AQ |
692 | |
693 | if (priv->i2c == NULL) | |
694 | return -EINVAL; | |
695 | ||
5d7802b2 | 696 | if ((result = dvb_pll_configure(fe, buf, params)) < 0) |
272bc4db | 697 | return result; |
89faeefc MK |
698 | else |
699 | frequency = result; | |
272bc4db | 700 | |
dea74869 PB |
701 | if (fe->ops.i2c_gate_ctrl) |
702 | fe->ops.i2c_gate_ctrl(fe, 1); | |
272bc4db AQ |
703 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { |
704 | return result; | |
705 | } | |
706 | ||
89faeefc | 707 | priv->frequency = frequency; |
77d67504 | 708 | priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; |
272bc4db AQ |
709 | |
710 | return 0; | |
711 | } | |
712 | ||
47ae9ae8 MK |
713 | static int dvb_pll_calc_regs(struct dvb_frontend *fe, |
714 | struct dvb_frontend_parameters *params, | |
715 | u8 *buf, int buf_len) | |
272bc4db AQ |
716 | { |
717 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
718 | int result; | |
77d67504 | 719 | u32 frequency = 0; |
272bc4db AQ |
720 | |
721 | if (buf_len < 5) | |
722 | return -EINVAL; | |
723 | ||
5d7802b2 | 724 | if ((result = dvb_pll_configure(fe, buf+1, params)) < 0) |
272bc4db | 725 | return result; |
89faeefc MK |
726 | else |
727 | frequency = result; | |
728 | ||
272bc4db AQ |
729 | buf[0] = priv->pll_i2c_address; |
730 | ||
89faeefc | 731 | priv->frequency = frequency; |
77d67504 | 732 | priv->bandwidth = (fe->ops.info.type == FE_OFDM) ? params->u.ofdm.bandwidth : 0; |
272bc4db AQ |
733 | |
734 | return 5; | |
735 | } | |
736 | ||
737 | static int dvb_pll_get_frequency(struct dvb_frontend *fe, u32 *frequency) | |
738 | { | |
739 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
740 | *frequency = priv->frequency; | |
741 | return 0; | |
742 | } | |
743 | ||
744 | static int dvb_pll_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth) | |
745 | { | |
746 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
747 | *bandwidth = priv->bandwidth; | |
748 | return 0; | |
749 | } | |
750 | ||
26aed922 TP |
751 | static int dvb_pll_init(struct dvb_frontend *fe) |
752 | { | |
753 | struct dvb_pll_priv *priv = fe->tuner_priv; | |
754 | ||
755 | if (priv->i2c == NULL) | |
756 | return -EINVAL; | |
757 | ||
758 | if (priv->pll_desc->initdata) { | |
759 | struct i2c_msg msg = { .flags = 0, | |
760 | .addr = priv->pll_i2c_address, | |
761 | .buf = priv->pll_desc->initdata + 1, | |
762 | .len = priv->pll_desc->initdata[0] }; | |
763 | ||
764 | int result; | |
765 | if (fe->ops.i2c_gate_ctrl) | |
766 | fe->ops.i2c_gate_ctrl(fe, 1); | |
767 | if ((result = i2c_transfer(priv->i2c, &msg, 1)) != 1) { | |
768 | return result; | |
769 | } | |
770 | return 0; | |
771 | } | |
772 | /* Shouldn't be called when initdata is NULL, maybe BUG()? */ | |
773 | return -EINVAL; | |
774 | } | |
775 | ||
272bc4db AQ |
776 | static struct dvb_tuner_ops dvb_pll_tuner_ops = { |
777 | .release = dvb_pll_release, | |
778 | .sleep = dvb_pll_sleep, | |
d519dcf6 | 779 | .init = dvb_pll_init, |
272bc4db | 780 | .set_params = dvb_pll_set_params, |
bd4956b8 | 781 | .calc_regs = dvb_pll_calc_regs, |
272bc4db AQ |
782 | .get_frequency = dvb_pll_get_frequency, |
783 | .get_bandwidth = dvb_pll_get_bandwidth, | |
784 | }; | |
785 | ||
47ae9ae8 MK |
786 | struct dvb_frontend *dvb_pll_attach(struct dvb_frontend *fe, int pll_addr, |
787 | struct i2c_adapter *i2c, | |
47a9991e | 788 | unsigned int pll_desc_id) |
272bc4db | 789 | { |
061b623c | 790 | u8 b1 [] = { 0 }; |
47ae9ae8 MK |
791 | struct i2c_msg msg = { .addr = pll_addr, .flags = I2C_M_RD, |
792 | .buf = b1, .len = 1 }; | |
272bc4db | 793 | struct dvb_pll_priv *priv = NULL; |
061b623c | 794 | int ret; |
47a9991e MK |
795 | struct dvb_pll_desc *desc; |
796 | ||
797 | BUG_ON(pll_desc_id < 1 || pll_desc_id >= ARRAY_SIZE(pll_list)); | |
798 | ||
799 | desc = pll_list[pll_desc_id]; | |
061b623c | 800 | |
55c05b6d AQ |
801 | if (i2c != NULL) { |
802 | if (fe->ops.i2c_gate_ctrl) | |
803 | fe->ops.i2c_gate_ctrl(fe, 1); | |
804 | ||
95faba22 AQ |
805 | ret = i2c_transfer (i2c, &msg, 1); |
806 | if (ret != 1) | |
2bfe031d | 807 | return NULL; |
55c05b6d AQ |
808 | if (fe->ops.i2c_gate_ctrl) |
809 | fe->ops.i2c_gate_ctrl(fe, 0); | |
810 | } | |
272bc4db AQ |
811 | |
812 | priv = kzalloc(sizeof(struct dvb_pll_priv), GFP_KERNEL); | |
813 | if (priv == NULL) | |
2bfe031d | 814 | return NULL; |
272bc4db AQ |
815 | |
816 | priv->pll_i2c_address = pll_addr; | |
817 | priv->i2c = i2c; | |
818 | priv->pll_desc = desc; | |
a27e5e76 | 819 | priv->nr = dvb_pll_devcount++; |
272bc4db | 820 | |
47ae9ae8 MK |
821 | memcpy(&fe->ops.tuner_ops, &dvb_pll_tuner_ops, |
822 | sizeof(struct dvb_tuner_ops)); | |
823 | ||
982dd1bd TP |
824 | strncpy(fe->ops.tuner_ops.info.name, desc->name, |
825 | sizeof(fe->ops.tuner_ops.info.name)); | |
dea74869 | 826 | fe->ops.tuner_ops.info.frequency_min = desc->min; |
0d84a62b | 827 | fe->ops.tuner_ops.info.frequency_max = desc->max; |
d519dcf6 TP |
828 | if (!desc->initdata) |
829 | fe->ops.tuner_ops.init = NULL; | |
830 | if (!desc->sleepdata) | |
831 | fe->ops.tuner_ops.sleep = NULL; | |
272bc4db AQ |
832 | |
833 | fe->tuner_priv = priv; | |
a27e5e76 MK |
834 | |
835 | if (debug) { | |
836 | printk("dvb-pll[%d]", priv->nr); | |
837 | if (i2c != NULL) | |
838 | printk(" %d-%04x", i2c_adapter_id(i2c), pll_addr); | |
839 | printk(": id# %d (%s) attached\n", pll_desc_id, desc->name); | |
840 | } | |
841 | ||
2bfe031d | 842 | return fe; |
272bc4db AQ |
843 | } |
844 | EXPORT_SYMBOL(dvb_pll_attach); | |
845 | ||
1da177e4 LT |
846 | MODULE_DESCRIPTION("dvb pll library"); |
847 | MODULE_AUTHOR("Gerd Knorr"); | |
848 | MODULE_LICENSE("GPL"); |