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Commit | Line | Data |
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89885558 ST |
1 | /* |
2 | Samsung S5H1409 VSB/QAM demodulator driver | |
3 | ||
6d897616 | 4 | Copyright (C) 2006 Steven Toth <stoth@linuxtv.org> |
89885558 ST |
5 | |
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | ||
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/delay.h> | |
28 | #include "dvb_frontend.h" | |
89885558 ST |
29 | #include "s5h1409.h" |
30 | ||
31 | struct s5h1409_state { | |
32 | ||
b7709c0d | 33 | struct i2c_adapter *i2c; |
89885558 ST |
34 | |
35 | /* configuration settings */ | |
b7709c0d | 36 | const struct s5h1409_config *config; |
89885558 ST |
37 | |
38 | struct dvb_frontend frontend; | |
39 | ||
40 | /* previous uncorrected block counter */ | |
41 | fe_modulation_t current_modulation; | |
42 | ||
43 | u32 current_frequency; | |
2b03238a | 44 | int if_freq; |
dd7d5013 ST |
45 | |
46 | u32 is_qam_locked; | |
47 | u32 qam_state; | |
89885558 ST |
48 | }; |
49 | ||
ff699e6b | 50 | static int debug; |
b7709c0d ST |
51 | module_param(debug, int, 0644); |
52 | MODULE_PARM_DESC(debug, "Enable verbose debug messages"); | |
53 | ||
89885558 ST |
54 | #define dprintk if (debug) printk |
55 | ||
56 | /* Register values to initialise the demod, this will set VSB by default */ | |
57 | static struct init_tab { | |
58 | u8 reg; | |
59 | u16 data; | |
60 | } init_tab[] = { | |
61 | { 0x00, 0x0071, }, | |
62 | { 0x01, 0x3213, }, | |
63 | { 0x09, 0x0025, }, | |
64 | { 0x1c, 0x001d, }, | |
65 | { 0x1f, 0x002d, }, | |
66 | { 0x20, 0x001d, }, | |
67 | { 0x22, 0x0022, }, | |
68 | { 0x23, 0x0020, }, | |
69 | { 0x29, 0x110f, }, | |
70 | { 0x2a, 0x10b4, }, | |
71 | { 0x2b, 0x10ae, }, | |
72 | { 0x2c, 0x0031, }, | |
73 | { 0x31, 0x010d, }, | |
74 | { 0x32, 0x0100, }, | |
75 | { 0x44, 0x0510, }, | |
76 | { 0x54, 0x0104, }, | |
77 | { 0x58, 0x2222, }, | |
78 | { 0x59, 0x1162, }, | |
79 | { 0x5a, 0x3211, }, | |
80 | { 0x5d, 0x0370, }, | |
81 | { 0x5e, 0x0296, }, | |
82 | { 0x61, 0x0010, }, | |
83 | { 0x63, 0x4a00, }, | |
84 | { 0x65, 0x0800, }, | |
85 | { 0x71, 0x0003, }, | |
86 | { 0x72, 0x0470, }, | |
87 | { 0x81, 0x0002, }, | |
88 | { 0x82, 0x0600, }, | |
89 | { 0x86, 0x0002, }, | |
90 | { 0x8a, 0x2c38, }, | |
91 | { 0x8b, 0x2a37, }, | |
92 | { 0x92, 0x302f, }, | |
93 | { 0x93, 0x3332, }, | |
94 | { 0x96, 0x000c, }, | |
95 | { 0x99, 0x0101, }, | |
96 | { 0x9c, 0x2e37, }, | |
97 | { 0x9d, 0x2c37, }, | |
98 | { 0x9e, 0x2c37, }, | |
99 | { 0xab, 0x0100, }, | |
100 | { 0xac, 0x1003, }, | |
101 | { 0xad, 0x103f, }, | |
102 | { 0xe2, 0x0100, }, | |
dfc1c08a | 103 | { 0xe3, 0x1000, }, |
89885558 ST |
104 | { 0x28, 0x1010, }, |
105 | { 0xb1, 0x000e, }, | |
106 | }; | |
107 | ||
108 | /* VSB SNR lookup table */ | |
109 | static struct vsb_snr_tab { | |
110 | u16 val; | |
111 | u16 data; | |
112 | } vsb_snr_tab[] = { | |
2300317f | 113 | { 924, 300, }, |
89885558 ST |
114 | { 923, 300, }, |
115 | { 918, 295, }, | |
116 | { 915, 290, }, | |
117 | { 911, 285, }, | |
118 | { 906, 280, }, | |
119 | { 901, 275, }, | |
120 | { 896, 270, }, | |
121 | { 891, 265, }, | |
122 | { 885, 260, }, | |
123 | { 879, 255, }, | |
124 | { 873, 250, }, | |
125 | { 864, 245, }, | |
126 | { 858, 240, }, | |
127 | { 850, 235, }, | |
128 | { 841, 230, }, | |
129 | { 832, 225, }, | |
130 | { 823, 220, }, | |
131 | { 812, 215, }, | |
132 | { 802, 210, }, | |
133 | { 788, 205, }, | |
134 | { 778, 200, }, | |
135 | { 767, 195, }, | |
136 | { 753, 190, }, | |
137 | { 740, 185, }, | |
138 | { 725, 180, }, | |
139 | { 707, 175, }, | |
140 | { 689, 170, }, | |
141 | { 671, 165, }, | |
142 | { 656, 160, }, | |
143 | { 637, 155, }, | |
144 | { 616, 150, }, | |
145 | { 542, 145, }, | |
146 | { 519, 140, }, | |
147 | { 507, 135, }, | |
148 | { 497, 130, }, | |
149 | { 492, 125, }, | |
150 | { 474, 120, }, | |
151 | { 300, 111, }, | |
152 | { 0, 0, }, | |
153 | }; | |
154 | ||
155 | /* QAM64 SNR lookup table */ | |
156 | static struct qam64_snr_tab { | |
157 | u16 val; | |
158 | u16 data; | |
159 | } qam64_snr_tab[] = { | |
2300317f | 160 | { 1, 0, }, |
89885558 ST |
161 | { 12, 300, }, |
162 | { 15, 290, }, | |
163 | { 18, 280, }, | |
164 | { 22, 270, }, | |
165 | { 23, 268, }, | |
166 | { 24, 266, }, | |
167 | { 25, 264, }, | |
168 | { 27, 262, }, | |
169 | { 28, 260, }, | |
170 | { 29, 258, }, | |
171 | { 30, 256, }, | |
172 | { 32, 254, }, | |
173 | { 33, 252, }, | |
174 | { 34, 250, }, | |
175 | { 35, 249, }, | |
176 | { 36, 248, }, | |
177 | { 37, 247, }, | |
178 | { 38, 246, }, | |
179 | { 39, 245, }, | |
180 | { 40, 244, }, | |
181 | { 41, 243, }, | |
182 | { 42, 241, }, | |
183 | { 43, 240, }, | |
184 | { 44, 239, }, | |
185 | { 45, 238, }, | |
186 | { 46, 237, }, | |
187 | { 47, 236, }, | |
188 | { 48, 235, }, | |
189 | { 49, 234, }, | |
190 | { 50, 233, }, | |
191 | { 51, 232, }, | |
192 | { 52, 231, }, | |
193 | { 53, 230, }, | |
194 | { 55, 229, }, | |
195 | { 56, 228, }, | |
196 | { 57, 227, }, | |
197 | { 58, 226, }, | |
198 | { 59, 225, }, | |
199 | { 60, 224, }, | |
200 | { 62, 223, }, | |
201 | { 63, 222, }, | |
202 | { 65, 221, }, | |
203 | { 66, 220, }, | |
204 | { 68, 219, }, | |
205 | { 69, 218, }, | |
206 | { 70, 217, }, | |
207 | { 72, 216, }, | |
208 | { 73, 215, }, | |
209 | { 75, 214, }, | |
210 | { 76, 213, }, | |
211 | { 78, 212, }, | |
212 | { 80, 211, }, | |
213 | { 81, 210, }, | |
214 | { 83, 209, }, | |
215 | { 84, 208, }, | |
216 | { 85, 207, }, | |
217 | { 87, 206, }, | |
218 | { 89, 205, }, | |
219 | { 91, 204, }, | |
220 | { 93, 203, }, | |
221 | { 95, 202, }, | |
222 | { 96, 201, }, | |
223 | { 104, 200, }, | |
2300317f | 224 | { 255, 0, }, |
89885558 ST |
225 | }; |
226 | ||
227 | /* QAM256 SNR lookup table */ | |
228 | static struct qam256_snr_tab { | |
229 | u16 val; | |
230 | u16 data; | |
231 | } qam256_snr_tab[] = { | |
2300317f | 232 | { 1, 0, }, |
89885558 ST |
233 | { 12, 400, }, |
234 | { 13, 390, }, | |
235 | { 15, 380, }, | |
236 | { 17, 360, }, | |
237 | { 19, 350, }, | |
238 | { 22, 348, }, | |
239 | { 23, 346, }, | |
240 | { 24, 344, }, | |
241 | { 25, 342, }, | |
242 | { 26, 340, }, | |
243 | { 27, 336, }, | |
244 | { 28, 334, }, | |
245 | { 29, 332, }, | |
246 | { 30, 330, }, | |
247 | { 31, 328, }, | |
248 | { 32, 326, }, | |
249 | { 33, 325, }, | |
250 | { 34, 322, }, | |
251 | { 35, 320, }, | |
252 | { 37, 318, }, | |
253 | { 39, 316, }, | |
254 | { 40, 314, }, | |
255 | { 41, 312, }, | |
256 | { 42, 310, }, | |
257 | { 43, 308, }, | |
258 | { 46, 306, }, | |
259 | { 47, 304, }, | |
260 | { 49, 302, }, | |
261 | { 51, 300, }, | |
262 | { 53, 298, }, | |
263 | { 54, 297, }, | |
264 | { 55, 296, }, | |
265 | { 56, 295, }, | |
266 | { 57, 294, }, | |
267 | { 59, 293, }, | |
268 | { 60, 292, }, | |
269 | { 61, 291, }, | |
270 | { 63, 290, }, | |
271 | { 64, 289, }, | |
272 | { 65, 288, }, | |
273 | { 66, 287, }, | |
274 | { 68, 286, }, | |
275 | { 69, 285, }, | |
276 | { 71, 284, }, | |
277 | { 72, 283, }, | |
278 | { 74, 282, }, | |
279 | { 75, 281, }, | |
280 | { 76, 280, }, | |
281 | { 77, 279, }, | |
282 | { 78, 278, }, | |
283 | { 81, 277, }, | |
284 | { 83, 276, }, | |
285 | { 84, 275, }, | |
286 | { 86, 274, }, | |
287 | { 87, 273, }, | |
288 | { 89, 272, }, | |
289 | { 90, 271, }, | |
290 | { 92, 270, }, | |
291 | { 93, 269, }, | |
292 | { 95, 268, }, | |
293 | { 96, 267, }, | |
294 | { 98, 266, }, | |
295 | { 100, 265, }, | |
296 | { 102, 264, }, | |
297 | { 104, 263, }, | |
298 | { 105, 262, }, | |
299 | { 106, 261, }, | |
300 | { 110, 260, }, | |
2300317f | 301 | { 255, 0, }, |
89885558 ST |
302 | }; |
303 | ||
304 | /* 8 bit registers, 16 bit values */ | |
b7709c0d | 305 | static int s5h1409_writereg(struct s5h1409_state *state, u8 reg, u16 data) |
89885558 ST |
306 | { |
307 | int ret; | |
b7709c0d | 308 | u8 buf[] = { reg, data >> 8, data & 0xff }; |
89885558 | 309 | |
3873dd04 MK |
310 | struct i2c_msg msg = { .addr = state->config->demod_address, |
311 | .flags = 0, .buf = buf, .len = 3 }; | |
89885558 ST |
312 | |
313 | ret = i2c_transfer(state->i2c, &msg, 1); | |
314 | ||
315 | if (ret != 1) | |
b7709c0d | 316 | printk(KERN_ERR "%s: error (reg == 0x%02x, val == 0x%04x, " |
271ddbf7 | 317 | "ret == %i)\n", __func__, reg, data, ret); |
89885558 ST |
318 | |
319 | return (ret != 1) ? -1 : 0; | |
320 | } | |
321 | ||
b7709c0d | 322 | static u16 s5h1409_readreg(struct s5h1409_state *state, u8 reg) |
89885558 ST |
323 | { |
324 | int ret; | |
b7709c0d ST |
325 | u8 b0[] = { reg }; |
326 | u8 b1[] = { 0, 0 }; | |
89885558 | 327 | |
b7709c0d | 328 | struct i2c_msg msg[] = { |
3873dd04 MK |
329 | { .addr = state->config->demod_address, .flags = 0, |
330 | .buf = b0, .len = 1 }, | |
331 | { .addr = state->config->demod_address, .flags = I2C_M_RD, | |
332 | .buf = b1, .len = 2 } }; | |
89885558 ST |
333 | |
334 | ret = i2c_transfer(state->i2c, msg, 2); | |
335 | ||
336 | if (ret != 2) | |
271ddbf7 | 337 | printk("%s: readreg error (ret == %i)\n", __func__, ret); |
89885558 ST |
338 | return (b1[0] << 8) | b1[1]; |
339 | } | |
340 | ||
b7709c0d | 341 | static int s5h1409_softreset(struct dvb_frontend *fe) |
89885558 | 342 | { |
b7709c0d | 343 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 344 | |
271ddbf7 | 345 | dprintk("%s()\n", __func__); |
89885558 ST |
346 | |
347 | s5h1409_writereg(state, 0xf5, 0); | |
348 | s5h1409_writereg(state, 0xf5, 1); | |
dd7d5013 ST |
349 | state->is_qam_locked = 0; |
350 | state->qam_state = 0; | |
89885558 ST |
351 | return 0; |
352 | } | |
353 | ||
2b03238a | 354 | #define S5H1409_VSB_IF_FREQ 5380 |
b7709c0d | 355 | #define S5H1409_QAM_IF_FREQ (state->config->qam_if) |
2b03238a | 356 | |
b7709c0d | 357 | static int s5h1409_set_if_freq(struct dvb_frontend *fe, int KHz) |
89885558 | 358 | { |
b7709c0d | 359 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 360 | |
271ddbf7 | 361 | dprintk("%s(%d KHz)\n", __func__, KHz); |
89885558 | 362 | |
6b7daa88 MK |
363 | switch (KHz) { |
364 | case 4000: | |
dd7d5013 ST |
365 | s5h1409_writereg(state, 0x87, 0x014b); |
366 | s5h1409_writereg(state, 0x88, 0x0cb5); | |
367 | s5h1409_writereg(state, 0x89, 0x03e2); | |
6b7daa88 MK |
368 | break; |
369 | case 5380: | |
370 | case 44000: | |
371 | default: | |
372 | s5h1409_writereg(state, 0x87, 0x01be); | |
373 | s5h1409_writereg(state, 0x88, 0x0436); | |
374 | s5h1409_writereg(state, 0x89, 0x054d); | |
375 | break; | |
89885558 | 376 | } |
6b7daa88 | 377 | state->if_freq = KHz; |
89885558 | 378 | |
6b7daa88 | 379 | return 0; |
89885558 ST |
380 | } |
381 | ||
b7709c0d | 382 | static int s5h1409_set_spectralinversion(struct dvb_frontend *fe, int inverted) |
89885558 | 383 | { |
b7709c0d | 384 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 385 | |
271ddbf7 | 386 | dprintk("%s(%d)\n", __func__, inverted); |
89885558 | 387 | |
b7709c0d | 388 | if (inverted == 1) |
89885558 ST |
389 | return s5h1409_writereg(state, 0x1b, 0x1101); /* Inverted */ |
390 | else | |
391 | return s5h1409_writereg(state, 0x1b, 0x0110); /* Normal */ | |
392 | } | |
393 | ||
b7709c0d | 394 | static int s5h1409_enable_modulation(struct dvb_frontend *fe, |
3873dd04 | 395 | fe_modulation_t m) |
89885558 | 396 | { |
b7709c0d | 397 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 398 | |
271ddbf7 | 399 | dprintk("%s(0x%08x)\n", __func__, m); |
89885558 | 400 | |
b7709c0d | 401 | switch (m) { |
89885558 | 402 | case VSB_8: |
271ddbf7 | 403 | dprintk("%s() VSB_8\n", __func__); |
2b03238a MK |
404 | if (state->if_freq != S5H1409_VSB_IF_FREQ) |
405 | s5h1409_set_if_freq(fe, S5H1409_VSB_IF_FREQ); | |
89885558 ST |
406 | s5h1409_writereg(state, 0xf4, 0); |
407 | break; | |
408 | case QAM_64: | |
89885558 | 409 | case QAM_256: |
4fc85c74 | 410 | case QAM_AUTO: |
271ddbf7 | 411 | dprintk("%s() QAM_AUTO (64/256)\n", __func__); |
2b03238a MK |
412 | if (state->if_freq != S5H1409_QAM_IF_FREQ) |
413 | s5h1409_set_if_freq(fe, S5H1409_QAM_IF_FREQ); | |
89885558 | 414 | s5h1409_writereg(state, 0xf4, 1); |
dd7d5013 | 415 | s5h1409_writereg(state, 0x85, 0x110); |
89885558 ST |
416 | break; |
417 | default: | |
271ddbf7 | 418 | dprintk("%s() Invalid modulation\n", __func__); |
89885558 ST |
419 | return -EINVAL; |
420 | } | |
421 | ||
422 | state->current_modulation = m; | |
423 | s5h1409_softreset(fe); | |
424 | ||
425 | return 0; | |
426 | } | |
427 | ||
b7709c0d | 428 | static int s5h1409_i2c_gate_ctrl(struct dvb_frontend *fe, int enable) |
89885558 | 429 | { |
b7709c0d | 430 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 431 | |
271ddbf7 | 432 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
433 | |
434 | if (enable) | |
435 | return s5h1409_writereg(state, 0xf3, 1); | |
436 | else | |
437 | return s5h1409_writereg(state, 0xf3, 0); | |
438 | } | |
439 | ||
b7709c0d | 440 | static int s5h1409_set_gpio(struct dvb_frontend *fe, int enable) |
89885558 | 441 | { |
b7709c0d | 442 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 443 | |
271ddbf7 | 444 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
445 | |
446 | if (enable) | |
dfc1c08a ST |
447 | return s5h1409_writereg(state, 0xe3, |
448 | s5h1409_readreg(state, 0xe3) | 0x1100); | |
89885558 | 449 | else |
dfc1c08a | 450 | return s5h1409_writereg(state, 0xe3, |
8e08af3c | 451 | s5h1409_readreg(state, 0xe3) & 0xfeff); |
89885558 ST |
452 | } |
453 | ||
b7709c0d | 454 | static int s5h1409_sleep(struct dvb_frontend *fe, int enable) |
89885558 | 455 | { |
b7709c0d | 456 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 457 | |
271ddbf7 | 458 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
459 | |
460 | return s5h1409_writereg(state, 0xf2, enable); | |
461 | } | |
462 | ||
b7709c0d | 463 | static int s5h1409_register_reset(struct dvb_frontend *fe) |
89885558 | 464 | { |
b7709c0d | 465 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 466 | |
271ddbf7 | 467 | dprintk("%s()\n", __func__); |
89885558 ST |
468 | |
469 | return s5h1409_writereg(state, 0xfa, 0); | |
470 | } | |
471 | ||
dd7d5013 ST |
472 | static void s5h1409_set_qam_amhum_mode(struct dvb_frontend *fe) |
473 | { | |
474 | struct s5h1409_state *state = fe->demodulator_priv; | |
475 | u16 reg; | |
476 | ||
477 | if (state->is_qam_locked) | |
478 | return; | |
479 | ||
480 | /* QAM EQ lock check */ | |
481 | reg = s5h1409_readreg(state, 0xf0); | |
482 | ||
483 | if ((reg >> 13) & 0x1) { | |
484 | ||
485 | state->is_qam_locked = 1; | |
486 | reg &= 0xff; | |
487 | ||
488 | s5h1409_writereg(state, 0x96, 0x00c); | |
b7709c0d | 489 | if ((reg < 0x38) || (reg > 0x68)) { |
dd7d5013 ST |
490 | s5h1409_writereg(state, 0x93, 0x3332); |
491 | s5h1409_writereg(state, 0x9e, 0x2c37); | |
492 | } else { | |
493 | s5h1409_writereg(state, 0x93, 0x3130); | |
494 | s5h1409_writereg(state, 0x9e, 0x2836); | |
495 | } | |
496 | ||
497 | } else { | |
498 | s5h1409_writereg(state, 0x96, 0x0008); | |
499 | s5h1409_writereg(state, 0x93, 0x3332); | |
500 | s5h1409_writereg(state, 0x9e, 0x2c37); | |
501 | } | |
502 | } | |
503 | ||
504 | static void s5h1409_set_qam_interleave_mode(struct dvb_frontend *fe) | |
505 | { | |
506 | struct s5h1409_state *state = fe->demodulator_priv; | |
507 | u16 reg, reg1, reg2; | |
508 | ||
509 | reg = s5h1409_readreg(state, 0xf1); | |
510 | ||
511 | /* Master lock */ | |
512 | if ((reg >> 15) & 0x1) { | |
513 | if (state->qam_state != 2) { | |
514 | state->qam_state = 2; | |
515 | reg1 = s5h1409_readreg(state, 0xb2); | |
516 | reg2 = s5h1409_readreg(state, 0xad); | |
517 | ||
518 | s5h1409_writereg(state, 0x96, 0x20); | |
519 | s5h1409_writereg(state, 0xad, | |
b7709c0d | 520 | (((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff))); |
dfc1c08a ST |
521 | s5h1409_writereg(state, 0xab, |
522 | s5h1409_readreg(state, 0xab) & 0xeffe); | |
dd7d5013 ST |
523 | } |
524 | } else { | |
525 | if (state->qam_state != 1) { | |
526 | state->qam_state = 1; | |
527 | s5h1409_writereg(state, 0x96, 0x08); | |
dfc1c08a ST |
528 | s5h1409_writereg(state, 0xab, |
529 | s5h1409_readreg(state, 0xab) | 0x1001); | |
dd7d5013 ST |
530 | } |
531 | } | |
532 | } | |
533 | ||
89885558 | 534 | /* Talk to the demod, set the FEC, GUARD, QAM settings etc */ |
b7709c0d | 535 | static int s5h1409_set_frontend(struct dvb_frontend *fe, |
3873dd04 | 536 | struct dvb_frontend_parameters *p) |
89885558 | 537 | { |
b7709c0d | 538 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 539 | |
271ddbf7 | 540 | dprintk("%s(frequency=%d)\n", __func__, p->frequency); |
89885558 ST |
541 | |
542 | s5h1409_softreset(fe); | |
543 | ||
544 | state->current_frequency = p->frequency; | |
545 | ||
546 | s5h1409_enable_modulation(fe, p->u.vsb.modulation); | |
547 | ||
548 | if (fe->ops.tuner_ops.set_params) { | |
b7709c0d ST |
549 | if (fe->ops.i2c_gate_ctrl) |
550 | fe->ops.i2c_gate_ctrl(fe, 1); | |
89885558 | 551 | fe->ops.tuner_ops.set_params(fe, p); |
b7709c0d ST |
552 | if (fe->ops.i2c_gate_ctrl) |
553 | fe->ops.i2c_gate_ctrl(fe, 0); | |
89885558 ST |
554 | } |
555 | ||
dd7d5013 ST |
556 | /* Optimize the demod for QAM */ |
557 | if (p->u.vsb.modulation != VSB_8) { | |
558 | s5h1409_set_qam_amhum_mode(fe); | |
559 | s5h1409_set_qam_interleave_mode(fe); | |
560 | } | |
561 | ||
67e70baf DH |
562 | /* Issue a reset to the demod so it knows to resync against the |
563 | newly tuned frequency */ | |
564 | s5h1409_softreset(fe); | |
565 | ||
89885558 ST |
566 | return 0; |
567 | } | |
568 | ||
dfc1c08a ST |
569 | static int s5h1409_set_mpeg_timing(struct dvb_frontend *fe, int mode) |
570 | { | |
571 | struct s5h1409_state *state = fe->demodulator_priv; | |
572 | u16 val; | |
573 | ||
271ddbf7 | 574 | dprintk("%s(%d)\n", __func__, mode); |
dfc1c08a ST |
575 | |
576 | val = s5h1409_readreg(state, 0xac) & 0xcfff; | |
577 | switch (mode) { | |
578 | case S5H1409_MPEGTIMING_CONTINOUS_INVERTING_CLOCK: | |
579 | val |= 0x0000; | |
580 | break; | |
581 | case S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK: | |
271ddbf7 | 582 | dprintk("%s(%d) Mode1 or Defaulting\n", __func__, mode); |
dfc1c08a ST |
583 | val |= 0x1000; |
584 | break; | |
585 | case S5H1409_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK: | |
586 | val |= 0x2000; | |
587 | break; | |
588 | case S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK: | |
589 | val |= 0x3000; | |
590 | break; | |
591 | default: | |
592 | return -EINVAL; | |
593 | } | |
594 | ||
595 | /* Configure MPEG Signal Timing charactistics */ | |
596 | return s5h1409_writereg(state, 0xac, val); | |
597 | } | |
598 | ||
89885558 ST |
599 | /* Reset the demod hardware and reset all of the configuration registers |
600 | to a default state. */ | |
b7709c0d | 601 | static int s5h1409_init(struct dvb_frontend *fe) |
89885558 ST |
602 | { |
603 | int i; | |
604 | ||
b7709c0d | 605 | struct s5h1409_state *state = fe->demodulator_priv; |
271ddbf7 | 606 | dprintk("%s()\n", __func__); |
89885558 ST |
607 | |
608 | s5h1409_sleep(fe, 0); | |
609 | s5h1409_register_reset(fe); | |
610 | ||
b7709c0d | 611 | for (i = 0; i < ARRAY_SIZE(init_tab); i++) |
89885558 ST |
612 | s5h1409_writereg(state, init_tab[i].reg, init_tab[i].data); |
613 | ||
614 | /* The datasheet says that after initialisation, VSB is default */ | |
615 | state->current_modulation = VSB_8; | |
616 | ||
617 | if (state->config->output_mode == S5H1409_SERIAL_OUTPUT) | |
dfc1c08a ST |
618 | s5h1409_writereg(state, 0xab, |
619 | s5h1409_readreg(state, 0xab) | 0x100); /* Serial */ | |
89885558 | 620 | else |
dfc1c08a ST |
621 | s5h1409_writereg(state, 0xab, |
622 | s5h1409_readreg(state, 0xab) & 0xfeff); /* Parallel */ | |
89885558 ST |
623 | |
624 | s5h1409_set_spectralinversion(fe, state->config->inversion); | |
2b03238a | 625 | s5h1409_set_if_freq(fe, state->if_freq); |
89885558 | 626 | s5h1409_set_gpio(fe, state->config->gpio); |
dfc1c08a | 627 | s5h1409_set_mpeg_timing(fe, state->config->mpeg_timing); |
89885558 ST |
628 | s5h1409_softreset(fe); |
629 | ||
dd7d5013 ST |
630 | /* Note: Leaving the I2C gate closed. */ |
631 | s5h1409_i2c_gate_ctrl(fe, 0); | |
89885558 ST |
632 | |
633 | return 0; | |
634 | } | |
635 | ||
b7709c0d | 636 | static int s5h1409_read_status(struct dvb_frontend *fe, fe_status_t *status) |
89885558 | 637 | { |
b7709c0d | 638 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 ST |
639 | u16 reg; |
640 | u32 tuner_status = 0; | |
641 | ||
642 | *status = 0; | |
643 | ||
644 | /* Get the demodulator status */ | |
645 | reg = s5h1409_readreg(state, 0xf1); | |
b7709c0d | 646 | if (reg & 0x1000) |
89885558 | 647 | *status |= FE_HAS_VITERBI; |
b7709c0d | 648 | if (reg & 0x8000) |
89885558 ST |
649 | *status |= FE_HAS_LOCK | FE_HAS_SYNC; |
650 | ||
b7709c0d | 651 | switch (state->config->status_mode) { |
89885558 ST |
652 | case S5H1409_DEMODLOCKING: |
653 | if (*status & FE_HAS_VITERBI) | |
654 | *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL; | |
655 | break; | |
656 | case S5H1409_TUNERLOCKING: | |
657 | /* Get the tuner status */ | |
658 | if (fe->ops.tuner_ops.get_status) { | |
3873dd04 MK |
659 | if (fe->ops.i2c_gate_ctrl) |
660 | fe->ops.i2c_gate_ctrl(fe, 1); | |
89885558 ST |
661 | |
662 | fe->ops.tuner_ops.get_status(fe, &tuner_status); | |
663 | ||
3873dd04 MK |
664 | if (fe->ops.i2c_gate_ctrl) |
665 | fe->ops.i2c_gate_ctrl(fe, 0); | |
89885558 ST |
666 | } |
667 | if (tuner_status) | |
668 | *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL; | |
669 | break; | |
670 | } | |
671 | ||
271ddbf7 | 672 | dprintk("%s() status 0x%08x\n", __func__, *status); |
89885558 ST |
673 | |
674 | return 0; | |
675 | } | |
676 | ||
b7709c0d | 677 | static int s5h1409_qam256_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) |
89885558 ST |
678 | { |
679 | int i, ret = -EINVAL; | |
271ddbf7 | 680 | dprintk("%s()\n", __func__); |
89885558 | 681 | |
b7709c0d | 682 | for (i = 0; i < ARRAY_SIZE(qam256_snr_tab); i++) { |
89885558 ST |
683 | if (v < qam256_snr_tab[i].val) { |
684 | *snr = qam256_snr_tab[i].data; | |
685 | ret = 0; | |
686 | break; | |
687 | } | |
688 | } | |
689 | return ret; | |
690 | } | |
691 | ||
b7709c0d | 692 | static int s5h1409_qam64_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) |
89885558 ST |
693 | { |
694 | int i, ret = -EINVAL; | |
271ddbf7 | 695 | dprintk("%s()\n", __func__); |
89885558 | 696 | |
b7709c0d | 697 | for (i = 0; i < ARRAY_SIZE(qam64_snr_tab); i++) { |
89885558 ST |
698 | if (v < qam64_snr_tab[i].val) { |
699 | *snr = qam64_snr_tab[i].data; | |
700 | ret = 0; | |
701 | break; | |
702 | } | |
703 | } | |
704 | return ret; | |
705 | } | |
706 | ||
b7709c0d | 707 | static int s5h1409_vsb_lookup_snr(struct dvb_frontend *fe, u16 *snr, u16 v) |
89885558 ST |
708 | { |
709 | int i, ret = -EINVAL; | |
271ddbf7 | 710 | dprintk("%s()\n", __func__); |
89885558 | 711 | |
b7709c0d | 712 | for (i = 0; i < ARRAY_SIZE(vsb_snr_tab); i++) { |
89885558 ST |
713 | if (v > vsb_snr_tab[i].val) { |
714 | *snr = vsb_snr_tab[i].data; | |
715 | ret = 0; | |
716 | break; | |
717 | } | |
718 | } | |
271ddbf7 | 719 | dprintk("%s() snr=%d\n", __func__, *snr); |
89885558 ST |
720 | return ret; |
721 | } | |
722 | ||
b7709c0d | 723 | static int s5h1409_read_snr(struct dvb_frontend *fe, u16 *snr) |
89885558 | 724 | { |
b7709c0d | 725 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 | 726 | u16 reg; |
271ddbf7 | 727 | dprintk("%s()\n", __func__); |
89885558 | 728 | |
b7709c0d | 729 | switch (state->current_modulation) { |
89885558 | 730 | case QAM_64: |
2300317f | 731 | reg = s5h1409_readreg(state, 0xf0) & 0xff; |
89885558 ST |
732 | return s5h1409_qam64_lookup_snr(fe, snr, reg); |
733 | case QAM_256: | |
2300317f | 734 | reg = s5h1409_readreg(state, 0xf0) & 0xff; |
89885558 ST |
735 | return s5h1409_qam256_lookup_snr(fe, snr, reg); |
736 | case VSB_8: | |
2300317f | 737 | reg = s5h1409_readreg(state, 0xf1) & 0x3ff; |
89885558 ST |
738 | return s5h1409_vsb_lookup_snr(fe, snr, reg); |
739 | default: | |
740 | break; | |
741 | } | |
742 | ||
743 | return -EINVAL; | |
744 | } | |
745 | ||
b7709c0d ST |
746 | static int s5h1409_read_signal_strength(struct dvb_frontend *fe, |
747 | u16 *signal_strength) | |
89885558 ST |
748 | { |
749 | return s5h1409_read_snr(fe, signal_strength); | |
750 | } | |
751 | ||
b7709c0d | 752 | static int s5h1409_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) |
89885558 | 753 | { |
b7709c0d | 754 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 ST |
755 | |
756 | *ucblocks = s5h1409_readreg(state, 0xb5); | |
757 | ||
758 | return 0; | |
759 | } | |
760 | ||
b7709c0d | 761 | static int s5h1409_read_ber(struct dvb_frontend *fe, u32 *ber) |
89885558 ST |
762 | { |
763 | return s5h1409_read_ucblocks(fe, ber); | |
764 | } | |
765 | ||
b7709c0d | 766 | static int s5h1409_get_frontend(struct dvb_frontend *fe, |
3873dd04 | 767 | struct dvb_frontend_parameters *p) |
89885558 | 768 | { |
b7709c0d | 769 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 ST |
770 | |
771 | p->frequency = state->current_frequency; | |
772 | p->u.vsb.modulation = state->current_modulation; | |
773 | ||
774 | return 0; | |
775 | } | |
776 | ||
b7709c0d | 777 | static int s5h1409_get_tune_settings(struct dvb_frontend *fe, |
3873dd04 | 778 | struct dvb_frontend_tune_settings *tune) |
89885558 ST |
779 | { |
780 | tune->min_delay_ms = 1000; | |
781 | return 0; | |
782 | } | |
783 | ||
b7709c0d | 784 | static void s5h1409_release(struct dvb_frontend *fe) |
89885558 | 785 | { |
b7709c0d | 786 | struct s5h1409_state *state = fe->demodulator_priv; |
89885558 ST |
787 | kfree(state); |
788 | } | |
789 | ||
790 | static struct dvb_frontend_ops s5h1409_ops; | |
791 | ||
b7709c0d ST |
792 | struct dvb_frontend *s5h1409_attach(const struct s5h1409_config *config, |
793 | struct i2c_adapter *i2c) | |
89885558 | 794 | { |
b7709c0d | 795 | struct s5h1409_state *state = NULL; |
a57ed8a1 | 796 | u16 reg; |
89885558 ST |
797 | |
798 | /* allocate memory for the internal state */ | |
084e24ac | 799 | state = kzalloc(sizeof(struct s5h1409_state), GFP_KERNEL); |
89885558 ST |
800 | if (state == NULL) |
801 | goto error; | |
802 | ||
803 | /* setup the state */ | |
804 | state->config = config; | |
805 | state->i2c = i2c; | |
806 | state->current_modulation = 0; | |
2b03238a | 807 | state->if_freq = S5H1409_VSB_IF_FREQ; |
89885558 ST |
808 | |
809 | /* check if the demod exists */ | |
a57ed8a1 ST |
810 | reg = s5h1409_readreg(state, 0x04); |
811 | if ((reg != 0x0066) && (reg != 0x007f)) | |
89885558 ST |
812 | goto error; |
813 | ||
814 | /* create dvb_frontend */ | |
3873dd04 MK |
815 | memcpy(&state->frontend.ops, &s5h1409_ops, |
816 | sizeof(struct dvb_frontend_ops)); | |
89885558 ST |
817 | state->frontend.demodulator_priv = state; |
818 | ||
a57ed8a1 ST |
819 | if (s5h1409_init(&state->frontend) != 0) { |
820 | printk(KERN_ERR "%s: Failed to initialize correctly\n", | |
271ddbf7 | 821 | __func__); |
a57ed8a1 ST |
822 | goto error; |
823 | } | |
824 | ||
89885558 | 825 | /* Note: Leaving the I2C gate open here. */ |
a57ed8a1 | 826 | s5h1409_i2c_gate_ctrl(&state->frontend, 1); |
89885558 ST |
827 | |
828 | return &state->frontend; | |
829 | ||
830 | error: | |
831 | kfree(state); | |
832 | return NULL; | |
833 | } | |
b7709c0d | 834 | EXPORT_SYMBOL(s5h1409_attach); |
89885558 ST |
835 | |
836 | static struct dvb_frontend_ops s5h1409_ops = { | |
837 | ||
838 | .info = { | |
839 | .name = "Samsung S5H1409 QAM/8VSB Frontend", | |
840 | .type = FE_ATSC, | |
841 | .frequency_min = 54000000, | |
842 | .frequency_max = 858000000, | |
843 | .frequency_stepsize = 62500, | |
844 | .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB | |
845 | }, | |
846 | ||
847 | .init = s5h1409_init, | |
848 | .i2c_gate_ctrl = s5h1409_i2c_gate_ctrl, | |
849 | .set_frontend = s5h1409_set_frontend, | |
850 | .get_frontend = s5h1409_get_frontend, | |
851 | .get_tune_settings = s5h1409_get_tune_settings, | |
852 | .read_status = s5h1409_read_status, | |
853 | .read_ber = s5h1409_read_ber, | |
854 | .read_signal_strength = s5h1409_read_signal_strength, | |
855 | .read_snr = s5h1409_read_snr, | |
856 | .read_ucblocks = s5h1409_read_ucblocks, | |
857 | .release = s5h1409_release, | |
858 | }; | |
859 | ||
89885558 ST |
860 | MODULE_DESCRIPTION("Samsung S5H1409 QAM-B/ATSC Demodulator driver"); |
861 | MODULE_AUTHOR("Steven Toth"); | |
862 | MODULE_LICENSE("GPL"); | |
863 | ||
3873dd04 MK |
864 | |
865 | /* | |
866 | * Local variables: | |
867 | * c-basic-offset: 8 | |
868 | */ |