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Commit | Line | Data |
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89885558 ST |
1 | /* |
2 | Samsung S5H1409 VSB/QAM demodulator driver | |
3 | ||
4 | Copyright (C) 2006 Steven Toth <stoth@hauppauge.com> | |
5 | ||
6 | This program is free software; you can redistribute it and/or modify | |
7 | it under the terms of the GNU General Public License as published by | |
8 | the Free Software Foundation; either version 2 of the License, or | |
9 | (at your option) any later version. | |
10 | ||
11 | This program is distributed in the hope that it will be useful, | |
12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | GNU General Public License for more details. | |
15 | ||
16 | You should have received a copy of the GNU General Public License | |
17 | along with this program; if not, write to the Free Software | |
18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
19 | ||
20 | */ | |
21 | ||
22 | #include <linux/kernel.h> | |
23 | #include <linux/init.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/string.h> | |
26 | #include <linux/slab.h> | |
27 | #include <linux/delay.h> | |
28 | #include "dvb_frontend.h" | |
89885558 ST |
29 | #include "s5h1409.h" |
30 | ||
31 | struct s5h1409_state { | |
32 | ||
33 | struct i2c_adapter* i2c; | |
34 | ||
35 | /* configuration settings */ | |
36 | const struct s5h1409_config* config; | |
37 | ||
38 | struct dvb_frontend frontend; | |
39 | ||
40 | /* previous uncorrected block counter */ | |
41 | fe_modulation_t current_modulation; | |
42 | ||
43 | u32 current_frequency; | |
2b03238a | 44 | int if_freq; |
dd7d5013 ST |
45 | |
46 | u32 is_qam_locked; | |
47 | u32 qam_state; | |
89885558 ST |
48 | }; |
49 | ||
ff699e6b | 50 | static int debug; |
89885558 ST |
51 | #define dprintk if (debug) printk |
52 | ||
53 | /* Register values to initialise the demod, this will set VSB by default */ | |
54 | static struct init_tab { | |
55 | u8 reg; | |
56 | u16 data; | |
57 | } init_tab[] = { | |
58 | { 0x00, 0x0071, }, | |
59 | { 0x01, 0x3213, }, | |
60 | { 0x09, 0x0025, }, | |
61 | { 0x1c, 0x001d, }, | |
62 | { 0x1f, 0x002d, }, | |
63 | { 0x20, 0x001d, }, | |
64 | { 0x22, 0x0022, }, | |
65 | { 0x23, 0x0020, }, | |
66 | { 0x29, 0x110f, }, | |
67 | { 0x2a, 0x10b4, }, | |
68 | { 0x2b, 0x10ae, }, | |
69 | { 0x2c, 0x0031, }, | |
70 | { 0x31, 0x010d, }, | |
71 | { 0x32, 0x0100, }, | |
72 | { 0x44, 0x0510, }, | |
73 | { 0x54, 0x0104, }, | |
74 | { 0x58, 0x2222, }, | |
75 | { 0x59, 0x1162, }, | |
76 | { 0x5a, 0x3211, }, | |
77 | { 0x5d, 0x0370, }, | |
78 | { 0x5e, 0x0296, }, | |
79 | { 0x61, 0x0010, }, | |
80 | { 0x63, 0x4a00, }, | |
81 | { 0x65, 0x0800, }, | |
82 | { 0x71, 0x0003, }, | |
83 | { 0x72, 0x0470, }, | |
84 | { 0x81, 0x0002, }, | |
85 | { 0x82, 0x0600, }, | |
86 | { 0x86, 0x0002, }, | |
87 | { 0x8a, 0x2c38, }, | |
88 | { 0x8b, 0x2a37, }, | |
89 | { 0x92, 0x302f, }, | |
90 | { 0x93, 0x3332, }, | |
91 | { 0x96, 0x000c, }, | |
92 | { 0x99, 0x0101, }, | |
93 | { 0x9c, 0x2e37, }, | |
94 | { 0x9d, 0x2c37, }, | |
95 | { 0x9e, 0x2c37, }, | |
96 | { 0xab, 0x0100, }, | |
97 | { 0xac, 0x1003, }, | |
98 | { 0xad, 0x103f, }, | |
99 | { 0xe2, 0x0100, }, | |
dfc1c08a | 100 | { 0xe3, 0x1000, }, |
89885558 ST |
101 | { 0x28, 0x1010, }, |
102 | { 0xb1, 0x000e, }, | |
103 | }; | |
104 | ||
105 | /* VSB SNR lookup table */ | |
106 | static struct vsb_snr_tab { | |
107 | u16 val; | |
108 | u16 data; | |
109 | } vsb_snr_tab[] = { | |
2300317f | 110 | { 924, 300, }, |
89885558 ST |
111 | { 923, 300, }, |
112 | { 918, 295, }, | |
113 | { 915, 290, }, | |
114 | { 911, 285, }, | |
115 | { 906, 280, }, | |
116 | { 901, 275, }, | |
117 | { 896, 270, }, | |
118 | { 891, 265, }, | |
119 | { 885, 260, }, | |
120 | { 879, 255, }, | |
121 | { 873, 250, }, | |
122 | { 864, 245, }, | |
123 | { 858, 240, }, | |
124 | { 850, 235, }, | |
125 | { 841, 230, }, | |
126 | { 832, 225, }, | |
127 | { 823, 220, }, | |
128 | { 812, 215, }, | |
129 | { 802, 210, }, | |
130 | { 788, 205, }, | |
131 | { 778, 200, }, | |
132 | { 767, 195, }, | |
133 | { 753, 190, }, | |
134 | { 740, 185, }, | |
135 | { 725, 180, }, | |
136 | { 707, 175, }, | |
137 | { 689, 170, }, | |
138 | { 671, 165, }, | |
139 | { 656, 160, }, | |
140 | { 637, 155, }, | |
141 | { 616, 150, }, | |
142 | { 542, 145, }, | |
143 | { 519, 140, }, | |
144 | { 507, 135, }, | |
145 | { 497, 130, }, | |
146 | { 492, 125, }, | |
147 | { 474, 120, }, | |
148 | { 300, 111, }, | |
149 | { 0, 0, }, | |
150 | }; | |
151 | ||
152 | /* QAM64 SNR lookup table */ | |
153 | static struct qam64_snr_tab { | |
154 | u16 val; | |
155 | u16 data; | |
156 | } qam64_snr_tab[] = { | |
2300317f | 157 | { 1, 0, }, |
89885558 ST |
158 | { 12, 300, }, |
159 | { 15, 290, }, | |
160 | { 18, 280, }, | |
161 | { 22, 270, }, | |
162 | { 23, 268, }, | |
163 | { 24, 266, }, | |
164 | { 25, 264, }, | |
165 | { 27, 262, }, | |
166 | { 28, 260, }, | |
167 | { 29, 258, }, | |
168 | { 30, 256, }, | |
169 | { 32, 254, }, | |
170 | { 33, 252, }, | |
171 | { 34, 250, }, | |
172 | { 35, 249, }, | |
173 | { 36, 248, }, | |
174 | { 37, 247, }, | |
175 | { 38, 246, }, | |
176 | { 39, 245, }, | |
177 | { 40, 244, }, | |
178 | { 41, 243, }, | |
179 | { 42, 241, }, | |
180 | { 43, 240, }, | |
181 | { 44, 239, }, | |
182 | { 45, 238, }, | |
183 | { 46, 237, }, | |
184 | { 47, 236, }, | |
185 | { 48, 235, }, | |
186 | { 49, 234, }, | |
187 | { 50, 233, }, | |
188 | { 51, 232, }, | |
189 | { 52, 231, }, | |
190 | { 53, 230, }, | |
191 | { 55, 229, }, | |
192 | { 56, 228, }, | |
193 | { 57, 227, }, | |
194 | { 58, 226, }, | |
195 | { 59, 225, }, | |
196 | { 60, 224, }, | |
197 | { 62, 223, }, | |
198 | { 63, 222, }, | |
199 | { 65, 221, }, | |
200 | { 66, 220, }, | |
201 | { 68, 219, }, | |
202 | { 69, 218, }, | |
203 | { 70, 217, }, | |
204 | { 72, 216, }, | |
205 | { 73, 215, }, | |
206 | { 75, 214, }, | |
207 | { 76, 213, }, | |
208 | { 78, 212, }, | |
209 | { 80, 211, }, | |
210 | { 81, 210, }, | |
211 | { 83, 209, }, | |
212 | { 84, 208, }, | |
213 | { 85, 207, }, | |
214 | { 87, 206, }, | |
215 | { 89, 205, }, | |
216 | { 91, 204, }, | |
217 | { 93, 203, }, | |
218 | { 95, 202, }, | |
219 | { 96, 201, }, | |
220 | { 104, 200, }, | |
2300317f | 221 | { 255, 0, }, |
89885558 ST |
222 | }; |
223 | ||
224 | /* QAM256 SNR lookup table */ | |
225 | static struct qam256_snr_tab { | |
226 | u16 val; | |
227 | u16 data; | |
228 | } qam256_snr_tab[] = { | |
2300317f | 229 | { 1, 0, }, |
89885558 ST |
230 | { 12, 400, }, |
231 | { 13, 390, }, | |
232 | { 15, 380, }, | |
233 | { 17, 360, }, | |
234 | { 19, 350, }, | |
235 | { 22, 348, }, | |
236 | { 23, 346, }, | |
237 | { 24, 344, }, | |
238 | { 25, 342, }, | |
239 | { 26, 340, }, | |
240 | { 27, 336, }, | |
241 | { 28, 334, }, | |
242 | { 29, 332, }, | |
243 | { 30, 330, }, | |
244 | { 31, 328, }, | |
245 | { 32, 326, }, | |
246 | { 33, 325, }, | |
247 | { 34, 322, }, | |
248 | { 35, 320, }, | |
249 | { 37, 318, }, | |
250 | { 39, 316, }, | |
251 | { 40, 314, }, | |
252 | { 41, 312, }, | |
253 | { 42, 310, }, | |
254 | { 43, 308, }, | |
255 | { 46, 306, }, | |
256 | { 47, 304, }, | |
257 | { 49, 302, }, | |
258 | { 51, 300, }, | |
259 | { 53, 298, }, | |
260 | { 54, 297, }, | |
261 | { 55, 296, }, | |
262 | { 56, 295, }, | |
263 | { 57, 294, }, | |
264 | { 59, 293, }, | |
265 | { 60, 292, }, | |
266 | { 61, 291, }, | |
267 | { 63, 290, }, | |
268 | { 64, 289, }, | |
269 | { 65, 288, }, | |
270 | { 66, 287, }, | |
271 | { 68, 286, }, | |
272 | { 69, 285, }, | |
273 | { 71, 284, }, | |
274 | { 72, 283, }, | |
275 | { 74, 282, }, | |
276 | { 75, 281, }, | |
277 | { 76, 280, }, | |
278 | { 77, 279, }, | |
279 | { 78, 278, }, | |
280 | { 81, 277, }, | |
281 | { 83, 276, }, | |
282 | { 84, 275, }, | |
283 | { 86, 274, }, | |
284 | { 87, 273, }, | |
285 | { 89, 272, }, | |
286 | { 90, 271, }, | |
287 | { 92, 270, }, | |
288 | { 93, 269, }, | |
289 | { 95, 268, }, | |
290 | { 96, 267, }, | |
291 | { 98, 266, }, | |
292 | { 100, 265, }, | |
293 | { 102, 264, }, | |
294 | { 104, 263, }, | |
295 | { 105, 262, }, | |
296 | { 106, 261, }, | |
297 | { 110, 260, }, | |
2300317f | 298 | { 255, 0, }, |
89885558 ST |
299 | }; |
300 | ||
301 | /* 8 bit registers, 16 bit values */ | |
302 | static int s5h1409_writereg(struct s5h1409_state* state, u8 reg, u16 data) | |
303 | { | |
304 | int ret; | |
305 | u8 buf [] = { reg, data >> 8, data & 0xff }; | |
306 | ||
3873dd04 MK |
307 | struct i2c_msg msg = { .addr = state->config->demod_address, |
308 | .flags = 0, .buf = buf, .len = 3 }; | |
89885558 ST |
309 | |
310 | ret = i2c_transfer(state->i2c, &msg, 1); | |
311 | ||
312 | if (ret != 1) | |
3873dd04 | 313 | printk("%s: writereg error (reg == 0x%02x, val == 0x%04x, " |
271ddbf7 | 314 | "ret == %i)\n", __func__, reg, data, ret); |
89885558 ST |
315 | |
316 | return (ret != 1) ? -1 : 0; | |
317 | } | |
318 | ||
319 | static u16 s5h1409_readreg(struct s5h1409_state* state, u8 reg) | |
320 | { | |
321 | int ret; | |
322 | u8 b0 [] = { reg }; | |
323 | u8 b1 [] = { 0, 0 }; | |
324 | ||
325 | struct i2c_msg msg [] = { | |
3873dd04 MK |
326 | { .addr = state->config->demod_address, .flags = 0, |
327 | .buf = b0, .len = 1 }, | |
328 | { .addr = state->config->demod_address, .flags = I2C_M_RD, | |
329 | .buf = b1, .len = 2 } }; | |
89885558 ST |
330 | |
331 | ret = i2c_transfer(state->i2c, msg, 2); | |
332 | ||
333 | if (ret != 2) | |
271ddbf7 | 334 | printk("%s: readreg error (ret == %i)\n", __func__, ret); |
89885558 ST |
335 | return (b1[0] << 8) | b1[1]; |
336 | } | |
337 | ||
338 | static int s5h1409_softreset(struct dvb_frontend* fe) | |
339 | { | |
340 | struct s5h1409_state* state = fe->demodulator_priv; | |
341 | ||
271ddbf7 | 342 | dprintk("%s()\n", __func__); |
89885558 ST |
343 | |
344 | s5h1409_writereg(state, 0xf5, 0); | |
345 | s5h1409_writereg(state, 0xf5, 1); | |
dd7d5013 ST |
346 | state->is_qam_locked = 0; |
347 | state->qam_state = 0; | |
89885558 ST |
348 | return 0; |
349 | } | |
350 | ||
2b03238a MK |
351 | #define S5H1409_VSB_IF_FREQ 5380 |
352 | #define S5H1409_QAM_IF_FREQ state->config->qam_if | |
353 | ||
89885558 ST |
354 | static int s5h1409_set_if_freq(struct dvb_frontend* fe, int KHz) |
355 | { | |
356 | struct s5h1409_state* state = fe->demodulator_priv; | |
89885558 | 357 | |
271ddbf7 | 358 | dprintk("%s(%d KHz)\n", __func__, KHz); |
89885558 | 359 | |
6b7daa88 MK |
360 | switch (KHz) { |
361 | case 4000: | |
dd7d5013 ST |
362 | s5h1409_writereg(state, 0x87, 0x014b); |
363 | s5h1409_writereg(state, 0x88, 0x0cb5); | |
364 | s5h1409_writereg(state, 0x89, 0x03e2); | |
6b7daa88 MK |
365 | break; |
366 | case 5380: | |
367 | case 44000: | |
368 | default: | |
369 | s5h1409_writereg(state, 0x87, 0x01be); | |
370 | s5h1409_writereg(state, 0x88, 0x0436); | |
371 | s5h1409_writereg(state, 0x89, 0x054d); | |
372 | break; | |
89885558 | 373 | } |
6b7daa88 | 374 | state->if_freq = KHz; |
89885558 | 375 | |
6b7daa88 | 376 | return 0; |
89885558 ST |
377 | } |
378 | ||
379 | static int s5h1409_set_spectralinversion(struct dvb_frontend* fe, int inverted) | |
380 | { | |
381 | struct s5h1409_state* state = fe->demodulator_priv; | |
382 | ||
271ddbf7 | 383 | dprintk("%s(%d)\n", __func__, inverted); |
89885558 ST |
384 | |
385 | if(inverted == 1) | |
386 | return s5h1409_writereg(state, 0x1b, 0x1101); /* Inverted */ | |
387 | else | |
388 | return s5h1409_writereg(state, 0x1b, 0x0110); /* Normal */ | |
389 | } | |
390 | ||
3873dd04 MK |
391 | static int s5h1409_enable_modulation(struct dvb_frontend* fe, |
392 | fe_modulation_t m) | |
89885558 ST |
393 | { |
394 | struct s5h1409_state* state = fe->demodulator_priv; | |
395 | ||
271ddbf7 | 396 | dprintk("%s(0x%08x)\n", __func__, m); |
89885558 ST |
397 | |
398 | switch(m) { | |
399 | case VSB_8: | |
271ddbf7 | 400 | dprintk("%s() VSB_8\n", __func__); |
2b03238a MK |
401 | if (state->if_freq != S5H1409_VSB_IF_FREQ) |
402 | s5h1409_set_if_freq(fe, S5H1409_VSB_IF_FREQ); | |
89885558 ST |
403 | s5h1409_writereg(state, 0xf4, 0); |
404 | break; | |
405 | case QAM_64: | |
89885558 | 406 | case QAM_256: |
4fc85c74 | 407 | case QAM_AUTO: |
271ddbf7 | 408 | dprintk("%s() QAM_AUTO (64/256)\n", __func__); |
2b03238a MK |
409 | if (state->if_freq != S5H1409_QAM_IF_FREQ) |
410 | s5h1409_set_if_freq(fe, S5H1409_QAM_IF_FREQ); | |
89885558 | 411 | s5h1409_writereg(state, 0xf4, 1); |
dd7d5013 | 412 | s5h1409_writereg(state, 0x85, 0x110); |
89885558 ST |
413 | break; |
414 | default: | |
271ddbf7 | 415 | dprintk("%s() Invalid modulation\n", __func__); |
89885558 ST |
416 | return -EINVAL; |
417 | } | |
418 | ||
419 | state->current_modulation = m; | |
420 | s5h1409_softreset(fe); | |
421 | ||
422 | return 0; | |
423 | } | |
424 | ||
425 | static int s5h1409_i2c_gate_ctrl(struct dvb_frontend* fe, int enable) | |
426 | { | |
427 | struct s5h1409_state* state = fe->demodulator_priv; | |
428 | ||
271ddbf7 | 429 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
430 | |
431 | if (enable) | |
432 | return s5h1409_writereg(state, 0xf3, 1); | |
433 | else | |
434 | return s5h1409_writereg(state, 0xf3, 0); | |
435 | } | |
436 | ||
437 | static int s5h1409_set_gpio(struct dvb_frontend* fe, int enable) | |
438 | { | |
439 | struct s5h1409_state* state = fe->demodulator_priv; | |
440 | ||
271ddbf7 | 441 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
442 | |
443 | if (enable) | |
dfc1c08a ST |
444 | return s5h1409_writereg(state, 0xe3, |
445 | s5h1409_readreg(state, 0xe3) | 0x1100); | |
89885558 | 446 | else |
dfc1c08a | 447 | return s5h1409_writereg(state, 0xe3, |
8e08af3c | 448 | s5h1409_readreg(state, 0xe3) & 0xfeff); |
89885558 ST |
449 | } |
450 | ||
451 | static int s5h1409_sleep(struct dvb_frontend* fe, int enable) | |
452 | { | |
453 | struct s5h1409_state* state = fe->demodulator_priv; | |
454 | ||
271ddbf7 | 455 | dprintk("%s(%d)\n", __func__, enable); |
89885558 ST |
456 | |
457 | return s5h1409_writereg(state, 0xf2, enable); | |
458 | } | |
459 | ||
460 | static int s5h1409_register_reset(struct dvb_frontend* fe) | |
461 | { | |
462 | struct s5h1409_state* state = fe->demodulator_priv; | |
463 | ||
271ddbf7 | 464 | dprintk("%s()\n", __func__); |
89885558 ST |
465 | |
466 | return s5h1409_writereg(state, 0xfa, 0); | |
467 | } | |
468 | ||
dd7d5013 ST |
469 | static void s5h1409_set_qam_amhum_mode(struct dvb_frontend *fe) |
470 | { | |
471 | struct s5h1409_state *state = fe->demodulator_priv; | |
472 | u16 reg; | |
473 | ||
474 | if (state->is_qam_locked) | |
475 | return; | |
476 | ||
477 | /* QAM EQ lock check */ | |
478 | reg = s5h1409_readreg(state, 0xf0); | |
479 | ||
480 | if ((reg >> 13) & 0x1) { | |
481 | ||
482 | state->is_qam_locked = 1; | |
483 | reg &= 0xff; | |
484 | ||
485 | s5h1409_writereg(state, 0x96, 0x00c); | |
486 | if ((reg < 0x38) || (reg > 0x68) ) { | |
487 | s5h1409_writereg(state, 0x93, 0x3332); | |
488 | s5h1409_writereg(state, 0x9e, 0x2c37); | |
489 | } else { | |
490 | s5h1409_writereg(state, 0x93, 0x3130); | |
491 | s5h1409_writereg(state, 0x9e, 0x2836); | |
492 | } | |
493 | ||
494 | } else { | |
495 | s5h1409_writereg(state, 0x96, 0x0008); | |
496 | s5h1409_writereg(state, 0x93, 0x3332); | |
497 | s5h1409_writereg(state, 0x9e, 0x2c37); | |
498 | } | |
499 | } | |
500 | ||
501 | static void s5h1409_set_qam_interleave_mode(struct dvb_frontend *fe) | |
502 | { | |
503 | struct s5h1409_state *state = fe->demodulator_priv; | |
504 | u16 reg, reg1, reg2; | |
505 | ||
506 | reg = s5h1409_readreg(state, 0xf1); | |
507 | ||
508 | /* Master lock */ | |
509 | if ((reg >> 15) & 0x1) { | |
510 | if (state->qam_state != 2) { | |
511 | state->qam_state = 2; | |
512 | reg1 = s5h1409_readreg(state, 0xb2); | |
513 | reg2 = s5h1409_readreg(state, 0xad); | |
514 | ||
515 | s5h1409_writereg(state, 0x96, 0x20); | |
516 | s5h1409_writereg(state, 0xad, | |
517 | ( ((reg1 & 0xf000) >> 4) | (reg2 & 0xf0ff)) ); | |
dfc1c08a ST |
518 | s5h1409_writereg(state, 0xab, |
519 | s5h1409_readreg(state, 0xab) & 0xeffe); | |
dd7d5013 ST |
520 | } |
521 | } else { | |
522 | if (state->qam_state != 1) { | |
523 | state->qam_state = 1; | |
524 | s5h1409_writereg(state, 0x96, 0x08); | |
dfc1c08a ST |
525 | s5h1409_writereg(state, 0xab, |
526 | s5h1409_readreg(state, 0xab) | 0x1001); | |
dd7d5013 ST |
527 | } |
528 | } | |
529 | } | |
530 | ||
89885558 | 531 | /* Talk to the demod, set the FEC, GUARD, QAM settings etc */ |
3873dd04 MK |
532 | static int s5h1409_set_frontend (struct dvb_frontend* fe, |
533 | struct dvb_frontend_parameters *p) | |
89885558 ST |
534 | { |
535 | struct s5h1409_state* state = fe->demodulator_priv; | |
536 | ||
271ddbf7 | 537 | dprintk("%s(frequency=%d)\n", __func__, p->frequency); |
89885558 ST |
538 | |
539 | s5h1409_softreset(fe); | |
540 | ||
541 | state->current_frequency = p->frequency; | |
542 | ||
543 | s5h1409_enable_modulation(fe, p->u.vsb.modulation); | |
544 | ||
dd7d5013 ST |
545 | /* Allow the demod to settle */ |
546 | msleep(100); | |
547 | ||
89885558 ST |
548 | if (fe->ops.tuner_ops.set_params) { |
549 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 1); | |
550 | fe->ops.tuner_ops.set_params(fe, p); | |
551 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); | |
552 | } | |
553 | ||
dd7d5013 ST |
554 | /* Optimize the demod for QAM */ |
555 | if (p->u.vsb.modulation != VSB_8) { | |
556 | s5h1409_set_qam_amhum_mode(fe); | |
557 | s5h1409_set_qam_interleave_mode(fe); | |
558 | } | |
559 | ||
89885558 ST |
560 | return 0; |
561 | } | |
562 | ||
dfc1c08a ST |
563 | static int s5h1409_set_mpeg_timing(struct dvb_frontend *fe, int mode) |
564 | { | |
565 | struct s5h1409_state *state = fe->demodulator_priv; | |
566 | u16 val; | |
567 | ||
271ddbf7 | 568 | dprintk("%s(%d)\n", __func__, mode); |
dfc1c08a ST |
569 | |
570 | val = s5h1409_readreg(state, 0xac) & 0xcfff; | |
571 | switch (mode) { | |
572 | case S5H1409_MPEGTIMING_CONTINOUS_INVERTING_CLOCK: | |
573 | val |= 0x0000; | |
574 | break; | |
575 | case S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK: | |
271ddbf7 | 576 | dprintk("%s(%d) Mode1 or Defaulting\n", __func__, mode); |
dfc1c08a ST |
577 | val |= 0x1000; |
578 | break; | |
579 | case S5H1409_MPEGTIMING_NONCONTINOUS_INVERTING_CLOCK: | |
580 | val |= 0x2000; | |
581 | break; | |
582 | case S5H1409_MPEGTIMING_NONCONTINOUS_NONINVERTING_CLOCK: | |
583 | val |= 0x3000; | |
584 | break; | |
585 | default: | |
586 | return -EINVAL; | |
587 | } | |
588 | ||
589 | /* Configure MPEG Signal Timing charactistics */ | |
590 | return s5h1409_writereg(state, 0xac, val); | |
591 | } | |
592 | ||
89885558 ST |
593 | /* Reset the demod hardware and reset all of the configuration registers |
594 | to a default state. */ | |
595 | static int s5h1409_init (struct dvb_frontend* fe) | |
596 | { | |
597 | int i; | |
598 | ||
599 | struct s5h1409_state* state = fe->demodulator_priv; | |
271ddbf7 | 600 | dprintk("%s()\n", __func__); |
89885558 ST |
601 | |
602 | s5h1409_sleep(fe, 0); | |
603 | s5h1409_register_reset(fe); | |
604 | ||
a45c9275 | 605 | for (i=0; i < ARRAY_SIZE(init_tab); i++) |
89885558 ST |
606 | s5h1409_writereg(state, init_tab[i].reg, init_tab[i].data); |
607 | ||
608 | /* The datasheet says that after initialisation, VSB is default */ | |
609 | state->current_modulation = VSB_8; | |
610 | ||
611 | if (state->config->output_mode == S5H1409_SERIAL_OUTPUT) | |
dfc1c08a ST |
612 | s5h1409_writereg(state, 0xab, |
613 | s5h1409_readreg(state, 0xab) | 0x100); /* Serial */ | |
89885558 | 614 | else |
dfc1c08a ST |
615 | s5h1409_writereg(state, 0xab, |
616 | s5h1409_readreg(state, 0xab) & 0xfeff); /* Parallel */ | |
89885558 ST |
617 | |
618 | s5h1409_set_spectralinversion(fe, state->config->inversion); | |
2b03238a | 619 | s5h1409_set_if_freq(fe, state->if_freq); |
89885558 | 620 | s5h1409_set_gpio(fe, state->config->gpio); |
dfc1c08a | 621 | s5h1409_set_mpeg_timing(fe, state->config->mpeg_timing); |
89885558 ST |
622 | s5h1409_softreset(fe); |
623 | ||
dd7d5013 ST |
624 | /* Note: Leaving the I2C gate closed. */ |
625 | s5h1409_i2c_gate_ctrl(fe, 0); | |
89885558 ST |
626 | |
627 | return 0; | |
628 | } | |
629 | ||
630 | static int s5h1409_read_status(struct dvb_frontend* fe, fe_status_t* status) | |
631 | { | |
632 | struct s5h1409_state* state = fe->demodulator_priv; | |
633 | u16 reg; | |
634 | u32 tuner_status = 0; | |
635 | ||
636 | *status = 0; | |
637 | ||
638 | /* Get the demodulator status */ | |
639 | reg = s5h1409_readreg(state, 0xf1); | |
640 | if(reg & 0x1000) | |
641 | *status |= FE_HAS_VITERBI; | |
642 | if(reg & 0x8000) | |
643 | *status |= FE_HAS_LOCK | FE_HAS_SYNC; | |
644 | ||
645 | switch(state->config->status_mode) { | |
646 | case S5H1409_DEMODLOCKING: | |
647 | if (*status & FE_HAS_VITERBI) | |
648 | *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL; | |
649 | break; | |
650 | case S5H1409_TUNERLOCKING: | |
651 | /* Get the tuner status */ | |
652 | if (fe->ops.tuner_ops.get_status) { | |
3873dd04 MK |
653 | if (fe->ops.i2c_gate_ctrl) |
654 | fe->ops.i2c_gate_ctrl(fe, 1); | |
89885558 ST |
655 | |
656 | fe->ops.tuner_ops.get_status(fe, &tuner_status); | |
657 | ||
3873dd04 MK |
658 | if (fe->ops.i2c_gate_ctrl) |
659 | fe->ops.i2c_gate_ctrl(fe, 0); | |
89885558 ST |
660 | } |
661 | if (tuner_status) | |
662 | *status |= FE_HAS_CARRIER | FE_HAS_SIGNAL; | |
663 | break; | |
664 | } | |
665 | ||
271ddbf7 | 666 | dprintk("%s() status 0x%08x\n", __func__, *status); |
89885558 ST |
667 | |
668 | return 0; | |
669 | } | |
670 | ||
671 | static int s5h1409_qam256_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v) | |
672 | { | |
673 | int i, ret = -EINVAL; | |
271ddbf7 | 674 | dprintk("%s()\n", __func__); |
89885558 | 675 | |
a45c9275 | 676 | for (i=0; i < ARRAY_SIZE(qam256_snr_tab); i++) { |
89885558 ST |
677 | if (v < qam256_snr_tab[i].val) { |
678 | *snr = qam256_snr_tab[i].data; | |
679 | ret = 0; | |
680 | break; | |
681 | } | |
682 | } | |
683 | return ret; | |
684 | } | |
685 | ||
686 | static int s5h1409_qam64_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v) | |
687 | { | |
688 | int i, ret = -EINVAL; | |
271ddbf7 | 689 | dprintk("%s()\n", __func__); |
89885558 | 690 | |
a45c9275 | 691 | for (i=0; i < ARRAY_SIZE(qam64_snr_tab); i++) { |
89885558 ST |
692 | if (v < qam64_snr_tab[i].val) { |
693 | *snr = qam64_snr_tab[i].data; | |
694 | ret = 0; | |
695 | break; | |
696 | } | |
697 | } | |
698 | return ret; | |
699 | } | |
700 | ||
701 | static int s5h1409_vsb_lookup_snr(struct dvb_frontend* fe, u16* snr, u16 v) | |
702 | { | |
703 | int i, ret = -EINVAL; | |
271ddbf7 | 704 | dprintk("%s()\n", __func__); |
89885558 | 705 | |
a45c9275 | 706 | for (i=0; i < ARRAY_SIZE(vsb_snr_tab); i++) { |
89885558 ST |
707 | if (v > vsb_snr_tab[i].val) { |
708 | *snr = vsb_snr_tab[i].data; | |
709 | ret = 0; | |
710 | break; | |
711 | } | |
712 | } | |
271ddbf7 | 713 | dprintk("%s() snr=%d\n", __func__, *snr); |
89885558 ST |
714 | return ret; |
715 | } | |
716 | ||
717 | static int s5h1409_read_snr(struct dvb_frontend* fe, u16* snr) | |
718 | { | |
719 | struct s5h1409_state* state = fe->demodulator_priv; | |
720 | u16 reg; | |
271ddbf7 | 721 | dprintk("%s()\n", __func__); |
89885558 | 722 | |
89885558 ST |
723 | switch(state->current_modulation) { |
724 | case QAM_64: | |
2300317f | 725 | reg = s5h1409_readreg(state, 0xf0) & 0xff; |
89885558 ST |
726 | return s5h1409_qam64_lookup_snr(fe, snr, reg); |
727 | case QAM_256: | |
2300317f | 728 | reg = s5h1409_readreg(state, 0xf0) & 0xff; |
89885558 ST |
729 | return s5h1409_qam256_lookup_snr(fe, snr, reg); |
730 | case VSB_8: | |
2300317f | 731 | reg = s5h1409_readreg(state, 0xf1) & 0x3ff; |
89885558 ST |
732 | return s5h1409_vsb_lookup_snr(fe, snr, reg); |
733 | default: | |
734 | break; | |
735 | } | |
736 | ||
737 | return -EINVAL; | |
738 | } | |
739 | ||
3873dd04 MK |
740 | static int s5h1409_read_signal_strength(struct dvb_frontend* fe, |
741 | u16* signal_strength) | |
89885558 ST |
742 | { |
743 | return s5h1409_read_snr(fe, signal_strength); | |
744 | } | |
745 | ||
746 | static int s5h1409_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) | |
747 | { | |
748 | struct s5h1409_state* state = fe->demodulator_priv; | |
749 | ||
750 | *ucblocks = s5h1409_readreg(state, 0xb5); | |
751 | ||
752 | return 0; | |
753 | } | |
754 | ||
755 | static int s5h1409_read_ber(struct dvb_frontend* fe, u32* ber) | |
756 | { | |
757 | return s5h1409_read_ucblocks(fe, ber); | |
758 | } | |
759 | ||
3873dd04 MK |
760 | static int s5h1409_get_frontend(struct dvb_frontend* fe, |
761 | struct dvb_frontend_parameters *p) | |
89885558 ST |
762 | { |
763 | struct s5h1409_state* state = fe->demodulator_priv; | |
764 | ||
765 | p->frequency = state->current_frequency; | |
766 | p->u.vsb.modulation = state->current_modulation; | |
767 | ||
768 | return 0; | |
769 | } | |
770 | ||
3873dd04 MK |
771 | static int s5h1409_get_tune_settings(struct dvb_frontend* fe, |
772 | struct dvb_frontend_tune_settings *tune) | |
89885558 ST |
773 | { |
774 | tune->min_delay_ms = 1000; | |
775 | return 0; | |
776 | } | |
777 | ||
778 | static void s5h1409_release(struct dvb_frontend* fe) | |
779 | { | |
780 | struct s5h1409_state* state = fe->demodulator_priv; | |
781 | kfree(state); | |
782 | } | |
783 | ||
784 | static struct dvb_frontend_ops s5h1409_ops; | |
785 | ||
786 | struct dvb_frontend* s5h1409_attach(const struct s5h1409_config* config, | |
787 | struct i2c_adapter* i2c) | |
788 | { | |
789 | struct s5h1409_state* state = NULL; | |
a57ed8a1 | 790 | u16 reg; |
89885558 ST |
791 | |
792 | /* allocate memory for the internal state */ | |
793 | state = kmalloc(sizeof(struct s5h1409_state), GFP_KERNEL); | |
794 | if (state == NULL) | |
795 | goto error; | |
796 | ||
797 | /* setup the state */ | |
798 | state->config = config; | |
799 | state->i2c = i2c; | |
800 | state->current_modulation = 0; | |
2b03238a | 801 | state->if_freq = S5H1409_VSB_IF_FREQ; |
89885558 ST |
802 | |
803 | /* check if the demod exists */ | |
a57ed8a1 ST |
804 | reg = s5h1409_readreg(state, 0x04); |
805 | if ((reg != 0x0066) && (reg != 0x007f)) | |
89885558 ST |
806 | goto error; |
807 | ||
808 | /* create dvb_frontend */ | |
3873dd04 MK |
809 | memcpy(&state->frontend.ops, &s5h1409_ops, |
810 | sizeof(struct dvb_frontend_ops)); | |
89885558 ST |
811 | state->frontend.demodulator_priv = state; |
812 | ||
a57ed8a1 ST |
813 | if (s5h1409_init(&state->frontend) != 0) { |
814 | printk(KERN_ERR "%s: Failed to initialize correctly\n", | |
271ddbf7 | 815 | __func__); |
a57ed8a1 ST |
816 | goto error; |
817 | } | |
818 | ||
89885558 | 819 | /* Note: Leaving the I2C gate open here. */ |
a57ed8a1 | 820 | s5h1409_i2c_gate_ctrl(&state->frontend, 1); |
89885558 ST |
821 | |
822 | return &state->frontend; | |
823 | ||
824 | error: | |
825 | kfree(state); | |
826 | return NULL; | |
827 | } | |
828 | ||
829 | static struct dvb_frontend_ops s5h1409_ops = { | |
830 | ||
831 | .info = { | |
832 | .name = "Samsung S5H1409 QAM/8VSB Frontend", | |
833 | .type = FE_ATSC, | |
834 | .frequency_min = 54000000, | |
835 | .frequency_max = 858000000, | |
836 | .frequency_stepsize = 62500, | |
837 | .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB | |
838 | }, | |
839 | ||
840 | .init = s5h1409_init, | |
841 | .i2c_gate_ctrl = s5h1409_i2c_gate_ctrl, | |
842 | .set_frontend = s5h1409_set_frontend, | |
843 | .get_frontend = s5h1409_get_frontend, | |
844 | .get_tune_settings = s5h1409_get_tune_settings, | |
845 | .read_status = s5h1409_read_status, | |
846 | .read_ber = s5h1409_read_ber, | |
847 | .read_signal_strength = s5h1409_read_signal_strength, | |
848 | .read_snr = s5h1409_read_snr, | |
849 | .read_ucblocks = s5h1409_read_ucblocks, | |
850 | .release = s5h1409_release, | |
851 | }; | |
852 | ||
853 | module_param(debug, int, 0644); | |
854 | MODULE_PARM_DESC(debug, "Enable verbose debug messages"); | |
855 | ||
856 | MODULE_DESCRIPTION("Samsung S5H1409 QAM-B/ATSC Demodulator driver"); | |
857 | MODULE_AUTHOR("Steven Toth"); | |
858 | MODULE_LICENSE("GPL"); | |
859 | ||
860 | EXPORT_SYMBOL(s5h1409_attach); | |
3873dd04 MK |
861 | |
862 | /* | |
863 | * Local variables: | |
864 | * c-basic-offset: 8 | |
865 | */ |