projects / mirror_ubuntu-hirsute-kernel.git / blame
| Commit | Line | Data |
|---|---|---|
| 873c8c25 MA |
1 | /* |
| 2 | Mantis VP-1041 driver | |
| 3 | ||
| 4 | Copyright (C) Manu Abraham (abraham.manu@gmail.com) | |
| 5 | ||
| 6 | This program is free software; you can redistribute it and/or modify | |
| 7 | it under the terms of the GNU General Public License as published by | |
| 8 | the Free Software Foundation; either version 2 of the License, or | |
| 9 | (at your option) any later version. | |
| 10 | ||
| 11 | This program is distributed in the hope that it will be useful, | |
| 12 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 14 | GNU General Public License for more details. | |
| 15 | ||
| 16 | You should have received a copy of the GNU General Public License | |
| 17 | along with this program; if not, write to the Free Software | |
| 18 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
| 19 | */ | |
| 20 | ||
| 21 | #include "mantis_common.h" | |
| 22 | #include "mantis_vp1041.h" | |
| 23 | #include "stb0899_reg.h" | |
| 24 | #include "stb0899_cfg.h" | |
| 25 | #include "stb6100_cfg.h" | |
| 26 | ||
| 27 | #define MANTIS_MODEL_NAME "VP-1041" | |
| 28 | #define MANTIS_DEV_TYPE "DSS/DVB-S/DVB-S2" | |
| 29 | ||
| 30 | struct mantis_hwconfig vp1041_mantis_config = { | |
| 31 | .model_name = MANTIS_MODEL_NAME, | |
| 32 | .dev_type = MANTIS_DEV_TYPE, | |
| 33 | .ts_size = MANTIS_TS_188, | |
| 34 | }; | |
| 35 | ||
| 36 | static const struct stb0899_s1_reg vp1041_stb0899_s1_init_1[] = { | |
| 37 | ||
| 38 | // 0x0000000b , /* SYSREG */ | |
| 39 | { STB0899_DEV_ID , 0x30 }, | |
| 40 | { STB0899_DISCNTRL1 , 0x32 }, | |
| 41 | { STB0899_DISCNTRL2 , 0x80 }, | |
| 42 | { STB0899_DISRX_ST0 , 0x04 }, | |
| 43 | { STB0899_DISRX_ST1 , 0x00 }, | |
| 44 | { STB0899_DISPARITY , 0x00 }, | |
| 45 | { STB0899_DISFIFO , 0x00 }, | |
| 46 | { STB0899_DISSTATUS , 0x20 }, | |
| 47 | { STB0899_DISF22 , 0x99 }, | |
| 48 | { STB0899_DISF22RX , 0xa8 }, | |
| 49 | //SYSREG ? | |
| 50 | { STB0899_ACRPRESC , 0x11 }, | |
| 51 | { STB0899_ACRDIV1 , 0x0a }, | |
| 52 | { STB0899_ACRDIV2 , 0x05 }, | |
| 53 | { STB0899_DACR1 , 0x00 }, | |
| 54 | { STB0899_DACR2 , 0x00 }, | |
| 55 | { STB0899_OUTCFG , 0x00 }, | |
| 56 | { STB0899_MODECFG , 0x00 }, | |
| 57 | { STB0899_IRQSTATUS_3 , 0xfe }, | |
| 58 | { STB0899_IRQSTATUS_2 , 0x03 }, | |
| 59 | { STB0899_IRQSTATUS_1 , 0x7c }, | |
| 60 | { STB0899_IRQSTATUS_0 , 0xf4 }, | |
| 61 | { STB0899_IRQMSK_3 , 0xf3 }, | |
| 62 | { STB0899_IRQMSK_2 , 0xfc }, | |
| 63 | { STB0899_IRQMSK_1 , 0xff }, | |
| 64 | { STB0899_IRQMSK_0 , 0xff }, | |
| 65 | { STB0899_IRQCFG , 0x00 }, | |
| 66 | { STB0899_I2CCFG , 0x88 }, | |
| 1159531a | 67 | { STB0899_I2CRPT , 0x58 }, |
| 873c8c25 MA |
68 | { STB0899_IOPVALUE5 , 0x00 }, |
| 69 | { STB0899_IOPVALUE4 , 0x33 }, | |
| 70 | { STB0899_IOPVALUE3 , 0x6d }, | |
| 71 | { STB0899_IOPVALUE2 , 0x90 }, | |
| 72 | { STB0899_IOPVALUE1 , 0x60 }, | |
| 73 | { STB0899_IOPVALUE0 , 0x00 }, | |
| 74 | { STB0899_GPIO00CFG , 0x82 }, | |
| 75 | { STB0899_GPIO01CFG , 0x82 }, | |
| 76 | { STB0899_GPIO02CFG , 0x82 }, | |
| 77 | { STB0899_GPIO03CFG , 0x82 }, | |
| 78 | { STB0899_GPIO04CFG , 0x82 }, | |
| 79 | { STB0899_GPIO05CFG , 0x82 }, | |
| 80 | { STB0899_GPIO06CFG , 0x82 }, | |
| 81 | { STB0899_GPIO07CFG , 0x82 }, | |
| 82 | { STB0899_GPIO08CFG , 0x82 }, | |
| 83 | { STB0899_GPIO09CFG , 0x82 }, | |
| 84 | { STB0899_GPIO10CFG , 0x82 }, | |
| 85 | { STB0899_GPIO11CFG , 0x82 }, | |
| 86 | { STB0899_GPIO12CFG , 0x82 }, | |
| 87 | { STB0899_GPIO13CFG , 0x82 }, | |
| 88 | { STB0899_GPIO14CFG , 0x82 }, | |
| 89 | { STB0899_GPIO15CFG , 0x82 }, | |
| 90 | { STB0899_GPIO16CFG , 0x82 }, | |
| 91 | { STB0899_GPIO17CFG , 0x82 }, | |
| 92 | { STB0899_GPIO18CFG , 0x82 }, | |
| 93 | { STB0899_GPIO19CFG , 0x82 }, | |
| 94 | { STB0899_GPIO20CFG , 0x82 }, | |
| 95 | { STB0899_SDATCFG , 0xb8 }, | |
| 96 | { STB0899_SCLTCFG , 0xba }, | |
| 97 | { STB0899_AGCRFCFG , 0x1c }, /* 0x11 */ | |
| 98 | { STB0899_GPIO22 , 0x82 }, /* AGCBB2CFG */ | |
| 99 | { STB0899_GPIO21 , 0x91 }, /* AGCBB1CFG */ | |
| 100 | { STB0899_DIRCLKCFG , 0x82 }, | |
| 101 | { STB0899_CLKOUT27CFG , 0x7e }, | |
| 102 | { STB0899_STDBYCFG , 0x82 }, | |
| 103 | { STB0899_CS0CFG , 0x82 }, | |
| 104 | { STB0899_CS1CFG , 0x82 }, | |
| 105 | { STB0899_DISEQCOCFG , 0x20 }, | |
| 106 | { STB0899_GPIO32CFG , 0x82 }, | |
| 107 | { STB0899_GPIO33CFG , 0x82 }, | |
| 108 | { STB0899_GPIO34CFG , 0x82 }, | |
| 109 | { STB0899_GPIO35CFG , 0x82 }, | |
| 110 | { STB0899_GPIO36CFG , 0x82 }, | |
| 111 | { STB0899_GPIO37CFG , 0x82 }, | |
| 112 | { STB0899_GPIO38CFG , 0x82 }, | |
| 113 | { STB0899_GPIO39CFG , 0x82 }, | |
| 114 | { STB0899_NCOARSE , 0x17 }, /* 0x15 = 27 Mhz Clock, F/3 = 198MHz, F/6 = 99MHz */ | |
| 115 | { STB0899_SYNTCTRL , 0x02 }, /* 0x00 = CLK from CLKI, 0x02 = CLK from XTALI */ | |
| 116 | { STB0899_FILTCTRL , 0x00 }, | |
| 117 | { STB0899_SYSCTRL , 0x01 }, | |
| 118 | { STB0899_STOPCLK1 , 0x20 }, | |
| 119 | { STB0899_STOPCLK2 , 0x00 }, | |
| 120 | { STB0899_INTBUFSTATUS , 0x00 }, | |
| 121 | { STB0899_INTBUFCTRL , 0x0a }, | |
| 122 | { 0xffff , 0xff }, | |
| 123 | }; | |
| 124 | ||
| 125 | static const struct stb0899_s1_reg vp1041_stb0899_s1_init_3[] = { | |
| 126 | { STB0899_DEMOD , 0x00 }, | |
| 127 | { STB0899_RCOMPC , 0xc9 }, | |
| 0131258b | 128 | { STB0899_AGC1CN , 0x01 }, |
| 873c8c25 | 129 | { STB0899_AGC1REF , 0x10 }, |
| 0131258b | 130 | { STB0899_RTC , 0x23 }, |
| 873c8c25 MA |
131 | { STB0899_TMGCFG , 0x4e }, |
| 132 | { STB0899_AGC2REF , 0x34 }, | |
| 133 | { STB0899_TLSR , 0x84 }, | |
| 0131258b | 134 | { STB0899_CFD , 0xf7 }, |
| 873c8c25 MA |
135 | { STB0899_ACLC , 0x87 }, |
| 136 | { STB0899_BCLC , 0x94 }, | |
| 137 | { STB0899_EQON , 0x41 }, | |
| 0131258b MA |
138 | { STB0899_LDT , 0xf1 }, |
| 139 | { STB0899_LDT2 , 0xe3 }, | |
| 873c8c25 MA |
140 | { STB0899_EQUALREF , 0xb4 }, |
| 141 | { STB0899_TMGRAMP , 0x10 }, | |
| 142 | { STB0899_TMGTHD , 0x30 }, | |
| 0131258b MA |
143 | { STB0899_IDCCOMP , 0xfd }, |
| 144 | { STB0899_QDCCOMP , 0xff }, | |
| 145 | { STB0899_POWERI , 0x0c }, | |
| 146 | { STB0899_POWERQ , 0x0f }, | |
| 147 | { STB0899_RCOMP , 0x6c }, | |
| 873c8c25 | 148 | { STB0899_AGCIQIN , 0x80 }, |
| 0131258b MA |
149 | { STB0899_AGC2I1 , 0x06 }, |
| 150 | { STB0899_AGC2I2 , 0x00 }, | |
| 151 | { STB0899_TLIR , 0x30 }, | |
| 152 | { STB0899_RTF , 0x7f }, | |
| 873c8c25 | 153 | { STB0899_DSTATUS , 0x00 }, |
| 0131258b MA |
154 | { STB0899_LDI , 0xbc }, |
| 155 | { STB0899_CFRM , 0xea }, | |
| 156 | { STB0899_CFRL , 0x31 }, | |
| 157 | { STB0899_NIRM , 0x2b }, | |
| 158 | { STB0899_NIRL , 0x80 }, | |
| 159 | { STB0899_ISYMB , 0x1d }, | |
| 160 | { STB0899_QSYMB , 0xa6 }, | |
| 873c8c25 MA |
161 | { STB0899_SFRH , 0x2f }, |
| 162 | { STB0899_SFRM , 0x68 }, | |
| 163 | { STB0899_SFRL , 0x40 }, | |
| 164 | { STB0899_SFRUPH , 0x2f }, | |
| 165 | { STB0899_SFRUPM , 0x68 }, | |
| 166 | { STB0899_SFRUPL , 0x40 }, | |
| 0131258b MA |
167 | { STB0899_EQUAI1 , 0x02 }, |
| 168 | { STB0899_EQUAQ1 , 0xff }, | |
| 169 | { STB0899_EQUAI2 , 0x04 }, | |
| 170 | { STB0899_EQUAQ2 , 0x05 }, | |
| 171 | { STB0899_EQUAI3 , 0x02 }, | |
| 172 | { STB0899_EQUAQ3 , 0xfd }, | |
| 173 | { STB0899_EQUAI4 , 0x03 }, | |
| 174 | { STB0899_EQUAQ4 , 0x07 }, | |
| 175 | { STB0899_EQUAI5 , 0x08 }, | |
| 176 | { STB0899_EQUAQ5 , 0xf5 }, | |
| 873c8c25 MA |
177 | { STB0899_DSTATUS2 , 0x00 }, |
| 178 | { STB0899_VSTATUS , 0x00 }, | |
| 0131258b | 179 | { STB0899_VERROR , 0x86 }, |
| 873c8c25 MA |
180 | { STB0899_IQSWAP , 0x2a }, |
| 181 | { STB0899_ECNT1M , 0x00 }, | |
| 182 | { STB0899_ECNT1L , 0x00 }, | |
| 183 | { STB0899_ECNT2M , 0x00 }, | |
| 184 | { STB0899_ECNT2L , 0x00 }, | |
| 0131258b MA |
185 | { STB0899_ECNT3M , 0x0a }, |
| 186 | { STB0899_ECNT3L , 0xad }, | |
| 873c8c25 MA |
187 | { STB0899_FECAUTO1 , 0x06 }, |
| 188 | { STB0899_FECM , 0x01 }, | |
| 0131258b MA |
189 | { STB0899_VTH12 , 0xb0 }, |
| 190 | { STB0899_VTH23 , 0x7a }, | |
| 191 | { STB0899_VTH34 , 0x58 }, | |
| 192 | { STB0899_VTH56 , 0x38 }, | |
| 193 | { STB0899_VTH67 , 0x34 }, | |
| 194 | { STB0899_VTH78 , 0x24 }, | |
| 873c8c25 MA |
195 | { STB0899_PRVIT , 0xff }, |
| 196 | { STB0899_VITSYNC , 0x19 }, | |
| 197 | { STB0899_RSULC , 0xb1 }, /* DVB = 0xb1, DSS = 0xa1 */ | |
| 198 | { STB0899_TSULC , 0x42 }, | |
| 0131258b | 199 | { STB0899_RSLLC , 0x41 }, |
| 873c8c25 MA |
200 | { STB0899_TSLPL , 0x12 }, |
| 201 | { STB0899_TSCFGH , 0x0c }, | |
| 202 | { STB0899_TSCFGM , 0x00 }, | |
| 0131258b MA |
203 | { STB0899_TSCFGL , 0x00 }, |
| 204 | { STB0899_TSOUT , 0x69 }, /* 0x0d for CAM */ | |
| 873c8c25 MA |
205 | { STB0899_RSSYNCDEL , 0x00 }, |
| 206 | { STB0899_TSINHDELH , 0x02 }, | |
| 207 | { STB0899_TSINHDELM , 0x00 }, | |
| 208 | { STB0899_TSINHDELL , 0x00 }, | |
| 0131258b MA |
209 | { STB0899_TSLLSTKM , 0x1b }, |
| 210 | { STB0899_TSLLSTKL , 0xb3 }, | |
| 873c8c25 | 211 | { STB0899_TSULSTKM , 0x00 }, |
| 0131258b MA |
212 | { STB0899_TSULSTKL , 0x00 }, |
| 213 | { STB0899_PCKLENUL , 0xbc }, | |
| 873c8c25 | 214 | { STB0899_PCKLENLL , 0xcc }, |
| 0131258b MA |
215 | { STB0899_RSPCKLEN , 0xbd }, |
| 216 | { STB0899_TSSTATUS , 0x90 }, | |
| 873c8c25 | 217 | { STB0899_ERRCTRL1 , 0xb6 }, |
| 0131258b MA |
218 | { STB0899_ERRCTRL2 , 0x95 }, |
| 219 | { STB0899_ERRCTRL3 , 0x8d }, | |
| 873c8c25 MA |
220 | { STB0899_DMONMSK1 , 0x27 }, |
| 221 | { STB0899_DMONMSK0 , 0x03 }, | |
| 222 | { STB0899_DEMAPVIT , 0x5c }, | |
| 0131258b | 223 | { STB0899_PLPARM , 0x19 }, |
| 873c8c25 MA |
224 | { STB0899_PDELCTRL , 0x48 }, |
| 225 | { STB0899_PDELCTRL2 , 0x00 }, | |
| 226 | { STB0899_BBHCTRL1 , 0x00 }, | |
| 227 | { STB0899_BBHCTRL2 , 0x00 }, | |
| 228 | { STB0899_HYSTTHRESH , 0x77 }, | |
| 229 | { STB0899_MATCSTM , 0x00 }, | |
| 230 | { STB0899_MATCSTL , 0x00 }, | |
| 231 | { STB0899_UPLCSTM , 0x00 }, | |
| 232 | { STB0899_UPLCSTL , 0x00 }, | |
| 233 | { STB0899_DFLCSTM , 0x00 }, | |
| 234 | { STB0899_DFLCSTL , 0x00 }, | |
| 235 | { STB0899_SYNCCST , 0x00 }, | |
| 236 | { STB0899_SYNCDCSTM , 0x00 }, | |
| 237 | { STB0899_SYNCDCSTL , 0x00 }, | |
| 238 | { STB0899_ISI_ENTRY , 0x00 }, | |
| 239 | { STB0899_ISI_BIT_EN , 0x00 }, | |
| 0131258b MA |
240 | { STB0899_MATSTRM , 0xf0 }, |
| 241 | { STB0899_MATSTRL , 0x02 }, | |
| 242 | { STB0899_UPLSTRM , 0x45 }, | |
| 243 | { STB0899_UPLSTRL , 0x60 }, | |
| 244 | { STB0899_DFLSTRM , 0xe3 }, | |
| 873c8c25 | 245 | { STB0899_DFLSTRL , 0x00 }, |
| 0131258b MA |
246 | { STB0899_SYNCSTR , 0x47 }, |
| 247 | { STB0899_SYNCDSTRM , 0x05 }, | |
| 248 | { STB0899_SYNCDSTRL , 0x18 }, | |
| 249 | { STB0899_CFGPDELSTATUS1 , 0x19 }, | |
| 250 | { STB0899_CFGPDELSTATUS2 , 0x2b }, | |
| 873c8c25 | 251 | { STB0899_BBFERRORM , 0x00 }, |
| 0131258b | 252 | { STB0899_BBFERRORL , 0x01 }, |
| 873c8c25 MA |
253 | { STB0899_UPKTERRORM , 0x00 }, |
| 254 | { STB0899_UPKTERRORL , 0x00 }, | |
| 255 | { 0xffff , 0xff }, | |
| 256 | }; | |
| 257 | ||
| 258 | struct stb0899_config vp1041_config = { | |
| 259 | .init_dev = vp1041_stb0899_s1_init_1, | |
| 260 | .init_s2_demod = stb0899_s2_init_2, | |
| 261 | .init_s1_demod = vp1041_stb0899_s1_init_3, | |
| 262 | .init_s2_fec = stb0899_s2_init_4, | |
| 263 | .init_tst = stb0899_s1_init_5, | |
| 264 | ||
| 265 | .demod_address = 0x68, /* 0xd0 >> 1 */ | |
| 266 | ||
| 267 | .xtal_freq = 27000000, | |
| 268 | .inversion = IQ_SWAP_ON, /* 1 */ | |
| 269 | ||
| 18b6de42 MA |
270 | .lo_clk = 76500000, |
| 271 | .hi_clk = 99000000, | |
| 272 | ||
| 873c8c25 MA |
273 | .esno_ave = STB0899_DVBS2_ESNO_AVE, |
| 274 | .esno_quant = STB0899_DVBS2_ESNO_QUANT, | |
| 275 | .avframes_coarse = STB0899_DVBS2_AVFRAMES_COARSE, | |
| 276 | .avframes_fine = STB0899_DVBS2_AVFRAMES_FINE, | |
| 277 | .miss_threshold = STB0899_DVBS2_MISS_THRESHOLD, | |
| 278 | .uwp_threshold_acq = STB0899_DVBS2_UWP_THRESHOLD_ACQ, | |
| 279 | .uwp_threshold_track = STB0899_DVBS2_UWP_THRESHOLD_TRACK, | |
| 280 | .uwp_threshold_sof = STB0899_DVBS2_UWP_THRESHOLD_SOF, | |
| 281 | .sof_search_timeout = STB0899_DVBS2_SOF_SEARCH_TIMEOUT, | |
| 282 | ||
| 283 | .btr_nco_bits = STB0899_DVBS2_BTR_NCO_BITS, | |
| 284 | .btr_gain_shift_offset = STB0899_DVBS2_BTR_GAIN_SHIFT_OFFSET, | |
| 285 | .crl_nco_bits = STB0899_DVBS2_CRL_NCO_BITS, | |
| 286 | .ldpc_max_iter = STB0899_DVBS2_LDPC_MAX_ITER, | |
| 287 | ||
| 288 | .tuner_get_frequency = stb6100_get_frequency, | |
| 289 | .tuner_set_frequency = stb6100_set_frequency, | |
| 290 | .tuner_set_bandwidth = stb6100_set_bandwidth, | |
| 291 | .tuner_get_bandwidth = stb6100_get_bandwidth, | |
| 292 | .tuner_set_rfsiggain = NULL, | |
| 293 | }; | |
| 294 | ||
| 295 | struct stb6100_config vp1041_stb6100_config = { | |
| 296 | .tuner_address = 0x60, | |
| 297 | .refclock = 27000000, | |
| 298 | }; |