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Commit | Line | Data |
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3d17fb1b | 1 | /* |
4d1f413e | 2 | * driver for Earthsoft PT1/PT2 |
3d17fb1b MCC |
3 | * |
4 | * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info> | |
5 | * | |
6 | * based on pt1dvr - http://pt1dvr.sourceforge.jp/ | |
7 | * by Tomoaki Ishikawa <tomy@users.sourceforge.jp> | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License, or | |
12 | * (at your option) any later version. | |
13 | * | |
14 | * This program is distributed in the hope that it will be useful, | |
15 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
16 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
17 | * GNU General Public License for more details. | |
18 | * | |
19 | * You should have received a copy of the GNU General Public License | |
20 | * along with this program; if not, write to the Free Software | |
21 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
22 | */ | |
23 | ||
24 | #include <linux/kernel.h> | |
25 | #include <linux/module.h> | |
5a0e3ad6 | 26 | #include <linux/slab.h> |
2a20b05f | 27 | #include <linux/vmalloc.h> |
3d17fb1b MCC |
28 | #include <linux/pci.h> |
29 | #include <linux/kthread.h> | |
30 | #include <linux/freezer.h> | |
31 | ||
32 | #include "dvbdev.h" | |
33 | #include "dvb_demux.h" | |
34 | #include "dmxdev.h" | |
35 | #include "dvb_net.h" | |
36 | #include "dvb_frontend.h" | |
37 | ||
38 | #include "va1j5jf8007t.h" | |
39 | #include "va1j5jf8007s.h" | |
40 | ||
41 | #define DRIVER_NAME "earth-pt1" | |
42 | ||
43 | #define PT1_PAGE_SHIFT 12 | |
44 | #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT) | |
45 | #define PT1_NR_UPACKETS 1024 | |
46 | #define PT1_NR_BUFS 511 | |
47 | ||
48 | struct pt1_buffer_page { | |
49 | __le32 upackets[PT1_NR_UPACKETS]; | |
50 | }; | |
51 | ||
52 | struct pt1_table_page { | |
53 | __le32 next_pfn; | |
54 | __le32 buf_pfns[PT1_NR_BUFS]; | |
55 | }; | |
56 | ||
57 | struct pt1_buffer { | |
58 | struct pt1_buffer_page *page; | |
59 | dma_addr_t addr; | |
60 | }; | |
61 | ||
62 | struct pt1_table { | |
63 | struct pt1_table_page *page; | |
64 | dma_addr_t addr; | |
65 | struct pt1_buffer bufs[PT1_NR_BUFS]; | |
66 | }; | |
67 | ||
68 | #define PT1_NR_ADAPS 4 | |
69 | ||
70 | struct pt1_adapter; | |
71 | ||
72 | struct pt1 { | |
73 | struct pci_dev *pdev; | |
74 | void __iomem *regs; | |
75 | struct i2c_adapter i2c_adap; | |
76 | int i2c_running; | |
77 | struct pt1_adapter *adaps[PT1_NR_ADAPS]; | |
78 | struct pt1_table *tables; | |
79 | struct task_struct *kthread; | |
847e8765 AT |
80 | int table_index; |
81 | int buf_index; | |
4d1f413e HT |
82 | |
83 | struct mutex lock; | |
84 | int power; | |
85 | int reset; | |
3d17fb1b MCC |
86 | }; |
87 | ||
88 | struct pt1_adapter { | |
89 | struct pt1 *pt1; | |
90 | int index; | |
91 | ||
92 | u8 *buf; | |
93 | int upacket_count; | |
94 | int packet_count; | |
95 | ||
96 | struct dvb_adapter adap; | |
97 | struct dvb_demux demux; | |
98 | int users; | |
99 | struct dmxdev dmxdev; | |
100 | struct dvb_net net; | |
101 | struct dvb_frontend *fe; | |
102 | int (*orig_set_voltage)(struct dvb_frontend *fe, | |
103 | fe_sec_voltage_t voltage); | |
4d1f413e HT |
104 | int (*orig_sleep)(struct dvb_frontend *fe); |
105 | int (*orig_init)(struct dvb_frontend *fe); | |
106 | ||
107 | fe_sec_voltage_t voltage; | |
108 | int sleep; | |
3d17fb1b MCC |
109 | }; |
110 | ||
111 | #define pt1_printk(level, pt1, format, arg...) \ | |
112 | dev_printk(level, &(pt1)->pdev->dev, format, ##arg) | |
113 | ||
114 | static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data) | |
115 | { | |
116 | writel(data, pt1->regs + reg * 4); | |
117 | } | |
118 | ||
119 | static u32 pt1_read_reg(struct pt1 *pt1, int reg) | |
120 | { | |
121 | return readl(pt1->regs + reg * 4); | |
122 | } | |
123 | ||
124 | static int pt1_nr_tables = 64; | |
125 | module_param_named(nr_tables, pt1_nr_tables, int, 0); | |
126 | ||
127 | static void pt1_increment_table_count(struct pt1 *pt1) | |
128 | { | |
129 | pt1_write_reg(pt1, 0, 0x00000020); | |
130 | } | |
131 | ||
132 | static void pt1_init_table_count(struct pt1 *pt1) | |
133 | { | |
134 | pt1_write_reg(pt1, 0, 0x00000010); | |
135 | } | |
136 | ||
137 | static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn) | |
138 | { | |
139 | pt1_write_reg(pt1, 5, first_pfn); | |
140 | pt1_write_reg(pt1, 0, 0x0c000040); | |
141 | } | |
142 | ||
143 | static void pt1_unregister_tables(struct pt1 *pt1) | |
144 | { | |
145 | pt1_write_reg(pt1, 0, 0x08080000); | |
146 | } | |
147 | ||
148 | static int pt1_sync(struct pt1 *pt1) | |
149 | { | |
150 | int i; | |
151 | for (i = 0; i < 57; i++) { | |
152 | if (pt1_read_reg(pt1, 0) & 0x20000000) | |
153 | return 0; | |
154 | pt1_write_reg(pt1, 0, 0x00000008); | |
155 | } | |
156 | pt1_printk(KERN_ERR, pt1, "could not sync\n"); | |
157 | return -EIO; | |
158 | } | |
159 | ||
160 | static u64 pt1_identify(struct pt1 *pt1) | |
161 | { | |
162 | int i; | |
163 | u64 id; | |
164 | id = 0; | |
165 | for (i = 0; i < 57; i++) { | |
166 | id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i; | |
167 | pt1_write_reg(pt1, 0, 0x00000008); | |
168 | } | |
169 | return id; | |
170 | } | |
171 | ||
172 | static int pt1_unlock(struct pt1 *pt1) | |
173 | { | |
174 | int i; | |
175 | pt1_write_reg(pt1, 0, 0x00000008); | |
176 | for (i = 0; i < 3; i++) { | |
177 | if (pt1_read_reg(pt1, 0) & 0x80000000) | |
178 | return 0; | |
179 | schedule_timeout_uninterruptible((HZ + 999) / 1000); | |
180 | } | |
181 | pt1_printk(KERN_ERR, pt1, "could not unlock\n"); | |
182 | return -EIO; | |
183 | } | |
184 | ||
185 | static int pt1_reset_pci(struct pt1 *pt1) | |
186 | { | |
187 | int i; | |
188 | pt1_write_reg(pt1, 0, 0x01010000); | |
189 | pt1_write_reg(pt1, 0, 0x01000000); | |
190 | for (i = 0; i < 10; i++) { | |
191 | if (pt1_read_reg(pt1, 0) & 0x00000001) | |
192 | return 0; | |
193 | schedule_timeout_uninterruptible((HZ + 999) / 1000); | |
194 | } | |
195 | pt1_printk(KERN_ERR, pt1, "could not reset PCI\n"); | |
196 | return -EIO; | |
197 | } | |
198 | ||
199 | static int pt1_reset_ram(struct pt1 *pt1) | |
200 | { | |
201 | int i; | |
202 | pt1_write_reg(pt1, 0, 0x02020000); | |
203 | pt1_write_reg(pt1, 0, 0x02000000); | |
204 | for (i = 0; i < 10; i++) { | |
205 | if (pt1_read_reg(pt1, 0) & 0x00000002) | |
206 | return 0; | |
207 | schedule_timeout_uninterruptible((HZ + 999) / 1000); | |
208 | } | |
209 | pt1_printk(KERN_ERR, pt1, "could not reset RAM\n"); | |
210 | return -EIO; | |
211 | } | |
212 | ||
213 | static int pt1_do_enable_ram(struct pt1 *pt1) | |
214 | { | |
215 | int i, j; | |
216 | u32 status; | |
217 | status = pt1_read_reg(pt1, 0) & 0x00000004; | |
218 | pt1_write_reg(pt1, 0, 0x00000002); | |
219 | for (i = 0; i < 10; i++) { | |
220 | for (j = 0; j < 1024; j++) { | |
221 | if ((pt1_read_reg(pt1, 0) & 0x00000004) != status) | |
222 | return 0; | |
223 | } | |
224 | schedule_timeout_uninterruptible((HZ + 999) / 1000); | |
225 | } | |
226 | pt1_printk(KERN_ERR, pt1, "could not enable RAM\n"); | |
227 | return -EIO; | |
228 | } | |
229 | ||
230 | static int pt1_enable_ram(struct pt1 *pt1) | |
231 | { | |
232 | int i, ret; | |
4d1f413e | 233 | int phase; |
3d17fb1b | 234 | schedule_timeout_uninterruptible((HZ + 999) / 1000); |
4d1f413e HT |
235 | phase = pt1->pdev->device == 0x211a ? 128 : 166; |
236 | for (i = 0; i < phase; i++) { | |
3d17fb1b MCC |
237 | ret = pt1_do_enable_ram(pt1); |
238 | if (ret < 0) | |
239 | return ret; | |
240 | } | |
241 | return 0; | |
242 | } | |
243 | ||
244 | static void pt1_disable_ram(struct pt1 *pt1) | |
245 | { | |
246 | pt1_write_reg(pt1, 0, 0x0b0b0000); | |
247 | } | |
248 | ||
249 | static void pt1_set_stream(struct pt1 *pt1, int index, int enabled) | |
250 | { | |
251 | pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index); | |
252 | } | |
253 | ||
254 | static void pt1_init_streams(struct pt1 *pt1) | |
255 | { | |
256 | int i; | |
257 | for (i = 0; i < PT1_NR_ADAPS; i++) | |
258 | pt1_set_stream(pt1, i, 0); | |
259 | } | |
260 | ||
261 | static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page) | |
262 | { | |
263 | u32 upacket; | |
264 | int i; | |
265 | int index; | |
266 | struct pt1_adapter *adap; | |
267 | int offset; | |
268 | u8 *buf; | |
269 | ||
270 | if (!page->upackets[PT1_NR_UPACKETS - 1]) | |
271 | return 0; | |
272 | ||
273 | for (i = 0; i < PT1_NR_UPACKETS; i++) { | |
274 | upacket = le32_to_cpu(page->upackets[i]); | |
275 | index = (upacket >> 29) - 1; | |
276 | if (index < 0 || index >= PT1_NR_ADAPS) | |
277 | continue; | |
278 | ||
279 | adap = pt1->adaps[index]; | |
280 | if (upacket >> 25 & 1) | |
281 | adap->upacket_count = 0; | |
282 | else if (!adap->upacket_count) | |
283 | continue; | |
284 | ||
285 | buf = adap->buf; | |
286 | offset = adap->packet_count * 188 + adap->upacket_count * 3; | |
287 | buf[offset] = upacket >> 16; | |
288 | buf[offset + 1] = upacket >> 8; | |
289 | if (adap->upacket_count != 62) | |
290 | buf[offset + 2] = upacket; | |
291 | ||
292 | if (++adap->upacket_count >= 63) { | |
293 | adap->upacket_count = 0; | |
294 | if (++adap->packet_count >= 21) { | |
295 | dvb_dmx_swfilter_packets(&adap->demux, buf, 21); | |
296 | adap->packet_count = 0; | |
297 | } | |
298 | } | |
299 | } | |
300 | ||
301 | page->upackets[PT1_NR_UPACKETS - 1] = 0; | |
302 | return 1; | |
303 | } | |
304 | ||
305 | static int pt1_thread(void *data) | |
306 | { | |
307 | struct pt1 *pt1; | |
3d17fb1b MCC |
308 | struct pt1_buffer_page *page; |
309 | ||
310 | pt1 = data; | |
311 | set_freezable(); | |
312 | ||
3d17fb1b MCC |
313 | while (!kthread_should_stop()) { |
314 | try_to_freeze(); | |
315 | ||
847e8765 | 316 | page = pt1->tables[pt1->table_index].bufs[pt1->buf_index].page; |
3d17fb1b MCC |
317 | if (!pt1_filter(pt1, page)) { |
318 | schedule_timeout_interruptible((HZ + 999) / 1000); | |
319 | continue; | |
320 | } | |
321 | ||
847e8765 | 322 | if (++pt1->buf_index >= PT1_NR_BUFS) { |
3d17fb1b | 323 | pt1_increment_table_count(pt1); |
847e8765 AT |
324 | pt1->buf_index = 0; |
325 | if (++pt1->table_index >= pt1_nr_tables) | |
326 | pt1->table_index = 0; | |
3d17fb1b MCC |
327 | } |
328 | } | |
329 | ||
330 | return 0; | |
331 | } | |
332 | ||
333 | static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr) | |
334 | { | |
335 | dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr); | |
336 | } | |
337 | ||
338 | static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp) | |
339 | { | |
340 | void *page; | |
341 | dma_addr_t addr; | |
342 | ||
343 | page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr, | |
344 | GFP_KERNEL); | |
345 | if (page == NULL) | |
346 | return NULL; | |
347 | ||
348 | BUG_ON(addr & (PT1_PAGE_SIZE - 1)); | |
349 | BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1); | |
350 | ||
351 | *addrp = addr; | |
352 | *pfnp = addr >> PT1_PAGE_SHIFT; | |
353 | return page; | |
354 | } | |
355 | ||
356 | static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf) | |
357 | { | |
358 | pt1_free_page(pt1, buf->page, buf->addr); | |
359 | } | |
360 | ||
361 | static int | |
362 | pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp) | |
363 | { | |
364 | struct pt1_buffer_page *page; | |
365 | dma_addr_t addr; | |
366 | ||
367 | page = pt1_alloc_page(pt1, &addr, pfnp); | |
368 | if (page == NULL) | |
369 | return -ENOMEM; | |
370 | ||
371 | page->upackets[PT1_NR_UPACKETS - 1] = 0; | |
372 | ||
373 | buf->page = page; | |
374 | buf->addr = addr; | |
375 | return 0; | |
376 | } | |
377 | ||
378 | static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table) | |
379 | { | |
380 | int i; | |
381 | ||
382 | for (i = 0; i < PT1_NR_BUFS; i++) | |
383 | pt1_cleanup_buffer(pt1, &table->bufs[i]); | |
384 | ||
385 | pt1_free_page(pt1, table->page, table->addr); | |
386 | } | |
387 | ||
388 | static int | |
389 | pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp) | |
390 | { | |
391 | struct pt1_table_page *page; | |
392 | dma_addr_t addr; | |
393 | int i, ret; | |
394 | u32 buf_pfn; | |
395 | ||
396 | page = pt1_alloc_page(pt1, &addr, pfnp); | |
397 | if (page == NULL) | |
398 | return -ENOMEM; | |
399 | ||
400 | for (i = 0; i < PT1_NR_BUFS; i++) { | |
401 | ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn); | |
402 | if (ret < 0) | |
403 | goto err; | |
404 | ||
405 | page->buf_pfns[i] = cpu_to_le32(buf_pfn); | |
406 | } | |
407 | ||
408 | pt1_increment_table_count(pt1); | |
409 | table->page = page; | |
410 | table->addr = addr; | |
411 | return 0; | |
412 | ||
413 | err: | |
414 | while (i--) | |
415 | pt1_cleanup_buffer(pt1, &table->bufs[i]); | |
416 | ||
417 | pt1_free_page(pt1, page, addr); | |
418 | return ret; | |
419 | } | |
420 | ||
421 | static void pt1_cleanup_tables(struct pt1 *pt1) | |
422 | { | |
423 | struct pt1_table *tables; | |
424 | int i; | |
425 | ||
426 | tables = pt1->tables; | |
427 | pt1_unregister_tables(pt1); | |
428 | ||
429 | for (i = 0; i < pt1_nr_tables; i++) | |
430 | pt1_cleanup_table(pt1, &tables[i]); | |
431 | ||
432 | vfree(tables); | |
433 | } | |
434 | ||
435 | static int pt1_init_tables(struct pt1 *pt1) | |
436 | { | |
437 | struct pt1_table *tables; | |
438 | int i, ret; | |
439 | u32 first_pfn, pfn; | |
440 | ||
441 | tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables); | |
442 | if (tables == NULL) | |
443 | return -ENOMEM; | |
444 | ||
445 | pt1_init_table_count(pt1); | |
446 | ||
447 | i = 0; | |
448 | if (pt1_nr_tables) { | |
449 | ret = pt1_init_table(pt1, &tables[0], &first_pfn); | |
450 | if (ret) | |
451 | goto err; | |
452 | i++; | |
453 | } | |
454 | ||
455 | while (i < pt1_nr_tables) { | |
456 | ret = pt1_init_table(pt1, &tables[i], &pfn); | |
457 | if (ret) | |
458 | goto err; | |
459 | tables[i - 1].page->next_pfn = cpu_to_le32(pfn); | |
460 | i++; | |
461 | } | |
462 | ||
463 | tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn); | |
464 | ||
465 | pt1_register_tables(pt1, first_pfn); | |
466 | pt1->tables = tables; | |
467 | return 0; | |
468 | ||
469 | err: | |
470 | while (i--) | |
471 | pt1_cleanup_table(pt1, &tables[i]); | |
472 | ||
473 | vfree(tables); | |
474 | return ret; | |
475 | } | |
476 | ||
847e8765 AT |
477 | static int pt1_start_polling(struct pt1 *pt1) |
478 | { | |
479 | int ret = 0; | |
480 | ||
481 | mutex_lock(&pt1->lock); | |
482 | if (!pt1->kthread) { | |
483 | pt1->kthread = kthread_run(pt1_thread, pt1, "earth-pt1"); | |
484 | if (IS_ERR(pt1->kthread)) { | |
485 | ret = PTR_ERR(pt1->kthread); | |
486 | pt1->kthread = NULL; | |
487 | } | |
488 | } | |
489 | mutex_unlock(&pt1->lock); | |
490 | return ret; | |
491 | } | |
492 | ||
3d17fb1b MCC |
493 | static int pt1_start_feed(struct dvb_demux_feed *feed) |
494 | { | |
495 | struct pt1_adapter *adap; | |
496 | adap = container_of(feed->demux, struct pt1_adapter, demux); | |
847e8765 AT |
497 | if (!adap->users++) { |
498 | int ret; | |
499 | ||
500 | ret = pt1_start_polling(adap->pt1); | |
501 | if (ret) | |
502 | return ret; | |
3d17fb1b | 503 | pt1_set_stream(adap->pt1, adap->index, 1); |
847e8765 | 504 | } |
3d17fb1b MCC |
505 | return 0; |
506 | } | |
507 | ||
847e8765 AT |
508 | static void pt1_stop_polling(struct pt1 *pt1) |
509 | { | |
510 | int i, count; | |
511 | ||
512 | mutex_lock(&pt1->lock); | |
513 | for (i = 0, count = 0; i < PT1_NR_ADAPS; i++) | |
514 | count += pt1->adaps[i]->users; | |
515 | ||
516 | if (count == 0 && pt1->kthread) { | |
517 | kthread_stop(pt1->kthread); | |
518 | pt1->kthread = NULL; | |
519 | } | |
520 | mutex_unlock(&pt1->lock); | |
521 | } | |
522 | ||
3d17fb1b MCC |
523 | static int pt1_stop_feed(struct dvb_demux_feed *feed) |
524 | { | |
525 | struct pt1_adapter *adap; | |
526 | adap = container_of(feed->demux, struct pt1_adapter, demux); | |
847e8765 | 527 | if (!--adap->users) { |
3d17fb1b | 528 | pt1_set_stream(adap->pt1, adap->index, 0); |
847e8765 AT |
529 | pt1_stop_polling(adap->pt1); |
530 | } | |
3d17fb1b MCC |
531 | return 0; |
532 | } | |
533 | ||
534 | static void | |
4d1f413e | 535 | pt1_update_power(struct pt1 *pt1) |
3d17fb1b | 536 | { |
4d1f413e HT |
537 | int bits; |
538 | int i; | |
539 | struct pt1_adapter *adap; | |
540 | static const int sleep_bits[] = { | |
541 | 1 << 4, | |
542 | 1 << 6 | 1 << 7, | |
543 | 1 << 5, | |
544 | 1 << 6 | 1 << 8, | |
545 | }; | |
546 | ||
547 | bits = pt1->power | !pt1->reset << 3; | |
548 | mutex_lock(&pt1->lock); | |
549 | for (i = 0; i < PT1_NR_ADAPS; i++) { | |
550 | adap = pt1->adaps[i]; | |
551 | switch (adap->voltage) { | |
552 | case SEC_VOLTAGE_13: /* actually 11V */ | |
553 | bits |= 1 << 1; | |
554 | break; | |
555 | case SEC_VOLTAGE_18: /* actually 15V */ | |
556 | bits |= 1 << 1 | 1 << 2; | |
557 | break; | |
558 | default: | |
559 | break; | |
560 | } | |
561 | ||
562 | /* XXX: The bits should be changed depending on adap->sleep. */ | |
563 | bits |= sleep_bits[i]; | |
564 | } | |
565 | pt1_write_reg(pt1, 1, bits); | |
566 | mutex_unlock(&pt1->lock); | |
3d17fb1b MCC |
567 | } |
568 | ||
569 | static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage) | |
570 | { | |
571 | struct pt1_adapter *adap; | |
3d17fb1b MCC |
572 | |
573 | adap = container_of(fe->dvb, struct pt1_adapter, adap); | |
4d1f413e HT |
574 | adap->voltage = voltage; |
575 | pt1_update_power(adap->pt1); | |
3d17fb1b MCC |
576 | |
577 | if (adap->orig_set_voltage) | |
578 | return adap->orig_set_voltage(fe, voltage); | |
579 | else | |
580 | return 0; | |
581 | } | |
582 | ||
4d1f413e HT |
583 | static int pt1_sleep(struct dvb_frontend *fe) |
584 | { | |
585 | struct pt1_adapter *adap; | |
586 | ||
587 | adap = container_of(fe->dvb, struct pt1_adapter, adap); | |
588 | adap->sleep = 1; | |
589 | pt1_update_power(adap->pt1); | |
590 | ||
591 | if (adap->orig_sleep) | |
592 | return adap->orig_sleep(fe); | |
593 | else | |
594 | return 0; | |
595 | } | |
596 | ||
597 | static int pt1_wakeup(struct dvb_frontend *fe) | |
598 | { | |
599 | struct pt1_adapter *adap; | |
600 | ||
601 | adap = container_of(fe->dvb, struct pt1_adapter, adap); | |
602 | adap->sleep = 0; | |
603 | pt1_update_power(adap->pt1); | |
604 | schedule_timeout_uninterruptible((HZ + 999) / 1000); | |
605 | ||
606 | if (adap->orig_init) | |
607 | return adap->orig_init(fe); | |
608 | else | |
609 | return 0; | |
610 | } | |
611 | ||
3d17fb1b MCC |
612 | static void pt1_free_adapter(struct pt1_adapter *adap) |
613 | { | |
3d17fb1b MCC |
614 | dvb_net_release(&adap->net); |
615 | adap->demux.dmx.close(&adap->demux.dmx); | |
616 | dvb_dmxdev_release(&adap->dmxdev); | |
617 | dvb_dmx_release(&adap->demux); | |
618 | dvb_unregister_adapter(&adap->adap); | |
619 | free_page((unsigned long)adap->buf); | |
620 | kfree(adap); | |
621 | } | |
622 | ||
623 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); | |
624 | ||
625 | static struct pt1_adapter * | |
4d1f413e | 626 | pt1_alloc_adapter(struct pt1 *pt1) |
3d17fb1b MCC |
627 | { |
628 | struct pt1_adapter *adap; | |
629 | void *buf; | |
630 | struct dvb_adapter *dvb_adap; | |
631 | struct dvb_demux *demux; | |
632 | struct dmxdev *dmxdev; | |
633 | int ret; | |
634 | ||
635 | adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL); | |
636 | if (!adap) { | |
637 | ret = -ENOMEM; | |
638 | goto err; | |
639 | } | |
640 | ||
641 | adap->pt1 = pt1; | |
642 | ||
4d1f413e HT |
643 | adap->voltage = SEC_VOLTAGE_OFF; |
644 | adap->sleep = 1; | |
3d17fb1b MCC |
645 | |
646 | buf = (u8 *)__get_free_page(GFP_KERNEL); | |
647 | if (!buf) { | |
648 | ret = -ENOMEM; | |
649 | goto err_kfree; | |
650 | } | |
651 | ||
652 | adap->buf = buf; | |
653 | adap->upacket_count = 0; | |
654 | adap->packet_count = 0; | |
655 | ||
656 | dvb_adap = &adap->adap; | |
657 | dvb_adap->priv = adap; | |
658 | ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE, | |
659 | &pt1->pdev->dev, adapter_nr); | |
660 | if (ret < 0) | |
661 | goto err_free_page; | |
662 | ||
663 | demux = &adap->demux; | |
664 | demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING; | |
665 | demux->priv = adap; | |
666 | demux->feednum = 256; | |
667 | demux->filternum = 256; | |
668 | demux->start_feed = pt1_start_feed; | |
669 | demux->stop_feed = pt1_stop_feed; | |
670 | demux->write_to_decoder = NULL; | |
671 | ret = dvb_dmx_init(demux); | |
672 | if (ret < 0) | |
673 | goto err_unregister_adapter; | |
674 | ||
675 | dmxdev = &adap->dmxdev; | |
676 | dmxdev->filternum = 256; | |
677 | dmxdev->demux = &demux->dmx; | |
678 | dmxdev->capabilities = 0; | |
679 | ret = dvb_dmxdev_init(dmxdev, dvb_adap); | |
680 | if (ret < 0) | |
681 | goto err_dmx_release; | |
682 | ||
683 | dvb_net_init(dvb_adap, &adap->net, &demux->dmx); | |
684 | ||
3d17fb1b MCC |
685 | return adap; |
686 | ||
3d17fb1b MCC |
687 | err_dmx_release: |
688 | dvb_dmx_release(demux); | |
689 | err_unregister_adapter: | |
690 | dvb_unregister_adapter(dvb_adap); | |
691 | err_free_page: | |
692 | free_page((unsigned long)buf); | |
693 | err_kfree: | |
694 | kfree(adap); | |
695 | err: | |
696 | return ERR_PTR(ret); | |
697 | } | |
698 | ||
699 | static void pt1_cleanup_adapters(struct pt1 *pt1) | |
700 | { | |
701 | int i; | |
702 | for (i = 0; i < PT1_NR_ADAPS; i++) | |
703 | pt1_free_adapter(pt1->adaps[i]); | |
704 | } | |
705 | ||
4d1f413e HT |
706 | static int pt1_init_adapters(struct pt1 *pt1) |
707 | { | |
708 | int i; | |
709 | struct pt1_adapter *adap; | |
710 | int ret; | |
711 | ||
712 | for (i = 0; i < PT1_NR_ADAPS; i++) { | |
713 | adap = pt1_alloc_adapter(pt1); | |
714 | if (IS_ERR(adap)) { | |
715 | ret = PTR_ERR(adap); | |
716 | goto err; | |
717 | } | |
718 | ||
719 | adap->index = i; | |
720 | pt1->adaps[i] = adap; | |
721 | } | |
722 | return 0; | |
723 | ||
724 | err: | |
725 | while (i--) | |
726 | pt1_free_adapter(pt1->adaps[i]); | |
727 | ||
728 | return ret; | |
729 | } | |
730 | ||
731 | static void pt1_cleanup_frontend(struct pt1_adapter *adap) | |
732 | { | |
733 | dvb_unregister_frontend(adap->fe); | |
734 | } | |
735 | ||
736 | static int pt1_init_frontend(struct pt1_adapter *adap, struct dvb_frontend *fe) | |
737 | { | |
738 | int ret; | |
739 | ||
740 | adap->orig_set_voltage = fe->ops.set_voltage; | |
741 | adap->orig_sleep = fe->ops.sleep; | |
742 | adap->orig_init = fe->ops.init; | |
743 | fe->ops.set_voltage = pt1_set_voltage; | |
744 | fe->ops.sleep = pt1_sleep; | |
745 | fe->ops.init = pt1_wakeup; | |
746 | ||
747 | ret = dvb_register_frontend(&adap->adap, fe); | |
748 | if (ret < 0) | |
749 | return ret; | |
750 | ||
751 | adap->fe = fe; | |
752 | return 0; | |
753 | } | |
754 | ||
755 | static void pt1_cleanup_frontends(struct pt1 *pt1) | |
756 | { | |
757 | int i; | |
758 | for (i = 0; i < PT1_NR_ADAPS; i++) | |
759 | pt1_cleanup_frontend(pt1->adaps[i]); | |
760 | } | |
761 | ||
3d17fb1b MCC |
762 | struct pt1_config { |
763 | struct va1j5jf8007s_config va1j5jf8007s_config; | |
764 | struct va1j5jf8007t_config va1j5jf8007t_config; | |
765 | }; | |
766 | ||
767 | static const struct pt1_config pt1_configs[2] = { | |
768 | { | |
4d1f413e HT |
769 | { |
770 | .demod_address = 0x1b, | |
771 | .frequency = VA1J5JF8007S_20MHZ, | |
772 | }, | |
773 | { | |
774 | .demod_address = 0x1a, | |
775 | .frequency = VA1J5JF8007T_20MHZ, | |
776 | }, | |
3d17fb1b | 777 | }, { |
4d1f413e HT |
778 | { |
779 | .demod_address = 0x19, | |
780 | .frequency = VA1J5JF8007S_20MHZ, | |
781 | }, | |
782 | { | |
783 | .demod_address = 0x18, | |
784 | .frequency = VA1J5JF8007T_20MHZ, | |
785 | }, | |
3d17fb1b MCC |
786 | }, |
787 | }; | |
788 | ||
4d1f413e HT |
789 | static const struct pt1_config pt2_configs[2] = { |
790 | { | |
791 | { | |
792 | .demod_address = 0x1b, | |
793 | .frequency = VA1J5JF8007S_25MHZ, | |
794 | }, | |
795 | { | |
796 | .demod_address = 0x1a, | |
797 | .frequency = VA1J5JF8007T_25MHZ, | |
798 | }, | |
799 | }, { | |
800 | { | |
801 | .demod_address = 0x19, | |
802 | .frequency = VA1J5JF8007S_25MHZ, | |
803 | }, | |
804 | { | |
805 | .demod_address = 0x18, | |
806 | .frequency = VA1J5JF8007T_25MHZ, | |
807 | }, | |
808 | }, | |
809 | }; | |
810 | ||
811 | static int pt1_init_frontends(struct pt1 *pt1) | |
3d17fb1b MCC |
812 | { |
813 | int i, j; | |
814 | struct i2c_adapter *i2c_adap; | |
4d1f413e | 815 | const struct pt1_config *configs, *config; |
3d17fb1b | 816 | struct dvb_frontend *fe[4]; |
3d17fb1b MCC |
817 | int ret; |
818 | ||
819 | i = 0; | |
820 | j = 0; | |
821 | ||
822 | i2c_adap = &pt1->i2c_adap; | |
4d1f413e | 823 | configs = pt1->pdev->device == 0x211a ? pt1_configs : pt2_configs; |
3d17fb1b | 824 | do { |
4d1f413e | 825 | config = &configs[i / 2]; |
3d17fb1b MCC |
826 | |
827 | fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config, | |
828 | i2c_adap); | |
829 | if (!fe[i]) { | |
830 | ret = -ENODEV; /* This does not sound nice... */ | |
831 | goto err; | |
832 | } | |
833 | i++; | |
834 | ||
835 | fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config, | |
836 | i2c_adap); | |
837 | if (!fe[i]) { | |
838 | ret = -ENODEV; | |
839 | goto err; | |
840 | } | |
841 | i++; | |
842 | ||
843 | ret = va1j5jf8007s_prepare(fe[i - 2]); | |
844 | if (ret < 0) | |
845 | goto err; | |
846 | ||
847 | ret = va1j5jf8007t_prepare(fe[i - 1]); | |
848 | if (ret < 0) | |
849 | goto err; | |
850 | ||
851 | } while (i < 4); | |
852 | ||
853 | do { | |
4d1f413e HT |
854 | ret = pt1_init_frontend(pt1->adaps[j], fe[j]); |
855 | if (ret < 0) | |
3d17fb1b | 856 | goto err; |
3d17fb1b MCC |
857 | } while (++j < 4); |
858 | ||
859 | return 0; | |
860 | ||
861 | err: | |
862 | while (i-- > j) | |
863 | fe[i]->ops.release(fe[i]); | |
864 | ||
865 | while (j--) | |
4d1f413e | 866 | dvb_unregister_frontend(fe[j]); |
3d17fb1b MCC |
867 | |
868 | return ret; | |
869 | } | |
870 | ||
871 | static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable, | |
872 | int clock, int data, int next_addr) | |
873 | { | |
874 | pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 | | |
875 | !clock << 11 | !data << 10 | next_addr); | |
876 | } | |
877 | ||
878 | static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data) | |
879 | { | |
880 | pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1); | |
881 | pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2); | |
882 | pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3); | |
883 | *addrp = addr + 3; | |
884 | } | |
885 | ||
886 | static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp) | |
887 | { | |
888 | pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1); | |
889 | pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2); | |
890 | pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3); | |
891 | pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4); | |
892 | *addrp = addr + 4; | |
893 | } | |
894 | ||
895 | static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data) | |
896 | { | |
897 | int i; | |
898 | for (i = 0; i < 8; i++) | |
899 | pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1); | |
900 | pt1_i2c_write_bit(pt1, addr, &addr, 1); | |
901 | *addrp = addr; | |
902 | } | |
903 | ||
904 | static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last) | |
905 | { | |
906 | int i; | |
907 | for (i = 0; i < 8; i++) | |
908 | pt1_i2c_read_bit(pt1, addr, &addr); | |
909 | pt1_i2c_write_bit(pt1, addr, &addr, last); | |
910 | *addrp = addr; | |
911 | } | |
912 | ||
913 | static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp) | |
914 | { | |
915 | pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1); | |
916 | pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2); | |
917 | pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3); | |
918 | *addrp = addr + 3; | |
919 | } | |
920 | ||
921 | static void | |
922 | pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg) | |
923 | { | |
924 | int i; | |
925 | pt1_i2c_prepare(pt1, addr, &addr); | |
926 | pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1); | |
927 | for (i = 0; i < msg->len; i++) | |
928 | pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]); | |
929 | *addrp = addr; | |
930 | } | |
931 | ||
932 | static void | |
933 | pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg) | |
934 | { | |
935 | int i; | |
936 | pt1_i2c_prepare(pt1, addr, &addr); | |
937 | pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1); | |
938 | for (i = 0; i < msg->len; i++) | |
939 | pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1); | |
940 | *addrp = addr; | |
941 | } | |
942 | ||
943 | static int pt1_i2c_end(struct pt1 *pt1, int addr) | |
944 | { | |
945 | pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1); | |
946 | pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2); | |
947 | pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0); | |
948 | ||
949 | pt1_write_reg(pt1, 0, 0x00000004); | |
950 | do { | |
951 | if (signal_pending(current)) | |
952 | return -EINTR; | |
953 | schedule_timeout_interruptible((HZ + 999) / 1000); | |
954 | } while (pt1_read_reg(pt1, 0) & 0x00000080); | |
955 | return 0; | |
956 | } | |
957 | ||
958 | static void pt1_i2c_begin(struct pt1 *pt1, int *addrp) | |
959 | { | |
960 | int addr; | |
961 | addr = 0; | |
962 | ||
963 | pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */); | |
964 | addr = addr + 1; | |
965 | ||
966 | if (!pt1->i2c_running) { | |
967 | pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1); | |
968 | pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2); | |
969 | addr = addr + 2; | |
970 | pt1->i2c_running = 1; | |
971 | } | |
972 | *addrp = addr; | |
973 | } | |
974 | ||
975 | static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num) | |
976 | { | |
977 | struct pt1 *pt1; | |
978 | int i; | |
979 | struct i2c_msg *msg, *next_msg; | |
980 | int addr, ret; | |
981 | u16 len; | |
982 | u32 word; | |
983 | ||
984 | pt1 = i2c_get_adapdata(adap); | |
985 | ||
986 | for (i = 0; i < num; i++) { | |
987 | msg = &msgs[i]; | |
988 | if (msg->flags & I2C_M_RD) | |
989 | return -ENOTSUPP; | |
990 | ||
991 | if (i + 1 < num) | |
992 | next_msg = &msgs[i + 1]; | |
993 | else | |
994 | next_msg = NULL; | |
995 | ||
996 | if (next_msg && next_msg->flags & I2C_M_RD) { | |
997 | i++; | |
998 | ||
999 | len = next_msg->len; | |
1000 | if (len > 4) | |
1001 | return -ENOTSUPP; | |
1002 | ||
1003 | pt1_i2c_begin(pt1, &addr); | |
1004 | pt1_i2c_write_msg(pt1, addr, &addr, msg); | |
1005 | pt1_i2c_read_msg(pt1, addr, &addr, next_msg); | |
1006 | ret = pt1_i2c_end(pt1, addr); | |
1007 | if (ret < 0) | |
1008 | return ret; | |
1009 | ||
1010 | word = pt1_read_reg(pt1, 2); | |
1011 | while (len--) { | |
1012 | next_msg->buf[len] = word; | |
1013 | word >>= 8; | |
1014 | } | |
1015 | } else { | |
1016 | pt1_i2c_begin(pt1, &addr); | |
1017 | pt1_i2c_write_msg(pt1, addr, &addr, msg); | |
1018 | ret = pt1_i2c_end(pt1, addr); | |
1019 | if (ret < 0) | |
1020 | return ret; | |
1021 | } | |
1022 | } | |
1023 | ||
1024 | return num; | |
1025 | } | |
1026 | ||
1027 | static u32 pt1_i2c_func(struct i2c_adapter *adap) | |
1028 | { | |
1029 | return I2C_FUNC_I2C; | |
1030 | } | |
1031 | ||
1032 | static const struct i2c_algorithm pt1_i2c_algo = { | |
1033 | .master_xfer = pt1_i2c_xfer, | |
1034 | .functionality = pt1_i2c_func, | |
1035 | }; | |
1036 | ||
1037 | static void pt1_i2c_wait(struct pt1 *pt1) | |
1038 | { | |
1039 | int i; | |
1040 | for (i = 0; i < 128; i++) | |
1041 | pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0); | |
1042 | } | |
1043 | ||
1044 | static void pt1_i2c_init(struct pt1 *pt1) | |
1045 | { | |
1046 | int i; | |
1047 | for (i = 0; i < 1024; i++) | |
1048 | pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0); | |
1049 | } | |
1050 | ||
1051 | static void __devexit pt1_remove(struct pci_dev *pdev) | |
1052 | { | |
1053 | struct pt1 *pt1; | |
1054 | void __iomem *regs; | |
1055 | ||
1056 | pt1 = pci_get_drvdata(pdev); | |
1057 | regs = pt1->regs; | |
1058 | ||
847e8765 AT |
1059 | if (pt1->kthread) |
1060 | kthread_stop(pt1->kthread); | |
3d17fb1b | 1061 | pt1_cleanup_tables(pt1); |
4d1f413e | 1062 | pt1_cleanup_frontends(pt1); |
3d17fb1b | 1063 | pt1_disable_ram(pt1); |
4d1f413e HT |
1064 | pt1->power = 0; |
1065 | pt1->reset = 1; | |
1066 | pt1_update_power(pt1); | |
1067 | pt1_cleanup_adapters(pt1); | |
3d17fb1b MCC |
1068 | i2c_del_adapter(&pt1->i2c_adap); |
1069 | pci_set_drvdata(pdev, NULL); | |
1070 | kfree(pt1); | |
1071 | pci_iounmap(pdev, regs); | |
1072 | pci_release_regions(pdev); | |
1073 | pci_disable_device(pdev); | |
1074 | } | |
1075 | ||
1076 | static int __devinit | |
1077 | pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent) | |
1078 | { | |
1079 | int ret; | |
1080 | void __iomem *regs; | |
1081 | struct pt1 *pt1; | |
1082 | struct i2c_adapter *i2c_adap; | |
3d17fb1b MCC |
1083 | |
1084 | ret = pci_enable_device(pdev); | |
1085 | if (ret < 0) | |
1086 | goto err; | |
1087 | ||
84d6ae43 | 1088 | ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32)); |
3d17fb1b MCC |
1089 | if (ret < 0) |
1090 | goto err_pci_disable_device; | |
1091 | ||
1092 | pci_set_master(pdev); | |
1093 | ||
1094 | ret = pci_request_regions(pdev, DRIVER_NAME); | |
1095 | if (ret < 0) | |
1096 | goto err_pci_disable_device; | |
1097 | ||
1098 | regs = pci_iomap(pdev, 0, 0); | |
1099 | if (!regs) { | |
1100 | ret = -EIO; | |
1101 | goto err_pci_release_regions; | |
1102 | } | |
1103 | ||
1104 | pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL); | |
1105 | if (!pt1) { | |
1106 | ret = -ENOMEM; | |
1107 | goto err_pci_iounmap; | |
1108 | } | |
1109 | ||
4d1f413e | 1110 | mutex_init(&pt1->lock); |
3d17fb1b MCC |
1111 | pt1->pdev = pdev; |
1112 | pt1->regs = regs; | |
1113 | pci_set_drvdata(pdev, pt1); | |
1114 | ||
4d1f413e HT |
1115 | ret = pt1_init_adapters(pt1); |
1116 | if (ret < 0) | |
1117 | goto err_kfree; | |
1118 | ||
1119 | mutex_init(&pt1->lock); | |
1120 | ||
1121 | pt1->power = 0; | |
1122 | pt1->reset = 1; | |
1123 | pt1_update_power(pt1); | |
1124 | ||
3d17fb1b | 1125 | i2c_adap = &pt1->i2c_adap; |
3d17fb1b MCC |
1126 | i2c_adap->algo = &pt1_i2c_algo; |
1127 | i2c_adap->algo_data = NULL; | |
1128 | i2c_adap->dev.parent = &pdev->dev; | |
cae72c7c | 1129 | strcpy(i2c_adap->name, DRIVER_NAME); |
3d17fb1b MCC |
1130 | i2c_set_adapdata(i2c_adap, pt1); |
1131 | ret = i2c_add_adapter(i2c_adap); | |
1132 | if (ret < 0) | |
4d1f413e | 1133 | goto err_pt1_cleanup_adapters; |
3d17fb1b MCC |
1134 | |
1135 | pt1_i2c_init(pt1); | |
1136 | pt1_i2c_wait(pt1); | |
1137 | ||
1138 | ret = pt1_sync(pt1); | |
1139 | if (ret < 0) | |
1140 | goto err_i2c_del_adapter; | |
1141 | ||
1142 | pt1_identify(pt1); | |
1143 | ||
1144 | ret = pt1_unlock(pt1); | |
1145 | if (ret < 0) | |
1146 | goto err_i2c_del_adapter; | |
1147 | ||
1148 | ret = pt1_reset_pci(pt1); | |
1149 | if (ret < 0) | |
1150 | goto err_i2c_del_adapter; | |
1151 | ||
1152 | ret = pt1_reset_ram(pt1); | |
1153 | if (ret < 0) | |
1154 | goto err_i2c_del_adapter; | |
1155 | ||
1156 | ret = pt1_enable_ram(pt1); | |
1157 | if (ret < 0) | |
1158 | goto err_i2c_del_adapter; | |
1159 | ||
1160 | pt1_init_streams(pt1); | |
1161 | ||
4d1f413e HT |
1162 | pt1->power = 1; |
1163 | pt1_update_power(pt1); | |
3d17fb1b MCC |
1164 | schedule_timeout_uninterruptible((HZ + 49) / 50); |
1165 | ||
4d1f413e HT |
1166 | pt1->reset = 0; |
1167 | pt1_update_power(pt1); | |
3d17fb1b MCC |
1168 | schedule_timeout_uninterruptible((HZ + 999) / 1000); |
1169 | ||
4d1f413e | 1170 | ret = pt1_init_frontends(pt1); |
3d17fb1b MCC |
1171 | if (ret < 0) |
1172 | goto err_pt1_disable_ram; | |
1173 | ||
1174 | ret = pt1_init_tables(pt1); | |
1175 | if (ret < 0) | |
4d1f413e | 1176 | goto err_pt1_cleanup_frontends; |
3d17fb1b | 1177 | |
3d17fb1b MCC |
1178 | return 0; |
1179 | ||
4d1f413e HT |
1180 | err_pt1_cleanup_frontends: |
1181 | pt1_cleanup_frontends(pt1); | |
3d17fb1b MCC |
1182 | err_pt1_disable_ram: |
1183 | pt1_disable_ram(pt1); | |
4d1f413e HT |
1184 | pt1->power = 0; |
1185 | pt1->reset = 1; | |
1186 | pt1_update_power(pt1); | |
3d17fb1b MCC |
1187 | err_i2c_del_adapter: |
1188 | i2c_del_adapter(i2c_adap); | |
cae72c7c HT |
1189 | err_pt1_cleanup_adapters: |
1190 | pt1_cleanup_adapters(pt1); | |
3d17fb1b MCC |
1191 | err_kfree: |
1192 | pci_set_drvdata(pdev, NULL); | |
1193 | kfree(pt1); | |
1194 | err_pci_iounmap: | |
1195 | pci_iounmap(pdev, regs); | |
1196 | err_pci_release_regions: | |
1197 | pci_release_regions(pdev); | |
1198 | err_pci_disable_device: | |
1199 | pci_disable_device(pdev); | |
1200 | err: | |
1201 | return ret; | |
1202 | ||
1203 | } | |
1204 | ||
1205 | static struct pci_device_id pt1_id_table[] = { | |
1206 | { PCI_DEVICE(0x10ee, 0x211a) }, | |
4d1f413e | 1207 | { PCI_DEVICE(0x10ee, 0x222a) }, |
3d17fb1b MCC |
1208 | { }, |
1209 | }; | |
1210 | MODULE_DEVICE_TABLE(pci, pt1_id_table); | |
1211 | ||
1212 | static struct pci_driver pt1_driver = { | |
1213 | .name = DRIVER_NAME, | |
1214 | .probe = pt1_probe, | |
1215 | .remove = __devexit_p(pt1_remove), | |
1216 | .id_table = pt1_id_table, | |
1217 | }; | |
1218 | ||
1219 | ||
1220 | static int __init pt1_init(void) | |
1221 | { | |
1222 | return pci_register_driver(&pt1_driver); | |
1223 | } | |
1224 | ||
1225 | ||
1226 | static void __exit pt1_cleanup(void) | |
1227 | { | |
1228 | pci_unregister_driver(&pt1_driver); | |
1229 | } | |
1230 | ||
1231 | module_init(pt1_init); | |
1232 | module_exit(pt1_cleanup); | |
1233 | ||
1234 | MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>"); | |
4d1f413e | 1235 | MODULE_DESCRIPTION("Earthsoft PT1/PT2 Driver"); |
3d17fb1b | 1236 | MODULE_LICENSE("GPL"); |