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1da177e4 LT |
1 | /* |
2 | * budget-ci.c: driver for the SAA7146 based Budget DVB cards | |
3 | * | |
4 | * Compiled from various sources by Michael Hunold <michael@mihu.de> | |
5 | * | |
6 | * msp430 IR support contributed by Jack Thomasson <jkt@Helius.COM> | |
7 | * partially based on the Siemens DVB driver by Ralph+Marcus Metzler | |
8 | * | |
9 | * CI interface support (c) 2004 Andrew de Quincey <adq_dvb@lidskialf.net> | |
10 | * | |
11 | * This program is free software; you can redistribute it and/or | |
12 | * modify it under the terms of the GNU General Public License | |
13 | * as published by the Free Software Foundation; either version 2 | |
14 | * of the License, or (at your option) any later version. | |
15 | * | |
16 | * | |
17 | * This program is distributed in the hope that it will be useful, | |
18 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | * GNU General Public License for more details. | |
21 | * | |
22 | * | |
23 | * You should have received a copy of the GNU General Public License | |
24 | * along with this program; if not, write to the Free Software | |
25 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
26 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | |
27 | * | |
28 | * | |
29 | * the project's page is at http://www.linuxtv.org/dvb/ | |
30 | */ | |
31 | ||
32 | #include "budget.h" | |
33 | ||
34 | #include <linux/module.h> | |
35 | #include <linux/errno.h> | |
36 | #include <linux/slab.h> | |
37 | #include <linux/interrupt.h> | |
38 | #include <linux/input.h> | |
39 | #include <linux/spinlock.h> | |
40 | ||
41 | #include "dvb_ca_en50221.h" | |
42 | #include "stv0299.h" | |
dc27a169 | 43 | #include "stv0297.h" |
1da177e4 LT |
44 | #include "tda1004x.h" |
45 | ||
46 | #define DEBIADDR_IR 0x1234 | |
47 | #define DEBIADDR_CICONTROL 0x0000 | |
48 | #define DEBIADDR_CIVERSION 0x4000 | |
49 | #define DEBIADDR_IO 0x1000 | |
50 | #define DEBIADDR_ATTR 0x3000 | |
51 | ||
52 | #define CICONTROL_RESET 0x01 | |
53 | #define CICONTROL_ENABLETS 0x02 | |
54 | #define CICONTROL_CAMDETECT 0x08 | |
55 | ||
56 | #define DEBICICTL 0x00420000 | |
57 | #define DEBICICAM 0x02420000 | |
58 | ||
59 | #define SLOTSTATUS_NONE 1 | |
60 | #define SLOTSTATUS_PRESENT 2 | |
61 | #define SLOTSTATUS_RESET 4 | |
62 | #define SLOTSTATUS_READY 8 | |
63 | #define SLOTSTATUS_OCCUPIED (SLOTSTATUS_PRESENT|SLOTSTATUS_RESET|SLOTSTATUS_READY) | |
64 | ||
65 | struct budget_ci { | |
66 | struct budget budget; | |
b7df3910 | 67 | struct input_dev *input_dev; |
1da177e4 LT |
68 | struct tasklet_struct msp430_irq_tasklet; |
69 | struct tasklet_struct ciintf_irq_tasklet; | |
70 | int slot_status; | |
71 | struct dvb_ca_en50221 ca; | |
72 | char ir_dev_name[50]; | |
dd2bbb17 | 73 | u8 tuner_pll_address; /* used for philips_tdm1316l configs */ |
1da177e4 LT |
74 | }; |
75 | ||
76 | /* from reading the following remotes: | |
77 | Zenith Universal 7 / TV Mode 807 / VCR Mode 837 | |
78 | Hauppauge (from NOVA-CI-s box product) | |
79 | i've taken a "middle of the road" approach and note the differences | |
80 | */ | |
81 | static u16 key_map[64] = { | |
82 | /* 0x0X */ | |
83 | KEY_0, KEY_1, KEY_2, KEY_3, KEY_4, KEY_5, KEY_6, KEY_7, KEY_8, | |
84 | KEY_9, | |
85 | KEY_ENTER, | |
86 | KEY_RED, | |
87 | KEY_POWER, /* RADIO on Hauppauge */ | |
88 | KEY_MUTE, | |
89 | 0, | |
90 | KEY_A, /* TV on Hauppauge */ | |
91 | /* 0x1X */ | |
92 | KEY_VOLUMEUP, KEY_VOLUMEDOWN, | |
93 | 0, 0, | |
94 | KEY_B, | |
95 | 0, 0, 0, 0, 0, 0, 0, | |
96 | KEY_UP, KEY_DOWN, | |
97 | KEY_OPTION, /* RESERVED on Hauppauge */ | |
98 | KEY_BREAK, | |
99 | /* 0x2X */ | |
100 | KEY_CHANNELUP, KEY_CHANNELDOWN, | |
101 | KEY_PREVIOUS, /* Prev. Ch on Zenith, SOURCE on Hauppauge */ | |
102 | 0, KEY_RESTART, KEY_OK, | |
103 | KEY_CYCLEWINDOWS, /* MINIMIZE on Hauppauge */ | |
104 | 0, | |
105 | KEY_ENTER, /* VCR mode on Zenith */ | |
106 | KEY_PAUSE, | |
107 | 0, | |
108 | KEY_RIGHT, KEY_LEFT, | |
109 | 0, | |
110 | KEY_MENU, /* FULL SCREEN on Hauppauge */ | |
111 | 0, | |
112 | /* 0x3X */ | |
113 | KEY_SLOW, | |
114 | KEY_PREVIOUS, /* VCR mode on Zenith */ | |
115 | KEY_REWIND, | |
116 | 0, | |
117 | KEY_FASTFORWARD, | |
118 | KEY_PLAY, KEY_STOP, | |
119 | KEY_RECORD, | |
120 | KEY_TUNER, /* TV/VCR on Zenith */ | |
121 | 0, | |
122 | KEY_C, | |
123 | 0, | |
124 | KEY_EXIT, | |
125 | KEY_POWER2, | |
126 | KEY_TUNER, /* VCR mode on Zenith */ | |
127 | 0, | |
128 | }; | |
129 | ||
130 | static void msp430_ir_debounce(unsigned long data) | |
131 | { | |
132 | struct input_dev *dev = (struct input_dev *) data; | |
133 | ||
134 | if (dev->rep[0] == 0 || dev->rep[0] == ~0) { | |
135 | input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0); | |
136 | return; | |
137 | } | |
138 | ||
139 | dev->rep[0] = 0; | |
140 | dev->timer.expires = jiffies + HZ * 350 / 1000; | |
141 | add_timer(&dev->timer); | |
142 | input_event(dev, EV_KEY, key_map[dev->repeat_key], 2); /* REPEAT */ | |
143 | } | |
144 | ||
145 | static void msp430_ir_interrupt(unsigned long data) | |
146 | { | |
147 | struct budget_ci *budget_ci = (struct budget_ci *) data; | |
b7df3910 | 148 | struct input_dev *dev = budget_ci->input_dev; |
1da177e4 LT |
149 | unsigned int code = |
150 | ttpci_budget_debiread(&budget_ci->budget, DEBINOSWAP, DEBIADDR_IR, 2, 1, 0) >> 8; | |
151 | ||
152 | if (code & 0x40) { | |
153 | code &= 0x3f; | |
154 | ||
155 | if (timer_pending(&dev->timer)) { | |
156 | if (code == dev->repeat_key) { | |
157 | ++dev->rep[0]; | |
158 | return; | |
159 | } | |
160 | del_timer(&dev->timer); | |
161 | input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0); | |
162 | } | |
163 | ||
164 | if (!key_map[code]) { | |
165 | printk("DVB (%s): no key for %02x!\n", __FUNCTION__, code); | |
166 | return; | |
167 | } | |
168 | ||
169 | /* initialize debounce and repeat */ | |
170 | dev->repeat_key = code; | |
171 | /* Zenith remote _always_ sends 2 sequences */ | |
172 | dev->rep[0] = ~0; | |
173 | /* 350 milliseconds */ | |
174 | dev->timer.expires = jiffies + HZ * 350 / 1000; | |
175 | /* MAKE */ | |
176 | input_event(dev, EV_KEY, key_map[code], !0); | |
177 | add_timer(&dev->timer); | |
178 | } | |
179 | } | |
180 | ||
181 | static int msp430_ir_init(struct budget_ci *budget_ci) | |
182 | { | |
183 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
b7df3910 | 184 | struct input_dev *input_dev; |
1da177e4 LT |
185 | int i; |
186 | ||
b7df3910 DT |
187 | budget_ci->input_dev = input_dev = input_allocate_device(); |
188 | if (!input_dev) | |
189 | return -ENOMEM; | |
1da177e4 LT |
190 | |
191 | sprintf(budget_ci->ir_dev_name, "Budget-CI dvb ir receiver %s", saa->name); | |
1da177e4 | 192 | |
b7df3910 | 193 | input_dev->name = budget_ci->ir_dev_name; |
1da177e4 | 194 | |
b7df3910 DT |
195 | set_bit(EV_KEY, input_dev->evbit); |
196 | for (i = 0; i < ARRAY_SIZE(key_map); i++) | |
1da177e4 | 197 | if (key_map[i]) |
b7df3910 | 198 | set_bit(key_map[i], input_dev->keybit); |
1da177e4 | 199 | |
b7df3910 | 200 | input_register_device(budget_ci->input_dev); |
1da177e4 | 201 | |
b7df3910 | 202 | input_dev->timer.function = msp430_ir_debounce; |
1da177e4 LT |
203 | |
204 | saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_06); | |
1da177e4 LT |
205 | saa7146_setgpio(saa, 3, SAA7146_GPIO_IRQHI); |
206 | ||
207 | return 0; | |
208 | } | |
209 | ||
210 | static void msp430_ir_deinit(struct budget_ci *budget_ci) | |
211 | { | |
212 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
b7df3910 | 213 | struct input_dev *dev = budget_ci->input_dev; |
1da177e4 LT |
214 | |
215 | saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_06); | |
216 | saa7146_setgpio(saa, 3, SAA7146_GPIO_INPUT); | |
217 | ||
218 | if (del_timer(&dev->timer)) | |
219 | input_event(dev, EV_KEY, key_map[dev->repeat_key], !!0); | |
220 | ||
221 | input_unregister_device(dev); | |
222 | } | |
223 | ||
224 | static int ciintf_read_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address) | |
225 | { | |
226 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
227 | ||
228 | if (slot != 0) | |
229 | return -EINVAL; | |
230 | ||
231 | return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM, | |
232 | DEBIADDR_ATTR | (address & 0xfff), 1, 1, 0); | |
233 | } | |
234 | ||
235 | static int ciintf_write_attribute_mem(struct dvb_ca_en50221 *ca, int slot, int address, u8 value) | |
236 | { | |
237 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
238 | ||
239 | if (slot != 0) | |
240 | return -EINVAL; | |
241 | ||
242 | return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM, | |
243 | DEBIADDR_ATTR | (address & 0xfff), 1, value, 1, 0); | |
244 | } | |
245 | ||
246 | static int ciintf_read_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address) | |
247 | { | |
248 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
249 | ||
250 | if (slot != 0) | |
251 | return -EINVAL; | |
252 | ||
253 | return ttpci_budget_debiread(&budget_ci->budget, DEBICICAM, | |
254 | DEBIADDR_IO | (address & 3), 1, 1, 0); | |
255 | } | |
256 | ||
257 | static int ciintf_write_cam_control(struct dvb_ca_en50221 *ca, int slot, u8 address, u8 value) | |
258 | { | |
259 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
260 | ||
261 | if (slot != 0) | |
262 | return -EINVAL; | |
263 | ||
264 | return ttpci_budget_debiwrite(&budget_ci->budget, DEBICICAM, | |
265 | DEBIADDR_IO | (address & 3), 1, value, 1, 0); | |
266 | } | |
267 | ||
268 | static int ciintf_slot_reset(struct dvb_ca_en50221 *ca, int slot) | |
269 | { | |
270 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
271 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
272 | ||
273 | if (slot != 0) | |
274 | return -EINVAL; | |
275 | ||
276 | // trigger on RISING edge during reset so we know when READY is re-asserted | |
277 | saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI); | |
278 | budget_ci->slot_status = SLOTSTATUS_RESET; | |
279 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0); | |
280 | msleep(1); | |
281 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, | |
282 | CICONTROL_RESET, 1, 0); | |
283 | ||
284 | saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI); | |
285 | ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB); | |
286 | return 0; | |
287 | } | |
288 | ||
289 | static int ciintf_slot_shutdown(struct dvb_ca_en50221 *ca, int slot) | |
290 | { | |
291 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
292 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
293 | ||
294 | if (slot != 0) | |
295 | return -EINVAL; | |
296 | ||
297 | saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTHI); | |
298 | ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTB); | |
299 | return 0; | |
300 | } | |
301 | ||
302 | static int ciintf_slot_ts_enable(struct dvb_ca_en50221 *ca, int slot) | |
303 | { | |
304 | struct budget_ci *budget_ci = (struct budget_ci *) ca->data; | |
305 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
306 | int tmp; | |
307 | ||
308 | if (slot != 0) | |
309 | return -EINVAL; | |
310 | ||
311 | saa7146_setgpio(saa, 1, SAA7146_GPIO_OUTLO); | |
312 | ||
313 | tmp = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0); | |
314 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, | |
315 | tmp | CICONTROL_ENABLETS, 1, 0); | |
316 | ||
317 | ttpci_budget_set_video_port(saa, BUDGET_VIDEO_PORTA); | |
318 | return 0; | |
319 | } | |
320 | ||
321 | static void ciintf_interrupt(unsigned long data) | |
322 | { | |
323 | struct budget_ci *budget_ci = (struct budget_ci *) data; | |
324 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
325 | unsigned int flags; | |
326 | ||
327 | // ensure we don't get spurious IRQs during initialisation | |
328 | if (!budget_ci->budget.ci_present) | |
329 | return; | |
330 | ||
331 | // read the CAM status | |
332 | flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0); | |
333 | if (flags & CICONTROL_CAMDETECT) { | |
334 | ||
335 | // GPIO should be set to trigger on falling edge if a CAM is present | |
336 | saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO); | |
337 | ||
338 | if (budget_ci->slot_status & SLOTSTATUS_NONE) { | |
339 | // CAM insertion IRQ | |
340 | budget_ci->slot_status = SLOTSTATUS_PRESENT; | |
341 | dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, | |
342 | DVB_CA_EN50221_CAMCHANGE_INSERTED); | |
343 | ||
344 | } else if (budget_ci->slot_status & SLOTSTATUS_RESET) { | |
345 | // CAM ready (reset completed) | |
346 | budget_ci->slot_status = SLOTSTATUS_READY; | |
347 | dvb_ca_en50221_camready_irq(&budget_ci->ca, 0); | |
348 | ||
349 | } else if (budget_ci->slot_status & SLOTSTATUS_READY) { | |
350 | // FR/DA IRQ | |
351 | dvb_ca_en50221_frda_irq(&budget_ci->ca, 0); | |
352 | } | |
353 | } else { | |
354 | ||
355 | // trigger on rising edge if a CAM is not present - when a CAM is inserted, we | |
356 | // only want to get the IRQ when it sets READY. If we trigger on the falling edge, | |
357 | // the CAM might not actually be ready yet. | |
358 | saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI); | |
359 | ||
360 | // generate a CAM removal IRQ if we haven't already | |
361 | if (budget_ci->slot_status & SLOTSTATUS_OCCUPIED) { | |
362 | // CAM removal IRQ | |
363 | budget_ci->slot_status = SLOTSTATUS_NONE; | |
364 | dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, | |
365 | DVB_CA_EN50221_CAMCHANGE_REMOVED); | |
366 | } | |
367 | } | |
368 | } | |
369 | ||
370 | static int ciintf_init(struct budget_ci *budget_ci) | |
371 | { | |
372 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
373 | int flags; | |
374 | int result; | |
375 | ||
376 | memset(&budget_ci->ca, 0, sizeof(struct dvb_ca_en50221)); | |
377 | ||
378 | // enable DEBI pins | |
379 | saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16) | 0x800); | |
380 | ||
381 | // test if it is there | |
382 | if ((ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CIVERSION, 1, 1, 0) & 0xa0) != 0xa0) { | |
383 | result = -ENODEV; | |
384 | goto error; | |
385 | } | |
386 | // determine whether a CAM is present or not | |
387 | flags = ttpci_budget_debiread(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 1, 0); | |
388 | budget_ci->slot_status = SLOTSTATUS_NONE; | |
389 | if (flags & CICONTROL_CAMDETECT) | |
390 | budget_ci->slot_status = SLOTSTATUS_PRESENT; | |
391 | ||
392 | // register CI interface | |
393 | budget_ci->ca.owner = THIS_MODULE; | |
394 | budget_ci->ca.read_attribute_mem = ciintf_read_attribute_mem; | |
395 | budget_ci->ca.write_attribute_mem = ciintf_write_attribute_mem; | |
396 | budget_ci->ca.read_cam_control = ciintf_read_cam_control; | |
397 | budget_ci->ca.write_cam_control = ciintf_write_cam_control; | |
398 | budget_ci->ca.slot_reset = ciintf_slot_reset; | |
399 | budget_ci->ca.slot_shutdown = ciintf_slot_shutdown; | |
400 | budget_ci->ca.slot_ts_enable = ciintf_slot_ts_enable; | |
401 | budget_ci->ca.data = budget_ci; | |
fdc53a6d | 402 | if ((result = dvb_ca_en50221_init(&budget_ci->budget.dvb_adapter, |
1da177e4 LT |
403 | &budget_ci->ca, |
404 | DVB_CA_EN50221_FLAG_IRQ_CAMCHANGE | | |
405 | DVB_CA_EN50221_FLAG_IRQ_FR | | |
406 | DVB_CA_EN50221_FLAG_IRQ_DA, 1)) != 0) { | |
407 | printk("budget_ci: CI interface detected, but initialisation failed.\n"); | |
408 | goto error; | |
409 | } | |
410 | // Setup CI slot IRQ | |
411 | tasklet_init(&budget_ci->ciintf_irq_tasklet, ciintf_interrupt, (unsigned long) budget_ci); | |
412 | if (budget_ci->slot_status != SLOTSTATUS_NONE) { | |
413 | saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQLO); | |
414 | } else { | |
415 | saa7146_setgpio(saa, 0, SAA7146_GPIO_IRQHI); | |
416 | } | |
417 | saa7146_write(saa, IER, saa7146_read(saa, IER) | MASK_03); | |
418 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, | |
419 | CICONTROL_RESET, 1, 0); | |
420 | ||
421 | // success! | |
422 | printk("budget_ci: CI interface initialised\n"); | |
423 | budget_ci->budget.ci_present = 1; | |
424 | ||
425 | // forge a fake CI IRQ so the CAM state is setup correctly | |
426 | flags = DVB_CA_EN50221_CAMCHANGE_REMOVED; | |
427 | if (budget_ci->slot_status != SLOTSTATUS_NONE) | |
428 | flags = DVB_CA_EN50221_CAMCHANGE_INSERTED; | |
429 | dvb_ca_en50221_camchange_irq(&budget_ci->ca, 0, flags); | |
430 | ||
431 | return 0; | |
432 | ||
433 | error: | |
434 | saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16)); | |
435 | return result; | |
436 | } | |
437 | ||
438 | static void ciintf_deinit(struct budget_ci *budget_ci) | |
439 | { | |
440 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
441 | ||
442 | // disable CI interrupts | |
443 | saa7146_write(saa, IER, saa7146_read(saa, IER) & ~MASK_03); | |
444 | saa7146_setgpio(saa, 0, SAA7146_GPIO_INPUT); | |
445 | tasklet_kill(&budget_ci->ciintf_irq_tasklet); | |
446 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, 0, 1, 0); | |
447 | msleep(1); | |
448 | ttpci_budget_debiwrite(&budget_ci->budget, DEBICICTL, DEBIADDR_CICONTROL, 1, | |
449 | CICONTROL_RESET, 1, 0); | |
450 | ||
451 | // disable TS data stream to CI interface | |
452 | saa7146_setgpio(saa, 1, SAA7146_GPIO_INPUT); | |
453 | ||
454 | // release the CA device | |
455 | dvb_ca_en50221_release(&budget_ci->ca); | |
456 | ||
457 | // disable DEBI pins | |
458 | saa7146_write(saa, MC1, saa7146_read(saa, MC1) | (0x800 << 16)); | |
459 | } | |
460 | ||
461 | static void budget_ci_irq(struct saa7146_dev *dev, u32 * isr) | |
462 | { | |
463 | struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv; | |
464 | ||
465 | dprintk(8, "dev: %p, budget_ci: %p\n", dev, budget_ci); | |
466 | ||
467 | if (*isr & MASK_06) | |
468 | tasklet_schedule(&budget_ci->msp430_irq_tasklet); | |
469 | ||
470 | if (*isr & MASK_10) | |
471 | ttpci_budget_irq10_handler(dev, isr); | |
472 | ||
473 | if ((*isr & MASK_03) && (budget_ci->budget.ci_present)) | |
474 | tasklet_schedule(&budget_ci->ciintf_irq_tasklet); | |
475 | } | |
476 | ||
477 | ||
478 | static u8 alps_bsru6_inittab[] = { | |
479 | 0x01, 0x15, | |
480 | 0x02, 0x00, | |
481 | 0x03, 0x00, | |
482 | 0x04, 0x7d, /* F22FR = 0x7d, F22 = f_VCO / 128 / 0x7d = 22 kHz */ | |
483 | 0x05, 0x35, /* I2CT = 0, SCLT = 1, SDAT = 1 */ | |
484 | 0x06, 0x40, /* DAC not used, set to high impendance mode */ | |
485 | 0x07, 0x00, /* DAC LSB */ | |
486 | 0x08, 0x40, /* DiSEqC off, LNB power on OP2/LOCK pin on */ | |
487 | 0x09, 0x00, /* FIFO */ | |
488 | 0x0c, 0x51, /* OP1 ctl = Normal, OP1 val = 1 (LNB Power ON) */ | |
489 | 0x0d, 0x82, /* DC offset compensation = ON, beta_agc1 = 2 */ | |
490 | 0x0e, 0x23, /* alpha_tmg = 2, beta_tmg = 3 */ | |
491 | 0x10, 0x3f, // AGC2 0x3d | |
492 | 0x11, 0x84, | |
ff29d06a | 493 | 0x12, 0xb9, |
1da177e4 LT |
494 | 0x15, 0xc9, // lock detector threshold |
495 | 0x16, 0x00, | |
496 | 0x17, 0x00, | |
497 | 0x18, 0x00, | |
498 | 0x19, 0x00, | |
499 | 0x1a, 0x00, | |
500 | 0x1f, 0x50, | |
501 | 0x20, 0x00, | |
502 | 0x21, 0x00, | |
503 | 0x22, 0x00, | |
504 | 0x23, 0x00, | |
505 | 0x28, 0x00, // out imp: normal out type: parallel FEC mode:0 | |
506 | 0x29, 0x1e, // 1/2 threshold | |
507 | 0x2a, 0x14, // 2/3 threshold | |
508 | 0x2b, 0x0f, // 3/4 threshold | |
509 | 0x2c, 0x09, // 5/6 threshold | |
510 | 0x2d, 0x05, // 7/8 threshold | |
511 | 0x2e, 0x01, | |
512 | 0x31, 0x1f, // test all FECs | |
513 | 0x32, 0x19, // viterbi and synchro search | |
514 | 0x33, 0xfc, // rs control | |
515 | 0x34, 0x93, // error control | |
516 | 0x0f, 0x52, | |
517 | 0xff, 0xff | |
518 | }; | |
519 | ||
520 | static int alps_bsru6_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio) | |
521 | { | |
522 | u8 aclk = 0; | |
523 | u8 bclk = 0; | |
524 | ||
525 | if (srate < 1500000) { | |
526 | aclk = 0xb7; | |
527 | bclk = 0x47; | |
528 | } else if (srate < 3000000) { | |
529 | aclk = 0xb7; | |
530 | bclk = 0x4b; | |
531 | } else if (srate < 7000000) { | |
532 | aclk = 0xb7; | |
533 | bclk = 0x4f; | |
534 | } else if (srate < 14000000) { | |
535 | aclk = 0xb7; | |
536 | bclk = 0x53; | |
537 | } else if (srate < 30000000) { | |
538 | aclk = 0xb6; | |
539 | bclk = 0x53; | |
540 | } else if (srate < 45000000) { | |
541 | aclk = 0xb4; | |
542 | bclk = 0x51; | |
543 | } | |
544 | ||
545 | stv0299_writereg(fe, 0x13, aclk); | |
546 | stv0299_writereg(fe, 0x14, bclk); | |
547 | stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); | |
548 | stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); | |
549 | stv0299_writereg(fe, 0x21, (ratio) & 0xf0); | |
550 | ||
551 | return 0; | |
552 | } | |
553 | ||
cfbfce15 | 554 | static int alps_bsru6_pll_set(struct dvb_frontend *fe, struct i2c_adapter *i2c, struct dvb_frontend_parameters *params) |
1da177e4 | 555 | { |
1da177e4 LT |
556 | u8 buf[4]; |
557 | u32 div; | |
558 | struct i2c_msg msg = {.addr = 0x61,.flags = 0,.buf = buf,.len = sizeof(buf) }; | |
559 | ||
560 | if ((params->frequency < 950000) || (params->frequency > 2150000)) | |
561 | return -EINVAL; | |
562 | ||
563 | div = (params->frequency + (125 - 1)) / 125; // round correctly | |
564 | buf[0] = (div >> 8) & 0x7f; | |
565 | buf[1] = div & 0xff; | |
566 | buf[2] = 0x80 | ((div & 0x18000) >> 10) | 4; | |
567 | buf[3] = 0xC4; | |
568 | ||
569 | if (params->frequency > 1530000) | |
570 | buf[3] = 0xc0; | |
571 | ||
cfbfce15 | 572 | if (i2c_transfer(i2c, &msg, 1) != 1) |
1da177e4 LT |
573 | return -EIO; |
574 | return 0; | |
575 | } | |
576 | ||
577 | static struct stv0299_config alps_bsru6_config = { | |
578 | ||
579 | .demod_address = 0x68, | |
580 | .inittab = alps_bsru6_inittab, | |
581 | .mclk = 88000000UL, | |
582 | .invert = 1, | |
1da177e4 LT |
583 | .skip_reinit = 0, |
584 | .lock_output = STV0229_LOCKOUTPUT_1, | |
585 | .volt13_op0_op1 = STV0299_VOLT13_OP1, | |
586 | .min_delay_ms = 100, | |
587 | .set_symbol_rate = alps_bsru6_set_symbol_rate, | |
588 | .pll_set = alps_bsru6_pll_set, | |
589 | }; | |
590 | ||
591 | ||
592 | ||
593 | ||
594 | static u8 philips_su1278_tt_inittab[] = { | |
595 | 0x01, 0x0f, | |
596 | 0x02, 0x30, | |
597 | 0x03, 0x00, | |
598 | 0x04, 0x5b, | |
599 | 0x05, 0x85, | |
600 | 0x06, 0x02, | |
601 | 0x07, 0x00, | |
602 | 0x08, 0x02, | |
603 | 0x09, 0x00, | |
604 | 0x0C, 0x01, | |
605 | 0x0D, 0x81, | |
606 | 0x0E, 0x44, | |
607 | 0x0f, 0x14, | |
608 | 0x10, 0x3c, | |
609 | 0x11, 0x84, | |
610 | 0x12, 0xda, | |
611 | 0x13, 0x97, | |
612 | 0x14, 0x95, | |
613 | 0x15, 0xc9, | |
614 | 0x16, 0x19, | |
615 | 0x17, 0x8c, | |
616 | 0x18, 0x59, | |
617 | 0x19, 0xf8, | |
618 | 0x1a, 0xfe, | |
619 | 0x1c, 0x7f, | |
620 | 0x1d, 0x00, | |
621 | 0x1e, 0x00, | |
622 | 0x1f, 0x50, | |
623 | 0x20, 0x00, | |
624 | 0x21, 0x00, | |
625 | 0x22, 0x00, | |
626 | 0x23, 0x00, | |
627 | 0x28, 0x00, | |
628 | 0x29, 0x28, | |
629 | 0x2a, 0x14, | |
630 | 0x2b, 0x0f, | |
631 | 0x2c, 0x09, | |
632 | 0x2d, 0x09, | |
633 | 0x31, 0x1f, | |
634 | 0x32, 0x19, | |
635 | 0x33, 0xfc, | |
636 | 0x34, 0x93, | |
637 | 0xff, 0xff | |
638 | }; | |
639 | ||
640 | static int philips_su1278_tt_set_symbol_rate(struct dvb_frontend *fe, u32 srate, u32 ratio) | |
641 | { | |
642 | stv0299_writereg(fe, 0x0e, 0x44); | |
643 | if (srate >= 10000000) { | |
644 | stv0299_writereg(fe, 0x13, 0x97); | |
645 | stv0299_writereg(fe, 0x14, 0x95); | |
646 | stv0299_writereg(fe, 0x15, 0xc9); | |
647 | stv0299_writereg(fe, 0x17, 0x8c); | |
648 | stv0299_writereg(fe, 0x1a, 0xfe); | |
649 | stv0299_writereg(fe, 0x1c, 0x7f); | |
650 | stv0299_writereg(fe, 0x2d, 0x09); | |
651 | } else { | |
652 | stv0299_writereg(fe, 0x13, 0x99); | |
653 | stv0299_writereg(fe, 0x14, 0x8d); | |
654 | stv0299_writereg(fe, 0x15, 0xce); | |
655 | stv0299_writereg(fe, 0x17, 0x43); | |
656 | stv0299_writereg(fe, 0x1a, 0x1d); | |
657 | stv0299_writereg(fe, 0x1c, 0x12); | |
658 | stv0299_writereg(fe, 0x2d, 0x05); | |
659 | } | |
660 | stv0299_writereg(fe, 0x0e, 0x23); | |
661 | stv0299_writereg(fe, 0x0f, 0x94); | |
662 | stv0299_writereg(fe, 0x10, 0x39); | |
663 | stv0299_writereg(fe, 0x15, 0xc9); | |
664 | ||
665 | stv0299_writereg(fe, 0x1f, (ratio >> 16) & 0xff); | |
666 | stv0299_writereg(fe, 0x20, (ratio >> 8) & 0xff); | |
667 | stv0299_writereg(fe, 0x21, (ratio) & 0xf0); | |
668 | ||
669 | return 0; | |
670 | } | |
671 | ||
672 | static int philips_su1278_tt_pll_set(struct dvb_frontend *fe, | |
cfbfce15 | 673 | struct i2c_adapter *i2c, |
1da177e4 LT |
674 | struct dvb_frontend_parameters *params) |
675 | { | |
1da177e4 LT |
676 | u32 div; |
677 | u8 buf[4]; | |
678 | struct i2c_msg msg = {.addr = 0x60,.flags = 0,.buf = buf,.len = sizeof(buf) }; | |
679 | ||
680 | if ((params->frequency < 950000) || (params->frequency > 2150000)) | |
681 | return -EINVAL; | |
682 | ||
683 | div = (params->frequency + (500 - 1)) / 500; // round correctly | |
684 | buf[0] = (div >> 8) & 0x7f; | |
685 | buf[1] = div & 0xff; | |
686 | buf[2] = 0x80 | ((div & 0x18000) >> 10) | 2; | |
687 | buf[3] = 0x20; | |
688 | ||
689 | if (params->u.qpsk.symbol_rate < 4000000) | |
690 | buf[3] |= 1; | |
691 | ||
692 | if (params->frequency < 1250000) | |
693 | buf[3] |= 0; | |
694 | else if (params->frequency < 1550000) | |
695 | buf[3] |= 0x40; | |
696 | else if (params->frequency < 2050000) | |
697 | buf[3] |= 0x80; | |
698 | else if (params->frequency < 2150000) | |
699 | buf[3] |= 0xC0; | |
700 | ||
cfbfce15 | 701 | if (i2c_transfer(i2c, &msg, 1) != 1) |
1da177e4 LT |
702 | return -EIO; |
703 | return 0; | |
704 | } | |
705 | ||
706 | static struct stv0299_config philips_su1278_tt_config = { | |
707 | ||
708 | .demod_address = 0x68, | |
709 | .inittab = philips_su1278_tt_inittab, | |
710 | .mclk = 64000000UL, | |
711 | .invert = 0, | |
1da177e4 LT |
712 | .skip_reinit = 1, |
713 | .lock_output = STV0229_LOCKOUTPUT_1, | |
714 | .volt13_op0_op1 = STV0299_VOLT13_OP1, | |
715 | .min_delay_ms = 50, | |
716 | .set_symbol_rate = philips_su1278_tt_set_symbol_rate, | |
717 | .pll_set = philips_su1278_tt_pll_set, | |
718 | }; | |
719 | ||
720 | ||
721 | ||
722 | static int philips_tdm1316l_pll_init(struct dvb_frontend *fe) | |
723 | { | |
724 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | |
725 | static u8 td1316_init[] = { 0x0b, 0xf5, 0x85, 0xab }; | |
726 | static u8 disable_mc44BC374c[] = { 0x1d, 0x74, 0xa0, 0x68 }; | |
dd2bbb17 | 727 | struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = td1316_init,.len = |
1da177e4 LT |
728 | sizeof(td1316_init) }; |
729 | ||
730 | // setup PLL configuration | |
731 | if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) | |
732 | return -EIO; | |
733 | msleep(1); | |
734 | ||
735 | // disable the mc44BC374c (do not check for errors) | |
736 | tuner_msg.addr = 0x65; | |
737 | tuner_msg.buf = disable_mc44BC374c; | |
738 | tuner_msg.len = sizeof(disable_mc44BC374c); | |
739 | if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) { | |
740 | i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1); | |
741 | } | |
742 | ||
743 | return 0; | |
744 | } | |
745 | ||
746 | static int philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) | |
747 | { | |
748 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | |
749 | u8 tuner_buf[4]; | |
dd2bbb17 | 750 | struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address,.flags = 0,.buf = tuner_buf,.len = sizeof(tuner_buf) }; |
1da177e4 LT |
751 | int tuner_frequency = 0; |
752 | u8 band, cp, filter; | |
753 | ||
754 | // determine charge pump | |
755 | tuner_frequency = params->frequency + 36130000; | |
756 | if (tuner_frequency < 87000000) | |
757 | return -EINVAL; | |
758 | else if (tuner_frequency < 130000000) | |
759 | cp = 3; | |
760 | else if (tuner_frequency < 160000000) | |
761 | cp = 5; | |
762 | else if (tuner_frequency < 200000000) | |
763 | cp = 6; | |
764 | else if (tuner_frequency < 290000000) | |
765 | cp = 3; | |
766 | else if (tuner_frequency < 420000000) | |
767 | cp = 5; | |
768 | else if (tuner_frequency < 480000000) | |
769 | cp = 6; | |
770 | else if (tuner_frequency < 620000000) | |
771 | cp = 3; | |
772 | else if (tuner_frequency < 830000000) | |
773 | cp = 5; | |
774 | else if (tuner_frequency < 895000000) | |
775 | cp = 7; | |
776 | else | |
777 | return -EINVAL; | |
778 | ||
779 | // determine band | |
780 | if (params->frequency < 49000000) | |
781 | return -EINVAL; | |
782 | else if (params->frequency < 159000000) | |
783 | band = 1; | |
784 | else if (params->frequency < 444000000) | |
785 | band = 2; | |
786 | else if (params->frequency < 861000000) | |
787 | band = 4; | |
788 | else | |
789 | return -EINVAL; | |
790 | ||
791 | // setup PLL filter and TDA9889 | |
792 | switch (params->u.ofdm.bandwidth) { | |
793 | case BANDWIDTH_6_MHZ: | |
794 | tda1004x_write_byte(fe, 0x0C, 0x14); | |
795 | filter = 0; | |
796 | break; | |
797 | ||
798 | case BANDWIDTH_7_MHZ: | |
799 | tda1004x_write_byte(fe, 0x0C, 0x80); | |
800 | filter = 0; | |
801 | break; | |
802 | ||
803 | case BANDWIDTH_8_MHZ: | |
804 | tda1004x_write_byte(fe, 0x0C, 0x14); | |
805 | filter = 1; | |
806 | break; | |
807 | ||
808 | default: | |
809 | return -EINVAL; | |
810 | } | |
811 | ||
812 | // calculate divisor | |
813 | // ((36130000+((1000000/6)/2)) + Finput)/(1000000/6) | |
814 | tuner_frequency = (((params->frequency / 1000) * 6) + 217280) / 1000; | |
815 | ||
816 | // setup tuner buffer | |
817 | tuner_buf[0] = tuner_frequency >> 8; | |
818 | tuner_buf[1] = tuner_frequency & 0xff; | |
819 | tuner_buf[2] = 0xca; | |
820 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
821 | ||
822 | if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) | |
823 | return -EIO; | |
824 | ||
825 | msleep(1); | |
826 | return 0; | |
827 | } | |
828 | ||
829 | static int philips_tdm1316l_request_firmware(struct dvb_frontend *fe, | |
830 | const struct firmware **fw, char *name) | |
831 | { | |
832 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | |
833 | ||
834 | return request_firmware(fw, name, &budget_ci->budget.dev->pci->dev); | |
835 | } | |
836 | ||
837 | static struct tda1004x_config philips_tdm1316l_config = { | |
838 | ||
839 | .demod_address = 0x8, | |
840 | .invert = 0, | |
841 | .invert_oclk = 0, | |
ecb60deb HH |
842 | .xtal_freq = TDA10046_XTAL_4M, |
843 | .agc_config = TDA10046_AGC_DEFAULT, | |
844 | .if_freq = TDA10046_FREQ_3617, | |
1da177e4 LT |
845 | .pll_init = philips_tdm1316l_pll_init, |
846 | .pll_set = philips_tdm1316l_pll_set, | |
ecb60deb | 847 | .pll_sleep = NULL, |
1da177e4 LT |
848 | .request_firmware = philips_tdm1316l_request_firmware, |
849 | }; | |
850 | ||
dc27a169 AQ |
851 | static int dvbc_philips_tdm1316l_pll_set(struct dvb_frontend *fe, struct dvb_frontend_parameters *params) |
852 | { | |
853 | struct budget_ci *budget_ci = (struct budget_ci *) fe->dvb->priv; | |
854 | u8 tuner_buf[5]; | |
855 | struct i2c_msg tuner_msg = {.addr = budget_ci->tuner_pll_address, | |
856 | .flags = 0, | |
857 | .buf = tuner_buf, | |
858 | .len = sizeof(tuner_buf) }; | |
859 | int tuner_frequency = 0; | |
860 | u8 band, cp, filter; | |
861 | ||
862 | // determine charge pump | |
863 | tuner_frequency = params->frequency + 36125000; | |
864 | if (tuner_frequency < 87000000) | |
865 | return -EINVAL; | |
866 | else if (tuner_frequency < 130000000) { | |
867 | cp = 3; | |
868 | band = 1; | |
869 | } else if (tuner_frequency < 160000000) { | |
870 | cp = 5; | |
871 | band = 1; | |
872 | } else if (tuner_frequency < 200000000) { | |
873 | cp = 6; | |
874 | band = 1; | |
875 | } else if (tuner_frequency < 290000000) { | |
876 | cp = 3; | |
877 | band = 2; | |
878 | } else if (tuner_frequency < 420000000) { | |
879 | cp = 5; | |
880 | band = 2; | |
881 | } else if (tuner_frequency < 480000000) { | |
882 | cp = 6; | |
883 | band = 2; | |
884 | } else if (tuner_frequency < 620000000) { | |
885 | cp = 3; | |
886 | band = 4; | |
887 | } else if (tuner_frequency < 830000000) { | |
888 | cp = 5; | |
889 | band = 4; | |
890 | } else if (tuner_frequency < 895000000) { | |
891 | cp = 7; | |
892 | band = 4; | |
893 | } else | |
894 | return -EINVAL; | |
895 | ||
896 | // assume PLL filter should always be 8MHz for the moment. | |
897 | filter = 1; | |
898 | ||
899 | // calculate divisor | |
900 | tuner_frequency = (params->frequency + 36125000 + (62500/2)) / 62500; | |
901 | ||
902 | // setup tuner buffer | |
903 | tuner_buf[0] = tuner_frequency >> 8; | |
904 | tuner_buf[1] = tuner_frequency & 0xff; | |
905 | tuner_buf[2] = 0xc8; | |
906 | tuner_buf[3] = (cp << 5) | (filter << 3) | band; | |
907 | tuner_buf[4] = 0x80; | |
908 | ||
909 | stv0297_enable_plli2c(fe); | |
910 | if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) | |
911 | return -EIO; | |
912 | ||
913 | msleep(50); | |
914 | ||
915 | stv0297_enable_plli2c(fe); | |
916 | if (i2c_transfer(&budget_ci->budget.i2c_adap, &tuner_msg, 1) != 1) | |
917 | return -EIO; | |
918 | ||
919 | msleep(1); | |
920 | ||
921 | return 0; | |
922 | } | |
923 | ||
924 | static u8 dvbc_philips_tdm1316l_inittab[] = { | |
925 | 0x80, 0x01, | |
926 | 0x80, 0x00, | |
927 | 0x81, 0x01, | |
928 | 0x81, 0x00, | |
929 | 0x00, 0x09, | |
930 | 0x01, 0x69, | |
931 | 0x03, 0x00, | |
932 | 0x04, 0x00, | |
933 | 0x07, 0x00, | |
934 | 0x08, 0x00, | |
935 | 0x20, 0x00, | |
936 | 0x21, 0x40, | |
937 | 0x22, 0x00, | |
938 | 0x23, 0x00, | |
939 | 0x24, 0x40, | |
940 | 0x25, 0x88, | |
941 | 0x30, 0xff, | |
942 | 0x31, 0x00, | |
943 | 0x32, 0xff, | |
944 | 0x33, 0x00, | |
945 | 0x34, 0x50, | |
946 | 0x35, 0x7f, | |
947 | 0x36, 0x00, | |
948 | 0x37, 0x20, | |
949 | 0x38, 0x00, | |
950 | 0x40, 0x1c, | |
951 | 0x41, 0xff, | |
952 | 0x42, 0x29, | |
953 | 0x43, 0x20, | |
954 | 0x44, 0xff, | |
955 | 0x45, 0x00, | |
956 | 0x46, 0x00, | |
957 | 0x49, 0x04, | |
958 | 0x4a, 0x00, | |
959 | 0x4b, 0x7b, | |
960 | 0x52, 0x30, | |
961 | 0x55, 0xae, | |
962 | 0x56, 0x47, | |
963 | 0x57, 0xe1, | |
964 | 0x58, 0x3a, | |
965 | 0x5a, 0x1e, | |
966 | 0x5b, 0x34, | |
967 | 0x60, 0x00, | |
968 | 0x63, 0x00, | |
969 | 0x64, 0x00, | |
970 | 0x65, 0x00, | |
971 | 0x66, 0x00, | |
972 | 0x67, 0x00, | |
973 | 0x68, 0x00, | |
974 | 0x69, 0x00, | |
975 | 0x6a, 0x02, | |
976 | 0x6b, 0x00, | |
977 | 0x70, 0xff, | |
978 | 0x71, 0x00, | |
979 | 0x72, 0x00, | |
980 | 0x73, 0x00, | |
981 | 0x74, 0x0c, | |
982 | 0x80, 0x00, | |
983 | 0x81, 0x00, | |
984 | 0x82, 0x00, | |
985 | 0x83, 0x00, | |
986 | 0x84, 0x04, | |
987 | 0x85, 0x80, | |
988 | 0x86, 0x24, | |
989 | 0x87, 0x78, | |
990 | 0x88, 0x10, | |
991 | 0x89, 0x00, | |
992 | 0x90, 0x01, | |
993 | 0x91, 0x01, | |
994 | 0xa0, 0x04, | |
995 | 0xa1, 0x00, | |
996 | 0xa2, 0x00, | |
997 | 0xb0, 0x91, | |
998 | 0xb1, 0x0b, | |
999 | 0xc0, 0x53, | |
1000 | 0xc1, 0x70, | |
1001 | 0xc2, 0x12, | |
1002 | 0xd0, 0x00, | |
1003 | 0xd1, 0x00, | |
1004 | 0xd2, 0x00, | |
1005 | 0xd3, 0x00, | |
1006 | 0xd4, 0x00, | |
1007 | 0xd5, 0x00, | |
1008 | 0xde, 0x00, | |
1009 | 0xdf, 0x00, | |
1010 | 0x61, 0x38, | |
1011 | 0x62, 0x0a, | |
1012 | 0x53, 0x13, | |
1013 | 0x59, 0x08, | |
1014 | 0xff, 0xff, | |
1015 | }; | |
1016 | ||
1017 | static struct stv0297_config dvbc_philips_tdm1316l_config = { | |
1018 | .demod_address = 0x1c, | |
1019 | .inittab = dvbc_philips_tdm1316l_inittab, | |
1020 | .invert = 0, | |
1021 | .pll_set = dvbc_philips_tdm1316l_pll_set, | |
1022 | }; | |
1023 | ||
1024 | ||
1da177e4 LT |
1025 | |
1026 | ||
1027 | static void frontend_init(struct budget_ci *budget_ci) | |
1028 | { | |
1029 | switch (budget_ci->budget.dev->pci->subsystem_device) { | |
1030 | case 0x100c: // Hauppauge/TT Nova-CI budget (stv0299/ALPS BSRU6(tsa5059)) | |
1031 | budget_ci->budget.dvb_frontend = | |
1032 | stv0299_attach(&alps_bsru6_config, &budget_ci->budget.i2c_adap); | |
1033 | if (budget_ci->budget.dvb_frontend) { | |
1034 | break; | |
1035 | } | |
1036 | break; | |
1037 | ||
1038 | case 0x100f: // Hauppauge/TT Nova-CI budget (stv0299b/Philips su1278(tsa5059)) | |
1039 | budget_ci->budget.dvb_frontend = | |
1040 | stv0299_attach(&philips_su1278_tt_config, &budget_ci->budget.i2c_adap); | |
1041 | if (budget_ci->budget.dvb_frontend) { | |
1042 | break; | |
1043 | } | |
1044 | break; | |
1045 | ||
dc27a169 AQ |
1046 | case 0x1010: // TT DVB-C CI budget (stv0297/Philips tdm1316l(tda6651tt)) |
1047 | budget_ci->tuner_pll_address = 0x61; | |
1048 | budget_ci->budget.dvb_frontend = | |
1049 | stv0297_attach(&dvbc_philips_tdm1316l_config, &budget_ci->budget.i2c_adap); | |
1050 | if (budget_ci->budget.dvb_frontend) { | |
1051 | break; | |
1052 | } | |
1053 | break; | |
1054 | ||
1da177e4 | 1055 | case 0x1011: // Hauppauge/TT Nova-T budget (tda10045/Philips tdm1316l(tda6651tt) + TDA9889) |
dd2bbb17 | 1056 | budget_ci->tuner_pll_address = 0x63; |
1da177e4 LT |
1057 | budget_ci->budget.dvb_frontend = |
1058 | tda10045_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap); | |
1059 | if (budget_ci->budget.dvb_frontend) { | |
1060 | break; | |
1061 | } | |
1062 | break; | |
dd2bbb17 | 1063 | |
dc27a169 | 1064 | case 0x1012: // TT DVB-T CI budget (tda10046/Philips tdm1316l(tda6651tt)) |
dd2bbb17 AQ |
1065 | budget_ci->tuner_pll_address = 0x60; |
1066 | budget_ci->budget.dvb_frontend = | |
1067 | tda10046_attach(&philips_tdm1316l_config, &budget_ci->budget.i2c_adap); | |
1068 | if (budget_ci->budget.dvb_frontend) { | |
1069 | break; | |
1070 | } | |
1071 | break; | |
1da177e4 LT |
1072 | } |
1073 | ||
1074 | if (budget_ci->budget.dvb_frontend == NULL) { | |
1075 | printk("budget-ci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n", | |
1076 | budget_ci->budget.dev->pci->vendor, | |
1077 | budget_ci->budget.dev->pci->device, | |
1078 | budget_ci->budget.dev->pci->subsystem_vendor, | |
1079 | budget_ci->budget.dev->pci->subsystem_device); | |
1080 | } else { | |
1081 | if (dvb_register_frontend | |
fdc53a6d | 1082 | (&budget_ci->budget.dvb_adapter, budget_ci->budget.dvb_frontend)) { |
1da177e4 LT |
1083 | printk("budget-ci: Frontend registration failed!\n"); |
1084 | if (budget_ci->budget.dvb_frontend->ops->release) | |
1085 | budget_ci->budget.dvb_frontend->ops->release(budget_ci->budget.dvb_frontend); | |
1086 | budget_ci->budget.dvb_frontend = NULL; | |
1087 | } | |
1088 | } | |
1089 | } | |
1090 | ||
1091 | static int budget_ci_attach(struct saa7146_dev *dev, struct saa7146_pci_extension_data *info) | |
1092 | { | |
1093 | struct budget_ci *budget_ci; | |
1094 | int err; | |
1095 | ||
1096 | if (!(budget_ci = kmalloc(sizeof(struct budget_ci), GFP_KERNEL))) | |
1097 | return -ENOMEM; | |
1098 | ||
1099 | dprintk(2, "budget_ci: %p\n", budget_ci); | |
1100 | ||
1101 | budget_ci->budget.ci_present = 0; | |
1102 | ||
1103 | dev->ext_priv = budget_ci; | |
1104 | ||
1105 | if ((err = ttpci_budget_init(&budget_ci->budget, dev, info, THIS_MODULE))) { | |
1106 | kfree(budget_ci); | |
1107 | return err; | |
1108 | } | |
1109 | ||
1110 | tasklet_init(&budget_ci->msp430_irq_tasklet, msp430_ir_interrupt, | |
1111 | (unsigned long) budget_ci); | |
1112 | ||
1113 | msp430_ir_init(budget_ci); | |
1114 | ||
1115 | ciintf_init(budget_ci); | |
1116 | ||
fdc53a6d | 1117 | budget_ci->budget.dvb_adapter.priv = budget_ci; |
1da177e4 LT |
1118 | frontend_init(budget_ci); |
1119 | ||
1120 | return 0; | |
1121 | } | |
1122 | ||
1123 | static int budget_ci_detach(struct saa7146_dev *dev) | |
1124 | { | |
1125 | struct budget_ci *budget_ci = (struct budget_ci *) dev->ext_priv; | |
1126 | struct saa7146_dev *saa = budget_ci->budget.dev; | |
1127 | int err; | |
1128 | ||
1129 | if (budget_ci->budget.ci_present) | |
1130 | ciintf_deinit(budget_ci); | |
1131 | if (budget_ci->budget.dvb_frontend) | |
1132 | dvb_unregister_frontend(budget_ci->budget.dvb_frontend); | |
1133 | err = ttpci_budget_deinit(&budget_ci->budget); | |
1134 | ||
1135 | tasklet_kill(&budget_ci->msp430_irq_tasklet); | |
1136 | ||
1137 | msp430_ir_deinit(budget_ci); | |
1138 | ||
1139 | // disable frontend and CI interface | |
1140 | saa7146_setgpio(saa, 2, SAA7146_GPIO_INPUT); | |
1141 | ||
1142 | kfree(budget_ci); | |
1143 | ||
1144 | return err; | |
1145 | } | |
1146 | ||
1147 | static struct saa7146_extension budget_extension; | |
1148 | ||
1149 | MAKE_BUDGET_INFO(ttbci, "TT-Budget/WinTV-NOVA-CI PCI", BUDGET_TT_HW_DISEQC); | |
1150 | MAKE_BUDGET_INFO(ttbt2, "TT-Budget/WinTV-NOVA-T PCI", BUDGET_TT); | |
dd2bbb17 | 1151 | MAKE_BUDGET_INFO(ttbtci, "TT-Budget-T-CI PCI", BUDGET_TT); |
dc27a169 | 1152 | MAKE_BUDGET_INFO(ttbcci, "TT-Budget-C-CI PCI", BUDGET_TT); |
1da177e4 LT |
1153 | |
1154 | static struct pci_device_id pci_tbl[] = { | |
1155 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100c), | |
1156 | MAKE_EXTENSION_PCI(ttbci, 0x13c2, 0x100f), | |
dc27a169 | 1157 | MAKE_EXTENSION_PCI(ttbcci, 0x13c2, 0x1010), |
1da177e4 | 1158 | MAKE_EXTENSION_PCI(ttbt2, 0x13c2, 0x1011), |
dd2bbb17 | 1159 | MAKE_EXTENSION_PCI(ttbtci, 0x13c2, 0x1012), |
1da177e4 LT |
1160 | { |
1161 | .vendor = 0, | |
1162 | } | |
1163 | }; | |
1164 | ||
1165 | MODULE_DEVICE_TABLE(pci, pci_tbl); | |
1166 | ||
1167 | static struct saa7146_extension budget_extension = { | |
1168 | .name = "budget_ci dvb\0", | |
69459f3d | 1169 | .flags = SAA7146_I2C_SHORT_DELAY, |
1da177e4 LT |
1170 | |
1171 | .module = THIS_MODULE, | |
1172 | .pci_tbl = &pci_tbl[0], | |
1173 | .attach = budget_ci_attach, | |
1174 | .detach = budget_ci_detach, | |
1175 | ||
1176 | .irq_mask = MASK_03 | MASK_06 | MASK_10, | |
1177 | .irq_func = budget_ci_irq, | |
1178 | }; | |
1179 | ||
1180 | static int __init budget_ci_init(void) | |
1181 | { | |
1182 | return saa7146_register_extension(&budget_extension); | |
1183 | } | |
1184 | ||
1185 | static void __exit budget_ci_exit(void) | |
1186 | { | |
1187 | saa7146_unregister_extension(&budget_extension); | |
1188 | } | |
1189 | ||
1190 | module_init(budget_ci_init); | |
1191 | module_exit(budget_ci_exit); | |
1192 | ||
1193 | MODULE_LICENSE("GPL"); | |
1194 | MODULE_AUTHOR("Michael Hunold, Jack Thomasson, Andrew de Quincey, others"); | |
1195 | MODULE_DESCRIPTION("driver for the SAA7146 based so-called " | |
1196 | "budget PCI DVB cards w/ CI-module produced by " | |
1197 | "Siemens, Technotrend, Hauppauge"); |