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[mirror_ubuntu-artful-kernel.git] / drivers / media / dvb / ttpci / budget-patch.c
CommitLineData
1da177e4
LT
1/*
2 * budget-patch.c: driver for Budget Patch,
3 * hardware modification of DVB-S cards enabling full TS
4 *
5 * Written by Emard <emard@softhome.net>
6 *
7 * Original idea by Roberto Deza <rdeza@unav.es>
8 *
9 * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic
10 * and Metzlerbros
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version 2
15 * of the License, or (at your option) any later version.
16 *
17 *
18 * This program is distributed in the hope that it will be useful,
19 * but WITHOUT ANY WARRANTY; without even the implied warranty of
20 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
21 * GNU General Public License for more details.
22 *
23 *
24 * You should have received a copy of the GNU General Public License
25 * along with this program; if not, write to the Free Software
26 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
27 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
28 *
29 *
631dd1a8 30 * the project's page is at http://www.linuxtv.org/
1da177e4
LT
31 */
32
33#include "av7110.h"
34#include "av7110_hw.h"
35#include "budget.h"
36#include "stv0299.h"
37#include "ves1x93.h"
38#include "tda8083.h"
39
265366e8
PA
40#include "bsru6.h"
41
26dc4d04
JG
42DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
43
1da177e4
LT
44#define budget_patch budget
45
46static struct saa7146_extension budget_extension;
47
48MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH);
49//MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC);
50
51static struct pci_device_id pci_tbl[] = {
9101e622 52 MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000),
1da177e4 53// MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013),
9101e622
MCC
54 {
55 .vendor = 0,
56 }
1da177e4
LT
57};
58
59/* those lines are for budget-patch to be tried
60** on a true budget card and observe the
61** behaviour of VSYNC generated by rps1.
62** this code was shamelessly copy/pasted from budget.c
63*/
64static void gpio_Set22K (struct budget *budget, int state)
65{
66 struct saa7146_dev *dev=budget->dev;
67 dprintk(2, "budget: %p\n", budget);
68 saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO));
69}
70
71/* Diseqc functions only for TT Budget card */
72/* taken from the Skyvision DVB driver by
73 Ralph Metzler <rjkm@metzlerbros.de> */
74
75static void DiseqcSendBit (struct budget *budget, int data)
76{
77 struct saa7146_dev *dev=budget->dev;
78 dprintk(2, "budget: %p\n", budget);
79
80 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
81 udelay(data ? 500 : 1000);
82 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
83 udelay(data ? 1000 : 500);
84}
85
86static void DiseqcSendByte (struct budget *budget, int data)
87{
88 int i, par=1, d;
89
90 dprintk(2, "budget: %p\n", budget);
91
92 for (i=7; i>=0; i--) {
93 d = (data>>i)&1;
94 par ^= d;
95 DiseqcSendBit(budget, d);
96 }
97
98 DiseqcSendBit(budget, par);
99}
100
101static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst)
102{
103 struct saa7146_dev *dev=budget->dev;
104 int i;
105
106 dprintk(2, "budget: %p\n", budget);
107
108 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
109 mdelay(16);
110
111 for (i=0; i<len; i++)
112 DiseqcSendByte(budget, msg[i]);
113
114 mdelay(16);
115
116 if (burst!=-1) {
117 if (burst)
118 DiseqcSendByte(budget, 0xff);
119 else {
120 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
db210426
TM
121 mdelay(12);
122 udelay(500);
1da177e4
LT
123 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
124 }
125 msleep(20);
126 }
127
128 return 0;
129}
130
131/* shamelessly copy/pasted from budget.c
132*/
133static int budget_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
134{
135 struct budget* budget = (struct budget*) fe->dvb->priv;
136
137 switch (tone) {
138 case SEC_TONE_ON:
139 gpio_Set22K (budget, 1);
140 break;
141
142 case SEC_TONE_OFF:
143 gpio_Set22K (budget, 0);
144 break;
145
146 default:
147 return -EINVAL;
148 }
149
150 return 0;
151}
152
153static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
154{
155 struct budget* budget = (struct budget*) fe->dvb->priv;
156
157 SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0);
158
159 return 0;
160}
161
162static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
163{
164 struct budget* budget = (struct budget*) fe->dvb->priv;
165
166 SendDiSEqCMsg (budget, 0, NULL, minicmd);
167
168 return 0;
169}
170
171static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length)
172{
9101e622
MCC
173 int i;
174
175 dprintk(2, "budget: %p\n", budget);
176
177 for (i = 2; i < length; i++)
178 {
179 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0);
180 msleep(5);
181 }
182 if (length)
183 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0);
184 else
185 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0);
186 msleep(5);
187 ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0);
188 msleep(5);
189 return 0;
1da177e4
LT
190}
191
192static void av7110_set22k(struct budget_patch *budget, int state)
193{
9101e622 194 u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0};
1da177e4 195
9101e622
MCC
196 dprintk(2, "budget: %p\n", budget);
197 budget_av7110_send_fw_cmd(budget, buf, 2);
1da177e4
LT
198}
199
200static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst)
201{
9101e622
MCC
202 int i;
203 u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC),
204 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 };
1da177e4 205
9101e622 206 dprintk(2, "budget: %p\n", budget);
1da177e4 207
9101e622
MCC
208 if (len>10)
209 len=10;
1da177e4 210
9101e622
MCC
211 buf[1] = len+2;
212 buf[2] = len;
1da177e4 213
9101e622
MCC
214 if (burst != -1)
215 buf[3]=burst ? 0x01 : 0x00;
216 else
217 buf[3]=0xffff;
1da177e4 218
9101e622
MCC
219 for (i=0; i<len; i++)
220 buf[i+4]=msg[i];
1da177e4 221
9101e622
MCC
222 budget_av7110_send_fw_cmd(budget, buf, 18);
223 return 0;
1da177e4
LT
224}
225
226static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone)
227{
228 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
229
230 switch (tone) {
231 case SEC_TONE_ON:
232 av7110_set22k (budget, 1);
233 break;
234
235 case SEC_TONE_OFF:
236 av7110_set22k (budget, 0);
237 break;
238
239 default:
240 return -EINVAL;
241 }
242
243 return 0;
244}
245
246static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd)
247{
248 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
249
250 av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0);
251
252 return 0;
253}
254
255static int budget_patch_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd)
256{
257 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
258
259 av7110_send_diseqc_msg (budget, 0, NULL, minicmd);
260
261 return 0;
262}
263
2d15fd2f 264static int alps_bsrv2_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1da177e4
LT
265{
266 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
267 u8 pwr = 0;
268 u8 buf[4];
269 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
270 u32 div = (params->frequency + 479500) / 125;
271
272 if (params->frequency > 2000000) pwr = 3;
273 else if (params->frequency > 1800000) pwr = 2;
274 else if (params->frequency > 1600000) pwr = 1;
275 else if (params->frequency > 1200000) pwr = 0;
276 else if (params->frequency >= 1100000) pwr = 1;
277 else pwr = 2;
278
279 buf[0] = (div >> 8) & 0x7f;
280 buf[1] = div & 0xff;
281 buf[2] = ((div & 0x18000) >> 10) | 0x95;
282 buf[3] = (pwr << 6) | 0x30;
283
9101e622 284 // NOTE: since we're using a prescaler of 2, we set the
1da177e4
LT
285 // divisor frequency to 62.5kHz and divide by 125 above
286
dea74869
PB
287 if (fe->ops.i2c_gate_ctrl)
288 fe->ops.i2c_gate_ctrl(fe, 1);
2d15fd2f
AQ
289 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
290 return -EIO;
1da177e4
LT
291 return 0;
292}
293
294static struct ves1x93_config alps_bsrv2_config = {
295 .demod_address = 0x08,
296 .xin = 90100000UL,
297 .invert_pwm = 0,
1da177e4
LT
298};
299
2d15fd2f 300static int grundig_29504_451_tuner_set_params(struct dvb_frontend* fe, struct dvb_frontend_parameters* params)
1da177e4
LT
301{
302 struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv;
303 u32 div;
304 u8 data[4];
305 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
306
307 div = params->frequency / 125;
308 data[0] = (div >> 8) & 0x7f;
309 data[1] = div & 0xff;
310 data[2] = 0x8e;
311 data[3] = 0x00;
312
dea74869
PB
313 if (fe->ops.i2c_gate_ctrl)
314 fe->ops.i2c_gate_ctrl(fe, 1);
2d15fd2f
AQ
315 if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1)
316 return -EIO;
1da177e4
LT
317 return 0;
318}
319
320static struct tda8083_config grundig_29504_451_config = {
321 .demod_address = 0x68,
1da177e4
LT
322};
323
324static void frontend_init(struct budget_patch* budget)
325{
326 switch(budget->dev->pci->subsystem_device) {
327 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
9101e622 328 case 0x1013: // SATELCO Multimedia PCI
1da177e4
LT
329
330 // try the ALPS BSRV2 first of all
2bfe031d 331 budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap);
1da177e4 332 if (budget->dvb_frontend) {
dea74869
PB
333 budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
334 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd;
335 budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst;
336 budget->dvb_frontend->ops.set_tone = budget_patch_set_tone;
1da177e4
LT
337 break;
338 }
339
340 // try the ALPS BSRU6 now
2bfe031d 341 budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap);
1da177e4 342 if (budget->dvb_frontend) {
dea74869 343 budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
2d15fd2f
AQ
344 budget->dvb_frontend->tuner_priv = &budget->i2c_adap;
345
dea74869
PB
346 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
347 budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
348 budget->dvb_frontend->ops.set_tone = budget_set_tone;
1da177e4
LT
349 break;
350 }
351
352 // Try the grundig 29504-451
2bfe031d 353 budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap);
1da177e4 354 if (budget->dvb_frontend) {
dea74869
PB
355 budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
356 budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd;
357 budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst;
358 budget->dvb_frontend->ops.set_tone = budget_set_tone;
1da177e4
LT
359 break;
360 }
361 break;
362 }
363
364 if (budget->dvb_frontend == NULL) {
29e66a6c 365 printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
1da177e4
LT
366 budget->dev->pci->vendor,
367 budget->dev->pci->device,
368 budget->dev->pci->subsystem_vendor,
369 budget->dev->pci->subsystem_device);
370 } else {
fdc53a6d 371 if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) {
1da177e4 372 printk("budget-av: Frontend registration failed!\n");
f52a838b 373 dvb_frontend_detach(budget->dvb_frontend);
1da177e4
LT
374 budget->dvb_frontend = NULL;
375 }
376 }
377}
378
379/* written by Emard */
380static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info)
381{
9101e622
MCC
382 struct budget_patch *budget;
383 int err;
1da177e4
LT
384 int count = 0;
385 int detected = 0;
386
387#define PATCH_RESET 0
388#define RPS_IRQ 0
389#define HPS_SETUP 0
390#if PATCH_RESET
9101e622
MCC
391 saa7146_write(dev, MC1, MASK_31);
392 msleep(40);
1da177e4
LT
393#endif
394#if HPS_SETUP
9101e622
MCC
395 // initialize registers. Better to have it like this
396 // than leaving something unconfigured
1da177e4
LT
397 saa7146_write(dev, DD1_STREAM_B, 0);
398 // port B VSYNC at rising edge
399 saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too!
400 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
401
402 // debi config
403 // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18);
404
9101e622
MCC
405 // zero all HPS registers
406 saa7146_write(dev, HPS_H_PRESCALE, 0); // r68
407 saa7146_write(dev, HPS_H_SCALE, 0); // r6c
408 saa7146_write(dev, BCS_CTRL, 0); // r70
409 saa7146_write(dev, HPS_V_SCALE, 0); // r60
410 saa7146_write(dev, HPS_V_GAIN, 0); // r64
411 saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74
412 saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78
413 // Set HPS prescaler for port B input
414 saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) );
415 saa7146_write(dev, MC2,
416 0 * (MASK_08 | MASK_24) | // BRS control
417 0 * (MASK_09 | MASK_25) | // a
418 0 * (MASK_10 | MASK_26) | // b
419 1 * (MASK_06 | MASK_22) | // HPS_CTRL1
420 1 * (MASK_05 | MASK_21) | // HPS_CTRL2
421 0 * (MASK_01 | MASK_15) // DEBI
422 );
1da177e4
LT
423#endif
424 // Disable RPS1 and RPS0
9101e622
MCC
425 saa7146_write(dev, MC1, ( MASK_29 | MASK_28));
426 // RPS1 timeout disable
427 saa7146_write(dev, RPS_TOV1, 0);
1da177e4
LT
428
429 // code for autodetection
430 // will wait for VBI_B event (vertical blank at port B)
431 // and will reset GPIO3 after VBI_B is detected.
432 // (GPIO3 should be raised high by CPU to
433 // test if GPIO3 will generate vertical blank signal
434 // in budget patch GPIO3 is connected to VSYNC_B
435 count = 0;
436#if 0
153755a7
AV
437 WRITE_RPS1(CMD_UPLOAD |
438 MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 );
1da177e4 439#endif
153755a7
AV
440 WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
441 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
442 WRITE_RPS1(GPIO3_MSK);
443 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4 444#if RPS_IRQ
9101e622 445 // issue RPS1 interrupt to increment counter
153755a7 446 WRITE_RPS1(CMD_INTERRUPT);
9101e622 447 // at least a NOP is neede between two interrupts
153755a7 448 WRITE_RPS1(CMD_NOP);
9101e622 449 // interrupt again
153755a7 450 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 451#endif
153755a7 452 WRITE_RPS1(CMD_STOP);
1da177e4
LT
453
454#if RPS_IRQ
9101e622
MCC
455 // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
456 // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
457 // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
458 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
af901ca1 459 // set event counter 1 threshold to maximum allowed value (rEC p55)
9101e622 460 saa7146_write(dev, ECT1R, 0x3fff );
1da177e4 461#endif
9101e622
MCC
462 // Fix VSYNC level
463 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
464 // Set RPS1 Address register to point to RPS code (r108 p42)
465 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
466 // Enable RPS1, (rFC p33)
467 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
1da177e4
LT
468
469
9101e622
MCC
470 mdelay(50);
471 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
1da177e4
LT
472 mdelay(150);
473
474
475 if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0)
476 detected = 1;
477
478#if RPS_IRQ
9101e622 479 printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
1da177e4
LT
480#endif
481 // Disable RPS1
9101e622 482 saa7146_write(dev, MC1, ( MASK_29 ));
1da177e4
LT
483
484 if(detected == 0)
9101e622
MCC
485 printk("budget-patch not detected or saa7146 in non-default state.\n"
486 "try enabling ressetting of 7146 with MASK_31 in MC1 register\n");
1da177e4
LT
487
488 else
9101e622 489 printk("BUDGET-PATCH DETECTED.\n");
1da177e4
LT
490
491
492/* OLD (Original design by Roberto Deza):
493** This code will setup the SAA7146_RPS1 to generate a square
494** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of
495** TS_WIDTH packets) has been acquired on SAA7146_D1B video port;
496** then, this GPIO3 output which is connected to the D1B_VSYNC
497** input, will trigger the acquisition of the alternate field
498** and so on.
499** Currently, the TT_budget / WinTV_Nova cards have two ICs
500** (74HCT4040, LVC74) for the generation of this VSYNC signal,
501** which seems that can be done perfectly without this :-)).
502*/
503
504/* New design (By Emard)
505** this rps1 code will copy internal HS event to GPIO3 pin.
0779bf2d 506** GPIO3 is in budget-patch hardware connected to port B VSYNC
1da177e4
LT
507
508** HS is an internal event of 7146, accessible with RPS
509** and temporarily raised high every n lines
510** (n in defined in the RPS_THRESH1 counter threshold)
511** I think HS is raised high on the beginning of the n-th line
512** and remains high until this n-th line that triggered
0779bf2d 513** it is completely received. When the reception of n-th line
1da177e4
LT
514** ends, HS is lowered.
515
516** To transmit data over DMA, 7146 needs changing state at
517** port B VSYNC pin. Any changing of port B VSYNC will
518** cause some DMA data transfer, with more or less packets loss.
519** It depends on the phase and frequency of VSYNC and
520** the way of 7146 is instructed to trigger on port B (defined
521** in DD1_INIT register, 3rd nibble from the right valid
522** numbers are 0-7, see datasheet)
523**
524** The correct triggering can minimize packet loss,
525** dvbtraffic should give this stable bandwidths:
526** 22k transponder = 33814 kbit/s
527** 27.5k transponder = 38045 kbit/s
528** by experiment it is found that the best results
529** (stable bandwidths and almost no packet loss)
530** are obtained using DD1_INIT triggering number 2
531** (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
532** and a VSYNC phase that occurs in the middle of DMA transfer
533** (about byte 188*512=96256 in the DMA window).
534**
535** Phase of HS is still not clear to me how to control,
536** It just happens to be so. It can be seen if one enables
537** RPS_IRQ and print Event Counter 1 in vpeirq(). Every
538** time RPS_INTERRUPT is called, the Event Counter 1 will
539** increment. That's how the 7146 is programmed to do event
540** counting in this budget-patch.c
541** I *think* HPS setting has something to do with the phase
542** of HS but I cant be 100% sure in that.
543
544** hardware debug note: a working budget card (including budget patch)
545** with vpeirq() interrupt setup in mode "0x90" (every 64K) will
546** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
0779bf2d 547** and that means 3*25=75 Hz of interrupt frequency, as seen by
1da177e4
LT
548** watch cat /proc/interrupts
549**
550** If this frequency is 3x lower (and data received in the DMA
551** buffer don't start with 0x47, but in the middle of packets,
552** whose lengths appear to be like 188 292 188 104 etc.
553** this means VSYNC line is not connected in the hardware.
554** (check soldering pcb and pins)
555** The same behaviour of missing VSYNC can be duplicated on budget
0779bf2d 556** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble.
1da177e4
LT
557*/
558
559 // Setup RPS1 "program" (p35)
9101e622 560 count = 0;
1da177e4
LT
561
562
9101e622 563 // Wait Source Line Counter Threshold (p36)
153755a7 564 WRITE_RPS1(CMD_PAUSE | EVT_HS);
9101e622 565 // Set GPIO3=1 (p42)
153755a7
AV
566 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
567 WRITE_RPS1(GPIO3_MSK);
568 WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
1da177e4 569#if RPS_IRQ
9101e622 570 // issue RPS1 interrupt
153755a7 571 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 572#endif
9101e622 573 // Wait reset Source Line Counter Threshold (p36)
153755a7 574 WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
9101e622 575 // Set GPIO3=0 (p42)
153755a7
AV
576 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
577 WRITE_RPS1(GPIO3_MSK);
578 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4 579#if RPS_IRQ
9101e622 580 // issue RPS1 interrupt
153755a7 581 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 582#endif
9101e622 583 // Jump to begin of RPS program (p37)
153755a7
AV
584 WRITE_RPS1(CMD_JUMP);
585 WRITE_RPS1(dev->d_rps1.dma_handle);
1da177e4 586
9101e622
MCC
587 // Fix VSYNC level
588 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
589 // Set RPS1 Address register to point to RPS code (r108 p42)
590 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
afa47abf
IS
591
592 if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL)))
593 return -ENOMEM;
594
595 dprintk(2, "budget: %p\n", budget);
596
26dc4d04
JG
597 err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr);
598 if (err) {
599 kfree(budget);
afa47abf
IS
600 return err;
601 }
602
9101e622
MCC
603 // Set Source Line Counter Threshold, using BRS (rCC p43)
604 // It generates HS event every TS_HEIGHT lines
605 // this is related to TS_WIDTH set in register
606 // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE
607 // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188
608 //,then RPS_THRESH1
609 // should be set to trigger every TS_HEIGHT (512) lines.
610 //
afa47abf 611 saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 );
9101e622
MCC
612
613 // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 );
614 // Enable RPS1 (rFC p33)
615 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
616
617
9101e622 618 dev->ext_priv = budget;
1da177e4 619
fdc53a6d 620 budget->dvb_adapter.priv = budget;
1da177e4
LT
621 frontend_init(budget);
622
32e4c3a5
OE
623 ttpci_budget_init_hooks(budget);
624
9101e622 625 return 0;
1da177e4
LT
626}
627
628static int budget_patch_detach (struct saa7146_dev* dev)
629{
9101e622
MCC
630 struct budget_patch *budget = (struct budget_patch*) dev->ext_priv;
631 int err;
1da177e4 632
2bfe031d
AQ
633 if (budget->dvb_frontend) {
634 dvb_unregister_frontend(budget->dvb_frontend);
f52a838b 635 dvb_frontend_detach(budget->dvb_frontend);
2bfe031d 636 }
9101e622 637 err = ttpci_budget_deinit (budget);
1da177e4 638
9101e622 639 kfree (budget);
1da177e4 640
9101e622 641 return err;
1da177e4
LT
642}
643
644static int __init budget_patch_init(void)
645{
646 return saa7146_register_extension(&budget_extension);
647}
648
649static void __exit budget_patch_exit(void)
650{
9101e622 651 saa7146_unregister_extension(&budget_extension);
1da177e4
LT
652}
653
654static struct saa7146_extension budget_extension = {
0e367a15 655 .name = "budget_patch dvb",
9101e622 656 .flags = 0,
1da177e4 657
9101e622
MCC
658 .module = THIS_MODULE,
659 .pci_tbl = pci_tbl,
660 .attach = budget_patch_attach,
661 .detach = budget_patch_detach,
1da177e4 662
9101e622
MCC
663 .irq_mask = MASK_10,
664 .irq_func = ttpci_budget_irq10_handler,
1da177e4
LT
665};
666
667module_init(budget_patch_init);
668module_exit(budget_patch_exit);
669
670MODULE_LICENSE("GPL");
671MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others");
672MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 "
9101e622 673 "based so-called Budget Patch cards");