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1da177e4 LT |
1 | /* |
2 | * budget-patch.c: driver for Budget Patch, | |
3 | * hardware modification of DVB-S cards enabling full TS | |
4 | * | |
5 | * Written by Emard <emard@softhome.net> | |
6 | * | |
7 | * Original idea by Roberto Deza <rdeza@unav.es> | |
8 | * | |
9 | * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic | |
10 | * and Metzlerbros | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version 2 | |
15 | * of the License, or (at your option) any later version. | |
16 | * | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
23 | * | |
24 | * You should have received a copy of the GNU General Public License | |
25 | * along with this program; if not, write to the Free Software | |
26 | * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | |
27 | * Or, point your browser to http://www.gnu.org/copyleft/gpl.html | |
28 | * | |
29 | * | |
30 | * the project's page is at http://www.linuxtv.org/dvb/ | |
31 | */ | |
32 | ||
33 | #include "av7110.h" | |
34 | #include "av7110_hw.h" | |
35 | #include "budget.h" | |
36 | #include "stv0299.h" | |
37 | #include "ves1x93.h" | |
38 | #include "tda8083.h" | |
39 | ||
265366e8 PA |
40 | #include "bsru6.h" |
41 | ||
1da177e4 LT |
42 | #define budget_patch budget |
43 | ||
44 | static struct saa7146_extension budget_extension; | |
45 | ||
46 | MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH); | |
47 | //MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC); | |
48 | ||
49 | static struct pci_device_id pci_tbl[] = { | |
9101e622 | 50 | MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000), |
1da177e4 | 51 | // MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), |
9101e622 MCC |
52 | { |
53 | .vendor = 0, | |
54 | } | |
1da177e4 LT |
55 | }; |
56 | ||
57 | /* those lines are for budget-patch to be tried | |
58 | ** on a true budget card and observe the | |
59 | ** behaviour of VSYNC generated by rps1. | |
60 | ** this code was shamelessly copy/pasted from budget.c | |
61 | */ | |
62 | static void gpio_Set22K (struct budget *budget, int state) | |
63 | { | |
64 | struct saa7146_dev *dev=budget->dev; | |
65 | dprintk(2, "budget: %p\n", budget); | |
66 | saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO)); | |
67 | } | |
68 | ||
69 | /* Diseqc functions only for TT Budget card */ | |
70 | /* taken from the Skyvision DVB driver by | |
71 | Ralph Metzler <rjkm@metzlerbros.de> */ | |
72 | ||
73 | static void DiseqcSendBit (struct budget *budget, int data) | |
74 | { | |
75 | struct saa7146_dev *dev=budget->dev; | |
76 | dprintk(2, "budget: %p\n", budget); | |
77 | ||
78 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
79 | udelay(data ? 500 : 1000); | |
80 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
81 | udelay(data ? 1000 : 500); | |
82 | } | |
83 | ||
84 | static void DiseqcSendByte (struct budget *budget, int data) | |
85 | { | |
86 | int i, par=1, d; | |
87 | ||
88 | dprintk(2, "budget: %p\n", budget); | |
89 | ||
90 | for (i=7; i>=0; i--) { | |
91 | d = (data>>i)&1; | |
92 | par ^= d; | |
93 | DiseqcSendBit(budget, d); | |
94 | } | |
95 | ||
96 | DiseqcSendBit(budget, par); | |
97 | } | |
98 | ||
99 | static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst) | |
100 | { | |
101 | struct saa7146_dev *dev=budget->dev; | |
102 | int i; | |
103 | ||
104 | dprintk(2, "budget: %p\n", budget); | |
105 | ||
106 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
107 | mdelay(16); | |
108 | ||
109 | for (i=0; i<len; i++) | |
110 | DiseqcSendByte(budget, msg[i]); | |
111 | ||
112 | mdelay(16); | |
113 | ||
114 | if (burst!=-1) { | |
115 | if (burst) | |
116 | DiseqcSendByte(budget, 0xff); | |
117 | else { | |
118 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
119 | udelay(12500); | |
120 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
121 | } | |
122 | msleep(20); | |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
128 | /* shamelessly copy/pasted from budget.c | |
129 | */ | |
130 | static int budget_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
131 | { | |
132 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
133 | ||
134 | switch (tone) { | |
135 | case SEC_TONE_ON: | |
136 | gpio_Set22K (budget, 1); | |
137 | break; | |
138 | ||
139 | case SEC_TONE_OFF: | |
140 | gpio_Set22K (budget, 0); | |
141 | break; | |
142 | ||
143 | default: | |
144 | return -EINVAL; | |
145 | } | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | |
151 | { | |
152 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
153 | ||
154 | SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0); | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
159 | static int budget_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | |
160 | { | |
161 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
162 | ||
163 | SendDiSEqCMsg (budget, 0, NULL, minicmd); | |
164 | ||
165 | return 0; | |
166 | } | |
167 | ||
168 | static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length) | |
169 | { | |
9101e622 MCC |
170 | int i; |
171 | ||
172 | dprintk(2, "budget: %p\n", budget); | |
173 | ||
174 | for (i = 2; i < length; i++) | |
175 | { | |
176 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0); | |
177 | msleep(5); | |
178 | } | |
179 | if (length) | |
180 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0); | |
181 | else | |
182 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0); | |
183 | msleep(5); | |
184 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0); | |
185 | msleep(5); | |
186 | return 0; | |
1da177e4 LT |
187 | } |
188 | ||
189 | static void av7110_set22k(struct budget_patch *budget, int state) | |
190 | { | |
9101e622 | 191 | u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0}; |
1da177e4 | 192 | |
9101e622 MCC |
193 | dprintk(2, "budget: %p\n", budget); |
194 | budget_av7110_send_fw_cmd(budget, buf, 2); | |
1da177e4 LT |
195 | } |
196 | ||
197 | static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst) | |
198 | { | |
9101e622 MCC |
199 | int i; |
200 | u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC), | |
201 | 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; | |
1da177e4 | 202 | |
9101e622 | 203 | dprintk(2, "budget: %p\n", budget); |
1da177e4 | 204 | |
9101e622 MCC |
205 | if (len>10) |
206 | len=10; | |
1da177e4 | 207 | |
9101e622 MCC |
208 | buf[1] = len+2; |
209 | buf[2] = len; | |
1da177e4 | 210 | |
9101e622 MCC |
211 | if (burst != -1) |
212 | buf[3]=burst ? 0x01 : 0x00; | |
213 | else | |
214 | buf[3]=0xffff; | |
1da177e4 | 215 | |
9101e622 MCC |
216 | for (i=0; i<len; i++) |
217 | buf[i+4]=msg[i]; | |
1da177e4 | 218 | |
9101e622 MCC |
219 | budget_av7110_send_fw_cmd(budget, buf, 18); |
220 | return 0; | |
1da177e4 LT |
221 | } |
222 | ||
223 | static int budget_patch_set_tone(struct dvb_frontend* fe, fe_sec_tone_mode_t tone) | |
224 | { | |
225 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
226 | ||
227 | switch (tone) { | |
228 | case SEC_TONE_ON: | |
229 | av7110_set22k (budget, 1); | |
230 | break; | |
231 | ||
232 | case SEC_TONE_OFF: | |
233 | av7110_set22k (budget, 0); | |
234 | break; | |
235 | ||
236 | default: | |
237 | return -EINVAL; | |
238 | } | |
239 | ||
240 | return 0; | |
241 | } | |
242 | ||
243 | static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | |
244 | { | |
245 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
246 | ||
247 | av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0); | |
248 | ||
249 | return 0; | |
250 | } | |
251 | ||
252 | static int budget_patch_diseqc_send_burst(struct dvb_frontend* fe, fe_sec_mini_cmd_t minicmd) | |
253 | { | |
254 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
255 | ||
256 | av7110_send_diseqc_msg (budget, 0, NULL, minicmd); | |
257 | ||
258 | return 0; | |
259 | } | |
260 | ||
261 | static int alps_bsrv2_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) | |
262 | { | |
263 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
264 | u8 pwr = 0; | |
265 | u8 buf[4]; | |
266 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; | |
267 | u32 div = (params->frequency + 479500) / 125; | |
268 | ||
269 | if (params->frequency > 2000000) pwr = 3; | |
270 | else if (params->frequency > 1800000) pwr = 2; | |
271 | else if (params->frequency > 1600000) pwr = 1; | |
272 | else if (params->frequency > 1200000) pwr = 0; | |
273 | else if (params->frequency >= 1100000) pwr = 1; | |
274 | else pwr = 2; | |
275 | ||
276 | buf[0] = (div >> 8) & 0x7f; | |
277 | buf[1] = div & 0xff; | |
278 | buf[2] = ((div & 0x18000) >> 10) | 0x95; | |
279 | buf[3] = (pwr << 6) | 0x30; | |
280 | ||
9101e622 | 281 | // NOTE: since we're using a prescaler of 2, we set the |
1da177e4 LT |
282 | // divisor frequency to 62.5kHz and divide by 125 above |
283 | ||
284 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | |
285 | return 0; | |
286 | } | |
287 | ||
288 | static struct ves1x93_config alps_bsrv2_config = { | |
289 | .demod_address = 0x08, | |
290 | .xin = 90100000UL, | |
291 | .invert_pwm = 0, | |
292 | .pll_set = alps_bsrv2_pll_set, | |
293 | }; | |
294 | ||
1da177e4 LT |
295 | static int grundig_29504_451_pll_set(struct dvb_frontend* fe, struct dvb_frontend_parameters* params) |
296 | { | |
297 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
298 | u32 div; | |
299 | u8 data[4]; | |
300 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | |
301 | ||
302 | div = params->frequency / 125; | |
303 | data[0] = (div >> 8) & 0x7f; | |
304 | data[1] = div & 0xff; | |
305 | data[2] = 0x8e; | |
306 | data[3] = 0x00; | |
307 | ||
308 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) return -EIO; | |
309 | return 0; | |
310 | } | |
311 | ||
312 | static struct tda8083_config grundig_29504_451_config = { | |
313 | .demod_address = 0x68, | |
314 | .pll_set = grundig_29504_451_pll_set, | |
315 | }; | |
316 | ||
317 | static void frontend_init(struct budget_patch* budget) | |
318 | { | |
319 | switch(budget->dev->pci->subsystem_device) { | |
320 | case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X | |
9101e622 | 321 | case 0x1013: // SATELCO Multimedia PCI |
1da177e4 LT |
322 | |
323 | // try the ALPS BSRV2 first of all | |
324 | budget->dvb_frontend = ves1x93_attach(&alps_bsrv2_config, &budget->i2c_adap); | |
325 | if (budget->dvb_frontend) { | |
326 | budget->dvb_frontend->ops->diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd; | |
327 | budget->dvb_frontend->ops->diseqc_send_burst = budget_patch_diseqc_send_burst; | |
328 | budget->dvb_frontend->ops->set_tone = budget_patch_set_tone; | |
329 | break; | |
330 | } | |
331 | ||
332 | // try the ALPS BSRU6 now | |
333 | budget->dvb_frontend = stv0299_attach(&alps_bsru6_config, &budget->i2c_adap); | |
334 | if (budget->dvb_frontend) { | |
335 | budget->dvb_frontend->ops->diseqc_send_master_cmd = budget_diseqc_send_master_cmd; | |
336 | budget->dvb_frontend->ops->diseqc_send_burst = budget_diseqc_send_burst; | |
337 | budget->dvb_frontend->ops->set_tone = budget_set_tone; | |
338 | break; | |
339 | } | |
340 | ||
341 | // Try the grundig 29504-451 | |
342 | budget->dvb_frontend = tda8083_attach(&grundig_29504_451_config, &budget->i2c_adap); | |
343 | if (budget->dvb_frontend) { | |
344 | budget->dvb_frontend->ops->diseqc_send_master_cmd = budget_diseqc_send_master_cmd; | |
345 | budget->dvb_frontend->ops->diseqc_send_burst = budget_diseqc_send_burst; | |
346 | budget->dvb_frontend->ops->set_tone = budget_set_tone; | |
347 | break; | |
348 | } | |
349 | break; | |
350 | } | |
351 | ||
352 | if (budget->dvb_frontend == NULL) { | |
353 | printk("dvb-ttpci: A frontend driver was not found for device %04x/%04x subsystem %04x/%04x\n", | |
354 | budget->dev->pci->vendor, | |
355 | budget->dev->pci->device, | |
356 | budget->dev->pci->subsystem_vendor, | |
357 | budget->dev->pci->subsystem_device); | |
358 | } else { | |
fdc53a6d | 359 | if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) { |
1da177e4 LT |
360 | printk("budget-av: Frontend registration failed!\n"); |
361 | if (budget->dvb_frontend->ops->release) | |
362 | budget->dvb_frontend->ops->release(budget->dvb_frontend); | |
363 | budget->dvb_frontend = NULL; | |
364 | } | |
365 | } | |
366 | } | |
367 | ||
368 | /* written by Emard */ | |
369 | static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info) | |
370 | { | |
9101e622 MCC |
371 | struct budget_patch *budget; |
372 | int err; | |
1da177e4 LT |
373 | int count = 0; |
374 | int detected = 0; | |
375 | ||
376 | #define PATCH_RESET 0 | |
377 | #define RPS_IRQ 0 | |
378 | #define HPS_SETUP 0 | |
379 | #if PATCH_RESET | |
9101e622 MCC |
380 | saa7146_write(dev, MC1, MASK_31); |
381 | msleep(40); | |
1da177e4 LT |
382 | #endif |
383 | #if HPS_SETUP | |
9101e622 MCC |
384 | // initialize registers. Better to have it like this |
385 | // than leaving something unconfigured | |
1da177e4 LT |
386 | saa7146_write(dev, DD1_STREAM_B, 0); |
387 | // port B VSYNC at rising edge | |
388 | saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too! | |
389 | saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI | |
390 | ||
391 | // debi config | |
392 | // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18); | |
393 | ||
9101e622 MCC |
394 | // zero all HPS registers |
395 | saa7146_write(dev, HPS_H_PRESCALE, 0); // r68 | |
396 | saa7146_write(dev, HPS_H_SCALE, 0); // r6c | |
397 | saa7146_write(dev, BCS_CTRL, 0); // r70 | |
398 | saa7146_write(dev, HPS_V_SCALE, 0); // r60 | |
399 | saa7146_write(dev, HPS_V_GAIN, 0); // r64 | |
400 | saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74 | |
401 | saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78 | |
402 | // Set HPS prescaler for port B input | |
403 | saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) ); | |
404 | saa7146_write(dev, MC2, | |
405 | 0 * (MASK_08 | MASK_24) | // BRS control | |
406 | 0 * (MASK_09 | MASK_25) | // a | |
407 | 0 * (MASK_10 | MASK_26) | // b | |
408 | 1 * (MASK_06 | MASK_22) | // HPS_CTRL1 | |
409 | 1 * (MASK_05 | MASK_21) | // HPS_CTRL2 | |
410 | 0 * (MASK_01 | MASK_15) // DEBI | |
411 | ); | |
1da177e4 LT |
412 | #endif |
413 | // Disable RPS1 and RPS0 | |
9101e622 MCC |
414 | saa7146_write(dev, MC1, ( MASK_29 | MASK_28)); |
415 | // RPS1 timeout disable | |
416 | saa7146_write(dev, RPS_TOV1, 0); | |
1da177e4 LT |
417 | |
418 | // code for autodetection | |
419 | // will wait for VBI_B event (vertical blank at port B) | |
420 | // and will reset GPIO3 after VBI_B is detected. | |
421 | // (GPIO3 should be raised high by CPU to | |
422 | // test if GPIO3 will generate vertical blank signal | |
423 | // in budget patch GPIO3 is connected to VSYNC_B | |
424 | count = 0; | |
425 | #if 0 | |
426 | WRITE_RPS1(cpu_to_le32(CMD_UPLOAD | | |
427 | MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 )); | |
428 | #endif | |
9101e622 MCC |
429 | WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_VBI_B)); |
430 | WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); | |
431 | WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); | |
432 | WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); | |
1da177e4 | 433 | #if RPS_IRQ |
9101e622 MCC |
434 | // issue RPS1 interrupt to increment counter |
435 | WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); | |
436 | // at least a NOP is neede between two interrupts | |
437 | WRITE_RPS1(cpu_to_le32(CMD_NOP)); | |
438 | // interrupt again | |
439 | WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); | |
1da177e4 | 440 | #endif |
9101e622 | 441 | WRITE_RPS1(cpu_to_le32(CMD_STOP)); |
1da177e4 LT |
442 | |
443 | #if RPS_IRQ | |
9101e622 MCC |
444 | // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) |
445 | // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled | |
446 | // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called | |
447 | saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); | |
448 | // set event counter 1 treshold to maximum allowed value (rEC p55) | |
449 | saa7146_write(dev, ECT1R, 0x3fff ); | |
1da177e4 | 450 | #endif |
9101e622 MCC |
451 | // Fix VSYNC level |
452 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
453 | // Set RPS1 Address register to point to RPS code (r108 p42) | |
454 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
455 | // Enable RPS1, (rFC p33) | |
456 | saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); | |
1da177e4 LT |
457 | |
458 | ||
9101e622 MCC |
459 | mdelay(50); |
460 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
1da177e4 LT |
461 | mdelay(150); |
462 | ||
463 | ||
464 | if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) | |
465 | detected = 1; | |
466 | ||
467 | #if RPS_IRQ | |
9101e622 | 468 | printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff ); |
1da177e4 LT |
469 | #endif |
470 | // Disable RPS1 | |
9101e622 | 471 | saa7146_write(dev, MC1, ( MASK_29 )); |
1da177e4 LT |
472 | |
473 | if(detected == 0) | |
9101e622 MCC |
474 | printk("budget-patch not detected or saa7146 in non-default state.\n" |
475 | "try enabling ressetting of 7146 with MASK_31 in MC1 register\n"); | |
1da177e4 LT |
476 | |
477 | else | |
9101e622 | 478 | printk("BUDGET-PATCH DETECTED.\n"); |
1da177e4 LT |
479 | |
480 | ||
481 | /* OLD (Original design by Roberto Deza): | |
482 | ** This code will setup the SAA7146_RPS1 to generate a square | |
483 | ** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of | |
484 | ** TS_WIDTH packets) has been acquired on SAA7146_D1B video port; | |
485 | ** then, this GPIO3 output which is connected to the D1B_VSYNC | |
486 | ** input, will trigger the acquisition of the alternate field | |
487 | ** and so on. | |
488 | ** Currently, the TT_budget / WinTV_Nova cards have two ICs | |
489 | ** (74HCT4040, LVC74) for the generation of this VSYNC signal, | |
490 | ** which seems that can be done perfectly without this :-)). | |
491 | */ | |
492 | ||
493 | /* New design (By Emard) | |
494 | ** this rps1 code will copy internal HS event to GPIO3 pin. | |
495 | ** GPIO3 is in budget-patch hardware connectd to port B VSYNC | |
496 | ||
497 | ** HS is an internal event of 7146, accessible with RPS | |
498 | ** and temporarily raised high every n lines | |
499 | ** (n in defined in the RPS_THRESH1 counter threshold) | |
500 | ** I think HS is raised high on the beginning of the n-th line | |
501 | ** and remains high until this n-th line that triggered | |
502 | ** it is completely received. When the receiption of n-th line | |
503 | ** ends, HS is lowered. | |
504 | ||
505 | ** To transmit data over DMA, 7146 needs changing state at | |
506 | ** port B VSYNC pin. Any changing of port B VSYNC will | |
507 | ** cause some DMA data transfer, with more or less packets loss. | |
508 | ** It depends on the phase and frequency of VSYNC and | |
509 | ** the way of 7146 is instructed to trigger on port B (defined | |
510 | ** in DD1_INIT register, 3rd nibble from the right valid | |
511 | ** numbers are 0-7, see datasheet) | |
512 | ** | |
513 | ** The correct triggering can minimize packet loss, | |
514 | ** dvbtraffic should give this stable bandwidths: | |
515 | ** 22k transponder = 33814 kbit/s | |
516 | ** 27.5k transponder = 38045 kbit/s | |
517 | ** by experiment it is found that the best results | |
518 | ** (stable bandwidths and almost no packet loss) | |
519 | ** are obtained using DD1_INIT triggering number 2 | |
520 | ** (Va at rising edge of VS Fa = HS x VS-failing forced toggle) | |
521 | ** and a VSYNC phase that occurs in the middle of DMA transfer | |
522 | ** (about byte 188*512=96256 in the DMA window). | |
523 | ** | |
524 | ** Phase of HS is still not clear to me how to control, | |
525 | ** It just happens to be so. It can be seen if one enables | |
526 | ** RPS_IRQ and print Event Counter 1 in vpeirq(). Every | |
527 | ** time RPS_INTERRUPT is called, the Event Counter 1 will | |
528 | ** increment. That's how the 7146 is programmed to do event | |
529 | ** counting in this budget-patch.c | |
530 | ** I *think* HPS setting has something to do with the phase | |
531 | ** of HS but I cant be 100% sure in that. | |
532 | ||
533 | ** hardware debug note: a working budget card (including budget patch) | |
534 | ** with vpeirq() interrupt setup in mode "0x90" (every 64K) will | |
535 | ** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes | |
536 | ** and that means 3*25=75 Hz of interrupt freqency, as seen by | |
537 | ** watch cat /proc/interrupts | |
538 | ** | |
539 | ** If this frequency is 3x lower (and data received in the DMA | |
540 | ** buffer don't start with 0x47, but in the middle of packets, | |
541 | ** whose lengths appear to be like 188 292 188 104 etc. | |
542 | ** this means VSYNC line is not connected in the hardware. | |
543 | ** (check soldering pcb and pins) | |
544 | ** The same behaviour of missing VSYNC can be duplicated on budget | |
545 | ** cards, by seting DD1_INIT trigger mode 7 in 3rd nibble. | |
546 | */ | |
547 | ||
548 | // Setup RPS1 "program" (p35) | |
9101e622 | 549 | count = 0; |
1da177e4 LT |
550 | |
551 | ||
9101e622 MCC |
552 | // Wait Source Line Counter Threshold (p36) |
553 | WRITE_RPS1(cpu_to_le32(CMD_PAUSE | EVT_HS)); | |
554 | // Set GPIO3=1 (p42) | |
555 | WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); | |
556 | WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); | |
557 | WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTHI<<24)); | |
1da177e4 | 558 | #if RPS_IRQ |
9101e622 MCC |
559 | // issue RPS1 interrupt |
560 | WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); | |
1da177e4 | 561 | #endif |
9101e622 MCC |
562 | // Wait reset Source Line Counter Threshold (p36) |
563 | WRITE_RPS1(cpu_to_le32(CMD_PAUSE | RPS_INV | EVT_HS)); | |
564 | // Set GPIO3=0 (p42) | |
565 | WRITE_RPS1(cpu_to_le32(CMD_WR_REG_MASK | (GPIO_CTRL>>2))); | |
566 | WRITE_RPS1(cpu_to_le32(GPIO3_MSK)); | |
567 | WRITE_RPS1(cpu_to_le32(SAA7146_GPIO_OUTLO<<24)); | |
1da177e4 | 568 | #if RPS_IRQ |
9101e622 MCC |
569 | // issue RPS1 interrupt |
570 | WRITE_RPS1(cpu_to_le32(CMD_INTERRUPT)); | |
1da177e4 | 571 | #endif |
9101e622 MCC |
572 | // Jump to begin of RPS program (p37) |
573 | WRITE_RPS1(cpu_to_le32(CMD_JUMP)); | |
574 | WRITE_RPS1(cpu_to_le32(dev->d_rps1.dma_handle)); | |
1da177e4 | 575 | |
9101e622 MCC |
576 | // Fix VSYNC level |
577 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
578 | // Set RPS1 Address register to point to RPS code (r108 p42) | |
579 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
afa47abf IS |
580 | |
581 | if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL))) | |
582 | return -ENOMEM; | |
583 | ||
584 | dprintk(2, "budget: %p\n", budget); | |
585 | ||
586 | if ((err = ttpci_budget_init (budget, dev, info, THIS_MODULE))) { | |
587 | kfree (budget); | |
588 | return err; | |
589 | } | |
590 | ||
9101e622 MCC |
591 | // Set Source Line Counter Threshold, using BRS (rCC p43) |
592 | // It generates HS event every TS_HEIGHT lines | |
593 | // this is related to TS_WIDTH set in register | |
594 | // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE | |
595 | // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188 | |
596 | //,then RPS_THRESH1 | |
597 | // should be set to trigger every TS_HEIGHT (512) lines. | |
598 | // | |
afa47abf | 599 | saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 ); |
9101e622 MCC |
600 | |
601 | // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 ); | |
602 | // Enable RPS1 (rFC p33) | |
603 | saa7146_write(dev, MC1, (MASK_13 | MASK_29)); | |
604 | ||
605 | ||
9101e622 | 606 | dev->ext_priv = budget; |
1da177e4 | 607 | |
fdc53a6d | 608 | budget->dvb_adapter.priv = budget; |
1da177e4 LT |
609 | frontend_init(budget); |
610 | ||
9101e622 | 611 | return 0; |
1da177e4 LT |
612 | } |
613 | ||
614 | static int budget_patch_detach (struct saa7146_dev* dev) | |
615 | { | |
9101e622 MCC |
616 | struct budget_patch *budget = (struct budget_patch*) dev->ext_priv; |
617 | int err; | |
1da177e4 LT |
618 | |
619 | if (budget->dvb_frontend) dvb_unregister_frontend(budget->dvb_frontend); | |
620 | ||
9101e622 | 621 | err = ttpci_budget_deinit (budget); |
1da177e4 | 622 | |
9101e622 | 623 | kfree (budget); |
1da177e4 | 624 | |
9101e622 | 625 | return err; |
1da177e4 LT |
626 | } |
627 | ||
628 | static int __init budget_patch_init(void) | |
629 | { | |
630 | return saa7146_register_extension(&budget_extension); | |
631 | } | |
632 | ||
633 | static void __exit budget_patch_exit(void) | |
634 | { | |
9101e622 | 635 | saa7146_unregister_extension(&budget_extension); |
1da177e4 LT |
636 | } |
637 | ||
638 | static struct saa7146_extension budget_extension = { | |
9101e622 MCC |
639 | .name = "budget_patch dvb\0", |
640 | .flags = 0, | |
1da177e4 | 641 | |
9101e622 MCC |
642 | .module = THIS_MODULE, |
643 | .pci_tbl = pci_tbl, | |
644 | .attach = budget_patch_attach, | |
645 | .detach = budget_patch_detach, | |
1da177e4 | 646 | |
9101e622 MCC |
647 | .irq_mask = MASK_10, |
648 | .irq_func = ttpci_budget_irq10_handler, | |
1da177e4 LT |
649 | }; |
650 | ||
651 | module_init(budget_patch_init); | |
652 | module_exit(budget_patch_exit); | |
653 | ||
654 | MODULE_LICENSE("GPL"); | |
655 | MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others"); | |
656 | MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 " | |
9101e622 | 657 | "based so-called Budget Patch cards"); |