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Merge 3.7-rc1 into tty-linus
[mirror_ubuntu-artful-kernel.git] / drivers / media / dvb-frontends / af9013.c
CommitLineData
825b9670 1/*
c89f66f6 2 * Afatech AF9013 demodulator driver
825b9670
AP
3 *
4 * Copyright (C) 2007 Antti Palosaari <crope@iki.fi>
f571e004 5 * Copyright (C) 2011 Antti Palosaari <crope@iki.fi>
825b9670
AP
6 *
7 * Thanks to Afatech who kindly provided information.
8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
18 *
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 *
23 */
24
825b9670 25#include "af9013_priv.h"
825b9670 26
825b9670
AP
27struct af9013_state {
28 struct i2c_adapter *i2c;
f571e004 29 struct dvb_frontend fe;
825b9670
AP
30 struct af9013_config config;
31
9e35cd22
AP
32 /* tuner/demod RF and IF AGC limits used for signal strength calc */
33 u8 signal_strength_en, rf_50, rf_80, if_50, if_80;
825b9670
AP
34 u16 signal_strength;
35 u32 ber;
36 u32 ucblocks;
37 u16 snr;
f571e004
AP
38 u32 bandwidth_hz;
39 fe_status_t fe_status;
40 unsigned long set_frontend_jiffies;
41 unsigned long read_status_jiffies;
42 bool first_tune;
43 bool i2c_gate_state;
44 unsigned int statistics_step:3;
45 struct delayed_work statistics_work;
825b9670
AP
46};
47
f571e004
AP
48/* write multiple registers */
49static int af9013_wr_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
50 const u8 *val, int len)
825b9670 51{
f571e004 52 int ret;
825b9670 53 u8 buf[3+len];
f571e004
AP
54 struct i2c_msg msg[1] = {
55 {
56 .addr = priv->config.i2c_addr,
57 .flags = 0,
58 .len = sizeof(buf),
59 .buf = buf,
60 }
61 };
62
63 buf[0] = (reg >> 8) & 0xff;
64 buf[1] = (reg >> 0) & 0xff;
825b9670
AP
65 buf[2] = mbox;
66 memcpy(&buf[3], val, len);
67
f571e004
AP
68 ret = i2c_transfer(priv->i2c, msg, 1);
69 if (ret == 1) {
70 ret = 0;
71 } else {
8df379c5
AP
72 dev_warn(&priv->i2c->dev, "%s: i2c wr failed=%d reg=%04x " \
73 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004 74 ret = -EREMOTEIO;
825b9670 75 }
f571e004 76 return ret;
825b9670
AP
77}
78
f571e004
AP
79/* read multiple registers */
80static int af9013_rd_regs_i2c(struct af9013_state *priv, u8 mbox, u16 reg,
81 u8 *val, int len)
825b9670 82{
f571e004
AP
83 int ret;
84 u8 buf[3];
85 struct i2c_msg msg[2] = {
86 {
87 .addr = priv->config.i2c_addr,
88 .flags = 0,
89 .len = 3,
90 .buf = buf,
91 }, {
92 .addr = priv->config.i2c_addr,
93 .flags = I2C_M_RD,
94 .len = len,
95 .buf = val,
96 }
97 };
98
99 buf[0] = (reg >> 8) & 0xff;
100 buf[1] = (reg >> 0) & 0xff;
101 buf[2] = mbox;
102
103 ret = i2c_transfer(priv->i2c, msg, 2);
104 if (ret == 2) {
105 ret = 0;
106 } else {
8df379c5
AP
107 dev_warn(&priv->i2c->dev, "%s: i2c rd failed=%d reg=%04x " \
108 "len=%d\n", KBUILD_MODNAME, ret, reg, len);
f571e004
AP
109 ret = -EREMOTEIO;
110 }
111 return ret;
825b9670
AP
112}
113
f571e004
AP
114/* write multiple registers */
115static int af9013_wr_regs(struct af9013_state *priv, u16 reg, const u8 *val,
116 int len)
825b9670 117{
f571e004
AP
118 int ret, i;
119 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(1 << 0);
120
938ca36e
DC
121 if ((priv->config.ts_mode == AF9013_TS_USB) &&
122 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP
123 mbox |= ((len - 1) << 2);
124 ret = af9013_wr_regs_i2c(priv, mbox, reg, val, len);
125 } else {
126 for (i = 0; i < len; i++) {
127 ret = af9013_wr_regs_i2c(priv, mbox, reg+i, val+i, 1);
128 if (ret)
129 goto err;
130 }
131 }
132
133err:
134 return 0;
135}
136
137/* read multiple registers */
138static int af9013_rd_regs(struct af9013_state *priv, u16 reg, u8 *val, int len)
139{
140 int ret, i;
141 u8 mbox = (0 << 7)|(0 << 6)|(1 << 1)|(0 << 0);
142
938ca36e
DC
143 if ((priv->config.ts_mode == AF9013_TS_USB) &&
144 ((reg & 0xff00) != 0xff00) && ((reg & 0xff00) != 0xae00)) {
f571e004
AP
145 mbox |= ((len - 1) << 2);
146 ret = af9013_rd_regs_i2c(priv, mbox, reg, val, len);
147 } else {
148 for (i = 0; i < len; i++) {
149 ret = af9013_rd_regs_i2c(priv, mbox, reg+i, val+i, 1);
150 if (ret)
151 goto err;
152 }
153 }
154
155err:
156 return 0;
825b9670
AP
157}
158
159/* write single register */
f571e004 160static int af9013_wr_reg(struct af9013_state *priv, u16 reg, u8 val)
825b9670 161{
f571e004 162 return af9013_wr_regs(priv, reg, &val, 1);
825b9670
AP
163}
164
165/* read single register */
f571e004 166static int af9013_rd_reg(struct af9013_state *priv, u16 reg, u8 *val)
825b9670 167{
f571e004
AP
168 return af9013_rd_regs(priv, reg, val, 1);
169}
825b9670 170
f571e004
AP
171static int af9013_write_ofsm_regs(struct af9013_state *state, u16 reg, u8 *val,
172 u8 len)
173{
174 u8 mbox = (1 << 7)|(1 << 6)|((len - 1) << 2)|(1 << 1)|(1 << 0);
175 return af9013_wr_regs_i2c(state, mbox, reg, val, len);
825b9670
AP
176}
177
f571e004
AP
178static int af9013_wr_reg_bits(struct af9013_state *state, u16 reg, int pos,
179 int len, u8 val)
825b9670
AP
180{
181 int ret;
182 u8 tmp, mask;
183
f571e004
AP
184 /* no need for read if whole reg is written */
185 if (len != 8) {
186 ret = af9013_rd_reg(state, reg, &tmp);
187 if (ret)
188 return ret;
825b9670 189
f571e004
AP
190 mask = (0xff >> (8 - len)) << pos;
191 val <<= pos;
192 tmp &= ~mask;
193 val |= tmp;
194 }
825b9670 195
f571e004 196 return af9013_wr_reg(state, reg, val);
825b9670
AP
197}
198
f571e004
AP
199static int af9013_rd_reg_bits(struct af9013_state *state, u16 reg, int pos,
200 int len, u8 *val)
825b9670
AP
201{
202 int ret;
203 u8 tmp;
204
f571e004 205 ret = af9013_rd_reg(state, reg, &tmp);
825b9670
AP
206 if (ret)
207 return ret;
f571e004
AP
208
209 *val = (tmp >> pos);
210 *val &= (0xff >> (8 - len));
211
825b9670
AP
212 return 0;
213}
214
215static int af9013_set_gpio(struct af9013_state *state, u8 gpio, u8 gpioval)
216{
217 int ret;
218 u8 pos;
219 u16 addr;
825b9670 220
8df379c5
AP
221 dev_dbg(&state->i2c->dev, "%s: gpio=%d gpioval=%02x\n",
222 __func__, gpio, gpioval);
f571e004
AP
223
224 /*
225 * GPIO0 & GPIO1 0xd735
226 * GPIO2 & GPIO3 0xd736
227 */
825b9670
AP
228
229 switch (gpio) {
230 case 0:
231 case 1:
232 addr = 0xd735;
233 break;
234 case 2:
235 case 3:
236 addr = 0xd736;
237 break;
238
239 default:
8df379c5
AP
240 dev_err(&state->i2c->dev, "%s: invalid gpio=%d\n",
241 KBUILD_MODNAME, gpio);
825b9670 242 ret = -EINVAL;
f571e004 243 goto err;
c2c1b415 244 }
825b9670
AP
245
246 switch (gpio) {
247 case 0:
248 case 2:
249 pos = 0;
250 break;
251 case 1:
252 case 3:
253 default:
254 pos = 4;
255 break;
c2c1b415 256 }
825b9670 257
f571e004
AP
258 ret = af9013_wr_reg_bits(state, addr, pos, 4, gpioval);
259 if (ret)
260 goto err;
825b9670 261
f571e004
AP
262 return ret;
263err:
8df379c5 264 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
265 return ret;
266}
267
8df379c5 268static u32 af9013_div(struct af9013_state *state, u32 a, u32 b, u32 x)
825b9670
AP
269{
270 u32 r = 0, c = 0, i;
f571e004 271
8df379c5 272 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d\n", __func__, a, b, x);
825b9670
AP
273
274 if (a > b) {
275 c = a / b;
276 a = a - c * b;
277 }
278
279 for (i = 0; i < x; i++) {
280 if (a >= b) {
281 r += 1;
282 a -= b;
283 }
284 a <<= 1;
285 r <<= 1;
286 }
287 r = (c << (u32)x) + r;
288
8df379c5
AP
289 dev_dbg(&state->i2c->dev, "%s: a=%d b=%d x=%d r=%d r=%x\n",
290 __func__, a, b, x, r, r);
291
825b9670
AP
292 return r;
293}
294
f571e004 295static int af9013_power_ctrl(struct af9013_state *state, u8 onoff)
825b9670 296{
f571e004
AP
297 int ret, i;
298 u8 tmp;
9b22edd4 299
8df379c5 300 dev_dbg(&state->i2c->dev, "%s: onoff=%d\n", __func__, onoff);
f571e004
AP
301
302 /* enable reset */
303 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 1);
304 if (ret)
305 goto err;
306
307 /* start reset mechanism */
308 ret = af9013_wr_reg(state, 0xaeff, 1);
309 if (ret)
310 goto err;
311
312 /* wait reset performs */
313 for (i = 0; i < 150; i++) {
314 ret = af9013_rd_reg_bits(state, 0xd417, 1, 1, &tmp);
315 if (ret)
316 goto err;
317
318 if (tmp)
319 break; /* reset done */
320
321 usleep_range(5000, 25000);
825b9670
AP
322 }
323
f571e004
AP
324 if (!tmp)
325 return -ETIMEDOUT;
825b9670 326
f571e004
AP
327 if (onoff) {
328 /* clear reset */
329 ret = af9013_wr_reg_bits(state, 0xd417, 1, 1, 0);
825b9670 330 if (ret)
f571e004
AP
331 goto err;
332
333 /* disable reset */
334 ret = af9013_wr_reg_bits(state, 0xd417, 4, 1, 0);
335
336 /* power on */
337 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 0);
338 } else {
339 /* power off */
340 ret = af9013_wr_reg_bits(state, 0xd73a, 3, 1, 1);
825b9670
AP
341 }
342
f571e004
AP
343 return ret;
344err:
8df379c5 345 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
346 return ret;
347}
348
f571e004 349static int af9013_statistics_ber_unc_start(struct dvb_frontend *fe)
825b9670 350{
f571e004 351 struct af9013_state *state = fe->demodulator_priv;
825b9670 352 int ret;
825b9670 353
8df379c5 354 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670 355
f571e004
AP
356 /* reset and start BER counter */
357 ret = af9013_wr_reg_bits(state, 0xd391, 4, 1, 1);
358 if (ret)
359 goto err;
360
361 return ret;
362err:
8df379c5 363 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
364 return ret;
365}
366
367static int af9013_statistics_ber_unc_result(struct dvb_frontend *fe)
368{
369 struct af9013_state *state = fe->demodulator_priv;
370 int ret;
371 u8 buf[5];
372
8df379c5 373 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
374
375 /* check if error bit count is ready */
376 ret = af9013_rd_reg_bits(state, 0xd391, 4, 1, &buf[0]);
377 if (ret)
378 goto err;
379
380 if (!buf[0]) {
8df379c5 381 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP
382 return 0;
383 }
384
385 ret = af9013_rd_regs(state, 0xd387, buf, 5);
386 if (ret)
387 goto err;
388
389 state->ber = (buf[2] << 16) | (buf[1] << 8) | buf[0];
390 state->ucblocks += (buf[4] << 8) | buf[3];
391
392 return ret;
393err:
8df379c5 394 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
395 return ret;
396}
397
398static int af9013_statistics_snr_start(struct dvb_frontend *fe)
399{
400 struct af9013_state *state = fe->demodulator_priv;
401 int ret;
402
8df379c5 403 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
404
405 /* start SNR meas */
406 ret = af9013_wr_reg_bits(state, 0xd2e1, 3, 1, 1);
407 if (ret)
408 goto err;
409
410 return ret;
411err:
8df379c5 412 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
413 return ret;
414}
415
416static int af9013_statistics_snr_result(struct dvb_frontend *fe)
417{
418 struct af9013_state *state = fe->demodulator_priv;
419 int ret, i, len;
420 u8 buf[3], tmp;
421 u32 snr_val;
422 const struct af9013_snr *uninitialized_var(snr_lut);
423
8df379c5 424 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
425
426 /* check if SNR ready */
427 ret = af9013_rd_reg_bits(state, 0xd2e1, 3, 1, &tmp);
428 if (ret)
429 goto err;
430
431 if (!tmp) {
8df379c5 432 dev_dbg(&state->i2c->dev, "%s: not ready\n", __func__);
f571e004
AP
433 return 0;
434 }
435
436 /* read value */
437 ret = af9013_rd_regs(state, 0xd2e3, buf, 3);
438 if (ret)
439 goto err;
440
441 snr_val = (buf[2] << 16) | (buf[1] << 8) | buf[0];
442
443 /* read current modulation */
444 ret = af9013_rd_reg(state, 0xd3c1, &tmp);
445 if (ret)
446 goto err;
447
448 switch ((tmp >> 6) & 3) {
449 case 0:
450 len = ARRAY_SIZE(qpsk_snr_lut);
451 snr_lut = qpsk_snr_lut;
825b9670 452 break;
f571e004
AP
453 case 1:
454 len = ARRAY_SIZE(qam16_snr_lut);
455 snr_lut = qam16_snr_lut;
825b9670 456 break;
f571e004
AP
457 case 2:
458 len = ARRAY_SIZE(qam64_snr_lut);
459 snr_lut = qam64_snr_lut;
825b9670
AP
460 break;
461 default:
f571e004
AP
462 goto err;
463 break;
825b9670
AP
464 }
465
f571e004
AP
466 for (i = 0; i < len; i++) {
467 tmp = snr_lut[i].snr;
825b9670 468
f571e004
AP
469 if (snr_val < snr_lut[i].val)
470 break;
471 }
472 state->snr = tmp * 10; /* dB/10 */
825b9670 473
f571e004
AP
474 return ret;
475err:
8df379c5 476 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
477 return ret;
478}
825b9670 479
f571e004
AP
480static int af9013_statistics_signal_strength(struct dvb_frontend *fe)
481{
482 struct af9013_state *state = fe->demodulator_priv;
483 int ret = 0;
484 u8 buf[2], rf_gain, if_gain;
485 int signal_strength;
486
8df379c5 487 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
488
489 if (!state->signal_strength_en)
490 return 0;
491
492 ret = af9013_rd_regs(state, 0xd07c, buf, 2);
493 if (ret)
494 goto err;
495
496 rf_gain = buf[0];
497 if_gain = buf[1];
498
499 signal_strength = (0xffff / \
500 (9 * (state->rf_50 + state->if_50) - \
501 11 * (state->rf_80 + state->if_80))) * \
502 (10 * (rf_gain + if_gain) - \
503 11 * (state->rf_80 + state->if_80));
504 if (signal_strength < 0)
505 signal_strength = 0;
506 else if (signal_strength > 0xffff)
507 signal_strength = 0xffff;
508
509 state->signal_strength = signal_strength;
510
511 return ret;
512err:
8df379c5 513 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
514 return ret;
515}
516
f571e004 517static void af9013_statistics_work(struct work_struct *work)
825b9670 518{
f571e004
AP
519 struct af9013_state *state = container_of(work,
520 struct af9013_state, statistics_work.work);
521 unsigned int next_msec;
522
523 /* update only signal strength when demod is not locked */
524 if (!(state->fe_status & FE_HAS_LOCK)) {
525 state->statistics_step = 0;
526 state->ber = 0;
527 state->snr = 0;
528 }
529
530 switch (state->statistics_step) {
531 default:
532 state->statistics_step = 0;
533 case 0:
fdf07b02 534 af9013_statistics_signal_strength(&state->fe);
f571e004
AP
535 state->statistics_step++;
536 next_msec = 300;
537 break;
538 case 1:
fdf07b02 539 af9013_statistics_snr_start(&state->fe);
f571e004
AP
540 state->statistics_step++;
541 next_msec = 200;
542 break;
543 case 2:
fdf07b02 544 af9013_statistics_ber_unc_start(&state->fe);
f571e004
AP
545 state->statistics_step++;
546 next_msec = 1000;
547 break;
548 case 3:
fdf07b02 549 af9013_statistics_snr_result(&state->fe);
f571e004
AP
550 state->statistics_step++;
551 next_msec = 400;
552 break;
553 case 4:
fdf07b02 554 af9013_statistics_ber_unc_result(&state->fe);
f571e004
AP
555 state->statistics_step++;
556 next_msec = 100;
557 break;
558 }
559
560 schedule_delayed_work(&state->statistics_work,
561 msecs_to_jiffies(next_msec));
f571e004
AP
562}
563
564static int af9013_get_tune_settings(struct dvb_frontend *fe,
565 struct dvb_frontend_tune_settings *fesettings)
566{
567 fesettings->min_delay_ms = 800;
568 fesettings->step_size = 0;
569 fesettings->max_drift = 0;
570
571 return 0;
572}
573
59d3cc19 574static int af9013_set_frontend(struct dvb_frontend *fe)
f571e004
AP
575{
576 struct af9013_state *state = fe->demodulator_priv;
577 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
578 int ret, i, sampling_freq;
579 bool auto_mode, spec_inv;
580 u8 buf[6];
581 u32 if_frequency, freq_cw;
582
8df379c5
AP
583 dev_dbg(&state->i2c->dev, "%s: frequency=%d bandwidth_hz=%d\n",
584 __func__, c->frequency, c->bandwidth_hz);
f571e004
AP
585
586 /* program tuner */
587 if (fe->ops.tuner_ops.set_params)
14d24d14 588 fe->ops.tuner_ops.set_params(fe);
f571e004
AP
589
590 /* program CFOE coefficients */
591 if (c->bandwidth_hz != state->bandwidth_hz) {
592 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
593 if (coeff_lut[i].clock == state->config.clock &&
594 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
595 break;
596 }
825b9670
AP
597 }
598
f571e004
AP
599 ret = af9013_wr_regs(state, 0xae00, coeff_lut[i].val,
600 sizeof(coeff_lut[i].val));
601 }
6d42b218 602
f571e004
AP
603 /* program frequency control */
604 if (c->bandwidth_hz != state->bandwidth_hz || state->first_tune) {
6d42b218
AP
605 /* get used IF frequency */
606 if (fe->ops.tuner_ops.get_if_frequency)
f571e004 607 fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
6d42b218 608 else
f571e004 609 if_frequency = state->config.if_frequency;
825b9670 610
8df379c5
AP
611 dev_dbg(&state->i2c->dev, "%s: if_frequency=%d\n",
612 __func__, if_frequency);
ab2e06ac 613
f571e004 614 sampling_freq = if_frequency;
825b9670 615
f571e004
AP
616 while (sampling_freq > (state->config.clock / 2))
617 sampling_freq -= state->config.clock;
825b9670 618
f571e004
AP
619 if (sampling_freq < 0) {
620 sampling_freq *= -1;
621 spec_inv = state->config.spec_inv;
622 } else {
623 spec_inv = !state->config.spec_inv;
624 }
825b9670 625
8df379c5
AP
626 freq_cw = af9013_div(state, sampling_freq, state->config.clock,
627 23);
825b9670 628
f571e004
AP
629 if (spec_inv)
630 freq_cw = 0x800000 - freq_cw;
825b9670 631
f571e004
AP
632 buf[0] = (freq_cw >> 0) & 0xff;
633 buf[1] = (freq_cw >> 8) & 0xff;
634 buf[2] = (freq_cw >> 16) & 0x7f;
825b9670 635
f571e004 636 freq_cw = 0x800000 - freq_cw;
825b9670 637
f571e004
AP
638 buf[3] = (freq_cw >> 0) & 0xff;
639 buf[4] = (freq_cw >> 8) & 0xff;
640 buf[5] = (freq_cw >> 16) & 0x7f;
641
642 ret = af9013_wr_regs(state, 0xd140, buf, 3);
643 if (ret)
644 goto err;
645
646 ret = af9013_wr_regs(state, 0x9be7, buf, 6);
647 if (ret)
648 goto err;
825b9670 649 }
825b9670 650
f571e004
AP
651 /* clear TPS lock flag */
652 ret = af9013_wr_reg_bits(state, 0xd330, 3, 1, 1);
653 if (ret)
654 goto err;
825b9670 655
f571e004
AP
656 /* clear MPEG2 lock flag */
657 ret = af9013_wr_reg_bits(state, 0xd507, 6, 1, 0);
658 if (ret)
659 goto err;
a2f5a811 660
f571e004
AP
661 /* empty channel function */
662 ret = af9013_wr_reg_bits(state, 0x9bfe, 0, 1, 0);
663 if (ret)
664 goto err;
665
666 /* empty DVB-T channel function */
667 ret = af9013_wr_reg_bits(state, 0x9bc2, 0, 1, 0);
668 if (ret)
669 goto err;
670
671 /* transmission parameters */
672 auto_mode = false;
673 memset(buf, 0, 3);
674
675 switch (c->transmission_mode) {
825b9670 676 case TRANSMISSION_MODE_AUTO:
f571e004
AP
677 auto_mode = 1;
678 break;
825b9670
AP
679 case TRANSMISSION_MODE_2K:
680 break;
681 case TRANSMISSION_MODE_8K:
682 buf[0] |= (1 << 0);
683 break;
684 default:
8df379c5
AP
685 dev_dbg(&state->i2c->dev, "%s: invalid transmission_mode\n",
686 __func__);
f571e004 687 auto_mode = 1;
825b9670
AP
688 }
689
f571e004 690 switch (c->guard_interval) {
825b9670 691 case GUARD_INTERVAL_AUTO:
f571e004
AP
692 auto_mode = 1;
693 break;
825b9670
AP
694 case GUARD_INTERVAL_1_32:
695 break;
696 case GUARD_INTERVAL_1_16:
697 buf[0] |= (1 << 2);
698 break;
699 case GUARD_INTERVAL_1_8:
700 buf[0] |= (2 << 2);
701 break;
702 case GUARD_INTERVAL_1_4:
703 buf[0] |= (3 << 2);
704 break;
705 default:
8df379c5
AP
706 dev_dbg(&state->i2c->dev, "%s: invalid guard_interval\n",
707 __func__);
f571e004 708 auto_mode = 1;
825b9670
AP
709 }
710
f571e004 711 switch (c->hierarchy) {
825b9670 712 case HIERARCHY_AUTO:
f571e004
AP
713 auto_mode = 1;
714 break;
825b9670
AP
715 case HIERARCHY_NONE:
716 break;
717 case HIERARCHY_1:
718 buf[0] |= (1 << 4);
719 break;
720 case HIERARCHY_2:
721 buf[0] |= (2 << 4);
722 break;
723 case HIERARCHY_4:
724 buf[0] |= (3 << 4);
725 break;
726 default:
8df379c5 727 dev_dbg(&state->i2c->dev, "%s: invalid hierarchy\n", __func__);
f571e004 728 auto_mode = 1;
c2c1b415 729 }
825b9670 730
f571e004 731 switch (c->modulation) {
825b9670 732 case QAM_AUTO:
f571e004
AP
733 auto_mode = 1;
734 break;
825b9670
AP
735 case QPSK:
736 break;
737 case QAM_16:
738 buf[1] |= (1 << 6);
739 break;
740 case QAM_64:
741 buf[1] |= (2 << 6);
742 break;
743 default:
8df379c5 744 dev_dbg(&state->i2c->dev, "%s: invalid modulation\n", __func__);
f571e004 745 auto_mode = 1;
825b9670
AP
746 }
747
748 /* Use HP. How and which case we can switch to LP? */
749 buf[1] |= (1 << 4);
750
f571e004 751 switch (c->code_rate_HP) {
825b9670 752 case FEC_AUTO:
f571e004
AP
753 auto_mode = 1;
754 break;
825b9670
AP
755 case FEC_1_2:
756 break;
757 case FEC_2_3:
758 buf[2] |= (1 << 0);
759 break;
760 case FEC_3_4:
761 buf[2] |= (2 << 0);
762 break;
763 case FEC_5_6:
764 buf[2] |= (3 << 0);
765 break;
766 case FEC_7_8:
767 buf[2] |= (4 << 0);
768 break;
769 default:
8df379c5
AP
770 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_HP\n",
771 __func__);
f571e004 772 auto_mode = 1;
825b9670
AP
773 }
774
f571e004 775 switch (c->code_rate_LP) {
825b9670 776 case FEC_AUTO:
f571e004
AP
777 auto_mode = 1;
778 break;
825b9670
AP
779 case FEC_1_2:
780 break;
781 case FEC_2_3:
782 buf[2] |= (1 << 3);
783 break;
784 case FEC_3_4:
785 buf[2] |= (2 << 3);
786 break;
787 case FEC_5_6:
788 buf[2] |= (3 << 3);
789 break;
790 case FEC_7_8:
791 buf[2] |= (4 << 3);
792 break;
793 case FEC_NONE:
f571e004 794 break;
825b9670 795 default:
8df379c5
AP
796 dev_dbg(&state->i2c->dev, "%s: invalid code_rate_LP\n",
797 __func__);
f571e004 798 auto_mode = 1;
825b9670
AP
799 }
800
f571e004
AP
801 switch (c->bandwidth_hz) {
802 case 6000000:
825b9670 803 break;
f571e004 804 case 7000000:
825b9670
AP
805 buf[1] |= (1 << 2);
806 break;
f571e004 807 case 8000000:
825b9670
AP
808 buf[1] |= (2 << 2);
809 break;
810 default:
8df379c5
AP
811 dev_dbg(&state->i2c->dev, "%s: invalid bandwidth_hz\n",
812 __func__);
f571e004
AP
813 ret = -EINVAL;
814 goto err;
825b9670
AP
815 }
816
f571e004 817 ret = af9013_wr_regs(state, 0xd3c0, buf, 3);
825b9670 818 if (ret)
f571e004 819 goto err;
825b9670 820
f571e004
AP
821 if (auto_mode) {
822 /* clear easy mode flag */
823 ret = af9013_wr_reg(state, 0xaefd, 0);
825b9670 824 if (ret)
f571e004 825 goto err;
825b9670 826
8df379c5 827 dev_dbg(&state->i2c->dev, "%s: auto params\n", __func__);
825b9670 828 } else {
f571e004
AP
829 /* set easy mode flag */
830 ret = af9013_wr_reg(state, 0xaefd, 1);
825b9670 831 if (ret)
f571e004 832 goto err;
825b9670 833
f571e004 834 ret = af9013_wr_reg(state, 0xaefe, 0);
825b9670 835 if (ret)
f571e004
AP
836 goto err;
837
8df379c5 838 dev_dbg(&state->i2c->dev, "%s: manual params\n", __func__);
825b9670 839 }
825b9670 840
f571e004
AP
841 /* tune */
842 ret = af9013_wr_reg(state, 0xffff, 0);
825b9670 843 if (ret)
f571e004
AP
844 goto err;
845
846 state->bandwidth_hz = c->bandwidth_hz;
847 state->set_frontend_jiffies = jiffies;
848 state->first_tune = false;
825b9670 849
f571e004
AP
850 return ret;
851err:
8df379c5 852 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
853 return ret;
854}
855
7c61d80a 856static int af9013_get_frontend(struct dvb_frontend *fe)
825b9670 857{
7c61d80a 858 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
825b9670
AP
859 struct af9013_state *state = fe->demodulator_priv;
860 int ret;
f571e004 861 u8 buf[3];
825b9670 862
8df379c5 863 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
864
865 ret = af9013_rd_regs(state, 0xd3c0, buf, 3);
866 if (ret)
867 goto err;
825b9670
AP
868
869 switch ((buf[1] >> 6) & 3) {
870 case 0:
f571e004 871 c->modulation = QPSK;
825b9670
AP
872 break;
873 case 1:
f571e004 874 c->modulation = QAM_16;
825b9670
AP
875 break;
876 case 2:
f571e004 877 c->modulation = QAM_64;
825b9670
AP
878 break;
879 }
880
881 switch ((buf[0] >> 0) & 3) {
882 case 0:
f571e004 883 c->transmission_mode = TRANSMISSION_MODE_2K;
825b9670
AP
884 break;
885 case 1:
f571e004 886 c->transmission_mode = TRANSMISSION_MODE_8K;
825b9670
AP
887 }
888
889 switch ((buf[0] >> 2) & 3) {
890 case 0:
6a2329ad 891 c->guard_interval = GUARD_INTERVAL_1_32;
825b9670
AP
892 break;
893 case 1:
6a2329ad 894 c->guard_interval = GUARD_INTERVAL_1_16;
825b9670
AP
895 break;
896 case 2:
6a2329ad 897 c->guard_interval = GUARD_INTERVAL_1_8;
825b9670
AP
898 break;
899 case 3:
6a2329ad 900 c->guard_interval = GUARD_INTERVAL_1_4;
825b9670
AP
901 break;
902 }
903
904 switch ((buf[0] >> 4) & 7) {
905 case 0:
f571e004 906 c->hierarchy = HIERARCHY_NONE;
825b9670
AP
907 break;
908 case 1:
f571e004 909 c->hierarchy = HIERARCHY_1;
825b9670
AP
910 break;
911 case 2:
f571e004 912 c->hierarchy = HIERARCHY_2;
825b9670
AP
913 break;
914 case 3:
f571e004 915 c->hierarchy = HIERARCHY_4;
825b9670
AP
916 break;
917 }
918
919 switch ((buf[2] >> 0) & 7) {
920 case 0:
f571e004 921 c->code_rate_HP = FEC_1_2;
825b9670
AP
922 break;
923 case 1:
f571e004
AP
924 c->code_rate_HP = FEC_2_3;
925 break;
926 case 2:
927 c->code_rate_HP = FEC_3_4;
928 break;
929 case 3:
930 c->code_rate_HP = FEC_5_6;
931 break;
932 case 4:
933 c->code_rate_HP = FEC_7_8;
934 break;
825b9670
AP
935 }
936
f571e004
AP
937 switch ((buf[2] >> 3) & 7) {
938 case 0:
939 c->code_rate_LP = FEC_1_2;
940 break;
941 case 1:
942 c->code_rate_LP = FEC_2_3;
943 break;
944 case 2:
945 c->code_rate_LP = FEC_3_4;
946 break;
947 case 3:
948 c->code_rate_LP = FEC_5_6;
949 break;
950 case 4:
951 c->code_rate_LP = FEC_7_8;
952 break;
953 }
825b9670 954
f571e004
AP
955 switch ((buf[1] >> 2) & 3) {
956 case 0:
957 c->bandwidth_hz = 6000000;
958 break;
959 case 1:
960 c->bandwidth_hz = 7000000;
961 break;
962 case 2:
963 c->bandwidth_hz = 8000000;
964 break;
825b9670
AP
965 }
966
825b9670 967 return ret;
f571e004 968err:
8df379c5 969 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
970 return ret;
971}
972
825b9670
AP
973static int af9013_read_status(struct dvb_frontend *fe, fe_status_t *status)
974{
975 struct af9013_state *state = fe->demodulator_priv;
f571e004 976 int ret;
825b9670 977 u8 tmp;
f571e004
AP
978
979 /*
980 * Return status from the cache if it is younger than 2000ms with the
981 * exception of last tune is done during 4000ms.
982 */
983 if (time_is_after_jiffies(
984 state->read_status_jiffies + msecs_to_jiffies(2000)) &&
985 time_is_before_jiffies(
986 state->set_frontend_jiffies + msecs_to_jiffies(4000))
987 ) {
988 *status = state->fe_status;
989 return 0;
990 } else {
991 *status = 0;
992 }
825b9670 993
825b9670 994 /* MPEG2 lock */
f571e004 995 ret = af9013_rd_reg_bits(state, 0xd507, 6, 1, &tmp);
825b9670 996 if (ret)
f571e004
AP
997 goto err;
998
825b9670 999 if (tmp)
8af5e381
AP
1000 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_VITERBI |
1001 FE_HAS_SYNC | FE_HAS_LOCK;
825b9670 1002
8af5e381
AP
1003 if (!*status) {
1004 /* TPS lock */
f571e004 1005 ret = af9013_rd_reg_bits(state, 0xd330, 3, 1, &tmp);
825b9670 1006 if (ret)
f571e004
AP
1007 goto err;
1008
825b9670 1009 if (tmp)
8af5e381
AP
1010 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
1011 FE_HAS_VITERBI;
825b9670
AP
1012 }
1013
f571e004
AP
1014 state->fe_status = *status;
1015 state->read_status_jiffies = jiffies;
825b9670 1016
f571e004
AP
1017 return ret;
1018err:
8df379c5 1019 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
1020 return ret;
1021}
1022
f571e004 1023static int af9013_read_snr(struct dvb_frontend *fe, u16 *snr)
825b9670
AP
1024{
1025 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1026 *snr = state->snr;
1027 return 0;
825b9670
AP
1028}
1029
1030static int af9013_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1031{
1032 struct af9013_state *state = fe->demodulator_priv;
825b9670 1033 *strength = state->signal_strength;
f571e004 1034 return 0;
825b9670
AP
1035}
1036
f571e004 1037static int af9013_read_ber(struct dvb_frontend *fe, u32 *ber)
825b9670
AP
1038{
1039 struct af9013_state *state = fe->demodulator_priv;
f571e004
AP
1040 *ber = state->ber;
1041 return 0;
825b9670
AP
1042}
1043
1044static int af9013_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1045{
1046 struct af9013_state *state = fe->demodulator_priv;
825b9670 1047 *ucblocks = state->ucblocks;
f571e004 1048 return 0;
825b9670
AP
1049}
1050
1051static int af9013_init(struct dvb_frontend *fe)
1052{
1053 struct af9013_state *state = fe->demodulator_priv;
1054 int ret, i, len;
f571e004
AP
1055 u8 buf[3], tmp;
1056 u32 adc_cw;
1057 const struct af9013_reg_bit *init;
825b9670 1058
8df379c5 1059 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
825b9670
AP
1060
1061 /* power on */
1062 ret = af9013_power_ctrl(state, 1);
1063 if (ret)
f571e004 1064 goto err;
825b9670
AP
1065
1066 /* enable ADC */
f571e004 1067 ret = af9013_wr_reg(state, 0xd73a, 0xa4);
825b9670 1068 if (ret)
f571e004 1069 goto err;
825b9670
AP
1070
1071 /* write API version to firmware */
f571e004
AP
1072 ret = af9013_wr_regs(state, 0x9bf2, state->config.api_version, 4);
1073 if (ret)
1074 goto err;
825b9670
AP
1075
1076 /* program ADC control */
f571e004
AP
1077 switch (state->config.clock) {
1078 case 28800000: /* 28.800 MHz */
1079 tmp = 0;
1080 break;
1081 case 20480000: /* 20.480 MHz */
1082 tmp = 1;
1083 break;
1084 case 28000000: /* 28.000 MHz */
1085 tmp = 2;
1086 break;
1087 case 25000000: /* 25.000 MHz */
1088 tmp = 3;
1089 break;
1090 default:
8df379c5
AP
1091 dev_err(&state->i2c->dev, "%s: invalid clock\n",
1092 KBUILD_MODNAME);
f571e004
AP
1093 return -EINVAL;
1094 }
1095
8df379c5 1096 adc_cw = af9013_div(state, state->config.clock, 1000000ul, 19);
f571e004
AP
1097 buf[0] = (adc_cw >> 0) & 0xff;
1098 buf[1] = (adc_cw >> 8) & 0xff;
1099 buf[2] = (adc_cw >> 16) & 0xff;
1100
1101 ret = af9013_wr_regs(state, 0xd180, buf, 3);
1102 if (ret)
1103 goto err;
1104
1105 ret = af9013_wr_reg_bits(state, 0x9bd2, 0, 4, tmp);
825b9670 1106 if (ret)
f571e004 1107 goto err;
825b9670
AP
1108
1109 /* set I2C master clock */
f571e004 1110 ret = af9013_wr_reg(state, 0xd416, 0x14);
825b9670 1111 if (ret)
f571e004 1112 goto err;
825b9670
AP
1113
1114 /* set 16 embx */
f571e004 1115 ret = af9013_wr_reg_bits(state, 0xd700, 1, 1, 1);
825b9670 1116 if (ret)
f571e004 1117 goto err;
825b9670
AP
1118
1119 /* set no trigger */
f571e004 1120 ret = af9013_wr_reg_bits(state, 0xd700, 2, 1, 0);
825b9670 1121 if (ret)
f571e004 1122 goto err;
825b9670
AP
1123
1124 /* set read-update bit for constellation */
f571e004 1125 ret = af9013_wr_reg_bits(state, 0xd371, 1, 1, 1);
825b9670 1126 if (ret)
f571e004 1127 goto err;
825b9670 1128
f571e004
AP
1129 /* settings for mp2if */
1130 if (state->config.ts_mode == AF9013_TS_USB) {
1131 /* AF9015 split PSB to 1.5k + 0.5k */
1132 ret = af9013_wr_reg_bits(state, 0xd50b, 2, 1, 1);
1133 if (ret)
1134 goto err;
1135 } else {
1136 /* AF9013 change the output bit to data7 */
1137 ret = af9013_wr_reg_bits(state, 0xd500, 3, 1, 1);
1138 if (ret)
1139 goto err;
1140
1141 /* AF9013 set mpeg to full speed */
1142 ret = af9013_wr_reg_bits(state, 0xd502, 4, 1, 1);
1143 if (ret)
1144 goto err;
1145 }
1146
1147 ret = af9013_wr_reg_bits(state, 0xd520, 4, 1, 1);
825b9670 1148 if (ret)
f571e004 1149 goto err;
825b9670
AP
1150
1151 /* load OFSM settings */
8df379c5 1152 dev_dbg(&state->i2c->dev, "%s: load ofsm settings\n", __func__);
825b9670
AP
1153 len = ARRAY_SIZE(ofsm_init);
1154 init = ofsm_init;
1155 for (i = 0; i < len; i++) {
f571e004 1156 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1157 init[i].len, init[i].val);
1158 if (ret)
f571e004 1159 goto err;
825b9670
AP
1160 }
1161
1162 /* load tuner specific settings */
8df379c5
AP
1163 dev_dbg(&state->i2c->dev, "%s: load tuner specific settings\n",
1164 __func__);
825b9670
AP
1165 switch (state->config.tuner) {
1166 case AF9013_TUNER_MXL5003D:
1167 len = ARRAY_SIZE(tuner_init_mxl5003d);
1168 init = tuner_init_mxl5003d;
1169 break;
1170 case AF9013_TUNER_MXL5005D:
1171 case AF9013_TUNER_MXL5005R:
a4f31d0d 1172 case AF9013_TUNER_MXL5007T:
825b9670
AP
1173 len = ARRAY_SIZE(tuner_init_mxl5005);
1174 init = tuner_init_mxl5005;
1175 break;
1176 case AF9013_TUNER_ENV77H11D5:
1177 len = ARRAY_SIZE(tuner_init_env77h11d5);
1178 init = tuner_init_env77h11d5;
1179 break;
1180 case AF9013_TUNER_MT2060:
1181 len = ARRAY_SIZE(tuner_init_mt2060);
1182 init = tuner_init_mt2060;
1183 break;
1184 case AF9013_TUNER_MC44S803:
1185 len = ARRAY_SIZE(tuner_init_mc44s803);
1186 init = tuner_init_mc44s803;
1187 break;
1188 case AF9013_TUNER_QT1010:
1189 case AF9013_TUNER_QT1010A:
1190 len = ARRAY_SIZE(tuner_init_qt1010);
1191 init = tuner_init_qt1010;
1192 break;
1193 case AF9013_TUNER_MT2060_2:
1194 len = ARRAY_SIZE(tuner_init_mt2060_2);
1195 init = tuner_init_mt2060_2;
1196 break;
1197 case AF9013_TUNER_TDA18271:
2158e509 1198 case AF9013_TUNER_TDA18218:
825b9670
AP
1199 len = ARRAY_SIZE(tuner_init_tda18271);
1200 init = tuner_init_tda18271;
1201 break;
1202 case AF9013_TUNER_UNKNOWN:
1203 default:
1204 len = ARRAY_SIZE(tuner_init_unknown);
1205 init = tuner_init_unknown;
1206 break;
1207 }
1208
1209 for (i = 0; i < len; i++) {
f571e004 1210 ret = af9013_wr_reg_bits(state, init[i].addr, init[i].pos,
825b9670
AP
1211 init[i].len, init[i].val);
1212 if (ret)
f571e004 1213 goto err;
825b9670
AP
1214 }
1215
f571e004
AP
1216 /* TS mode */
1217 ret = af9013_wr_reg_bits(state, 0xd500, 1, 2, state->config.ts_mode);
825b9670 1218 if (ret)
f571e004 1219 goto err;
825b9670
AP
1220
1221 /* enable lock led */
f571e004 1222 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 1);
825b9670 1223 if (ret)
f571e004 1224 goto err;
825b9670 1225
f571e004
AP
1226 /* check if we support signal strength */
1227 if (!state->signal_strength_en) {
1228 ret = af9013_rd_reg_bits(state, 0x9bee, 0, 1,
1229 &state->signal_strength_en);
1230 if (ret)
1231 goto err;
1232 }
9e35cd22 1233
f571e004
AP
1234 /* read values needed for signal strength calculation */
1235 if (state->signal_strength_en && !state->rf_50) {
1236 ret = af9013_rd_reg(state, 0x9bbd, &state->rf_50);
9e35cd22 1237 if (ret)
f571e004
AP
1238 goto err;
1239
1240 ret = af9013_rd_reg(state, 0x9bd0, &state->rf_80);
9e35cd22 1241 if (ret)
f571e004
AP
1242 goto err;
1243
1244 ret = af9013_rd_reg(state, 0x9be2, &state->if_50);
9e35cd22 1245 if (ret)
f571e004
AP
1246 goto err;
1247
1248 ret = af9013_rd_reg(state, 0x9be4, &state->if_80);
9e35cd22 1249 if (ret)
f571e004 1250 goto err;
9e35cd22
AP
1251 }
1252
f571e004
AP
1253 /* SNR */
1254 ret = af9013_wr_reg(state, 0xd2e2, 1);
1255 if (ret)
1256 goto err;
1257
1258 /* BER / UCB */
1259 buf[0] = (10000 >> 0) & 0xff;
1260 buf[1] = (10000 >> 8) & 0xff;
1261 ret = af9013_wr_regs(state, 0xd385, buf, 2);
1262 if (ret)
1263 goto err;
1264
1265 /* enable FEC monitor */
1266 ret = af9013_wr_reg_bits(state, 0xd392, 1, 1, 1);
1267 if (ret)
1268 goto err;
1269
1270 state->first_tune = true;
1271 schedule_delayed_work(&state->statistics_work, msecs_to_jiffies(400));
1272
1273 return ret;
1274err:
8df379c5 1275 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
1276 return ret;
1277}
1278
1279static int af9013_sleep(struct dvb_frontend *fe)
1280{
1281 struct af9013_state *state = fe->demodulator_priv;
1282 int ret;
1283
8df379c5 1284 dev_dbg(&state->i2c->dev, "%s:\n", __func__);
f571e004
AP
1285
1286 /* stop statistics polling */
1287 cancel_delayed_work_sync(&state->statistics_work);
1288
1289 /* disable lock led */
1290 ret = af9013_wr_reg_bits(state, 0xd730, 0, 1, 0);
1291 if (ret)
1292 goto err;
1293
1294 /* power off */
1295 ret = af9013_power_ctrl(state, 0);
1296 if (ret)
1297 goto err;
1298
1299 return ret;
1300err:
8df379c5 1301 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
f571e004
AP
1302 return ret;
1303}
1304
1305static int af9013_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
1306{
1307 int ret;
1308 struct af9013_state *state = fe->demodulator_priv;
1309
8df379c5 1310 dev_dbg(&state->i2c->dev, "%s: enable=%d\n", __func__, enable);
f571e004
AP
1311
1312 /* gate already open or close */
1313 if (state->i2c_gate_state == enable)
1314 return 0;
1315
1316 if (state->config.ts_mode == AF9013_TS_USB)
1317 ret = af9013_wr_reg_bits(state, 0xd417, 3, 1, enable);
1318 else
1319 ret = af9013_wr_reg_bits(state, 0xd607, 2, 1, enable);
1320 if (ret)
1321 goto err;
1322
1323 state->i2c_gate_state = enable;
1324
1325 return ret;
1326err:
8df379c5 1327 dev_dbg(&state->i2c->dev, "%s: failed=%d\n", __func__, ret);
825b9670
AP
1328 return ret;
1329}
1330
f571e004
AP
1331static void af9013_release(struct dvb_frontend *fe)
1332{
1333 struct af9013_state *state = fe->demodulator_priv;
1334 kfree(state);
1335}
1336
825b9670
AP
1337static struct dvb_frontend_ops af9013_ops;
1338
1339static int af9013_download_firmware(struct af9013_state *state)
1340{
6ed9d560 1341 int i, len, remaining, ret;
825b9670 1342 const struct firmware *fw;
825b9670
AP
1343 u16 checksum = 0;
1344 u8 val;
1345 u8 fw_params[4];
a71103a6 1346 u8 *fw_file = AF9013_FIRMWARE;
825b9670
AP
1347
1348 msleep(100);
1349 /* check whether firmware is already running */
f571e004 1350 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1351 if (ret)
f571e004 1352 goto err;
825b9670 1353 else
8df379c5
AP
1354 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1355 __func__, val);
825b9670
AP
1356
1357 if (val == 0x0c) /* fw is running, no need for download */
1358 goto exit;
1359
8df379c5
AP
1360 dev_info(&state->i2c->dev, "%s: found a '%s' in cold state, will try " \
1361 "to load a firmware\n",
1362 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP
1363
1364 /* request the firmware, this will block and timeout */
e9785250 1365 ret = request_firmware(&fw, fw_file, state->i2c->dev.parent);
825b9670 1366 if (ret) {
8df379c5
AP
1367 dev_info(&state->i2c->dev, "%s: did not find the firmware " \
1368 "file. (%s) Please see linux/Documentation/dvb/ for " \
1369 "more details on firmware-problems. (%d)\n",
1370 KBUILD_MODNAME, fw_file, ret);
f571e004 1371 goto err;
825b9670
AP
1372 }
1373
8df379c5
AP
1374 dev_info(&state->i2c->dev, "%s: downloading firmware from file '%s'\n",
1375 KBUILD_MODNAME, fw_file);
825b9670
AP
1376
1377 /* calc checksum */
1378 for (i = 0; i < fw->size; i++)
1379 checksum += fw->data[i];
1380
1381 fw_params[0] = checksum >> 8;
1382 fw_params[1] = checksum & 0xff;
1383 fw_params[2] = fw->size >> 8;
1384 fw_params[3] = fw->size & 0xff;
1385
1386 /* write fw checksum & size */
1387 ret = af9013_write_ofsm_regs(state, 0x50fc,
1388 fw_params, sizeof(fw_params));
1389 if (ret)
f571e004 1390 goto err_release;
825b9670 1391
6ed9d560
AP
1392 #define FW_ADDR 0x5100 /* firmware start address */
1393 #define LEN_MAX 16 /* max packet size */
1394 for (remaining = fw->size; remaining > 0; remaining -= LEN_MAX) {
1395 len = remaining;
1396 if (len > LEN_MAX)
1397 len = LEN_MAX;
825b9670 1398
6ed9d560
AP
1399 ret = af9013_write_ofsm_regs(state,
1400 FW_ADDR + fw->size - remaining,
1401 (u8 *) &fw->data[fw->size - remaining], len);
825b9670 1402 if (ret) {
8df379c5
AP
1403 dev_err(&state->i2c->dev,
1404 "%s: firmware download failed=%d\n",
1405 KBUILD_MODNAME, ret);
f571e004 1406 goto err_release;
825b9670
AP
1407 }
1408 }
1409
825b9670 1410 /* request boot firmware */
f571e004 1411 ret = af9013_wr_reg(state, 0xe205, 1);
825b9670 1412 if (ret)
f571e004 1413 goto err_release;
825b9670
AP
1414
1415 for (i = 0; i < 15; i++) {
1416 msleep(100);
1417
1418 /* check firmware status */
f571e004 1419 ret = af9013_rd_reg(state, 0x98be, &val);
825b9670 1420 if (ret)
f571e004 1421 goto err_release;
825b9670 1422
8df379c5
AP
1423 dev_dbg(&state->i2c->dev, "%s: firmware status=%02x\n",
1424 __func__, val);
825b9670
AP
1425
1426 if (val == 0x0c || val == 0x04) /* success or fail */
1427 break;
1428 }
1429
1430 if (val == 0x04) {
8df379c5
AP
1431 dev_err(&state->i2c->dev, "%s: firmware did not run\n",
1432 KBUILD_MODNAME);
f571e004 1433 ret = -ENODEV;
825b9670 1434 } else if (val != 0x0c) {
8df379c5
AP
1435 dev_err(&state->i2c->dev, "%s: firmware boot timeout\n",
1436 KBUILD_MODNAME);
f571e004 1437 ret = -ENODEV;
825b9670
AP
1438 }
1439
f571e004 1440err_release:
825b9670 1441 release_firmware(fw);
f571e004 1442err:
825b9670
AP
1443exit:
1444 if (!ret)
8df379c5
AP
1445 dev_info(&state->i2c->dev, "%s: found a '%s' in warm state\n",
1446 KBUILD_MODNAME, af9013_ops.info.name);
825b9670
AP
1447 return ret;
1448}
1449
825b9670
AP
1450struct dvb_frontend *af9013_attach(const struct af9013_config *config,
1451 struct i2c_adapter *i2c)
1452{
1453 int ret;
1454 struct af9013_state *state = NULL;
ce99efa5 1455 u8 buf[4], i;
825b9670
AP
1456
1457 /* allocate memory for the internal state */
1458 state = kzalloc(sizeof(struct af9013_state), GFP_KERNEL);
1459 if (state == NULL)
f571e004 1460 goto err;
825b9670
AP
1461
1462 /* setup the state */
1463 state->i2c = i2c;
1464 memcpy(&state->config, config, sizeof(struct af9013_config));
1465
825b9670 1466 /* download firmware */
f571e004 1467 if (state->config.ts_mode != AF9013_TS_USB) {
825b9670
AP
1468 ret = af9013_download_firmware(state);
1469 if (ret)
f571e004 1470 goto err;
825b9670
AP
1471 }
1472
1473 /* firmware version */
f571e004 1474 ret = af9013_rd_regs(state, 0x5103, buf, 4);
109a2990 1475 if (ret)
f571e004 1476 goto err;
109a2990 1477
8df379c5
AP
1478 dev_info(&state->i2c->dev, "%s: firmware version %d.%d.%d.%d\n",
1479 KBUILD_MODNAME, buf[0], buf[1], buf[2], buf[3]);
825b9670
AP
1480
1481 /* set GPIOs */
1482 for (i = 0; i < sizeof(state->config.gpio); i++) {
1483 ret = af9013_set_gpio(state, i, state->config.gpio[i]);
1484 if (ret)
f571e004 1485 goto err;
825b9670
AP
1486 }
1487
1488 /* create dvb_frontend */
f571e004 1489 memcpy(&state->fe.ops, &af9013_ops,
825b9670 1490 sizeof(struct dvb_frontend_ops));
f571e004
AP
1491 state->fe.demodulator_priv = state;
1492
1493 INIT_DELAYED_WORK(&state->statistics_work, af9013_statistics_work);
825b9670 1494
f571e004
AP
1495 return &state->fe;
1496err:
825b9670
AP
1497 kfree(state);
1498 return NULL;
1499}
1500EXPORT_SYMBOL(af9013_attach);
1501
1502static struct dvb_frontend_ops af9013_ops = {
59d3cc19 1503 .delsys = { SYS_DVBT },
825b9670 1504 .info = {
f571e004 1505 .name = "Afatech AF9013",
825b9670
AP
1506 .frequency_min = 174000000,
1507 .frequency_max = 862000000,
1508 .frequency_stepsize = 250000,
1509 .frequency_tolerance = 0,
f571e004
AP
1510 .caps = FE_CAN_FEC_1_2 |
1511 FE_CAN_FEC_2_3 |
1512 FE_CAN_FEC_3_4 |
1513 FE_CAN_FEC_5_6 |
1514 FE_CAN_FEC_7_8 |
1515 FE_CAN_FEC_AUTO |
1516 FE_CAN_QPSK |
1517 FE_CAN_QAM_16 |
1518 FE_CAN_QAM_64 |
1519 FE_CAN_QAM_AUTO |
825b9670
AP
1520 FE_CAN_TRANSMISSION_MODE_AUTO |
1521 FE_CAN_GUARD_INTERVAL_AUTO |
1522 FE_CAN_HIERARCHY_AUTO |
1523 FE_CAN_RECOVER |
1524 FE_CAN_MUTE_TS
1525 },
1526
1527 .release = af9013_release,
f571e004 1528
825b9670
AP
1529 .init = af9013_init,
1530 .sleep = af9013_sleep,
825b9670 1531
f571e004 1532 .get_tune_settings = af9013_get_tune_settings,
59d3cc19
MCC
1533 .set_frontend = af9013_set_frontend,
1534 .get_frontend = af9013_get_frontend,
825b9670 1535
825b9670 1536 .read_status = af9013_read_status,
825b9670 1537 .read_snr = af9013_read_snr,
f571e004
AP
1538 .read_signal_strength = af9013_read_signal_strength,
1539 .read_ber = af9013_read_ber,
825b9670 1540 .read_ucblocks = af9013_read_ucblocks,
825b9670 1541
f571e004
AP
1542 .i2c_gate_ctrl = af9013_i2c_gate_ctrl,
1543};
825b9670
AP
1544
1545MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1546MODULE_DESCRIPTION("Afatech AF9013 DVB-T demodulator driver");
1547MODULE_LICENSE("GPL");
a71103a6 1548MODULE_FIRMWARE(AF9013_FIRMWARE);