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0d788680 LA |
1 | /* |
2 | Conexant cx24117/cx24132 - Dual DVBS/S2 Satellite demod/tuner driver | |
3 | ||
4 | Copyright (C) 2013 Luis Alves <ljalvs@gmail.com> | |
5 | July, 6th 2013 | |
6 | First release based on cx24116 driver by: | |
7 | Steven Toth and Georg Acher, Darron Broad, Igor Liplianin | |
8 | Cards currently supported: | |
9 | TBS6980 - Dual DVBS/S2 PCIe card | |
10 | TBS6981 - Dual DVBS/S2 PCIe card | |
11 | ||
12 | This program is free software; you can redistribute it and/or modify | |
13 | it under the terms of the GNU General Public License as published by | |
14 | the Free Software Foundation; either version 2 of the License, or | |
15 | (at your option) any later version. | |
16 | ||
17 | This program is distributed in the hope that it will be useful, | |
18 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
19 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
20 | GNU General Public License for more details. | |
21 | ||
22 | You should have received a copy of the GNU General Public License | |
23 | along with this program; if not, write to the Free Software | |
24 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
25 | */ | |
26 | ||
27 | #include <linux/slab.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/module.h> | |
30 | #include <linux/moduleparam.h> | |
31 | #include <linux/init.h> | |
32 | #include <linux/firmware.h> | |
33 | ||
d10e8280 | 34 | #include "tuner-i2c.h" |
0d788680 LA |
35 | #include "dvb_frontend.h" |
36 | #include "cx24117.h" | |
37 | ||
38 | ||
39 | #define CX24117_DEFAULT_FIRMWARE "dvb-fe-cx24117.fw" | |
40 | #define CX24117_SEARCH_RANGE_KHZ 5000 | |
41 | ||
42 | /* known registers */ | |
43 | #define CX24117_REG_COMMAND (0x00) /* command buffer */ | |
44 | #define CX24117_REG_EXECUTE (0x1f) /* execute command */ | |
45 | ||
46 | #define CX24117_REG_FREQ3_0 (0x34) /* frequency */ | |
47 | #define CX24117_REG_FREQ2_0 (0x35) | |
48 | #define CX24117_REG_FREQ1_0 (0x36) | |
49 | #define CX24117_REG_STATE0 (0x39) | |
50 | #define CX24117_REG_SSTATUS0 (0x3a) /* demod0 signal high / status */ | |
51 | #define CX24117_REG_SIGNAL0 (0x3b) | |
52 | #define CX24117_REG_FREQ5_0 (0x3c) /* +-freq */ | |
53 | #define CX24117_REG_FREQ6_0 (0x3d) | |
54 | #define CX24117_REG_SRATE2_0 (0x3e) /* +- 1000 * srate */ | |
55 | #define CX24117_REG_SRATE1_0 (0x3f) | |
56 | #define CX24117_REG_QUALITY2_0 (0x40) | |
57 | #define CX24117_REG_QUALITY1_0 (0x41) | |
58 | ||
59 | #define CX24117_REG_BER4_0 (0x47) | |
60 | #define CX24117_REG_BER3_0 (0x48) | |
61 | #define CX24117_REG_BER2_0 (0x49) | |
62 | #define CX24117_REG_BER1_0 (0x4a) | |
63 | #define CX24117_REG_DVBS_UCB2_0 (0x4b) | |
64 | #define CX24117_REG_DVBS_UCB1_0 (0x4c) | |
65 | #define CX24117_REG_DVBS2_UCB2_0 (0x50) | |
66 | #define CX24117_REG_DVBS2_UCB1_0 (0x51) | |
67 | #define CX24117_REG_QSTATUS0 (0x93) | |
68 | #define CX24117_REG_CLKDIV0 (0xe6) | |
69 | #define CX24117_REG_RATEDIV0 (0xf0) | |
70 | ||
71 | ||
72 | #define CX24117_REG_FREQ3_1 (0x55) /* frequency */ | |
73 | #define CX24117_REG_FREQ2_1 (0x56) | |
74 | #define CX24117_REG_FREQ1_1 (0x57) | |
75 | #define CX24117_REG_STATE1 (0x5a) | |
76 | #define CX24117_REG_SSTATUS1 (0x5b) /* demod1 signal high / status */ | |
77 | #define CX24117_REG_SIGNAL1 (0x5c) | |
78 | #define CX24117_REG_FREQ5_1 (0x5d) /* +- freq */ | |
79 | #define CX24117_REG_FREQ4_1 (0x5e) | |
80 | #define CX24117_REG_SRATE2_1 (0x5f) | |
81 | #define CX24117_REG_SRATE1_1 (0x60) | |
82 | #define CX24117_REG_QUALITY2_1 (0x61) | |
83 | #define CX24117_REG_QUALITY1_1 (0x62) | |
84 | #define CX24117_REG_BER4_1 (0x68) | |
85 | #define CX24117_REG_BER3_1 (0x69) | |
86 | #define CX24117_REG_BER2_1 (0x6a) | |
87 | #define CX24117_REG_BER1_1 (0x6b) | |
88 | #define CX24117_REG_DVBS_UCB2_1 (0x6c) | |
89 | #define CX24117_REG_DVBS_UCB1_1 (0x6d) | |
90 | #define CX24117_REG_DVBS2_UCB2_1 (0x71) | |
91 | #define CX24117_REG_DVBS2_UCB1_1 (0x72) | |
92 | #define CX24117_REG_QSTATUS1 (0x9f) | |
93 | #define CX24117_REG_CLKDIV1 (0xe7) | |
94 | #define CX24117_REG_RATEDIV1 (0xf1) | |
95 | ||
96 | ||
97 | /* arg buffer size */ | |
98 | #define CX24117_ARGLEN (0x1e) | |
99 | ||
100 | /* rolloff */ | |
101 | #define CX24117_ROLLOFF_020 (0x00) | |
102 | #define CX24117_ROLLOFF_025 (0x01) | |
103 | #define CX24117_ROLLOFF_035 (0x02) | |
104 | ||
105 | /* pilot bit */ | |
106 | #define CX24117_PILOT_OFF (0x00) | |
107 | #define CX24117_PILOT_ON (0x40) | |
108 | #define CX24117_PILOT_AUTO (0x80) | |
109 | ||
110 | /* signal status */ | |
111 | #define CX24117_HAS_SIGNAL (0x01) | |
112 | #define CX24117_HAS_CARRIER (0x02) | |
113 | #define CX24117_HAS_VITERBI (0x04) | |
114 | #define CX24117_HAS_SYNCLOCK (0x08) | |
115 | #define CX24117_STATUS_MASK (0x0f) | |
116 | #define CX24117_SIGNAL_MASK (0xc0) | |
117 | ||
118 | ||
119 | /* arg offset for DiSEqC */ | |
120 | #define CX24117_DISEQC_DEMOD (1) | |
121 | #define CX24117_DISEQC_BURST (2) | |
122 | #define CX24117_DISEQC_ARG3_2 (3) /* unknown value=2 */ | |
123 | #define CX24117_DISEQC_ARG4_0 (4) /* unknown value=0 */ | |
124 | #define CX24117_DISEQC_ARG5_0 (5) /* unknown value=0 */ | |
125 | #define CX24117_DISEQC_MSGLEN (6) | |
126 | #define CX24117_DISEQC_MSGOFS (7) | |
127 | ||
128 | /* DiSEqC burst */ | |
129 | #define CX24117_DISEQC_MINI_A (0) | |
130 | #define CX24117_DISEQC_MINI_B (1) | |
131 | ||
132 | ||
133 | #define CX24117_PNE (0) /* 0 disabled / 2 enabled */ | |
134 | #define CX24117_OCC (1) /* 0 disabled / 1 enabled */ | |
135 | ||
136 | ||
137 | enum cmds { | |
9fa7c419 LA |
138 | CMD_SET_VCOFREQ = 0x10, |
139 | CMD_TUNEREQUEST = 0x11, | |
140 | CMD_GLOBAL_MPEGCFG = 0x13, | |
141 | CMD_MPEGCFG = 0x14, | |
142 | CMD_TUNERINIT = 0x15, | |
143 | CMD_GET_SRATE = 0x18, | |
144 | CMD_SET_GOLDCODE = 0x19, | |
145 | CMD_GET_AGCACC = 0x1a, | |
146 | CMD_DEMODINIT = 0x1b, | |
147 | CMD_GETCTLACC = 0x1c, | |
148 | ||
149 | CMD_LNBCONFIG = 0x20, | |
150 | CMD_LNBSEND = 0x21, | |
151 | CMD_LNBDCLEVEL = 0x22, | |
152 | CMD_LNBPCBCONFIG = 0x23, | |
153 | CMD_LNBSENDTONEBST = 0x24, | |
154 | CMD_LNBUPDREPLY = 0x25, | |
155 | ||
156 | CMD_SET_GPIOMODE = 0x30, | |
157 | CMD_SET_GPIOEN = 0x31, | |
158 | CMD_SET_GPIODIR = 0x32, | |
159 | CMD_SET_GPIOOUT = 0x33, | |
160 | CMD_ENABLERSCORR = 0x34, | |
161 | CMD_FWVERSION = 0x35, | |
162 | CMD_SET_SLEEPMODE = 0x36, | |
163 | CMD_BERCTRL = 0x3c, | |
164 | CMD_EVENTCTRL = 0x3d, | |
0d788680 LA |
165 | }; |
166 | ||
d10e8280 LA |
167 | static LIST_HEAD(hybrid_tuner_instance_list); |
168 | static DEFINE_MUTEX(cx24117_list_mutex); | |
169 | ||
0d788680 LA |
170 | /* The Demod/Tuner can't easily provide these, we cache them */ |
171 | struct cx24117_tuning { | |
172 | u32 frequency; | |
173 | u32 symbol_rate; | |
0df289a2 MCC |
174 | enum fe_spectral_inversion inversion; |
175 | enum fe_code_rate fec; | |
0d788680 | 176 | |
0df289a2 MCC |
177 | enum fe_delivery_system delsys; |
178 | enum fe_modulation modulation; | |
179 | enum fe_pilot pilot; | |
180 | enum fe_rolloff rolloff; | |
0d788680 LA |
181 | |
182 | /* Demod values */ | |
183 | u8 fec_val; | |
184 | u8 fec_mask; | |
185 | u8 inversion_val; | |
186 | u8 pilot_val; | |
187 | u8 rolloff_val; | |
188 | }; | |
189 | ||
190 | /* Basic commands that are sent to the firmware */ | |
191 | struct cx24117_cmd { | |
192 | u8 len; | |
193 | u8 args[CX24117_ARGLEN]; | |
194 | }; | |
195 | ||
196 | /* common to both fe's */ | |
197 | struct cx24117_priv { | |
198 | u8 demod_address; | |
199 | struct i2c_adapter *i2c; | |
200 | u8 skip_fw_load; | |
0d788680 | 201 | struct mutex fe_lock; |
d10e8280 LA |
202 | |
203 | /* Used for sharing this struct between demods */ | |
204 | struct tuner_i2c_props i2c_props; | |
205 | struct list_head hybrid_tuner_instance_list; | |
0d788680 LA |
206 | }; |
207 | ||
208 | /* one per each fe */ | |
209 | struct cx24117_state { | |
210 | struct cx24117_priv *priv; | |
211 | struct dvb_frontend frontend; | |
212 | ||
213 | struct cx24117_tuning dcur; | |
214 | struct cx24117_tuning dnxt; | |
215 | struct cx24117_cmd dsec_cmd; | |
216 | ||
217 | int demod; | |
218 | }; | |
219 | ||
220 | /* modfec (modulation and FEC) lookup table */ | |
221 | /* Check cx24116.c for a detailed description of each field */ | |
222 | static struct cx24117_modfec { | |
0df289a2 MCC |
223 | enum fe_delivery_system delivery_system; |
224 | enum fe_modulation modulation; | |
225 | enum fe_code_rate fec; | |
0d788680 LA |
226 | u8 mask; /* In DVBS mode this is used to autodetect */ |
227 | u8 val; /* Passed to the firmware to indicate mode selection */ | |
228 | } cx24117_modfec_modes[] = { | |
229 | /* QPSK. For unknown rates we set hardware to auto detect 0xfe 0x30 */ | |
230 | ||
231 | /*mod fec mask val */ | |
232 | { SYS_DVBS, QPSK, FEC_NONE, 0xfe, 0x30 }, | |
233 | { SYS_DVBS, QPSK, FEC_1_2, 0x02, 0x2e }, /* 00000010 00101110 */ | |
234 | { SYS_DVBS, QPSK, FEC_2_3, 0x04, 0x2f }, /* 00000100 00101111 */ | |
235 | { SYS_DVBS, QPSK, FEC_3_4, 0x08, 0x30 }, /* 00001000 00110000 */ | |
236 | { SYS_DVBS, QPSK, FEC_4_5, 0xfe, 0x30 }, /* 000?0000 ? */ | |
237 | { SYS_DVBS, QPSK, FEC_5_6, 0x20, 0x31 }, /* 00100000 00110001 */ | |
238 | { SYS_DVBS, QPSK, FEC_6_7, 0xfe, 0x30 }, /* 0?000000 ? */ | |
239 | { SYS_DVBS, QPSK, FEC_7_8, 0x80, 0x32 }, /* 10000000 00110010 */ | |
240 | { SYS_DVBS, QPSK, FEC_8_9, 0xfe, 0x30 }, /* 0000000? ? */ | |
241 | { SYS_DVBS, QPSK, FEC_AUTO, 0xfe, 0x30 }, | |
242 | /* NBC-QPSK */ | |
243 | { SYS_DVBS2, QPSK, FEC_NONE, 0x00, 0x00 }, | |
244 | { SYS_DVBS2, QPSK, FEC_1_2, 0x00, 0x04 }, | |
245 | { SYS_DVBS2, QPSK, FEC_3_5, 0x00, 0x05 }, | |
246 | { SYS_DVBS2, QPSK, FEC_2_3, 0x00, 0x06 }, | |
247 | { SYS_DVBS2, QPSK, FEC_3_4, 0x00, 0x07 }, | |
248 | { SYS_DVBS2, QPSK, FEC_4_5, 0x00, 0x08 }, | |
249 | { SYS_DVBS2, QPSK, FEC_5_6, 0x00, 0x09 }, | |
250 | { SYS_DVBS2, QPSK, FEC_8_9, 0x00, 0x0a }, | |
251 | { SYS_DVBS2, QPSK, FEC_9_10, 0x00, 0x0b }, | |
252 | { SYS_DVBS2, QPSK, FEC_AUTO, 0x00, 0x00 }, | |
253 | /* 8PSK */ | |
254 | { SYS_DVBS2, PSK_8, FEC_NONE, 0x00, 0x00 }, | |
255 | { SYS_DVBS2, PSK_8, FEC_3_5, 0x00, 0x0c }, | |
256 | { SYS_DVBS2, PSK_8, FEC_2_3, 0x00, 0x0d }, | |
257 | { SYS_DVBS2, PSK_8, FEC_3_4, 0x00, 0x0e }, | |
258 | { SYS_DVBS2, PSK_8, FEC_5_6, 0x00, 0x0f }, | |
259 | { SYS_DVBS2, PSK_8, FEC_8_9, 0x00, 0x10 }, | |
260 | { SYS_DVBS2, PSK_8, FEC_9_10, 0x00, 0x11 }, | |
261 | { SYS_DVBS2, PSK_8, FEC_AUTO, 0x00, 0x00 }, | |
262 | /* | |
263 | * 'val' can be found in the FECSTATUS register when tuning. | |
264 | * FECSTATUS will give the actual FEC in use if tuning was successful. | |
265 | */ | |
266 | }; | |
267 | ||
268 | ||
269 | static int cx24117_writereg(struct cx24117_state *state, u8 reg, u8 data) | |
270 | { | |
271 | u8 buf[] = { reg, data }; | |
272 | struct i2c_msg msg = { .addr = state->priv->demod_address, | |
273 | .flags = 0, .buf = buf, .len = 2 }; | |
274 | int ret; | |
275 | ||
276 | dev_dbg(&state->priv->i2c->dev, | |
277 | "%s() demod%d i2c wr @0x%02x=0x%02x\n", | |
278 | __func__, state->demod, reg, data); | |
279 | ||
280 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
281 | if (ret < 0) { | |
282 | dev_warn(&state->priv->i2c->dev, | |
283 | "%s: demod%d i2c wr err(%i) @0x%02x=0x%02x\n", | |
284 | KBUILD_MODNAME, state->demod, ret, reg, data); | |
285 | return ret; | |
286 | } | |
287 | return 0; | |
288 | } | |
289 | ||
290 | static int cx24117_writecmd(struct cx24117_state *state, | |
291 | struct cx24117_cmd *cmd) | |
292 | { | |
293 | struct i2c_msg msg; | |
294 | u8 buf[CX24117_ARGLEN+1]; | |
295 | int ret; | |
296 | ||
297 | dev_dbg(&state->priv->i2c->dev, | |
298 | "%s() demod%d i2c wr cmd len=%d\n", | |
299 | __func__, state->demod, cmd->len); | |
300 | ||
301 | buf[0] = CX24117_REG_COMMAND; | |
302 | memcpy(&buf[1], cmd->args, cmd->len); | |
303 | ||
304 | msg.addr = state->priv->demod_address; | |
305 | msg.flags = 0; | |
306 | msg.len = cmd->len+1; | |
307 | msg.buf = buf; | |
308 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
309 | if (ret < 0) { | |
310 | dev_warn(&state->priv->i2c->dev, | |
311 | "%s: demod%d i2c wr cmd err(%i) len=%d\n", | |
312 | KBUILD_MODNAME, state->demod, ret, cmd->len); | |
313 | return ret; | |
314 | } | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static int cx24117_readreg(struct cx24117_state *state, u8 reg) | |
319 | { | |
320 | int ret; | |
321 | u8 recv = 0; | |
322 | struct i2c_msg msg[] = { | |
323 | { .addr = state->priv->demod_address, .flags = 0, | |
324 | .buf = ®, .len = 1 }, | |
325 | { .addr = state->priv->demod_address, .flags = I2C_M_RD, | |
326 | .buf = &recv, .len = 1 } | |
327 | }; | |
328 | ||
329 | ret = i2c_transfer(state->priv->i2c, msg, 2); | |
330 | if (ret < 0) { | |
331 | dev_warn(&state->priv->i2c->dev, | |
332 | "%s: demod%d i2c rd err(%d) @0x%x\n", | |
333 | KBUILD_MODNAME, state->demod, ret, reg); | |
334 | return ret; | |
335 | } | |
336 | ||
337 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d i2c rd @0x%02x=0x%02x\n", | |
338 | __func__, state->demod, reg, recv); | |
339 | ||
340 | return recv; | |
341 | } | |
342 | ||
343 | static int cx24117_readregN(struct cx24117_state *state, | |
344 | u8 reg, u8 *buf, int len) | |
345 | { | |
346 | int ret; | |
347 | struct i2c_msg msg[] = { | |
348 | { .addr = state->priv->demod_address, .flags = 0, | |
349 | .buf = ®, .len = 1 }, | |
350 | { .addr = state->priv->demod_address, .flags = I2C_M_RD, | |
351 | .buf = buf, .len = len } | |
352 | }; | |
353 | ||
354 | ret = i2c_transfer(state->priv->i2c, msg, 2); | |
355 | if (ret < 0) { | |
356 | dev_warn(&state->priv->i2c->dev, | |
357 | "%s: demod%d i2c rd err(%d) @0x%x\n", | |
358 | KBUILD_MODNAME, state->demod, ret, reg); | |
359 | return ret; | |
360 | } | |
361 | return 0; | |
362 | } | |
363 | ||
364 | static int cx24117_set_inversion(struct cx24117_state *state, | |
0df289a2 | 365 | enum fe_spectral_inversion inversion) |
0d788680 LA |
366 | { |
367 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
368 | __func__, inversion, state->demod); | |
369 | ||
370 | switch (inversion) { | |
371 | case INVERSION_OFF: | |
372 | state->dnxt.inversion_val = 0x00; | |
373 | break; | |
374 | case INVERSION_ON: | |
375 | state->dnxt.inversion_val = 0x04; | |
376 | break; | |
377 | case INVERSION_AUTO: | |
378 | state->dnxt.inversion_val = 0x0C; | |
379 | break; | |
380 | default: | |
381 | return -EINVAL; | |
382 | } | |
383 | ||
384 | state->dnxt.inversion = inversion; | |
385 | ||
386 | return 0; | |
387 | } | |
388 | ||
389 | static int cx24117_lookup_fecmod(struct cx24117_state *state, | |
0df289a2 | 390 | enum fe_delivery_system d, enum fe_modulation m, enum fe_code_rate f) |
0d788680 LA |
391 | { |
392 | int i, ret = -EINVAL; | |
393 | ||
394 | dev_dbg(&state->priv->i2c->dev, | |
395 | "%s(demod(0x%02x,0x%02x) demod%d\n", | |
396 | __func__, m, f, state->demod); | |
397 | ||
398 | for (i = 0; i < ARRAY_SIZE(cx24117_modfec_modes); i++) { | |
399 | if ((d == cx24117_modfec_modes[i].delivery_system) && | |
400 | (m == cx24117_modfec_modes[i].modulation) && | |
401 | (f == cx24117_modfec_modes[i].fec)) { | |
402 | ret = i; | |
403 | break; | |
404 | } | |
405 | } | |
406 | ||
407 | return ret; | |
408 | } | |
409 | ||
410 | static int cx24117_set_fec(struct cx24117_state *state, | |
0df289a2 MCC |
411 | enum fe_delivery_system delsys, |
412 | enum fe_modulation mod, | |
413 | enum fe_code_rate fec) | |
0d788680 LA |
414 | { |
415 | int ret; | |
416 | ||
417 | dev_dbg(&state->priv->i2c->dev, | |
418 | "%s(0x%02x,0x%02x) demod%d\n", | |
419 | __func__, mod, fec, state->demod); | |
420 | ||
421 | ret = cx24117_lookup_fecmod(state, delsys, mod, fec); | |
422 | if (ret < 0) | |
423 | return ret; | |
424 | ||
425 | state->dnxt.fec = fec; | |
426 | state->dnxt.fec_val = cx24117_modfec_modes[ret].val; | |
427 | state->dnxt.fec_mask = cx24117_modfec_modes[ret].mask; | |
428 | dev_dbg(&state->priv->i2c->dev, | |
429 | "%s() demod%d mask/val = 0x%02x/0x%02x\n", __func__, | |
430 | state->demod, state->dnxt.fec_mask, state->dnxt.fec_val); | |
431 | ||
432 | return 0; | |
433 | } | |
434 | ||
435 | static int cx24117_set_symbolrate(struct cx24117_state *state, u32 rate) | |
436 | { | |
437 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
438 | __func__, rate, state->demod); | |
439 | ||
440 | state->dnxt.symbol_rate = rate; | |
441 | ||
442 | dev_dbg(&state->priv->i2c->dev, | |
443 | "%s() demod%d symbol_rate = %d\n", | |
444 | __func__, state->demod, rate); | |
445 | ||
446 | return 0; | |
447 | } | |
448 | ||
449 | static int cx24117_load_firmware(struct dvb_frontend *fe, | |
450 | const struct firmware *fw); | |
451 | ||
452 | static int cx24117_firmware_ondemand(struct dvb_frontend *fe) | |
453 | { | |
454 | struct cx24117_state *state = fe->demodulator_priv; | |
455 | const struct firmware *fw; | |
456 | int ret = 0; | |
457 | ||
458 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d skip_fw_load=%d\n", | |
459 | __func__, state->demod, state->priv->skip_fw_load); | |
460 | ||
461 | if (state->priv->skip_fw_load) | |
462 | return 0; | |
463 | ||
510cb39c | 464 | /* check if firmware is already running */ |
0d788680 LA |
465 | if (cx24117_readreg(state, 0xeb) != 0xa) { |
466 | /* Load firmware */ | |
467 | /* request the firmware, this will block until loaded */ | |
468 | dev_dbg(&state->priv->i2c->dev, | |
469 | "%s: Waiting for firmware upload (%s)...\n", | |
470 | __func__, CX24117_DEFAULT_FIRMWARE); | |
471 | ret = request_firmware(&fw, CX24117_DEFAULT_FIRMWARE, | |
472 | state->priv->i2c->dev.parent); | |
473 | dev_dbg(&state->priv->i2c->dev, | |
474 | "%s: Waiting for firmware upload(2)...\n", __func__); | |
475 | if (ret) { | |
476 | dev_err(&state->priv->i2c->dev, | |
477 | "%s: No firmware uploaded " | |
478 | "(timeout or file not found?)\n", __func__); | |
479 | return ret; | |
480 | } | |
481 | ||
482 | /* Make sure we don't recurse back through here | |
483 | * during loading */ | |
484 | state->priv->skip_fw_load = 1; | |
485 | ||
486 | ret = cx24117_load_firmware(fe, fw); | |
487 | if (ret) | |
488 | dev_err(&state->priv->i2c->dev, | |
489 | "%s: Writing firmware failed\n", __func__); | |
490 | release_firmware(fw); | |
491 | ||
492 | dev_info(&state->priv->i2c->dev, | |
493 | "%s: Firmware upload %s\n", __func__, | |
494 | ret == 0 ? "complete" : "failed"); | |
495 | ||
496 | /* Ensure firmware is always loaded if required */ | |
497 | state->priv->skip_fw_load = 0; | |
498 | } | |
499 | ||
500 | return ret; | |
501 | } | |
502 | ||
503 | /* Take a basic firmware command structure, format it | |
504 | * and forward it for processing | |
505 | */ | |
506 | static int cx24117_cmd_execute_nolock(struct dvb_frontend *fe, | |
507 | struct cx24117_cmd *cmd) | |
508 | { | |
509 | struct cx24117_state *state = fe->demodulator_priv; | |
510 | int i, ret; | |
511 | ||
512 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
513 | __func__, state->demod); | |
514 | ||
515 | /* Load the firmware if required */ | |
516 | ret = cx24117_firmware_ondemand(fe); | |
517 | if (ret != 0) | |
518 | return ret; | |
519 | ||
520 | /* Write the command */ | |
521 | cx24117_writecmd(state, cmd); | |
522 | ||
523 | /* Start execution and wait for cmd to terminate */ | |
524 | cx24117_writereg(state, CX24117_REG_EXECUTE, 0x01); | |
525 | i = 0; | |
526 | while (cx24117_readreg(state, CX24117_REG_EXECUTE)) { | |
527 | msleep(20); | |
528 | if (i++ > 40) { | |
529 | /* Avoid looping forever if the firmware does | |
530 | not respond */ | |
531 | dev_warn(&state->priv->i2c->dev, | |
532 | "%s() Firmware not responding\n", __func__); | |
533 | return -EIO; | |
534 | } | |
535 | } | |
536 | return 0; | |
537 | } | |
538 | ||
539 | static int cx24117_cmd_execute(struct dvb_frontend *fe, struct cx24117_cmd *cmd) | |
540 | { | |
541 | struct cx24117_state *state = fe->demodulator_priv; | |
542 | int ret; | |
543 | ||
544 | mutex_lock(&state->priv->fe_lock); | |
545 | ret = cx24117_cmd_execute_nolock(fe, cmd); | |
546 | mutex_unlock(&state->priv->fe_lock); | |
547 | ||
548 | return ret; | |
549 | } | |
550 | ||
551 | static int cx24117_load_firmware(struct dvb_frontend *fe, | |
552 | const struct firmware *fw) | |
553 | { | |
554 | struct cx24117_state *state = fe->demodulator_priv; | |
555 | struct cx24117_cmd cmd; | |
556 | int i, ret; | |
557 | unsigned char vers[4]; | |
558 | ||
559 | struct i2c_msg msg; | |
560 | u8 *buf; | |
561 | ||
562 | dev_dbg(&state->priv->i2c->dev, | |
563 | "%s() demod%d FW is %zu bytes (%02x %02x .. %02x %02x)\n", | |
564 | __func__, state->demod, fw->size, fw->data[0], fw->data[1], | |
d10e8280 | 565 | fw->data[fw->size - 2], fw->data[fw->size - 1]); |
0d788680 LA |
566 | |
567 | cx24117_writereg(state, 0xea, 0x00); | |
568 | cx24117_writereg(state, 0xea, 0x01); | |
569 | cx24117_writereg(state, 0xea, 0x00); | |
570 | ||
571 | cx24117_writereg(state, 0xce, 0x92); | |
572 | ||
573 | cx24117_writereg(state, 0xfb, 0x00); | |
574 | cx24117_writereg(state, 0xfc, 0x00); | |
575 | ||
576 | cx24117_writereg(state, 0xc3, 0x04); | |
577 | cx24117_writereg(state, 0xc4, 0x04); | |
578 | ||
579 | cx24117_writereg(state, 0xce, 0x00); | |
580 | cx24117_writereg(state, 0xcf, 0x00); | |
581 | ||
582 | cx24117_writereg(state, 0xea, 0x00); | |
583 | cx24117_writereg(state, 0xeb, 0x0c); | |
584 | cx24117_writereg(state, 0xec, 0x06); | |
585 | cx24117_writereg(state, 0xed, 0x05); | |
586 | cx24117_writereg(state, 0xee, 0x03); | |
587 | cx24117_writereg(state, 0xef, 0x05); | |
588 | ||
589 | cx24117_writereg(state, 0xf3, 0x03); | |
590 | cx24117_writereg(state, 0xf4, 0x44); | |
591 | ||
592 | cx24117_writereg(state, CX24117_REG_RATEDIV0, 0x04); | |
593 | cx24117_writereg(state, CX24117_REG_CLKDIV0, 0x02); | |
594 | ||
595 | cx24117_writereg(state, CX24117_REG_RATEDIV1, 0x04); | |
596 | cx24117_writereg(state, CX24117_REG_CLKDIV1, 0x02); | |
597 | ||
598 | cx24117_writereg(state, 0xf2, 0x04); | |
599 | cx24117_writereg(state, 0xe8, 0x02); | |
600 | cx24117_writereg(state, 0xea, 0x01); | |
601 | cx24117_writereg(state, 0xc8, 0x00); | |
602 | cx24117_writereg(state, 0xc9, 0x00); | |
603 | cx24117_writereg(state, 0xca, 0x00); | |
604 | cx24117_writereg(state, 0xcb, 0x00); | |
605 | cx24117_writereg(state, 0xcc, 0x00); | |
606 | cx24117_writereg(state, 0xcd, 0x00); | |
607 | cx24117_writereg(state, 0xe4, 0x03); | |
608 | cx24117_writereg(state, 0xeb, 0x0a); | |
609 | ||
610 | cx24117_writereg(state, 0xfb, 0x00); | |
611 | cx24117_writereg(state, 0xe0, 0x76); | |
612 | cx24117_writereg(state, 0xf7, 0x81); | |
613 | cx24117_writereg(state, 0xf8, 0x00); | |
614 | cx24117_writereg(state, 0xf9, 0x00); | |
615 | ||
616 | buf = kmalloc(fw->size + 1, GFP_KERNEL); | |
617 | if (buf == NULL) { | |
618 | state->priv->skip_fw_load = 0; | |
619 | return -ENOMEM; | |
620 | } | |
621 | ||
622 | /* fw upload reg */ | |
623 | buf[0] = 0xfa; | |
624 | memcpy(&buf[1], fw->data, fw->size); | |
625 | ||
626 | /* prepare i2c message to send */ | |
627 | msg.addr = state->priv->demod_address; | |
628 | msg.flags = 0; | |
629 | msg.len = fw->size + 1; | |
630 | msg.buf = buf; | |
631 | ||
632 | /* send fw */ | |
633 | ret = i2c_transfer(state->priv->i2c, &msg, 1); | |
634 | if (ret < 0) | |
635 | return ret; | |
636 | ||
637 | kfree(buf); | |
638 | ||
639 | cx24117_writereg(state, 0xf7, 0x0c); | |
640 | cx24117_writereg(state, 0xe0, 0x00); | |
641 | ||
9fa7c419 LA |
642 | /* Init demodulator */ |
643 | cmd.args[0] = CMD_DEMODINIT; | |
0d788680 LA |
644 | cmd.args[1] = 0x00; |
645 | cmd.args[2] = 0x01; | |
646 | cmd.args[3] = 0x00; | |
647 | cmd.len = 4; | |
648 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
649 | if (ret != 0) | |
650 | goto error; | |
651 | ||
9fa7c419 LA |
652 | /* Set VCO frequency */ |
653 | cmd.args[0] = CMD_SET_VCOFREQ; | |
0d788680 LA |
654 | cmd.args[1] = 0x06; |
655 | cmd.args[2] = 0x2b; | |
656 | cmd.args[3] = 0xd8; | |
657 | cmd.args[4] = 0xa5; | |
658 | cmd.args[5] = 0xee; | |
659 | cmd.args[6] = 0x03; | |
660 | cmd.args[7] = 0x9d; | |
661 | cmd.args[8] = 0xfc; | |
662 | cmd.args[9] = 0x06; | |
663 | cmd.args[10] = 0x02; | |
664 | cmd.args[11] = 0x9d; | |
665 | cmd.args[12] = 0xfc; | |
666 | cmd.len = 13; | |
667 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
668 | if (ret != 0) | |
669 | goto error; | |
670 | ||
9fa7c419 LA |
671 | /* Tuner init */ |
672 | cmd.args[0] = CMD_TUNERINIT; | |
0d788680 LA |
673 | cmd.args[1] = 0x00; |
674 | cmd.args[2] = 0x01; | |
675 | cmd.args[3] = 0x00; | |
676 | cmd.args[4] = 0x00; | |
677 | cmd.args[5] = 0x01; | |
678 | cmd.args[6] = 0x01; | |
679 | cmd.args[7] = 0x01; | |
680 | cmd.args[8] = 0x00; | |
681 | cmd.args[9] = 0x05; | |
682 | cmd.args[10] = 0x02; | |
683 | cmd.args[11] = 0x02; | |
684 | cmd.args[12] = 0x00; | |
685 | cmd.len = 13; | |
686 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
687 | if (ret != 0) | |
688 | goto error; | |
689 | ||
9fa7c419 LA |
690 | /* Global MPEG config */ |
691 | cmd.args[0] = CMD_GLOBAL_MPEGCFG; | |
0d788680 LA |
692 | cmd.args[1] = 0x00; |
693 | cmd.args[2] = 0x00; | |
694 | cmd.args[3] = 0x00; | |
695 | cmd.args[4] = 0x01; | |
696 | cmd.args[5] = 0x00; | |
697 | cmd.len = 6; | |
698 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
699 | if (ret != 0) | |
700 | goto error; | |
701 | ||
9fa7c419 | 702 | /* MPEG config for each demod */ |
0d788680 | 703 | for (i = 0; i < 2; i++) { |
9fa7c419 | 704 | cmd.args[0] = CMD_MPEGCFG; |
0d788680 LA |
705 | cmd.args[1] = (u8) i; |
706 | cmd.args[2] = 0x00; | |
707 | cmd.args[3] = 0x05; | |
708 | cmd.args[4] = 0x00; | |
709 | cmd.args[5] = 0x00; | |
710 | cmd.args[6] = 0x55; | |
711 | cmd.args[7] = 0x00; | |
712 | cmd.len = 8; | |
713 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
714 | if (ret != 0) | |
715 | goto error; | |
716 | } | |
717 | ||
718 | cx24117_writereg(state, 0xce, 0xc0); | |
719 | cx24117_writereg(state, 0xcf, 0x00); | |
720 | cx24117_writereg(state, 0xe5, 0x04); | |
721 | ||
9fa7c419 LA |
722 | /* Get firmware version */ |
723 | cmd.args[0] = CMD_FWVERSION; | |
0d788680 LA |
724 | cmd.len = 2; |
725 | for (i = 0; i < 4; i++) { | |
726 | cmd.args[1] = i; | |
727 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
728 | if (ret != 0) | |
729 | goto error; | |
730 | vers[i] = cx24117_readreg(state, 0x33); | |
731 | } | |
732 | dev_info(&state->priv->i2c->dev, | |
733 | "%s: FW version %i.%i.%i.%i\n", __func__, | |
734 | vers[0], vers[1], vers[2], vers[3]); | |
735 | return 0; | |
736 | error: | |
737 | state->priv->skip_fw_load = 0; | |
738 | dev_err(&state->priv->i2c->dev, "%s() Error running FW.\n", __func__); | |
739 | return ret; | |
740 | } | |
741 | ||
0df289a2 | 742 | static int cx24117_read_status(struct dvb_frontend *fe, enum fe_status *status) |
0d788680 LA |
743 | { |
744 | struct cx24117_state *state = fe->demodulator_priv; | |
745 | int lock; | |
746 | ||
747 | lock = cx24117_readreg(state, | |
748 | (state->demod == 0) ? CX24117_REG_SSTATUS0 : | |
749 | CX24117_REG_SSTATUS1) & | |
750 | CX24117_STATUS_MASK; | |
751 | ||
752 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d status = 0x%02x\n", | |
753 | __func__, state->demod, lock); | |
754 | ||
755 | *status = 0; | |
756 | ||
757 | if (lock & CX24117_HAS_SIGNAL) | |
758 | *status |= FE_HAS_SIGNAL; | |
759 | if (lock & CX24117_HAS_CARRIER) | |
760 | *status |= FE_HAS_CARRIER; | |
761 | if (lock & CX24117_HAS_VITERBI) | |
762 | *status |= FE_HAS_VITERBI; | |
763 | if (lock & CX24117_HAS_SYNCLOCK) | |
764 | *status |= FE_HAS_SYNC | FE_HAS_LOCK; | |
765 | ||
766 | return 0; | |
767 | } | |
768 | ||
769 | static int cx24117_read_ber(struct dvb_frontend *fe, u32 *ber) | |
770 | { | |
771 | struct cx24117_state *state = fe->demodulator_priv; | |
772 | int ret; | |
773 | u8 buf[4]; | |
774 | u8 base_reg = (state->demod == 0) ? | |
775 | CX24117_REG_BER4_0 : | |
776 | CX24117_REG_BER4_1; | |
777 | ||
778 | ret = cx24117_readregN(state, base_reg, buf, 4); | |
779 | if (ret != 0) | |
780 | return ret; | |
781 | ||
782 | *ber = (buf[0] << 24) | (buf[1] << 16) | | |
783 | (buf[1] << 8) | buf[0]; | |
784 | ||
785 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d ber=0x%04x\n", | |
786 | __func__, state->demod, *ber); | |
787 | ||
788 | return 0; | |
789 | } | |
790 | ||
791 | static int cx24117_read_signal_strength(struct dvb_frontend *fe, | |
792 | u16 *signal_strength) | |
793 | { | |
794 | struct cx24117_state *state = fe->demodulator_priv; | |
795 | struct cx24117_cmd cmd; | |
796 | int ret; | |
797 | u16 sig_reading; | |
798 | u8 buf[2]; | |
799 | u8 reg = (state->demod == 0) ? | |
800 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1; | |
801 | ||
9fa7c419 LA |
802 | /* Read AGC accumulator register */ |
803 | cmd.args[0] = CMD_GET_AGCACC; | |
0d788680 LA |
804 | cmd.args[1] = (u8) state->demod; |
805 | cmd.len = 2; | |
806 | ret = cx24117_cmd_execute(fe, &cmd); | |
807 | if (ret != 0) | |
808 | return ret; | |
809 | ||
810 | ret = cx24117_readregN(state, reg, buf, 2); | |
811 | if (ret != 0) | |
812 | return ret; | |
813 | sig_reading = ((buf[0] & CX24117_SIGNAL_MASK) << 2) | buf[1]; | |
814 | ||
815 | *signal_strength = -100 * sig_reading + 94324; | |
816 | ||
817 | dev_dbg(&state->priv->i2c->dev, | |
818 | "%s() demod%d raw / cooked = 0x%04x / 0x%04x\n", | |
819 | __func__, state->demod, sig_reading, *signal_strength); | |
820 | ||
821 | return 0; | |
822 | } | |
823 | ||
824 | static int cx24117_read_snr(struct dvb_frontend *fe, u16 *snr) | |
825 | { | |
826 | struct cx24117_state *state = fe->demodulator_priv; | |
827 | int ret; | |
828 | u8 buf[2]; | |
829 | u8 reg = (state->demod == 0) ? | |
830 | CX24117_REG_QUALITY2_0 : CX24117_REG_QUALITY2_1; | |
831 | ||
832 | ret = cx24117_readregN(state, reg, buf, 2); | |
833 | if (ret != 0) | |
834 | return ret; | |
835 | ||
836 | *snr = (buf[0] << 8) | buf[1]; | |
837 | ||
838 | dev_dbg(&state->priv->i2c->dev, | |
839 | "%s() demod%d snr = 0x%04x\n", | |
840 | __func__, state->demod, *snr); | |
841 | ||
842 | return ret; | |
843 | } | |
844 | ||
845 | static int cx24117_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks) | |
846 | { | |
847 | struct cx24117_state *state = fe->demodulator_priv; | |
0df289a2 | 848 | enum fe_delivery_system delsys = fe->dtv_property_cache.delivery_system; |
0d788680 LA |
849 | int ret; |
850 | u8 buf[2]; | |
851 | u8 reg = (state->demod == 0) ? | |
852 | CX24117_REG_DVBS_UCB2_0 : | |
853 | CX24117_REG_DVBS_UCB2_1; | |
854 | ||
855 | switch (delsys) { | |
856 | case SYS_DVBS: | |
857 | break; | |
858 | case SYS_DVBS2: | |
859 | reg += (CX24117_REG_DVBS2_UCB2_0 - CX24117_REG_DVBS_UCB2_0); | |
860 | break; | |
861 | default: | |
862 | return -EINVAL; | |
863 | } | |
864 | ||
865 | ret = cx24117_readregN(state, reg, buf, 2); | |
866 | if (ret != 0) | |
867 | return ret; | |
868 | *ucblocks = (buf[0] << 8) | buf[1]; | |
869 | ||
870 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d ucb=0x%04x\n", | |
871 | __func__, state->demod, *ucblocks); | |
872 | ||
873 | return 0; | |
874 | } | |
875 | ||
876 | /* Overwrite the current tuning params, we are about to tune */ | |
877 | static void cx24117_clone_params(struct dvb_frontend *fe) | |
878 | { | |
879 | struct cx24117_state *state = fe->demodulator_priv; | |
880 | state->dcur = state->dnxt; | |
881 | } | |
882 | ||
883 | /* Wait for LNB */ | |
884 | static int cx24117_wait_for_lnb(struct dvb_frontend *fe) | |
885 | { | |
886 | struct cx24117_state *state = fe->demodulator_priv; | |
887 | int i; | |
888 | u8 val, reg = (state->demod == 0) ? CX24117_REG_QSTATUS0 : | |
889 | CX24117_REG_QSTATUS1; | |
890 | ||
891 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d qstatus = 0x%02x\n", | |
892 | __func__, state->demod, cx24117_readreg(state, reg)); | |
893 | ||
894 | /* Wait for up to 300 ms */ | |
895 | for (i = 0; i < 10; i++) { | |
896 | val = cx24117_readreg(state, reg) & 0x01; | |
897 | if (val != 0) | |
898 | return 0; | |
899 | msleep(30); | |
900 | } | |
901 | ||
902 | dev_warn(&state->priv->i2c->dev, "%s: demod%d LNB not ready\n", | |
903 | KBUILD_MODNAME, state->demod); | |
904 | ||
905 | return -ETIMEDOUT; /* -EBUSY ? */ | |
906 | } | |
907 | ||
908 | static int cx24117_set_voltage(struct dvb_frontend *fe, | |
0df289a2 | 909 | enum fe_sec_voltage voltage) |
0d788680 LA |
910 | { |
911 | struct cx24117_state *state = fe->demodulator_priv; | |
912 | struct cx24117_cmd cmd; | |
913 | int ret; | |
914 | u8 reg = (state->demod == 0) ? 0x10 : 0x20; | |
915 | ||
916 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d %s\n", | |
917 | __func__, state->demod, | |
918 | voltage == SEC_VOLTAGE_13 ? "SEC_VOLTAGE_13" : | |
919 | voltage == SEC_VOLTAGE_18 ? "SEC_VOLTAGE_18" : | |
920 | "SEC_VOLTAGE_OFF"); | |
921 | ||
71b6aaaf LA |
922 | /* Prepare a set GPIO logic level CMD */ |
923 | cmd.args[0] = CMD_SET_GPIOOUT; | |
924 | cmd.args[2] = reg; /* mask */ | |
0d788680 | 925 | cmd.len = 3; |
0d788680 LA |
926 | |
927 | if ((voltage == SEC_VOLTAGE_13) || | |
928 | (voltage == SEC_VOLTAGE_18)) { | |
71b6aaaf | 929 | /* power on LNB */ |
0d788680 | 930 | cmd.args[1] = reg; |
0d788680 LA |
931 | ret = cx24117_cmd_execute(fe, &cmd); |
932 | if (ret != 0) | |
933 | return ret; | |
934 | ||
935 | ret = cx24117_wait_for_lnb(fe); | |
936 | if (ret != 0) | |
937 | return ret; | |
938 | ||
939 | /* Wait for voltage/min repeat delay */ | |
940 | msleep(100); | |
941 | ||
9fa7c419 | 942 | /* Set 13V/18V select pin */ |
0d788680 LA |
943 | cmd.args[0] = CMD_LNBDCLEVEL; |
944 | cmd.args[1] = state->demod ? 0 : 1; | |
945 | cmd.args[2] = (voltage == SEC_VOLTAGE_18 ? 0x01 : 0x00); | |
946 | cmd.len = 3; | |
71b6aaaf | 947 | ret = cx24117_cmd_execute(fe, &cmd); |
0d788680 LA |
948 | |
949 | /* Min delay time before DiSEqC send */ | |
950 | msleep(20); | |
951 | } else { | |
71b6aaaf | 952 | /* power off LNB */ |
0d788680 | 953 | cmd.args[1] = 0x00; |
71b6aaaf | 954 | ret = cx24117_cmd_execute(fe, &cmd); |
0d788680 LA |
955 | } |
956 | ||
71b6aaaf | 957 | return ret; |
0d788680 LA |
958 | } |
959 | ||
960 | static int cx24117_set_tone(struct dvb_frontend *fe, | |
0df289a2 | 961 | enum fe_sec_tone_mode tone) |
0d788680 LA |
962 | { |
963 | struct cx24117_state *state = fe->demodulator_priv; | |
964 | struct cx24117_cmd cmd; | |
965 | int ret; | |
966 | ||
967 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod%d\n", | |
968 | __func__, state->demod, tone); | |
969 | if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) { | |
970 | dev_warn(&state->priv->i2c->dev, "%s: demod%d invalid tone=%d\n", | |
971 | KBUILD_MODNAME, state->demod, tone); | |
972 | return -EINVAL; | |
973 | } | |
974 | ||
975 | /* Wait for LNB ready */ | |
976 | ret = cx24117_wait_for_lnb(fe); | |
977 | if (ret != 0) | |
978 | return ret; | |
979 | ||
980 | /* Min delay time after DiSEqC send */ | |
981 | msleep(20); | |
982 | ||
983 | /* Set the tone */ | |
9fa7c419 | 984 | cmd.args[0] = CMD_LNBPCBCONFIG; |
0d788680 LA |
985 | cmd.args[1] = (state->demod ? 0 : 1); |
986 | cmd.args[2] = 0x00; | |
987 | cmd.args[3] = 0x00; | |
988 | cmd.len = 5; | |
989 | switch (tone) { | |
990 | case SEC_TONE_ON: | |
991 | cmd.args[4] = 0x01; | |
992 | break; | |
993 | case SEC_TONE_OFF: | |
994 | cmd.args[4] = 0x00; | |
995 | break; | |
996 | } | |
997 | ||
998 | msleep(20); | |
999 | ||
1000 | return cx24117_cmd_execute(fe, &cmd); | |
1001 | } | |
1002 | ||
1003 | /* Initialise DiSEqC */ | |
1004 | static int cx24117_diseqc_init(struct dvb_frontend *fe) | |
1005 | { | |
1006 | struct cx24117_state *state = fe->demodulator_priv; | |
1007 | ||
1008 | /* Prepare a DiSEqC command */ | |
1009 | state->dsec_cmd.args[0] = CMD_LNBSEND; | |
1010 | ||
1011 | /* demod */ | |
1012 | state->dsec_cmd.args[CX24117_DISEQC_DEMOD] = state->demod ? 0 : 1; | |
1013 | ||
1014 | /* DiSEqC burst */ | |
1015 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = CX24117_DISEQC_MINI_A; | |
1016 | ||
1017 | /* Unknown */ | |
1018 | state->dsec_cmd.args[CX24117_DISEQC_ARG3_2] = 0x02; | |
1019 | state->dsec_cmd.args[CX24117_DISEQC_ARG4_0] = 0x00; | |
1020 | ||
1021 | /* Continuation flag? */ | |
1022 | state->dsec_cmd.args[CX24117_DISEQC_ARG5_0] = 0x00; | |
1023 | ||
1024 | /* DiSEqC message length */ | |
1025 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = 0x00; | |
1026 | ||
1027 | /* Command length */ | |
1028 | state->dsec_cmd.len = 7; | |
1029 | ||
1030 | return 0; | |
1031 | } | |
1032 | ||
1033 | /* Send DiSEqC message */ | |
1034 | static int cx24117_send_diseqc_msg(struct dvb_frontend *fe, | |
1035 | struct dvb_diseqc_master_cmd *d) | |
1036 | { | |
1037 | struct cx24117_state *state = fe->demodulator_priv; | |
1038 | int i, ret; | |
1039 | ||
1040 | /* Dump DiSEqC message */ | |
1041 | dev_dbg(&state->priv->i2c->dev, "%s: demod %d (", | |
1042 | __func__, state->demod); | |
1043 | for (i = 0; i < d->msg_len; i++) | |
1044 | dev_dbg(&state->priv->i2c->dev, "0x%02x ", d->msg[i]); | |
1045 | dev_dbg(&state->priv->i2c->dev, ")\n"); | |
1046 | ||
1047 | /* Validate length */ | |
82e3b88b | 1048 | if (d->msg_len > sizeof(d->msg)) |
0d788680 LA |
1049 | return -EINVAL; |
1050 | ||
1051 | /* DiSEqC message */ | |
1052 | for (i = 0; i < d->msg_len; i++) | |
1053 | state->dsec_cmd.args[CX24117_DISEQC_MSGOFS + i] = d->msg[i]; | |
1054 | ||
1055 | /* DiSEqC message length */ | |
1056 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] = d->msg_len; | |
1057 | ||
1058 | /* Command length */ | |
1059 | state->dsec_cmd.len = CX24117_DISEQC_MSGOFS + | |
1060 | state->dsec_cmd.args[CX24117_DISEQC_MSGLEN]; | |
1061 | ||
1062 | /* | |
1063 | * Message is sent with derived else cached burst | |
1064 | * | |
1065 | * WRITE PORT GROUP COMMAND 38 | |
1066 | * | |
1067 | * 0/A/A: E0 10 38 F0..F3 | |
1068 | * 1/B/B: E0 10 38 F4..F7 | |
1069 | * 2/C/A: E0 10 38 F8..FB | |
1070 | * 3/D/B: E0 10 38 FC..FF | |
1071 | * | |
1072 | * databyte[3]= 8421:8421 | |
1073 | * ABCD:WXYZ | |
1074 | * CLR :SET | |
1075 | * | |
1076 | * WX= PORT SELECT 0..3 (X=TONEBURST) | |
1077 | * Y = VOLTAGE (0=13V, 1=18V) | |
1078 | * Z = BAND (0=LOW, 1=HIGH(22K)) | |
1079 | */ | |
1080 | if (d->msg_len >= 4 && d->msg[2] == 0x38) | |
1081 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1082 | ((d->msg[3] & 4) >> 2); | |
1083 | ||
1084 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d burst=%d\n", | |
1085 | __func__, state->demod, | |
1086 | state->dsec_cmd.args[CX24117_DISEQC_BURST]); | |
1087 | ||
1088 | /* Wait for LNB ready */ | |
1089 | ret = cx24117_wait_for_lnb(fe); | |
1090 | if (ret != 0) | |
1091 | return ret; | |
1092 | ||
1093 | /* Wait for voltage/min repeat delay */ | |
1094 | msleep(100); | |
1095 | ||
1096 | /* Command */ | |
1097 | ret = cx24117_cmd_execute(fe, &state->dsec_cmd); | |
1098 | if (ret != 0) | |
1099 | return ret; | |
1100 | /* | |
1101 | * Wait for send | |
1102 | * | |
1103 | * Eutelsat spec: | |
1104 | * >15ms delay + (XXX determine if FW does this, see set_tone) | |
1105 | * 13.5ms per byte + | |
1106 | * >15ms delay + | |
1107 | * 12.5ms burst + | |
1108 | * >15ms delay (XXX determine if FW does this, see set_tone) | |
1109 | */ | |
1110 | msleep((state->dsec_cmd.args[CX24117_DISEQC_MSGLEN] << 4) + 60); | |
1111 | ||
1112 | return 0; | |
1113 | } | |
1114 | ||
1115 | /* Send DiSEqC burst */ | |
1116 | static int cx24117_diseqc_send_burst(struct dvb_frontend *fe, | |
0df289a2 | 1117 | enum fe_sec_mini_cmd burst) |
0d788680 LA |
1118 | { |
1119 | struct cx24117_state *state = fe->demodulator_priv; | |
1120 | ||
1121 | dev_dbg(&state->priv->i2c->dev, "%s(%d) demod=%d\n", | |
1122 | __func__, burst, state->demod); | |
1123 | ||
1124 | /* DiSEqC burst */ | |
1125 | if (burst == SEC_MINI_A) | |
1126 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1127 | CX24117_DISEQC_MINI_A; | |
1128 | else if (burst == SEC_MINI_B) | |
1129 | state->dsec_cmd.args[CX24117_DISEQC_BURST] = | |
1130 | CX24117_DISEQC_MINI_B; | |
1131 | else | |
1132 | return -EINVAL; | |
1133 | ||
1134 | return 0; | |
1135 | } | |
1136 | ||
d10e8280 LA |
1137 | static int cx24117_get_priv(struct cx24117_priv **priv, |
1138 | struct i2c_adapter *i2c, u8 client_address) | |
1139 | { | |
1140 | int ret; | |
1141 | ||
1142 | mutex_lock(&cx24117_list_mutex); | |
1143 | ret = hybrid_tuner_request_state(struct cx24117_priv, (*priv), | |
1144 | hybrid_tuner_instance_list, i2c, client_address, "cx24117"); | |
1145 | mutex_unlock(&cx24117_list_mutex); | |
1146 | ||
1147 | return ret; | |
1148 | } | |
1149 | ||
1150 | static void cx24117_release_priv(struct cx24117_priv *priv) | |
1151 | { | |
1152 | mutex_lock(&cx24117_list_mutex); | |
1153 | if (priv != NULL) | |
1154 | hybrid_tuner_release_state(priv); | |
1155 | mutex_unlock(&cx24117_list_mutex); | |
1156 | } | |
1157 | ||
0d788680 LA |
1158 | static void cx24117_release(struct dvb_frontend *fe) |
1159 | { | |
1160 | struct cx24117_state *state = fe->demodulator_priv; | |
1161 | dev_dbg(&state->priv->i2c->dev, "%s demod%d\n", | |
1162 | __func__, state->demod); | |
d10e8280 | 1163 | cx24117_release_priv(state->priv); |
0d788680 LA |
1164 | kfree(state); |
1165 | } | |
1166 | ||
1167 | static struct dvb_frontend_ops cx24117_ops; | |
1168 | ||
1169 | struct dvb_frontend *cx24117_attach(const struct cx24117_config *config, | |
d10e8280 | 1170 | struct i2c_adapter *i2c) |
0d788680 LA |
1171 | { |
1172 | struct cx24117_state *state = NULL; | |
1173 | struct cx24117_priv *priv = NULL; | |
1174 | int demod = 0; | |
1175 | ||
d10e8280 LA |
1176 | /* get the common data struct for both demods */ |
1177 | demod = cx24117_get_priv(&priv, i2c, config->demod_address); | |
1178 | ||
1179 | switch (demod) { | |
1180 | case 0: | |
a33dd517 | 1181 | dev_err(&i2c->dev, |
d10e8280 LA |
1182 | "%s: Error attaching frontend %d\n", |
1183 | KBUILD_MODNAME, demod); | |
1184 | goto error1; | |
1185 | break; | |
1186 | case 1: | |
1187 | /* new priv instance */ | |
0d788680 LA |
1188 | priv->i2c = i2c; |
1189 | priv->demod_address = config->demod_address; | |
1190 | mutex_init(&priv->fe_lock); | |
d10e8280 LA |
1191 | break; |
1192 | default: | |
1193 | /* existing priv instance */ | |
1194 | break; | |
0d788680 LA |
1195 | } |
1196 | ||
1197 | /* allocate memory for the internal state */ | |
1198 | state = kzalloc(sizeof(struct cx24117_state), GFP_KERNEL); | |
1199 | if (state == NULL) | |
1200 | goto error2; | |
1201 | ||
d10e8280 | 1202 | state->demod = demod - 1; |
0d788680 LA |
1203 | state->priv = priv; |
1204 | ||
0d788680 LA |
1205 | dev_info(&state->priv->i2c->dev, |
1206 | "%s: Attaching frontend %d\n", | |
d10e8280 | 1207 | KBUILD_MODNAME, state->demod); |
0d788680 LA |
1208 | |
1209 | /* create dvb_frontend */ | |
1210 | memcpy(&state->frontend.ops, &cx24117_ops, | |
1211 | sizeof(struct dvb_frontend_ops)); | |
1212 | state->frontend.demodulator_priv = state; | |
1213 | return &state->frontend; | |
1214 | ||
0d788680 | 1215 | error2: |
d10e8280 | 1216 | cx24117_release_priv(priv); |
0d788680 LA |
1217 | error1: |
1218 | return NULL; | |
1219 | } | |
1220 | EXPORT_SYMBOL_GPL(cx24117_attach); | |
1221 | ||
1222 | /* | |
1223 | * Initialise or wake up device | |
1224 | * | |
1225 | * Power config will reset and load initial firmware if required | |
1226 | */ | |
1227 | static int cx24117_initfe(struct dvb_frontend *fe) | |
1228 | { | |
1229 | struct cx24117_state *state = fe->demodulator_priv; | |
1230 | struct cx24117_cmd cmd; | |
1231 | int ret; | |
1232 | ||
1233 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1234 | __func__, state->demod); | |
1235 | ||
1236 | mutex_lock(&state->priv->fe_lock); | |
1237 | ||
9fa7c419 LA |
1238 | /* Set sleep mode off */ |
1239 | cmd.args[0] = CMD_SET_SLEEPMODE; | |
0d788680 LA |
1240 | cmd.args[1] = (state->demod ? 1 : 0); |
1241 | cmd.args[2] = 0; | |
1242 | cmd.len = 3; | |
1243 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
1244 | if (ret != 0) | |
4699b5f3 | 1245 | goto exit; |
0d788680 LA |
1246 | |
1247 | ret = cx24117_diseqc_init(fe); | |
1248 | if (ret != 0) | |
4699b5f3 | 1249 | goto exit; |
0d788680 | 1250 | |
9fa7c419 LA |
1251 | /* Set BER control */ |
1252 | cmd.args[0] = CMD_BERCTRL; | |
0d788680 LA |
1253 | cmd.args[1] = (state->demod ? 1 : 0); |
1254 | cmd.args[2] = 0x10; | |
1255 | cmd.args[3] = 0x10; | |
1256 | cmd.len = 4; | |
1257 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
1258 | if (ret != 0) | |
4699b5f3 | 1259 | goto exit; |
0d788680 | 1260 | |
9fa7c419 LA |
1261 | /* Set RS correction (enable/disable) */ |
1262 | cmd.args[0] = CMD_ENABLERSCORR; | |
0d788680 LA |
1263 | cmd.args[1] = (state->demod ? 1 : 0); |
1264 | cmd.args[2] = CX24117_OCC; | |
1265 | cmd.len = 3; | |
1266 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
71b6aaaf LA |
1267 | if (ret != 0) |
1268 | goto exit; | |
1269 | ||
1270 | /* Set GPIO direction */ | |
1271 | /* Set as output - controls LNB power on/off */ | |
1272 | cmd.args[0] = CMD_SET_GPIODIR; | |
1273 | cmd.args[1] = 0x30; | |
1274 | cmd.args[2] = 0x30; | |
1275 | cmd.len = 3; | |
1276 | ret = cx24117_cmd_execute_nolock(fe, &cmd); | |
0d788680 | 1277 | |
4699b5f3 | 1278 | exit: |
0d788680 LA |
1279 | mutex_unlock(&state->priv->fe_lock); |
1280 | ||
1281 | return ret; | |
1282 | } | |
1283 | ||
1284 | /* | |
1285 | * Put device to sleep | |
1286 | */ | |
1287 | static int cx24117_sleep(struct dvb_frontend *fe) | |
1288 | { | |
1289 | struct cx24117_state *state = fe->demodulator_priv; | |
1290 | struct cx24117_cmd cmd; | |
1291 | ||
1292 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1293 | __func__, state->demod); | |
1294 | ||
9fa7c419 LA |
1295 | /* Set sleep mode on */ |
1296 | cmd.args[0] = CMD_SET_SLEEPMODE; | |
0d788680 LA |
1297 | cmd.args[1] = (state->demod ? 1 : 0); |
1298 | cmd.args[2] = 1; | |
1299 | cmd.len = 3; | |
1300 | return cx24117_cmd_execute(fe, &cmd); | |
1301 | } | |
1302 | ||
1303 | /* dvb-core told us to tune, the tv property cache will be complete, | |
1304 | * it's safe for is to pull values and use them for tuning purposes. | |
1305 | */ | |
1306 | static int cx24117_set_frontend(struct dvb_frontend *fe) | |
1307 | { | |
1308 | struct cx24117_state *state = fe->demodulator_priv; | |
1309 | struct dtv_frontend_properties *c = &fe->dtv_property_cache; | |
1310 | struct cx24117_cmd cmd; | |
0df289a2 | 1311 | enum fe_status tunerstat; |
0d788680 LA |
1312 | int i, status, ret, retune = 1; |
1313 | u8 reg_clkdiv, reg_ratediv; | |
1314 | ||
1315 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1316 | __func__, state->demod); | |
1317 | ||
1318 | switch (c->delivery_system) { | |
1319 | case SYS_DVBS: | |
1320 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S\n", | |
1321 | __func__, state->demod); | |
1322 | ||
1323 | /* Only QPSK is supported for DVB-S */ | |
1324 | if (c->modulation != QPSK) { | |
1325 | dev_dbg(&state->priv->i2c->dev, | |
1326 | "%s() demod%d unsupported modulation (%d)\n", | |
1327 | __func__, state->demod, c->modulation); | |
1328 | return -EINVAL; | |
1329 | } | |
1330 | ||
1331 | /* Pilot doesn't exist in DVB-S, turn bit off */ | |
1332 | state->dnxt.pilot_val = CX24117_PILOT_OFF; | |
1333 | ||
1334 | /* DVB-S only supports 0.35 */ | |
1335 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1336 | break; | |
1337 | ||
1338 | case SYS_DVBS2: | |
1339 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d DVB-S2\n", | |
1340 | __func__, state->demod); | |
1341 | ||
1342 | /* | |
1343 | * NBC 8PSK/QPSK with DVB-S is supported for DVB-S2, | |
1344 | * but not hardware auto detection | |
1345 | */ | |
1346 | if (c->modulation != PSK_8 && c->modulation != QPSK) { | |
1347 | dev_dbg(&state->priv->i2c->dev, | |
1348 | "%s() demod%d unsupported modulation (%d)\n", | |
1349 | __func__, state->demod, c->modulation); | |
1350 | return -EOPNOTSUPP; | |
1351 | } | |
1352 | ||
1353 | switch (c->pilot) { | |
1354 | case PILOT_AUTO: | |
1355 | state->dnxt.pilot_val = CX24117_PILOT_AUTO; | |
1356 | break; | |
1357 | case PILOT_OFF: | |
1358 | state->dnxt.pilot_val = CX24117_PILOT_OFF; | |
1359 | break; | |
1360 | case PILOT_ON: | |
1361 | state->dnxt.pilot_val = CX24117_PILOT_ON; | |
1362 | break; | |
1363 | default: | |
1364 | dev_dbg(&state->priv->i2c->dev, | |
1365 | "%s() demod%d unsupported pilot mode (%d)\n", | |
1366 | __func__, state->demod, c->pilot); | |
1367 | return -EOPNOTSUPP; | |
1368 | } | |
1369 | ||
1370 | switch (c->rolloff) { | |
1371 | case ROLLOFF_20: | |
1372 | state->dnxt.rolloff_val = CX24117_ROLLOFF_020; | |
1373 | break; | |
1374 | case ROLLOFF_25: | |
1375 | state->dnxt.rolloff_val = CX24117_ROLLOFF_025; | |
1376 | break; | |
1377 | case ROLLOFF_35: | |
1378 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1379 | break; | |
1380 | case ROLLOFF_AUTO: | |
1381 | state->dnxt.rolloff_val = CX24117_ROLLOFF_035; | |
1382 | /* soft-auto rolloff */ | |
1383 | retune = 3; | |
1384 | break; | |
1385 | default: | |
1386 | dev_warn(&state->priv->i2c->dev, | |
1387 | "%s: demod%d unsupported rolloff (%d)\n", | |
1388 | KBUILD_MODNAME, state->demod, c->rolloff); | |
1389 | return -EOPNOTSUPP; | |
1390 | } | |
1391 | break; | |
1392 | ||
1393 | default: | |
1394 | dev_warn(&state->priv->i2c->dev, | |
1395 | "%s: demod %d unsupported delivery system (%d)\n", | |
1396 | KBUILD_MODNAME, state->demod, c->delivery_system); | |
1397 | return -EINVAL; | |
1398 | } | |
1399 | ||
1400 | state->dnxt.delsys = c->delivery_system; | |
1401 | state->dnxt.modulation = c->modulation; | |
1402 | state->dnxt.frequency = c->frequency; | |
1403 | state->dnxt.pilot = c->pilot; | |
1404 | state->dnxt.rolloff = c->rolloff; | |
1405 | ||
1406 | ret = cx24117_set_inversion(state, c->inversion); | |
1407 | if (ret != 0) | |
1408 | return ret; | |
1409 | ||
1410 | ret = cx24117_set_fec(state, | |
1411 | c->delivery_system, c->modulation, c->fec_inner); | |
1412 | if (ret != 0) | |
1413 | return ret; | |
1414 | ||
1415 | ret = cx24117_set_symbolrate(state, c->symbol_rate); | |
1416 | if (ret != 0) | |
1417 | return ret; | |
1418 | ||
1419 | /* discard the 'current' tuning parameters and prepare to tune */ | |
1420 | cx24117_clone_params(fe); | |
1421 | ||
1422 | dev_dbg(&state->priv->i2c->dev, | |
1423 | "%s: delsys = %d\n", __func__, state->dcur.delsys); | |
1424 | dev_dbg(&state->priv->i2c->dev, | |
1425 | "%s: modulation = %d\n", __func__, state->dcur.modulation); | |
1426 | dev_dbg(&state->priv->i2c->dev, | |
1427 | "%s: frequency = %d\n", __func__, state->dcur.frequency); | |
1428 | dev_dbg(&state->priv->i2c->dev, | |
1429 | "%s: pilot = %d (val = 0x%02x)\n", __func__, | |
1430 | state->dcur.pilot, state->dcur.pilot_val); | |
1431 | dev_dbg(&state->priv->i2c->dev, | |
1432 | "%s: retune = %d\n", __func__, retune); | |
1433 | dev_dbg(&state->priv->i2c->dev, | |
1434 | "%s: rolloff = %d (val = 0x%02x)\n", __func__, | |
1435 | state->dcur.rolloff, state->dcur.rolloff_val); | |
1436 | dev_dbg(&state->priv->i2c->dev, | |
1437 | "%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate); | |
1438 | dev_dbg(&state->priv->i2c->dev, | |
1439 | "%s: FEC = %d (mask/val = 0x%02x/0x%02x)\n", __func__, | |
1440 | state->dcur.fec, state->dcur.fec_mask, state->dcur.fec_val); | |
1441 | dev_dbg(&state->priv->i2c->dev, | |
1442 | "%s: Inversion = %d (val = 0x%02x)\n", __func__, | |
1443 | state->dcur.inversion, state->dcur.inversion_val); | |
1444 | ||
1445 | /* Prepare a tune request */ | |
1446 | cmd.args[0] = CMD_TUNEREQUEST; | |
1447 | ||
1448 | /* demod */ | |
1449 | cmd.args[1] = state->demod; | |
1450 | ||
1451 | /* Frequency */ | |
1452 | cmd.args[2] = (state->dcur.frequency & 0xff0000) >> 16; | |
1453 | cmd.args[3] = (state->dcur.frequency & 0x00ff00) >> 8; | |
1454 | cmd.args[4] = (state->dcur.frequency & 0x0000ff); | |
1455 | ||
1456 | /* Symbol Rate */ | |
1457 | cmd.args[5] = ((state->dcur.symbol_rate / 1000) & 0xff00) >> 8; | |
1458 | cmd.args[6] = ((state->dcur.symbol_rate / 1000) & 0x00ff); | |
1459 | ||
1460 | /* Automatic Inversion */ | |
1461 | cmd.args[7] = state->dcur.inversion_val; | |
1462 | ||
1463 | /* Modulation / FEC / Pilot */ | |
1464 | cmd.args[8] = state->dcur.fec_val | state->dcur.pilot_val; | |
1465 | ||
1466 | cmd.args[9] = CX24117_SEARCH_RANGE_KHZ >> 8; | |
1467 | cmd.args[10] = CX24117_SEARCH_RANGE_KHZ & 0xff; | |
1468 | ||
1469 | cmd.args[11] = state->dcur.rolloff_val; | |
1470 | cmd.args[12] = state->dcur.fec_mask; | |
1471 | ||
1472 | if (state->dcur.symbol_rate > 30000000) { | |
1473 | reg_ratediv = 0x04; | |
1474 | reg_clkdiv = 0x02; | |
1475 | } else if (state->dcur.symbol_rate > 10000000) { | |
1476 | reg_ratediv = 0x06; | |
1477 | reg_clkdiv = 0x03; | |
1478 | } else { | |
1479 | reg_ratediv = 0x0a; | |
1480 | reg_clkdiv = 0x05; | |
1481 | } | |
1482 | ||
1483 | cmd.args[13] = reg_ratediv; | |
1484 | cmd.args[14] = reg_clkdiv; | |
1485 | ||
1486 | cx24117_writereg(state, (state->demod == 0) ? | |
1487 | CX24117_REG_CLKDIV0 : CX24117_REG_CLKDIV1, reg_clkdiv); | |
1488 | cx24117_writereg(state, (state->demod == 0) ? | |
1489 | CX24117_REG_RATEDIV0 : CX24117_REG_RATEDIV1, reg_ratediv); | |
1490 | ||
1491 | cmd.args[15] = CX24117_PNE; | |
1492 | cmd.len = 16; | |
1493 | ||
1494 | do { | |
1495 | /* Reset status register */ | |
1496 | status = cx24117_readreg(state, (state->demod == 0) ? | |
1497 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1) & | |
1498 | CX24117_SIGNAL_MASK; | |
1499 | ||
1500 | dev_dbg(&state->priv->i2c->dev, | |
1501 | "%s() demod%d status_setfe = %02x\n", | |
1502 | __func__, state->demod, status); | |
1503 | ||
1504 | cx24117_writereg(state, (state->demod == 0) ? | |
1505 | CX24117_REG_SSTATUS0 : CX24117_REG_SSTATUS1, status); | |
1506 | ||
1507 | /* Tune */ | |
1508 | ret = cx24117_cmd_execute(fe, &cmd); | |
1509 | if (ret != 0) | |
1510 | break; | |
1511 | ||
1512 | /* | |
1513 | * Wait for up to 500 ms before retrying | |
1514 | * | |
1515 | * If we are able to tune then generally it occurs within 100ms. | |
1516 | * If it takes longer, try a different rolloff setting. | |
1517 | */ | |
1518 | for (i = 0; i < 50; i++) { | |
1519 | cx24117_read_status(fe, &tunerstat); | |
1520 | status = tunerstat & (FE_HAS_SIGNAL | FE_HAS_SYNC); | |
1521 | if (status == (FE_HAS_SIGNAL | FE_HAS_SYNC)) { | |
1522 | dev_dbg(&state->priv->i2c->dev, | |
1523 | "%s() demod%d tuned\n", | |
1524 | __func__, state->demod); | |
1525 | return 0; | |
1526 | } | |
1527 | msleep(20); | |
1528 | } | |
1529 | ||
1530 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d not tuned\n", | |
1531 | __func__, state->demod); | |
1532 | ||
1533 | /* try next rolloff value */ | |
1534 | if (state->dcur.rolloff == 3) | |
1535 | cmd.args[11]--; | |
1536 | ||
1537 | } while (--retune); | |
1538 | return -EINVAL; | |
1539 | } | |
1540 | ||
1541 | static int cx24117_tune(struct dvb_frontend *fe, bool re_tune, | |
0df289a2 | 1542 | unsigned int mode_flags, unsigned int *delay, enum fe_status *status) |
0d788680 LA |
1543 | { |
1544 | struct cx24117_state *state = fe->demodulator_priv; | |
1545 | ||
1546 | dev_dbg(&state->priv->i2c->dev, "%s() demod%d\n", | |
1547 | __func__, state->demod); | |
1548 | ||
1549 | *delay = HZ / 5; | |
1550 | if (re_tune) { | |
1551 | int ret = cx24117_set_frontend(fe); | |
1552 | if (ret) | |
1553 | return ret; | |
1554 | } | |
1555 | return cx24117_read_status(fe, status); | |
1556 | } | |
1557 | ||
1558 | static int cx24117_get_algo(struct dvb_frontend *fe) | |
1559 | { | |
1560 | return DVBFE_ALGO_HW; | |
1561 | } | |
1562 | ||
7e3e68bc MCC |
1563 | static int cx24117_get_frontend(struct dvb_frontend *fe, |
1564 | struct dtv_frontend_properties *c) | |
0d788680 LA |
1565 | { |
1566 | struct cx24117_state *state = fe->demodulator_priv; | |
0d788680 LA |
1567 | struct cx24117_cmd cmd; |
1568 | u8 reg, st, inv; | |
1569 | int ret, idx; | |
1570 | unsigned int freq; | |
1571 | short srate_os, freq_os; | |
1572 | ||
1573 | u8 buf[0x1f-4]; | |
1574 | ||
9fa7c419 LA |
1575 | /* Read current tune parameters */ |
1576 | cmd.args[0] = CMD_GETCTLACC; | |
0d788680 LA |
1577 | cmd.args[1] = (u8) state->demod; |
1578 | cmd.len = 2; | |
1579 | ret = cx24117_cmd_execute(fe, &cmd); | |
1580 | if (ret != 0) | |
1581 | return ret; | |
1582 | ||
1583 | /* read all required regs at once */ | |
1584 | reg = (state->demod == 0) ? CX24117_REG_FREQ3_0 : CX24117_REG_FREQ3_1; | |
1585 | ret = cx24117_readregN(state, reg, buf, 0x1f-4); | |
1586 | if (ret != 0) | |
1587 | return ret; | |
1588 | ||
1589 | st = buf[5]; | |
1590 | ||
1591 | /* get spectral inversion */ | |
1592 | inv = (((state->demod == 0) ? ~st : st) >> 6) & 1; | |
1593 | if (inv == 0) | |
1594 | c->inversion = INVERSION_OFF; | |
1595 | else | |
1596 | c->inversion = INVERSION_ON; | |
1597 | ||
1598 | /* modulation and fec */ | |
1599 | idx = st & 0x3f; | |
1600 | if (c->delivery_system == SYS_DVBS2) { | |
1601 | if (idx > 11) | |
1602 | idx += 9; | |
1603 | else | |
1604 | idx += 7; | |
1605 | } | |
1606 | ||
1607 | c->modulation = cx24117_modfec_modes[idx].modulation; | |
1608 | c->fec_inner = cx24117_modfec_modes[idx].fec; | |
1609 | ||
1610 | /* frequency */ | |
1611 | freq = (buf[0] << 16) | (buf[1] << 8) | buf[2]; | |
1612 | freq_os = (buf[8] << 8) | buf[9]; | |
1613 | c->frequency = freq + freq_os; | |
1614 | ||
1615 | /* symbol rate */ | |
1616 | srate_os = (buf[10] << 8) | buf[11]; | |
1617 | c->symbol_rate = -1000 * srate_os + state->dcur.symbol_rate; | |
1618 | return 0; | |
1619 | } | |
1620 | ||
1621 | static struct dvb_frontend_ops cx24117_ops = { | |
1622 | .delsys = { SYS_DVBS, SYS_DVBS2 }, | |
1623 | .info = { | |
1624 | .name = "Conexant CX24117/CX24132", | |
1625 | .frequency_min = 950000, | |
1626 | .frequency_max = 2150000, | |
1627 | .frequency_stepsize = 1011, /* kHz for QPSK frontends */ | |
1628 | .frequency_tolerance = 5000, | |
1629 | .symbol_rate_min = 1000000, | |
1630 | .symbol_rate_max = 45000000, | |
1631 | .caps = FE_CAN_INVERSION_AUTO | | |
1632 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
1633 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | |
1634 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO | | |
1635 | FE_CAN_2G_MODULATION | | |
1636 | FE_CAN_QPSK | FE_CAN_RECOVER | |
1637 | }, | |
1638 | ||
1639 | .release = cx24117_release, | |
1640 | ||
1641 | .init = cx24117_initfe, | |
1642 | .sleep = cx24117_sleep, | |
1643 | .read_status = cx24117_read_status, | |
1644 | .read_ber = cx24117_read_ber, | |
1645 | .read_signal_strength = cx24117_read_signal_strength, | |
1646 | .read_snr = cx24117_read_snr, | |
1647 | .read_ucblocks = cx24117_read_ucblocks, | |
1648 | .set_tone = cx24117_set_tone, | |
1649 | .set_voltage = cx24117_set_voltage, | |
1650 | .diseqc_send_master_cmd = cx24117_send_diseqc_msg, | |
1651 | .diseqc_send_burst = cx24117_diseqc_send_burst, | |
1652 | .get_frontend_algo = cx24117_get_algo, | |
1653 | .tune = cx24117_tune, | |
1654 | ||
1655 | .set_frontend = cx24117_set_frontend, | |
1656 | .get_frontend = cx24117_get_frontend, | |
1657 | }; | |
1658 | ||
1659 | ||
1660 | MODULE_DESCRIPTION("DVB Frontend module for Conexant cx24117/cx24132 hardware"); | |
1661 | MODULE_AUTHOR("Luis Alves (ljalvs@gmail.com)"); | |
1662 | MODULE_LICENSE("GPL"); | |
1663 | MODULE_VERSION("1.1"); | |
1664 | MODULE_FIRMWARE(CX24117_DEFAULT_FIRMWARE); | |
1665 |