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74ba9207 | 1 | /* SPDX-License-Identifier: GPL-2.0-or-later */ |
1da177e4 LT |
2 | /* |
3 | Driver for Zarlink MT312 QPSK Frontend | |
4 | ||
5 | Copyright (C) 2003 Andreas Oberritter <obi@linuxtv.org> | |
6 | ||
1da177e4 LT |
7 | |
8 | */ | |
9 | ||
10 | #ifndef _DVB_FRONTENDS_MT312_PRIV | |
11 | #define _DVB_FRONTENDS_MT312_PRIV | |
12 | ||
13 | enum mt312_reg_addr { | |
14 | QPSK_INT_H = 0, | |
15 | QPSK_INT_M = 1, | |
16 | QPSK_INT_L = 2, | |
17 | FEC_INT = 3, | |
18 | QPSK_STAT_H = 4, | |
19 | QPSK_STAT_L = 5, | |
20 | FEC_STATUS = 6, | |
21 | LNB_FREQ_H = 7, | |
22 | LNB_FREQ_L = 8, | |
23 | M_SNR_H = 9, | |
24 | M_SNR_L = 10, | |
25 | VIT_ERRCNT_H = 11, | |
26 | VIT_ERRCNT_M = 12, | |
27 | VIT_ERRCNT_L = 13, | |
28 | RS_BERCNT_H = 14, | |
29 | RS_BERCNT_M = 15, | |
30 | RS_BERCNT_L = 16, | |
31 | RS_UBC_H = 17, | |
32 | RS_UBC_L = 18, | |
33 | SIG_LEVEL = 19, | |
34 | GPP_CTRL = 20, | |
35 | RESET = 21, | |
36 | DISEQC_MODE = 22, | |
37 | SYM_RATE_H = 23, | |
38 | SYM_RATE_L = 24, | |
39 | VIT_MODE = 25, | |
40 | QPSK_CTRL = 26, | |
41 | GO = 27, | |
42 | IE_QPSK_H = 28, | |
43 | IE_QPSK_M = 29, | |
44 | IE_QPSK_L = 30, | |
45 | IE_FEC = 31, | |
46 | QPSK_STAT_EN = 32, | |
47 | FEC_STAT_EN = 33, | |
48 | SYS_CLK = 34, | |
49 | DISEQC_RATIO = 35, | |
50 | DISEQC_INSTR = 36, | |
51 | FR_LIM = 37, | |
52 | FR_OFF = 38, | |
53 | AGC_CTRL = 39, | |
54 | AGC_INIT = 40, | |
55 | AGC_REF = 41, | |
56 | AGC_MAX = 42, | |
57 | AGC_MIN = 43, | |
58 | AGC_LK_TH = 44, | |
59 | TS_AGC_LK_TH = 45, | |
60 | AGC_PWR_SET = 46, | |
61 | QPSK_MISC = 47, | |
62 | SNR_THS_LOW = 48, | |
63 | SNR_THS_HIGH = 49, | |
64 | TS_SW_RATE = 50, | |
65 | TS_SW_LIM_L = 51, | |
66 | TS_SW_LIM_H = 52, | |
67 | CS_SW_RATE_1 = 53, | |
68 | CS_SW_RATE_2 = 54, | |
69 | CS_SW_RATE_3 = 55, | |
70 | CS_SW_RATE_4 = 56, | |
71 | CS_SW_LIM = 57, | |
72 | TS_LPK = 58, | |
73 | TS_LPK_M = 59, | |
74 | TS_LPK_L = 60, | |
75 | CS_KPROP_H = 61, | |
76 | CS_KPROP_L = 62, | |
77 | CS_KINT_H = 63, | |
78 | CS_KINT_L = 64, | |
79 | QPSK_SCALE = 65, | |
80 | TLD_OUTCLK_TH = 66, | |
81 | TLD_INCLK_TH = 67, | |
82 | FLD_TH = 68, | |
83 | PLD_OUTLK3 = 69, | |
84 | PLD_OUTLK2 = 70, | |
85 | PLD_OUTLK1 = 71, | |
86 | PLD_OUTLK0 = 72, | |
87 | PLD_INLK3 = 73, | |
88 | PLD_INLK2 = 74, | |
89 | PLD_INLK1 = 75, | |
90 | PLD_INLK0 = 76, | |
91 | PLD_ACC_TIME = 77, | |
92 | SWEEP_PAR = 78, | |
93 | STARTUP_TIME = 79, | |
94 | LOSSLOCK_TH = 80, | |
95 | FEC_LOCK_TM = 81, | |
96 | LOSSLOCK_TM = 82, | |
97 | VIT_ERRPER_H = 83, | |
98 | VIT_ERRPER_M = 84, | |
99 | VIT_ERRPER_L = 85, | |
6a5cbd59 MS |
100 | HW_CTRL = 84, /* ZL10313 only */ |
101 | MPEG_CTRL = 85, /* ZL10313 only */ | |
1da177e4 LT |
102 | VIT_SETUP = 86, |
103 | VIT_REF0 = 87, | |
104 | VIT_REF1 = 88, | |
105 | VIT_REF2 = 89, | |
106 | VIT_REF3 = 90, | |
107 | VIT_REF4 = 91, | |
108 | VIT_REF5 = 92, | |
109 | VIT_REF6 = 93, | |
110 | VIT_MAXERR = 94, | |
111 | BA_SETUPT = 95, | |
112 | OP_CTRL = 96, | |
113 | FEC_SETUP = 97, | |
114 | PROG_SYNC = 98, | |
115 | AFC_SEAR_TH = 99, | |
116 | CSACC_DIF_TH = 100, | |
117 | QPSK_LK_CT = 101, | |
118 | QPSK_ST_CT = 102, | |
119 | MON_CTRL = 103, | |
120 | QPSK_RESET = 104, | |
121 | QPSK_TST_CT = 105, | |
122 | QPSK_TST_ST = 106, | |
123 | TEST_R = 107, | |
124 | AGC_H = 108, | |
125 | AGC_M = 109, | |
126 | AGC_L = 110, | |
127 | FREQ_ERR1_H = 111, | |
128 | FREQ_ERR1_M = 112, | |
129 | FREQ_ERR1_L = 113, | |
130 | FREQ_ERR2_H = 114, | |
131 | FREQ_ERR2_L = 115, | |
132 | SYM_RAT_OP_H = 116, | |
133 | SYM_RAT_OP_L = 117, | |
134 | DESEQC2_INT = 118, | |
135 | DISEQC2_STAT = 119, | |
136 | DISEQC2_FIFO = 120, | |
137 | DISEQC2_CTRL1 = 121, | |
138 | DISEQC2_CTRL2 = 122, | |
139 | MONITOR_H = 123, | |
140 | MONITOR_L = 124, | |
141 | TEST_MODE = 125, | |
142 | ID = 126, | |
143 | CONFIG = 127 | |
144 | }; | |
145 | ||
146 | enum mt312_model_id { | |
147 | ID_VP310 = 1, | |
6a5cbd59 MS |
148 | ID_MT312 = 3, |
149 | ID_ZL10313 = 5, | |
1da177e4 LT |
150 | }; |
151 | ||
152 | #endif /* DVB_FRONTENDS_MT312_PRIV */ |