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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
1da177e4 LT |
2 | /* |
3 | * Public Include File for DRV6000 users | |
4 | * (ie. NxtWave Communications - NXT6000 demodulator driver) | |
5 | * | |
6 | * Copyright (C) 2001 NxtWave Communications, Inc. | |
7 | * | |
8 | */ | |
9 | ||
10 | /* Nxt6000 Register Addresses and Bit Masks */ | |
11 | ||
12 | /* Maximum Register Number */ | |
13 | #define MAXNXT6000REG (0x9A) | |
14 | ||
15 | /* 0x1B A_VIT_BER_0 aka 0x3A */ | |
16 | #define A_VIT_BER_0 (0x1B) | |
17 | ||
18 | /* 0x1D A_VIT_BER_TIMER_0 aka 0x38 */ | |
19 | #define A_VIT_BER_TIMER_0 (0x1D) | |
20 | ||
21 | /* 0x21 RS_COR_STAT */ | |
22 | #define RS_COR_STAT (0x21) | |
23 | #define RSCORESTATUS (0x03) | |
24 | ||
25 | /* 0x22 RS_COR_INTEN */ | |
26 | #define RS_COR_INTEN (0x22) | |
27 | ||
28 | /* 0x23 RS_COR_INSTAT */ | |
29 | #define RS_COR_INSTAT (0x23) | |
30 | #define INSTAT_ERROR (0x04) | |
31 | #define LOCK_LOSS_BITS (0x03) | |
32 | ||
33 | /* 0x24 RS_COR_SYNC_PARAM */ | |
34 | #define RS_COR_SYNC_PARAM (0x24) | |
35 | #define SYNC_PARAM (0x03) | |
36 | ||
37 | /* 0x25 BER_CTRL */ | |
38 | #define BER_CTRL (0x25) | |
39 | #define BER_ENABLE (0x02) | |
40 | #define BER_RESET (0x01) | |
41 | ||
42 | /* 0x26 BER_PAY */ | |
43 | #define BER_PAY (0x26) | |
44 | ||
45 | /* 0x27 BER_PKT_L */ | |
46 | #define BER_PKT_L (0x27) | |
47 | #define BER_PKTOVERFLOW (0x80) | |
48 | ||
49 | /* 0x30 VIT_COR_CTL */ | |
50 | #define VIT_COR_CTL (0x30) | |
51 | #define BER_CONTROL (0x02) | |
52 | #define VIT_COR_MASK (0x82) | |
53 | #define VIT_COR_RESYNC (0x80) | |
54 | ||
55 | ||
56 | /* 0x32 VIT_SYNC_STATUS */ | |
57 | #define VIT_SYNC_STATUS (0x32) | |
58 | #define VITINSYNC (0x80) | |
59 | ||
60 | /* 0x33 VIT_COR_INTEN */ | |
61 | #define VIT_COR_INTEN (0x33) | |
62 | #define GLOBAL_ENABLE (0x80) | |
63 | ||
64 | /* 0x34 VIT_COR_INTSTAT */ | |
65 | #define VIT_COR_INTSTAT (0x34) | |
66 | #define BER_DONE (0x08) | |
67 | #define BER_OVERFLOW (0x10) | |
68 | ||
3a4a5711 JS |
69 | /* 0x38 VIT_BERTIME_2 */ |
70 | #define VIT_BERTIME_2 (0x38) | |
71 | ||
72 | /* 0x39 VIT_BERTIME_1 */ | |
73 | #define VIT_BERTIME_1 (0x39) | |
74 | ||
75 | /* 0x3A VIT_BERTIME_0 */ | |
76 | #define VIT_BERTIME_0 (0x3a) | |
77 | ||
1da177e4 LT |
78 | /* 0x38 OFDM_BERTimer *//* Use the alias registers */ |
79 | #define A_VIT_BER_TIMER_0 (0x1D) | |
80 | ||
81 | /* 0x3A VIT_BER_TIMER_0 *//* Use the alias registers */ | |
82 | #define A_VIT_BER_0 (0x1B) | |
83 | ||
3a4a5711 JS |
84 | /* 0x3B VIT_BER_1 */ |
85 | #define VIT_BER_1 (0x3b) | |
86 | ||
87 | /* 0x3C VIT_BER_0 */ | |
88 | #define VIT_BER_0 (0x3c) | |
89 | ||
1da177e4 LT |
90 | /* 0x40 OFDM_COR_CTL */ |
91 | #define OFDM_COR_CTL (0x40) | |
92 | #define COREACT (0x20) | |
93 | #define HOLDSM (0x10) | |
94 | #define WAIT_AGC (0x02) | |
95 | #define WAIT_SYR (0x03) | |
96 | ||
97 | /* 0x41 OFDM_COR_STAT */ | |
98 | #define OFDM_COR_STAT (0x41) | |
99 | #define COR_STATUS (0x0F) | |
100 | #define MONITOR_TPS (0x06) | |
101 | #define TPSLOCKED (0x40) | |
102 | #define AGCLOCKED (0x10) | |
103 | ||
104 | /* 0x42 OFDM_COR_INTEN */ | |
105 | #define OFDM_COR_INTEN (0x42) | |
106 | #define TPSRCVBAD (0x04) | |
107 | #define TPSRCVCHANGED (0x02) | |
108 | #define TPSRCVUPDATE (0x01) | |
109 | ||
110 | /* 0x43 OFDM_COR_INSTAT */ | |
111 | #define OFDM_COR_INSTAT (0x43) | |
112 | ||
113 | /* 0x44 OFDM_COR_MODEGUARD */ | |
114 | #define OFDM_COR_MODEGUARD (0x44) | |
115 | #define FORCEMODE (0x08) | |
116 | #define FORCEMODE8K (0x04) | |
117 | ||
118 | /* 0x45 OFDM_AGC_CTL */ | |
119 | #define OFDM_AGC_CTL (0x45) | |
120 | #define INITIAL_AGC_BW (0x08) | |
121 | #define AGCNEG (0x02) | |
122 | #define AGCLAST (0x10) | |
123 | ||
124 | /* 0x48 OFDM_AGC_TARGET */ | |
125 | #define OFDM_AGC_TARGET (0x48) | |
126 | #define OFDM_AGC_TARGET_DEFAULT (0x28) | |
127 | #define OFDM_AGC_TARGET_IMPULSE (0x38) | |
128 | ||
129 | /* 0x49 OFDM_AGC_GAIN_1 */ | |
130 | #define OFDM_AGC_GAIN_1 (0x49) | |
131 | ||
132 | /* 0x4B OFDM_ITB_CTL */ | |
133 | #define OFDM_ITB_CTL (0x4B) | |
134 | #define ITBINV (0x01) | |
135 | ||
3a4a5711 JS |
136 | /* 0x49 AGC_GAIN_1 */ |
137 | #define AGC_GAIN_1 (0x49) | |
138 | ||
139 | /* 0x4A AGC_GAIN_2 */ | |
140 | #define AGC_GAIN_2 (0x4A) | |
141 | ||
1da177e4 LT |
142 | /* 0x4C OFDM_ITB_FREQ_1 */ |
143 | #define OFDM_ITB_FREQ_1 (0x4C) | |
144 | ||
145 | /* 0x4D OFDM_ITB_FREQ_2 */ | |
146 | #define OFDM_ITB_FREQ_2 (0x4D) | |
147 | ||
148 | /* 0x4E OFDM_CAS_CTL */ | |
149 | #define OFDM_CAS_CTL (0x4E) | |
150 | #define ACSDIS (0x40) | |
151 | #define CCSEN (0x80) | |
152 | ||
153 | /* 0x4F CAS_FREQ */ | |
154 | #define CAS_FREQ (0x4F) | |
155 | ||
156 | /* 0x51 OFDM_SYR_CTL */ | |
157 | #define OFDM_SYR_CTL (0x51) | |
158 | #define SIXTH_ENABLE (0x80) | |
159 | #define SYR_TRACKING_DISABLE (0x01) | |
160 | ||
161 | /* 0x52 OFDM_SYR_STAT */ | |
162 | #define OFDM_SYR_STAT (0x52) | |
163 | #define GI14_2K_SYR_LOCK (0x13) | |
164 | #define GI14_8K_SYR_LOCK (0x17) | |
165 | #define GI14_SYR_LOCK (0x10) | |
166 | ||
167 | /* 0x55 OFDM_SYR_OFFSET_1 */ | |
168 | #define OFDM_SYR_OFFSET_1 (0x55) | |
169 | ||
170 | /* 0x56 OFDM_SYR_OFFSET_2 */ | |
171 | #define OFDM_SYR_OFFSET_2 (0x56) | |
172 | ||
173 | /* 0x58 OFDM_SCR_CTL */ | |
174 | #define OFDM_SCR_CTL (0x58) | |
175 | #define SYR_ADJ_DECAY_MASK (0x70) | |
176 | #define SYR_ADJ_DECAY (0x30) | |
177 | ||
178 | /* 0x59 OFDM_PPM_CTL_1 */ | |
179 | #define OFDM_PPM_CTL_1 (0x59) | |
180 | #define PPMMAX_MASK (0x30) | |
181 | #define PPM256 (0x30) | |
182 | ||
183 | /* 0x5B OFDM_TRL_NOMINALRATE_1 */ | |
184 | #define OFDM_TRL_NOMINALRATE_1 (0x5B) | |
185 | ||
186 | /* 0x5C OFDM_TRL_NOMINALRATE_2 */ | |
187 | #define OFDM_TRL_NOMINALRATE_2 (0x5C) | |
188 | ||
189 | /* 0x5D OFDM_TRL_TIME_1 */ | |
190 | #define OFDM_TRL_TIME_1 (0x5D) | |
191 | ||
192 | /* 0x60 OFDM_CRL_FREQ_1 */ | |
193 | #define OFDM_CRL_FREQ_1 (0x60) | |
194 | ||
195 | /* 0x63 OFDM_CHC_CTL_1 */ | |
196 | #define OFDM_CHC_CTL_1 (0x63) | |
197 | #define MANMEAN1 (0xF0); | |
198 | #define CHCFIR (0x01) | |
199 | ||
200 | /* 0x64 OFDM_CHC_SNR */ | |
201 | #define OFDM_CHC_SNR (0x64) | |
202 | ||
203 | /* 0x65 OFDM_BDI_CTL */ | |
204 | #define OFDM_BDI_CTL (0x65) | |
205 | #define LP_SELECT (0x02) | |
206 | ||
207 | /* 0x67 OFDM_TPS_RCVD_1 */ | |
208 | #define OFDM_TPS_RCVD_1 (0x67) | |
209 | #define TPSFRAME (0x03) | |
210 | ||
211 | /* 0x68 OFDM_TPS_RCVD_2 */ | |
212 | #define OFDM_TPS_RCVD_2 (0x68) | |
213 | ||
214 | /* 0x69 OFDM_TPS_RCVD_3 */ | |
215 | #define OFDM_TPS_RCVD_3 (0x69) | |
216 | ||
217 | /* 0x6A OFDM_TPS_RCVD_4 */ | |
218 | #define OFDM_TPS_RCVD_4 (0x6A) | |
219 | ||
220 | /* 0x6B OFDM_TPS_RESERVED_1 */ | |
221 | #define OFDM_TPS_RESERVED_1 (0x6B) | |
222 | ||
223 | /* 0x6C OFDM_TPS_RESERVED_2 */ | |
224 | #define OFDM_TPS_RESERVED_2 (0x6C) | |
225 | ||
226 | /* 0x73 OFDM_MSC_REV */ | |
227 | #define OFDM_MSC_REV (0x73) | |
228 | ||
229 | /* 0x76 OFDM_SNR_CARRIER_2 */ | |
230 | #define OFDM_SNR_CARRIER_2 (0x76) | |
231 | #define MEAN_MASK (0x80) | |
232 | #define MEANBIT (0x80) | |
233 | ||
234 | /* 0x80 ANALOG_CONTROL_0 */ | |
235 | #define ANALOG_CONTROL_0 (0x80) | |
236 | #define POWER_DOWN_ADC (0x40) | |
237 | ||
238 | /* 0x81 ENABLE_TUNER_IIC */ | |
239 | #define ENABLE_TUNER_IIC (0x81) | |
240 | #define ENABLE_TUNER_BIT (0x01) | |
241 | ||
242 | /* 0x82 EN_DMD_RACQ */ | |
243 | #define EN_DMD_RACQ (0x82) | |
244 | #define EN_DMD_RACQ_REG_VAL (0x81) | |
245 | #define EN_DMD_RACQ_REG_VAL_14 (0x01) | |
246 | ||
247 | /* 0x84 SNR_COMMAND */ | |
248 | #define SNR_COMMAND (0x84) | |
249 | #define SNRStat (0x80) | |
250 | ||
251 | /* 0x85 SNRCARRIERNUMBER_LSB */ | |
252 | #define SNRCARRIERNUMBER_LSB (0x85) | |
253 | ||
254 | /* 0x87 SNRMINTHRESHOLD_LSB */ | |
255 | #define SNRMINTHRESHOLD_LSB (0x87) | |
256 | ||
257 | /* 0x89 SNR_PER_CARRIER_LSB */ | |
258 | #define SNR_PER_CARRIER_LSB (0x89) | |
259 | ||
260 | /* 0x8B SNRBELOWTHRESHOLD_LSB */ | |
261 | #define SNRBELOWTHRESHOLD_LSB (0x8B) | |
262 | ||
263 | /* 0x91 RF_AGC_VAL_1 */ | |
264 | #define RF_AGC_VAL_1 (0x91) | |
265 | ||
266 | /* 0x92 RF_AGC_STATUS */ | |
267 | #define RF_AGC_STATUS (0x92) | |
268 | ||
269 | /* 0x98 DIAG_CONFIG */ | |
270 | #define DIAG_CONFIG (0x98) | |
271 | #define DIAG_MASK (0x70) | |
272 | #define TB_SET (0x10) | |
273 | #define TRAN_SELECT (0x07) | |
274 | #define SERIAL_SELECT (0x01) | |
275 | ||
276 | /* 0x99 SUB_DIAG_MODE_SEL */ | |
277 | #define SUB_DIAG_MODE_SEL (0x99) | |
278 | #define CLKINVERSION (0x01) | |
279 | ||
280 | /* 0x9A TS_FORMAT */ | |
281 | #define TS_FORMAT (0x9A) | |
282 | #define ERROR_SENSE (0x08) | |
283 | #define VALID_SENSE (0x04) | |
284 | #define SYNC_SENSE (0x02) | |
285 | #define GATED_CLOCK (0x01) | |
286 | ||
287 | #define NXT6000ASICDEVICE (0x0b) |