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8bd135ba
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1/*
2 STB0899 Multistandard Frontend driver
3 Copyright (C) Manu Abraham (abraham.manu@gmail.com)
4
5 Copyright (C) ST Microelectronics
6
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
11
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
16
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
20*/
21
22#include <linux/init.h>
3edd59ab 23#include <linux/jiffies.h>
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24#include <linux/kernel.h>
25#include <linux/module.h>
5a0e3ad6 26#include <linux/slab.h>
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27#include <linux/string.h>
28
29#include <linux/dvb/frontend.h>
30#include "dvb_frontend.h"
31
32#include "stb0899_drv.h"
33#include "stb0899_priv.h"
34#include "stb0899_reg.h"
35
ba474642
MCC
36/* Max transfer size done by I2C transfer functions */
37#define MAX_XFER_SIZE 64
38
c615a27a 39static unsigned int verbose = 0;//1;
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40module_param(verbose, int, 0644);
41
42/* C/N in dB/10, NIRM/NIRL */
43static const struct stb0899_tab stb0899_cn_tab[] = {
44 { 200, 2600 },
45 { 190, 2700 },
46 { 180, 2860 },
47 { 170, 3020 },
48 { 160, 3210 },
49 { 150, 3440 },
50 { 140, 3710 },
51 { 130, 4010 },
52 { 120, 4360 },
53 { 110, 4740 },
54 { 100, 5190 },
55 { 90, 5670 },
56 { 80, 6200 },
57 { 70, 6770 },
58 { 60, 7360 },
59 { 50, 7970 },
60 { 40, 8250 },
61 { 30, 9000 },
62 { 20, 9450 },
63 { 15, 9600 },
64};
65
66/* DVB-S AGCIQ_VALUE vs. signal level in dBm/10.
67 * As measured, connected to a modulator.
68 * -8.0 to -50.0 dBm directly connected,
69 * -52.0 to -74.8 with extra attenuation.
70 * Cut-off to AGCIQ_VALUE = 0x80 below -74.8dBm.
71 * Crude linear extrapolation below -84.8dBm and above -8.0dBm.
72 */
73static const struct stb0899_tab stb0899_dvbsrf_tab[] = {
0e377819 74 { -750, -128 },
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75 { -748, -94 },
76 { -745, -92 },
77 { -735, -90 },
78 { -720, -87 },
79 { -670, -77 },
80 { -640, -70 },
81 { -610, -62 },
82 { -600, -60 },
83 { -590, -56 },
84 { -560, -41 },
85 { -540, -25 },
86 { -530, -17 },
87 { -520, -11 },
88 { -500, 1 },
89 { -490, 6 },
90 { -480, 10 },
91 { -440, 22 },
92 { -420, 27 },
93 { -400, 31 },
94 { -380, 34 },
95 { -340, 40 },
96 { -320, 43 },
97 { -280, 48 },
98 { -250, 52 },
99 { -230, 55 },
100 { -180, 61 },
101 { -140, 66 },
102 { -90, 73 },
103 { -80, 74 },
104 { 500, 127 }
105};
106
107/* DVB-S2 IF_AGC_GAIN vs. signal level in dBm/10.
108 * As measured, connected to a modulator.
109 * -8.0 to -50.1 dBm directly connected,
110 * -53.0 to -76.6 with extra attenuation.
111 * Cut-off to IF_AGC_GAIN = 0x3fff below -76.6dBm.
112 * Crude linear extrapolation below -76.6dBm and above -8.0dBm.
113 */
114static const struct stb0899_tab stb0899_dvbs2rf_tab[] = {
115 { 700, 0 },
116 { -80, 3217 },
117 { -150, 3893 },
118 { -190, 4217 },
119 { -240, 4621 },
120 { -280, 4945 },
121 { -320, 5273 },
122 { -350, 5545 },
123 { -370, 5741 },
124 { -410, 6147 },
125 { -450, 6671 },
126 { -490, 7413 },
127 { -501, 7665 },
128 { -530, 8767 },
129 { -560, 10219 },
130 { -580, 10939 },
131 { -590, 11518 },
132 { -600, 11723 },
133 { -650, 12659 },
134 { -690, 13219 },
135 { -730, 13645 },
136 { -750, 13909 },
137 { -766, 14153 },
0e377819 138 { -950, 16383 }
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139};
140
141/* DVB-S2 Es/N0 quant in dB/100 vs read value * 100*/
ffbc5f88 142static struct stb0899_tab stb0899_quant_tab[] = {
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143 { 0, 0 },
144 { 0, 100 },
145 { 600, 200 },
146 { 950, 299 },
147 { 1200, 398 },
148 { 1400, 501 },
149 { 1560, 603 },
150 { 1690, 700 },
151 { 1810, 804 },
152 { 1910, 902 },
153 { 2000, 1000 },
154 { 2080, 1096 },
155 { 2160, 1202 },
156 { 2230, 1303 },
157 { 2350, 1496 },
158 { 2410, 1603 },
159 { 2460, 1698 },
160 { 2510, 1799 },
161 { 2600, 1995 },
162 { 2650, 2113 },
163 { 2690, 2213 },
164 { 2720, 2291 },
165 { 2760, 2399 },
166 { 2800, 2512 },
167 { 2860, 2692 },
168 { 2930, 2917 },
169 { 2960, 3020 },
170 { 3010, 3199 },
171 { 3040, 3311 },
172 { 3060, 3388 },
173 { 3120, 3631 },
174 { 3190, 3936 },
175 { 3400, 5012 },
176 { 3610, 6383 },
177 { 3800, 7943 },
178 { 4210, 12735 },
179 { 4500, 17783 },
180 { 4690, 22131 },
181 { 4810, 25410 }
182};
183
184/* DVB-S2 Es/N0 estimate in dB/100 vs read value */
ffbc5f88 185static struct stb0899_tab stb0899_est_tab[] = {
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186 { 0, 0 },
187 { 0, 1 },
188 { 301, 2 },
189 { 1204, 16 },
190 { 1806, 64 },
191 { 2408, 256 },
192 { 2709, 512 },
193 { 3010, 1023 },
194 { 3311, 2046 },
195 { 3612, 4093 },
196 { 3823, 6653 },
197 { 3913, 8185 },
198 { 4010, 10233 },
199 { 4107, 12794 },
200 { 4214, 16368 },
201 { 4266, 18450 },
202 { 4311, 20464 },
203 { 4353, 22542 },
204 { 4391, 24604 },
205 { 4425, 26607 },
206 { 4457, 28642 },
207 { 4487, 30690 },
208 { 4515, 32734 },
209 { 4612, 40926 },
210 { 4692, 49204 },
211 { 4816, 65464 },
212 { 4913, 81846 },
213 { 4993, 98401 },
214 { 5060, 114815 },
215 { 5118, 131220 },
216 { 5200, 158489 },
217 { 5300, 199526 },
218 { 5400, 251189 },
219 { 5500, 316228 },
220 { 5600, 398107 },
221 { 5720, 524807 },
222 { 5721, 526017 },
223};
224
ffbc5f88 225static int _stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
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226{
227 int ret;
228
229 u8 b0[] = { reg >> 8, reg & 0xff };
230 u8 buf;
231
232 struct i2c_msg msg[] = {
233 {
234 .addr = state->config->demod_address,
235 .flags = 0,
236 .buf = b0,
237 .len = 2
238 },{
239 .addr = state->config->demod_address,
240 .flags = I2C_M_RD,
241 .buf = &buf,
242 .len = 1
243 }
244 };
245
246 ret = i2c_transfer(state->i2c, msg, 2);
247 if (ret != 2) {
248 if (ret != -ERESTARTSYS)
c615a27a 249 dprintk(state->verbose, FE_ERROR, 1,
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250 "Read error, Reg=[0x%02x], Status=%d",
251 reg, ret);
252
253 return ret < 0 ? ret : -EREMOTEIO;
254 }
c615a27a
RN
255 if (unlikely(*state->verbose >= FE_DEBUGREG))
256 dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%02x], data=%02x",
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257 reg, buf);
258
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259 return (unsigned int)buf;
260}
261
262int stb0899_read_reg(struct stb0899_state *state, unsigned int reg)
263{
264 int result;
265
266 result = _stb0899_read_reg(state, reg);
267 /*
268 * Bug ID 9:
269 * access to 0xf2xx/0xf6xx
270 * must be followed by read from 0xf2ff/0xf6ff.
271 */
272 if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
273 (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
274 _stb0899_read_reg(state, (reg | 0x00ff));
275
276 return result;
277}
278
279u32 _stb0899_read_s2reg(struct stb0899_state *state,
886134e4
IL
280 u32 stb0899_i2cdev,
281 u32 stb0899_base_addr,
282 u16 stb0899_reg_offset)
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283{
284 int status;
285 u32 data;
286 u8 buf[7] = { 0 };
287 u16 tmpaddr;
288
289 u8 buf_0[] = {
290 GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
291 GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
292 GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
293 GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
294 GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
295 GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
296 };
297 u8 buf_1[] = {
298 0x00, /* 0xf3 Reg Offset */
299 0x00, /* 0x44 Reg Offset */
300 };
301
302 struct i2c_msg msg_0 = {
303 .addr = state->config->demod_address,
304 .flags = 0,
305 .buf = buf_0,
306 .len = 6
307 };
308
309 struct i2c_msg msg_1 = {
310 .addr = state->config->demod_address,
311 .flags = 0,
312 .buf = buf_1,
313 .len = 2
314 };
315
316 struct i2c_msg msg_r = {
317 .addr = state->config->demod_address,
318 .flags = I2C_M_RD,
319 .buf = buf,
320 .len = 4
321 };
322
323 tmpaddr = stb0899_reg_offset & 0xff00;
324 if (!(stb0899_reg_offset & 0x8))
325 tmpaddr = stb0899_reg_offset | 0x20;
326
327 buf_1[0] = GETBYTE(tmpaddr, BYTE1);
328 buf_1[1] = GETBYTE(tmpaddr, BYTE0);
329
330 status = i2c_transfer(state->i2c, &msg_0, 1);
331 if (status < 1) {
332 if (status != -ERESTARTSYS)
333 printk(KERN_ERR "%s ERR(1), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
334 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
335
336 goto err;
337 }
338
339 /* Dummy */
340 status = i2c_transfer(state->i2c, &msg_1, 1);
341 if (status < 1)
342 goto err;
343
344 status = i2c_transfer(state->i2c, &msg_r, 1);
345 if (status < 1)
346 goto err;
347
348 buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
349 buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
350
351 /* Actual */
352 status = i2c_transfer(state->i2c, &msg_1, 1);
353 if (status < 1) {
354 if (status != -ERESTARTSYS)
355 printk(KERN_ERR "%s ERR(2), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
356 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
357 goto err;
358 }
359
360 status = i2c_transfer(state->i2c, &msg_r, 1);
361 if (status < 1) {
362 if (status != -ERESTARTSYS)
363 printk(KERN_ERR "%s ERR(3), Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Status=%d\n",
364 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, status);
365 return status < 0 ? status : -EREMOTEIO;
366 }
367
368 data = MAKEWORD32(buf[3], buf[2], buf[1], buf[0]);
c615a27a 369 if (unlikely(*state->verbose >= FE_DEBUGREG))
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370 printk(KERN_DEBUG "%s Device=[0x%04x], Base address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
371 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, data);
372
373 return data;
374
375err:
376 return status < 0 ? status : -EREMOTEIO;
377}
378
379int stb0899_write_s2reg(struct stb0899_state *state,
380 u32 stb0899_i2cdev,
381 u32 stb0899_base_addr,
382 u16 stb0899_reg_offset,
383 u32 stb0899_data)
384{
385 int status;
386
387 /* Base Address Setup */
388 u8 buf_0[] = {
389 GETBYTE(stb0899_i2cdev, BYTE1), /* 0xf3 S2 Base Address (MSB) */
390 GETBYTE(stb0899_i2cdev, BYTE0), /* 0xfc S2 Base Address (LSB) */
391 GETBYTE(stb0899_base_addr, BYTE0), /* 0x00 Base Address (LSB) */
392 GETBYTE(stb0899_base_addr, BYTE1), /* 0x04 Base Address (LSB) */
393 GETBYTE(stb0899_base_addr, BYTE2), /* 0x00 Base Address (MSB) */
394 GETBYTE(stb0899_base_addr, BYTE3), /* 0x00 Base Address (MSB) */
395 };
396 u8 buf_1[] = {
397 0x00, /* 0xf3 Reg Offset */
398 0x00, /* 0x44 Reg Offset */
399 0x00, /* data */
400 0x00, /* data */
401 0x00, /* data */
402 0x00, /* data */
403 };
404
405 struct i2c_msg msg_0 = {
406 .addr = state->config->demod_address,
407 .flags = 0,
408 .buf = buf_0,
409 .len = 6
410 };
411
412 struct i2c_msg msg_1 = {
413 .addr = state->config->demod_address,
414 .flags = 0,
415 .buf = buf_1,
416 .len = 6
417 };
418
419 buf_1[0] = GETBYTE(stb0899_reg_offset, BYTE1);
420 buf_1[1] = GETBYTE(stb0899_reg_offset, BYTE0);
421 buf_1[2] = GETBYTE(stb0899_data, BYTE0);
422 buf_1[3] = GETBYTE(stb0899_data, BYTE1);
423 buf_1[4] = GETBYTE(stb0899_data, BYTE2);
424 buf_1[5] = GETBYTE(stb0899_data, BYTE3);
425
c615a27a 426 if (unlikely(*state->verbose >= FE_DEBUGREG))
8bd135ba
MA
427 printk(KERN_DEBUG "%s Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x]\n",
428 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data);
429
430 status = i2c_transfer(state->i2c, &msg_0, 1);
431 if (unlikely(status < 1)) {
432 if (status != -ERESTARTSYS)
433 printk(KERN_ERR "%s ERR (1), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
434 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
435 goto err;
436 }
437 status = i2c_transfer(state->i2c, &msg_1, 1);
438 if (unlikely(status < 1)) {
439 if (status != -ERESTARTSYS)
440 printk(KERN_ERR "%s ERR (2), Device=[0x%04x], Base Address=[0x%08x], Offset=[0x%04x], Data=[0x%08x], status=%d\n",
441 __func__, stb0899_i2cdev, stb0899_base_addr, stb0899_reg_offset, stb0899_data, status);
442
443 return status < 0 ? status : -EREMOTEIO;
444 }
445
446 return 0;
447
448err:
449 return status < 0 ? status : -EREMOTEIO;
450}
451
3d6a3beb 452int stb0899_read_regs(struct stb0899_state *state, unsigned int reg, u8 *buf, u32 count)
8bd135ba
MA
453{
454 int status;
455
456 u8 b0[] = { reg >> 8, reg & 0xff };
457
458 struct i2c_msg msg[] = {
459 {
460 .addr = state->config->demod_address,
461 .flags = 0,
462 .buf = b0,
463 .len = 2
464 },{
465 .addr = state->config->demod_address,
466 .flags = I2C_M_RD,
467 .buf = buf,
468 .len = count
469 }
470 };
471
472 status = i2c_transfer(state->i2c, msg, 2);
473 if (status != 2) {
474 if (status != -ERESTARTSYS)
475 printk(KERN_ERR "%s Read error, Reg=[0x%04x], Count=%u, Status=%d\n",
476 __func__, reg, count, status);
477 goto err;
478 }
479 /*
480 * Bug ID 9:
481 * access to 0xf2xx/0xf6xx
482 * must be followed by read from 0xf2ff/0xf6ff.
483 */
484 if ((reg != 0xf2ff) && (reg != 0xf6ff) &&
485 (((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
486 _stb0899_read_reg(state, (reg | 0x00ff));
487
a8cd47d3
MCC
488 dprintk(state->verbose, FE_DEBUGREG, 1,
489 "%s [0x%04x]: %*ph", __func__, reg, count, buf);
8bd135ba
MA
490
491 return 0;
492err:
493 return status < 0 ? status : -EREMOTEIO;
494}
495
85eabac4 496int stb0899_write_regs(struct stb0899_state *state, unsigned int reg, u8 *data, u32 count)
8bd135ba
MA
497{
498 int ret;
ba474642 499 u8 buf[MAX_XFER_SIZE];
8bd135ba
MA
500 struct i2c_msg i2c_msg = {
501 .addr = state->config->demod_address,
502 .flags = 0,
503 .buf = buf,
504 .len = 2 + count
505 };
506
ba474642
MCC
507 if (2 + count > sizeof(buf)) {
508 printk(KERN_WARNING
509 "%s: i2c wr reg=%04x: len=%d is too big!\n",
510 KBUILD_MODNAME, reg, count);
511 return -EINVAL;
512 }
513
8bd135ba
MA
514 buf[0] = reg >> 8;
515 buf[1] = reg & 0xff;
516 memcpy(&buf[2], data, count);
517
a8cd47d3
MCC
518 dprintk(state->verbose, FE_DEBUGREG, 1,
519 "%s [0x%04x]: %*ph", __func__, reg, count, data);
8bd135ba
MA
520 ret = i2c_transfer(state->i2c, &i2c_msg, 1);
521
522 /*
523 * Bug ID 9:
524 * access to 0xf2xx/0xf6xx
525 * must be followed by read from 0xf2ff/0xf6ff.
526 */
527 if ((((reg & 0xff00) == 0xf200) || ((reg & 0xff00) == 0xf600)))
528 stb0899_read_reg(state, (reg | 0x00ff));
529
530 if (ret != 1) {
531 if (ret != -ERESTARTSYS)
c615a27a 532 dprintk(state->verbose, FE_ERROR, 1, "Reg=[0x%04x], Data=[0x%02x ...], Count=%u, Status=%d",
8bd135ba
MA
533 reg, data[0], count, ret);
534 return ret < 0 ? ret : -EREMOTEIO;
535 }
536
537 return 0;
538}
539
540int stb0899_write_reg(struct stb0899_state *state, unsigned int reg, u8 data)
541{
542 return stb0899_write_regs(state, reg, &data, 1);
543}
544
545/*
546 * stb0899_get_mclk
547 * Get STB0899 master clock frequency
548 * ExtClk: external clock frequency (Hz)
549 */
550static u32 stb0899_get_mclk(struct stb0899_state *state)
551{
72f78416 552 u32 mclk = 0, div = 0;
8bd135ba
MA
553
554 div = stb0899_read_reg(state, STB0899_NCOARSE);
555 mclk = (div + 1) * state->config->xtal_freq / 6;
c615a27a 556 dprintk(state->verbose, FE_DEBUG, 1, "div=%d, mclk=%d", div, mclk);
8bd135ba
MA
557
558 return mclk;
559}
560
561/*
562 * stb0899_set_mclk
563 * Set STB0899 master Clock frequency
564 * Mclk: demodulator master clock
565 * ExtClk: external clock frequency (Hz)
566 */
567static void stb0899_set_mclk(struct stb0899_state *state, u32 Mclk)
568{
569 struct stb0899_internal *internal = &state->internal;
570 u8 mdiv = 0;
571
c615a27a 572 dprintk(state->verbose, FE_DEBUG, 1, "state->config=%p", state->config);
8bd135ba 573 mdiv = ((6 * Mclk) / state->config->xtal_freq) - 1;
c615a27a 574 dprintk(state->verbose, FE_DEBUG, 1, "mdiv=%d", mdiv);
8bd135ba
MA
575
576 stb0899_write_reg(state, STB0899_NCOARSE, mdiv);
577 internal->master_clk = stb0899_get_mclk(state);
578
c615a27a 579 dprintk(state->verbose, FE_DEBUG, 1, "MasterCLOCK=%d", internal->master_clk);
8bd135ba
MA
580}
581
b168e351
MA
582static int stb0899_postproc(struct stb0899_state *state, u8 ctl, int enable)
583{
584 struct stb0899_config *config = state->config;
043a68b3 585 const struct stb0899_postproc *postproc = config->postproc;
b168e351
MA
586
587 /* post process event */
588 if (postproc) {
589 if (enable) {
9efdd297 590 if (postproc[ctl].level == STB0899_GPIOPULLUP)
b168e351
MA
591 stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
592 else
593 stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
594 } else {
9efdd297 595 if (postproc[ctl].level == STB0899_GPIOPULLUP)
b168e351
MA
596 stb0899_write_reg(state, postproc[ctl].gpio, 0x82);
597 else
598 stb0899_write_reg(state, postproc[ctl].gpio, 0x02);
599 }
600 }
601 return 0;
602}
603
f686c143 604static void stb0899_detach(struct dvb_frontend *fe)
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MA
605{
606 struct stb0899_state *state = fe->demodulator_priv;
607
b168e351
MA
608 /* post process event */
609 stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
f686c143
MK
610}
611
612static void stb0899_release(struct dvb_frontend *fe)
613{
614 struct stb0899_state *state = fe->demodulator_priv;
615
616 dprintk(state->verbose, FE_DEBUG, 1, "Release Frontend");
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MA
617 kfree(state);
618}
619
620/*
621 * stb0899_get_alpha
622 * return: rolloff
623 */
624static int stb0899_get_alpha(struct stb0899_state *state)
625{
626 u8 mode_coeff;
627
628 mode_coeff = stb0899_read_reg(state, STB0899_DEMOD);
629
630 if (STB0899_GETFIELD(MODECOEFF, mode_coeff) == 1)
631 return 20;
632 else
633 return 35;
634}
635
636/*
637 * stb0899_init_calc
638 */
639static void stb0899_init_calc(struct stb0899_state *state)
640{
641 struct stb0899_internal *internal = &state->internal;
642 int master_clk;
7d8f1e57 643 u8 agc[2];
8bd135ba
MA
644 u32 reg;
645
646 /* Read registers (in burst mode) */
8bd135ba
MA
647 stb0899_read_regs(state, STB0899_AGC1REF, agc, 2); /* AGC1R and AGC2O */
648
649 /* Initial calculations */
650 master_clk = stb0899_get_mclk(state);
651 internal->t_agc1 = 0;
652 internal->t_agc2 = 0;
653 internal->master_clk = master_clk;
654 internal->mclk = master_clk / 65536L;
655 internal->rolloff = stb0899_get_alpha(state);
656
657 /* DVBS2 Initial calculations */
658 /* Set AGC value to the middle */
659 internal->agc_gain = 8154;
660 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_CNTRL);
661 STB0899_SETFIELD_VAL(IF_GAIN_INIT, reg, internal->agc_gain);
662 stb0899_write_s2reg(state, STB0899_S2DEMOD, STB0899_BASE_IF_AGC_CNTRL, STB0899_OFF0_IF_AGC_CNTRL, reg);
663
664 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, RRC_ALPHA);
665 internal->rrc_alpha = STB0899_GETFIELD(RRC_ALPHA, reg);
666
667 internal->center_freq = 0;
668 internal->av_frame_coarse = 10;
669 internal->av_frame_fine = 20;
670 internal->step_size = 2;
671/*
672 if ((pParams->SpectralInv == FE_IQ_NORMAL) || (pParams->SpectralInv == FE_IQ_AUTO))
673 pParams->IQLocked = 0;
674 else
675 pParams->IQLocked = 1;
676*/
677}
678
679static int stb0899_wait_diseqc_fifo_empty(struct stb0899_state *state, int timeout)
680{
681 u8 reg = 0;
682 unsigned long start = jiffies;
683
684 while (1) {
685 reg = stb0899_read_reg(state, STB0899_DISSTATUS);
686 if (!STB0899_GETFIELD(FIFOFULL, reg))
687 break;
3edd59ab 688 if (time_after(jiffies, start + timeout)) {
c615a27a 689 dprintk(state->verbose, FE_ERROR, 1, "timed out !!");
8bd135ba
MA
690 return -ETIMEDOUT;
691 }
692 }
693
694 return 0;
695}
696
697static int stb0899_send_diseqc_msg(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
698{
699 struct stb0899_state *state = fe->demodulator_priv;
700 u8 reg, i;
701
b9f62ffe 702 if (cmd->msg_len > sizeof(cmd->msg))
8bd135ba
MA
703 return -EINVAL;
704
705 /* enable FIFO precharge */
706 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
707 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 1);
708 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
709 for (i = 0; i < cmd->msg_len; i++) {
710 /* wait for FIFO empty */
aad04c77 711 if (stb0899_wait_diseqc_fifo_empty(state, 100) < 0)
8bd135ba
MA
712 return -ETIMEDOUT;
713
714 stb0899_write_reg(state, STB0899_DISFIFO, cmd->msg[i]);
715 }
716 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
717 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0);
718 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
1697c8df 719 msleep(100);
8bd135ba
MA
720 return 0;
721}
722
723static int stb0899_wait_diseqc_rxidle(struct stb0899_state *state, int timeout)
724{
725 u8 reg = 0;
726 unsigned long start = jiffies;
727
728 while (!STB0899_GETFIELD(RXEND, reg)) {
729 reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
3edd59ab 730 if (time_after(jiffies, start + timeout)) {
c615a27a 731 dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
8bd135ba
MA
732 return -ETIMEDOUT;
733 }
734 msleep(10);
735 }
736
737 return 0;
738}
739
740static int stb0899_recv_slave_reply(struct dvb_frontend *fe, struct dvb_diseqc_slave_reply *reply)
741{
742 struct stb0899_state *state = fe->demodulator_priv;
743 u8 reg, length = 0, i;
744 int result;
745
746 if (stb0899_wait_diseqc_rxidle(state, 100) < 0)
747 return -ETIMEDOUT;
748
749 reg = stb0899_read_reg(state, STB0899_DISRX_ST0);
750 if (STB0899_GETFIELD(RXEND, reg)) {
751
752 reg = stb0899_read_reg(state, STB0899_DISRX_ST1);
753 length = STB0899_GETFIELD(FIFOBYTENBR, reg);
754
755 if (length > sizeof (reply->msg)) {
756 result = -EOVERFLOW;
757 goto exit;
758 }
759 reply->msg_len = length;
760
761 /* extract data */
762 for (i = 0; i < length; i++)
763 reply->msg[i] = stb0899_read_reg(state, STB0899_DISFIFO);
764 }
765
766 return 0;
767exit:
768
769 return result;
770}
771
772static int stb0899_wait_diseqc_txidle(struct stb0899_state *state, int timeout)
773{
774 u8 reg = 0;
775 unsigned long start = jiffies;
776
777 while (!STB0899_GETFIELD(TXIDLE, reg)) {
778 reg = stb0899_read_reg(state, STB0899_DISSTATUS);
3edd59ab 779 if (time_after(jiffies, start + timeout)) {
c615a27a 780 dprintk(state->verbose, FE_ERROR, 1, "timed out!!");
8bd135ba
MA
781 return -ETIMEDOUT;
782 }
783 msleep(10);
784 }
785 return 0;
786}
787
0df289a2
MCC
788static int stb0899_send_diseqc_burst(struct dvb_frontend *fe,
789 enum fe_sec_mini_cmd burst)
8bd135ba
MA
790{
791 struct stb0899_state *state = fe->demodulator_priv;
792 u8 reg, old_state;
793
794 /* wait for diseqc idle */
795 if (stb0899_wait_diseqc_txidle(state, 100) < 0)
796 return -ETIMEDOUT;
797
798 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
799 old_state = reg;
800 /* set to burst mode */
d284e4f7 801 STB0899_SETFIELD_VAL(DISEQCMODE, reg, 0x03);
8bd135ba
MA
802 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x01);
803 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
804 switch (burst) {
805 case SEC_MINI_A:
806 /* unmodulated */
807 stb0899_write_reg(state, STB0899_DISFIFO, 0x00);
808 break;
809 case SEC_MINI_B:
810 /* modulated */
811 stb0899_write_reg(state, STB0899_DISFIFO, 0xff);
812 break;
813 }
814 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
815 STB0899_SETFIELD_VAL(DISPRECHARGE, reg, 0x00);
816 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
817 /* wait for diseqc idle */
818 if (stb0899_wait_diseqc_txidle(state, 100) < 0)
819 return -ETIMEDOUT;
820
821 /* restore state */
822 stb0899_write_reg(state, STB0899_DISCNTRL1, old_state);
823
824 return 0;
825}
826
6c1022cb
MA
827static int stb0899_diseqc_init(struct stb0899_state *state)
828{
3f400925 829/*
6c1022cb 830 struct dvb_diseqc_slave_reply rx_data;
3f400925 831*/
5becbc58 832 u8 f22_tx, reg;
6c1022cb 833
3f400925 834 u32 mclk, tx_freq = 22000;/* count = 0, i; */
6c1022cb
MA
835 reg = stb0899_read_reg(state, STB0899_DISCNTRL2);
836 STB0899_SETFIELD_VAL(ONECHIP_TRX, reg, 0);
837 stb0899_write_reg(state, STB0899_DISCNTRL2, reg);
838
839 /* disable Tx spy */
840 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
841 STB0899_SETFIELD_VAL(DISEQCRESET, reg, 1);
842 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
843
844 reg = stb0899_read_reg(state, STB0899_DISCNTRL1);
845 STB0899_SETFIELD_VAL(DISEQCRESET, reg, 0);
846 stb0899_write_reg(state, STB0899_DISCNTRL1, reg);
847
848 mclk = stb0899_get_mclk(state);
849 f22_tx = mclk / (tx_freq * 32);
850 stb0899_write_reg(state, STB0899_DISF22, f22_tx); /* DiSEqC Tx freq */
851 state->rx_freq = 20000;
6c1022cb
MA
852
853 return 0;
854}
8bd135ba
MA
855
856static int stb0899_sleep(struct dvb_frontend *fe)
857{
858 struct stb0899_state *state = fe->demodulator_priv;
3f400925 859/*
8bd135ba 860 u8 reg;
3f400925 861*/
c615a27a 862 dprintk(state->verbose, FE_DEBUG, 1, "Going to Sleep .. (Really tired .. :-))");
b168e351
MA
863 /* post process event */
864 stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 0);
865
8bd135ba
MA
866 return 0;
867}
868
869static int stb0899_wakeup(struct dvb_frontend *fe)
870{
871 int rc;
872 struct stb0899_state *state = fe->demodulator_priv;
873
de29eb82
MA
874 if ((rc = stb0899_write_reg(state, STB0899_SYNTCTRL, STB0899_SELOSCI)))
875 return rc;
876 /* Activate all clocks; DVB-S2 registers are inaccessible otherwise. */
877 if ((rc = stb0899_write_reg(state, STB0899_STOPCLK1, 0x00)))
878 return rc;
879 if ((rc = stb0899_write_reg(state, STB0899_STOPCLK2, 0x00)))
880 return rc;
8bd135ba 881
b168e351
MA
882 /* post process event */
883 stb0899_postproc(state, STB0899_POSTPROC_GPIO_POWER, 1);
884
8bd135ba
MA
885 return 0;
886}
887
888static int stb0899_init(struct dvb_frontend *fe)
889{
890 int i;
891 struct stb0899_state *state = fe->demodulator_priv;
892 struct stb0899_config *config = state->config;
893
c615a27a 894 dprintk(state->verbose, FE_DEBUG, 1, "Initializing STB0899 ... ");
8bd135ba
MA
895
896 /* init device */
c615a27a 897 dprintk(state->verbose, FE_DEBUG, 1, "init device");
8bd135ba
MA
898 for (i = 0; config->init_dev[i].address != 0xffff; i++)
899 stb0899_write_reg(state, config->init_dev[i].address, config->init_dev[i].data);
900
c615a27a 901 dprintk(state->verbose, FE_DEBUG, 1, "init S2 demod");
8bd135ba
MA
902 /* init S2 demod */
903 for (i = 0; config->init_s2_demod[i].offset != 0xffff; i++)
904 stb0899_write_s2reg(state, STB0899_S2DEMOD,
905 config->init_s2_demod[i].base_address,
906 config->init_s2_demod[i].offset,
907 config->init_s2_demod[i].data);
908
c615a27a 909 dprintk(state->verbose, FE_DEBUG, 1, "init S1 demod");
8bd135ba
MA
910 /* init S1 demod */
911 for (i = 0; config->init_s1_demod[i].address != 0xffff; i++)
912 stb0899_write_reg(state, config->init_s1_demod[i].address, config->init_s1_demod[i].data);
913
c615a27a 914 dprintk(state->verbose, FE_DEBUG, 1, "init S2 FEC");
8bd135ba
MA
915 /* init S2 fec */
916 for (i = 0; config->init_s2_fec[i].offset != 0xffff; i++)
917 stb0899_write_s2reg(state, STB0899_S2FEC,
918 config->init_s2_fec[i].base_address,
919 config->init_s2_fec[i].offset,
920 config->init_s2_fec[i].data);
921
c615a27a 922 dprintk(state->verbose, FE_DEBUG, 1, "init TST");
8bd135ba
MA
923 /* init test */
924 for (i = 0; config->init_tst[i].address != 0xffff; i++)
925 stb0899_write_reg(state, config->init_tst[i].address, config->init_tst[i].data);
926
927 stb0899_init_calc(state);
6c1022cb 928 stb0899_diseqc_init(state);
8bd135ba
MA
929
930 return 0;
931}
932
933static int stb0899_table_lookup(const struct stb0899_tab *tab, int max, int val)
934{
935 int res = 0;
936 int min = 0, med;
937
938 if (val < tab[min].read)
939 res = tab[min].real;
940 else if (val >= tab[max].read)
941 res = tab[max].real;
942 else {
943 while ((max - min) > 1) {
944 med = (max + min) / 2;
945 if (val >= tab[min].read && val < tab[med].read)
946 max = med;
947 else
948 min = med;
949 }
950 res = ((val - tab[min].read) *
951 (tab[max].real - tab[min].real) /
952 (tab[max].read - tab[min].read)) +
953 tab[min].real;
954 }
955
956 return res;
957}
958
959static int stb0899_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
960{
961 struct stb0899_state *state = fe->demodulator_priv;
962 struct stb0899_internal *internal = &state->internal;
963
964 int val;
965 u32 reg;
0e377819 966 *strength = 0;
8bd135ba 967 switch (state->delsys) {
3f400925
MA
968 case SYS_DVBS:
969 case SYS_DSS:
8bd135ba
MA
970 if (internal->lock) {
971 reg = stb0899_read_reg(state, STB0899_VSTATUS);
972 if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
973
974 reg = stb0899_read_reg(state, STB0899_AGCIQIN);
975 val = (s32)(s8)STB0899_GETFIELD(AGCIQVALUE, reg);
976
977 *strength = stb0899_table_lookup(stb0899_dvbsrf_tab, ARRAY_SIZE(stb0899_dvbsrf_tab) - 1, val);
978 *strength += 750;
c615a27a 979 dprintk(state->verbose, FE_DEBUG, 1, "AGCIQVALUE = 0x%02x, C = %d * 0.1 dBm",
8bd135ba
MA
980 val & 0xff, *strength);
981 }
982 }
983 break;
3f400925 984 case SYS_DVBS2:
8bd135ba 985 if (internal->lock) {
ef3d23de 986 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, IF_AGC_GAIN);
8bd135ba
MA
987 val = STB0899_GETFIELD(IF_AGC_GAIN, reg);
988
989 *strength = stb0899_table_lookup(stb0899_dvbs2rf_tab, ARRAY_SIZE(stb0899_dvbs2rf_tab) - 1, val);
0e377819 990 *strength += 950;
c615a27a 991 dprintk(state->verbose, FE_DEBUG, 1, "IF_AGC_GAIN = 0x%04x, C = %d * 0.1 dBm",
8bd135ba
MA
992 val & 0x3fff, *strength);
993 }
994 break;
995 default:
c615a27a 996 dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
417dd69d 997 return -EINVAL;
8bd135ba
MA
998 }
999
1000 return 0;
1001}
1002
1003static int stb0899_read_snr(struct dvb_frontend *fe, u16 *snr)
1004{
1005 struct stb0899_state *state = fe->demodulator_priv;
1006 struct stb0899_internal *internal = &state->internal;
1007
1008 unsigned int val, quant, quantn = -1, est, estn = -1;
1009 u8 buf[2];
1010 u32 reg;
1011
0e377819 1012 *snr = 0;
8bd135ba
MA
1013 reg = stb0899_read_reg(state, STB0899_VSTATUS);
1014 switch (state->delsys) {
3f400925
MA
1015 case SYS_DVBS:
1016 case SYS_DSS:
8bd135ba
MA
1017 if (internal->lock) {
1018 if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
1019
1020 stb0899_read_regs(state, STB0899_NIRM, buf, 2);
1021 val = MAKEWORD16(buf[0], buf[1]);
1022
1023 *snr = stb0899_table_lookup(stb0899_cn_tab, ARRAY_SIZE(stb0899_cn_tab) - 1, val);
c615a27a 1024 dprintk(state->verbose, FE_DEBUG, 1, "NIR = 0x%02x%02x = %u, C/N = %d * 0.1 dBm\n",
8bd135ba
MA
1025 buf[0], buf[1], val, *snr);
1026 }
1027 }
1028 break;
3f400925 1029 case SYS_DVBS2:
8bd135ba
MA
1030 if (internal->lock) {
1031 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_CNTRL1);
1032 quant = STB0899_GETFIELD(UWP_ESN0_QUANT, reg);
1033 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, UWP_STAT2);
1034 est = STB0899_GETFIELD(ESN0_EST, reg);
1035 if (est == 1)
1036 val = 301; /* C/N = 30.1 dB */
1037 else if (est == 2)
1038 val = 270; /* C/N = 27.0 dB */
1039 else {
1040 /* quantn = 100 * log(quant^2) */
1041 quantn = stb0899_table_lookup(stb0899_quant_tab, ARRAY_SIZE(stb0899_quant_tab) - 1, quant * 100);
1042 /* estn = 100 * log(est) */
1043 estn = stb0899_table_lookup(stb0899_est_tab, ARRAY_SIZE(stb0899_est_tab) - 1, est);
1044 /* snr(dBm/10) = -10*(log(est)-log(quant^2)) => snr(dBm/10) = (100*log(quant^2)-100*log(est))/10 */
1045 val = (quantn - estn) / 10;
1046 }
1047 *snr = val;
c615a27a 1048 dprintk(state->verbose, FE_DEBUG, 1, "Es/N0 quant = %d (%d) estimate = %u (%d), C/N = %d * 0.1 dBm",
8bd135ba
MA
1049 quant, quantn, est, estn, val);
1050 }
1051 break;
1052 default:
c615a27a 1053 dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
417dd69d 1054 return -EINVAL;
8bd135ba
MA
1055 }
1056
1057 return 0;
1058}
1059
1060static int stb0899_read_status(struct dvb_frontend *fe, enum fe_status *status)
1061{
1062 struct stb0899_state *state = fe->demodulator_priv;
1063 struct stb0899_internal *internal = &state->internal;
1064 u8 reg;
1065 *status = 0;
1066
1067 switch (state->delsys) {
3f400925
MA
1068 case SYS_DVBS:
1069 case SYS_DSS:
8bd135ba
MA
1070 dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S/DSS");
1071 if (internal->lock) {
1072 reg = stb0899_read_reg(state, STB0899_VSTATUS);
1073 if (STB0899_GETFIELD(VSTATUS_LOCKEDVIT, reg)) {
1074 dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_CARRIER | FE_HAS_LOCK");
91caad31 1075 *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
8bd135ba
MA
1076
1077 reg = stb0899_read_reg(state, STB0899_PLPARM);
1078 if (STB0899_GETFIELD(VITCURPUN, reg)) {
1079 dprintk(state->verbose, FE_DEBUG, 1, "--------> FE_HAS_VITERBI | FE_HAS_SYNC");
1080 *status |= FE_HAS_VITERBI | FE_HAS_SYNC;
b168e351
MA
1081 /* post process event */
1082 stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
8bd135ba
MA
1083 }
1084 }
1085 }
1086 break;
3f400925 1087 case SYS_DVBS2:
8bd135ba
MA
1088 dprintk(state->verbose, FE_DEBUG, 1, "Delivery system DVB-S2");
1089 if (internal->lock) {
1090 reg = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_STAT2);
1091 if (STB0899_GETFIELD(UWP_LOCK, reg) && STB0899_GETFIELD(CSM_LOCK, reg)) {
1092 *status |= FE_HAS_CARRIER;
1093 dprintk(state->verbose, FE_DEBUG, 1,
1094 "UWP & CSM Lock ! ---> DVB-S2 FE_HAS_CARRIER");
1095
1096 reg = stb0899_read_reg(state, STB0899_CFGPDELSTATUS1);
1097 if (STB0899_GETFIELD(CFGPDELSTATUS_LOCK, reg)) {
1098 *status |= FE_HAS_LOCK;
1099 dprintk(state->verbose, FE_DEBUG, 1,
1100 "Packet Delineator Locked ! -----> DVB-S2 FE_HAS_LOCK");
1101
1102 }
1103 if (STB0899_GETFIELD(CONTINUOUS_STREAM, reg)) {
1104 *status |= FE_HAS_VITERBI;
1105 dprintk(state->verbose, FE_DEBUG, 1,
1106 "Packet Delineator found VITERBI ! -----> DVB-S2 FE_HAS_VITERBI");
1107 }
1108 if (STB0899_GETFIELD(ACCEPTED_STREAM, reg)) {
1109 *status |= FE_HAS_SYNC;
1110 dprintk(state->verbose, FE_DEBUG, 1,
1111 "Packet Delineator found SYNC ! -----> DVB-S2 FE_HAS_SYNC");
b168e351
MA
1112 /* post process event */
1113 stb0899_postproc(state, STB0899_POSTPROC_GPIO_LOCK, 1);
8bd135ba
MA
1114 }
1115 }
1116 }
1117 break;
1118 default:
c615a27a 1119 dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
417dd69d 1120 return -EINVAL;
8bd135ba
MA
1121 }
1122 return 0;
1123}
1124
1125/*
1126 * stb0899_get_error
1127 * viterbi error for DVB-S/DSS
1128 * packet error for DVB-S2
1129 * Bit Error Rate or Packet Error Rate * 10 ^ 7
1130 */
1131static int stb0899_read_ber(struct dvb_frontend *fe, u32 *ber)
1132{
1133 struct stb0899_state *state = fe->demodulator_priv;
1134 struct stb0899_internal *internal = &state->internal;
1135
1136 u8 lsb, msb;
8bd135ba
MA
1137
1138 *ber = 0;
1139
1140 switch (state->delsys) {
3f400925
MA
1141 case SYS_DVBS:
1142 case SYS_DSS:
8bd135ba 1143 if (internal->lock) {
fdaaee6c
KS
1144 lsb = stb0899_read_reg(state, STB0899_ECNT1L);
1145 msb = stb0899_read_reg(state, STB0899_ECNT1M);
1146 *ber = MAKEWORD16(msb, lsb);
8bd135ba
MA
1147 /* Viterbi Check */
1148 if (STB0899_GETFIELD(VSTATUS_PRFVIT, internal->v_status)) {
1149 /* Error Rate */
1150 *ber *= 9766;
1151 /* ber = ber * 10 ^ 7 */
1152 *ber /= (-1 + (1 << (2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
1153 *ber /= 8;
1154 }
1155 }
1156 break;
3f400925 1157 case SYS_DVBS2:
8bd135ba 1158 if (internal->lock) {
fdaaee6c
KS
1159 lsb = stb0899_read_reg(state, STB0899_ECNT1L);
1160 msb = stb0899_read_reg(state, STB0899_ECNT1M);
1161 *ber = MAKEWORD16(msb, lsb);
8bd135ba
MA
1162 /* ber = ber * 10 ^ 7 */
1163 *ber *= 10000000;
1164 *ber /= (-1 + (1 << (4 + 2 * STB0899_GETFIELD(NOE, internal->err_ctrl))));
1165 }
1166 break;
1167 default:
c615a27a 1168 dprintk(state->verbose, FE_DEBUG, 1, "Unsupported delivery system");
417dd69d 1169 return -EINVAL;
8bd135ba
MA
1170 }
1171
1172 return 0;
1173}
1174
0df289a2
MCC
1175static int stb0899_set_voltage(struct dvb_frontend *fe,
1176 enum fe_sec_voltage voltage)
8bd135ba
MA
1177{
1178 struct stb0899_state *state = fe->demodulator_priv;
1179
1180 switch (voltage) {
1181 case SEC_VOLTAGE_13:
1182 stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
1183 stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
1184 stb0899_write_reg(state, STB0899_GPIO02CFG, 0x00);
1185 break;
1186 case SEC_VOLTAGE_18:
1187 stb0899_write_reg(state, STB0899_GPIO00CFG, 0x02);
1188 stb0899_write_reg(state, STB0899_GPIO01CFG, 0x02);
1189 stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
1190 break;
1191 case SEC_VOLTAGE_OFF:
1192 stb0899_write_reg(state, STB0899_GPIO00CFG, 0x82);
1193 stb0899_write_reg(state, STB0899_GPIO01CFG, 0x82);
1194 stb0899_write_reg(state, STB0899_GPIO02CFG, 0x82);
1195 break;
1196 default:
1197 return -EINVAL;
1198 }
1199
1200 return 0;
1201}
1202
0df289a2 1203static int stb0899_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
8bd135ba
MA
1204{
1205 struct stb0899_state *state = fe->demodulator_priv;
1206 struct stb0899_internal *internal = &state->internal;
1207
baa40e48 1208 u8 div, reg;
8bd135ba
MA
1209
1210 /* wait for diseqc idle */
1211 if (stb0899_wait_diseqc_txidle(state, 100) < 0)
1212 return -ETIMEDOUT;
1213
1214 switch (tone) {
1215 case SEC_TONE_ON:
1216 div = (internal->master_clk / 100) / 5632;
1217 div = (div + 5) / 10;
1218 stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x66);
baa40e48
MA
1219 reg = stb0899_read_reg(state, STB0899_ACRPRESC);
1220 STB0899_SETFIELD_VAL(ACRPRESC, reg, 0x03);
1221 stb0899_write_reg(state, STB0899_ACRPRESC, reg);
8bd135ba
MA
1222 stb0899_write_reg(state, STB0899_ACRDIV1, div);
1223 break;
1224 case SEC_TONE_OFF:
1225 stb0899_write_reg(state, STB0899_DISEQCOCFG, 0x20);
1226 break;
1227 default:
417dd69d 1228 return -EINVAL;
8bd135ba
MA
1229 }
1230 return 0;
1231}
1232
40e8ce3d 1233int stb0899_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
8bd135ba
MA
1234{
1235 int i2c_stat;
1236 struct stb0899_state *state = fe->demodulator_priv;
1237
1238 i2c_stat = stb0899_read_reg(state, STB0899_I2CRPT);
1239 if (i2c_stat < 0)
1240 goto err;
1241
1242 if (enable) {
1243 dprintk(state->verbose, FE_DEBUG, 1, "Enabling I2C Repeater ...");
1244 i2c_stat |= STB0899_I2CTON;
1245 if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
1246 goto err;
40e8ce3d
MA
1247 } else {
1248 dprintk(state->verbose, FE_DEBUG, 1, "Disabling I2C Repeater ...");
1249 i2c_stat &= ~STB0899_I2CTON;
1250 if (stb0899_write_reg(state, STB0899_I2CRPT, i2c_stat) < 0)
1251 goto err;
8bd135ba
MA
1252 }
1253 return 0;
1254err:
40e8ce3d 1255 dprintk(state->verbose, FE_ERROR, 1, "I2C Repeater control failed");
8bd135ba
MA
1256 return -EREMOTEIO;
1257}
1258
1259
1260static inline void CONVERT32(u32 x, char *str)
1261{
1262 *str++ = (x >> 24) & 0xff;
1263 *str++ = (x >> 16) & 0xff;
1264 *str++ = (x >> 8) & 0xff;
1265 *str++ = (x >> 0) & 0xff;
1266 *str = '\0';
1267}
1268
5506bcba 1269static int stb0899_get_dev_id(struct stb0899_state *state)
8bd135ba
MA
1270{
1271 u8 chip_id, release;
1272 u16 id;
1273 u32 demod_ver = 0, fec_ver = 0;
56137411
RN
1274 char demod_str[5] = { 0 };
1275 char fec_str[5] = { 0 };
8bd135ba
MA
1276
1277 id = stb0899_read_reg(state, STB0899_DEV_ID);
1278 dprintk(state->verbose, FE_DEBUG, 1, "ID reg=[0x%02x]", id);
1279 chip_id = STB0899_GETFIELD(CHIP_ID, id);
1280 release = STB0899_GETFIELD(CHIP_REL, id);
1281
1282 dprintk(state->verbose, FE_ERROR, 1, "Device ID=[%d], Release=[%d]",
1283 chip_id, release);
1284
1285 CONVERT32(STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_CORE_ID), (char *)&demod_str);
1286
1287 demod_ver = STB0899_READ_S2REG(STB0899_S2DEMOD, DMD_VERSION_ID);
1288 dprintk(state->verbose, FE_ERROR, 1, "Demodulator Core ID=[%s], Version=[%d]", (char *) &demod_str, demod_ver);
1289 CONVERT32(STB0899_READ_S2REG(STB0899_S2FEC, FEC_CORE_ID_REG), (char *)&fec_str);
1290 fec_ver = STB0899_READ_S2REG(STB0899_S2FEC, FEC_VER_ID_REG);
1291 if (! (chip_id > 0)) {
1292 dprintk(state->verbose, FE_ERROR, 1, "couldn't find a STB 0899");
1293
1294 return -ENODEV;
1295 }
1296 dprintk(state->verbose, FE_ERROR, 1, "FEC Core ID=[%s], Version=[%d]", (char*) &fec_str, fec_ver);
1297
1298 return 0;
1299}
1300
e399a789 1301static void stb0899_set_delivery(struct stb0899_state *state)
8bd135ba
MA
1302{
1303 u8 reg;
1304 u8 stop_clk[2];
1305
1306 stop_clk[0] = stb0899_read_reg(state, STB0899_STOPCLK1);
1307 stop_clk[1] = stb0899_read_reg(state, STB0899_STOPCLK2);
1308
1309 switch (state->delsys) {
3f400925 1310 case SYS_DVBS:
c615a27a 1311 dprintk(state->verbose, FE_DEBUG, 1, "Delivery System -- DVB-S");
8bd135ba
MA
1312 /* FECM/Viterbi ON */
1313 reg = stb0899_read_reg(state, STB0899_FECM);
1314 STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
1315 STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
1316 stb0899_write_reg(state, STB0899_FECM, reg);
1317
1318 stb0899_write_reg(state, STB0899_RSULC, 0xb1);
1319 stb0899_write_reg(state, STB0899_TSULC, 0x40);
1320 stb0899_write_reg(state, STB0899_RSLLC, 0x42);
1321 stb0899_write_reg(state, STB0899_TSLPL, 0x12);
1322
1323 reg = stb0899_read_reg(state, STB0899_TSTRES);
1324 STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
1325 stb0899_write_reg(state, STB0899_TSTRES, reg);
1326
1327 STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
1328 STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
1329 STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
1330
1331 STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
1332 STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
1333
1334 STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 1);
18527bee 1335 STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
8bd135ba
MA
1336
1337 STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
1338 break;
3f400925 1339 case SYS_DVBS2:
8bd135ba
MA
1340 /* FECM/Viterbi OFF */
1341 reg = stb0899_read_reg(state, STB0899_FECM);
1342 STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 0);
1343 STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 0);
1344 stb0899_write_reg(state, STB0899_FECM, reg);
1345
1346 stb0899_write_reg(state, STB0899_RSULC, 0xb1);
1347 stb0899_write_reg(state, STB0899_TSULC, 0x42);
1348 stb0899_write_reg(state, STB0899_RSLLC, 0x40);
1349 stb0899_write_reg(state, STB0899_TSLPL, 0x02);
1350
1351 reg = stb0899_read_reg(state, STB0899_TSTRES);
1352 STB0899_SETFIELD_VAL(FRESLDPC, reg, 0);
1353 stb0899_write_reg(state, STB0899_TSTRES, reg);
1354
1355 STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
1356 STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 0);
1357 STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 0);
1358
1359 STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 0);
1360 STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 0);
1361
1362 STB0899_SETFIELD_VAL(STOP_CKINTBUF216, stop_clk[0], 0);
1363 STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
1364
1365 STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 0);
1366 break;
3f400925 1367 case SYS_DSS:
8bd135ba
MA
1368 /* FECM/Viterbi ON */
1369 reg = stb0899_read_reg(state, STB0899_FECM);
1370 STB0899_SETFIELD_VAL(FECM_RSVD0, reg, 1);
1371 STB0899_SETFIELD_VAL(FECM_VITERBI_ON, reg, 1);
1372 stb0899_write_reg(state, STB0899_FECM, reg);
1373
1374 stb0899_write_reg(state, STB0899_RSULC, 0xa1);
1375 stb0899_write_reg(state, STB0899_TSULC, 0x61);
1376 stb0899_write_reg(state, STB0899_RSLLC, 0x42);
1377
1378 reg = stb0899_read_reg(state, STB0899_TSTRES);
1379 STB0899_SETFIELD_VAL(FRESLDPC, reg, 1);
1380 stb0899_write_reg(state, STB0899_TSTRES, reg);
1381
1382 STB0899_SETFIELD_VAL(STOP_CHK8PSK, stop_clk[0], 1);
1383 STB0899_SETFIELD_VAL(STOP_CKFEC108, stop_clk[0], 1);
1384 STB0899_SETFIELD_VAL(STOP_CKFEC216, stop_clk[0], 1);
1385
1386 STB0899_SETFIELD_VAL(STOP_CKPKDLIN108, stop_clk[1], 1);
1387 STB0899_SETFIELD_VAL(STOP_CKPKDLIN216, stop_clk[1], 1);
1388
1389 STB0899_SETFIELD_VAL(STOP_CKCORE216, stop_clk[0], 0);
1390
1391 STB0899_SETFIELD_VAL(STOP_CKS2DMD108, stop_clk[1], 1);
1392 break;
1393 default:
c615a27a 1394 dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
8bd135ba
MA
1395 break;
1396 }
1397 STB0899_SETFIELD_VAL(STOP_CKADCI108, stop_clk[0], 0);
1398 stb0899_write_regs(state, STB0899_STOPCLK1, stop_clk, 2);
1399}
1400
1401/*
1402 * stb0899_set_iterations
1403 * set the LDPC iteration scale function
1404 */
1405static void stb0899_set_iterations(struct stb0899_state *state)
1406{
1407 struct stb0899_internal *internal = &state->internal;
1408 struct stb0899_config *config = state->config;
1409
1410 s32 iter_scale;
1411 u32 reg;
1412
1413 iter_scale = 17 * (internal->master_clk / 1000);
1414 iter_scale += 410000;
1415 iter_scale /= (internal->srate / 1000000);
1416 iter_scale /= 1000;
1417
1418 if (iter_scale > config->ldpc_max_iter)
1419 iter_scale = config->ldpc_max_iter;
1420
699cc196 1421 reg = STB0899_READ_S2REG(STB0899_S2FEC, MAX_ITER);
8bd135ba 1422 STB0899_SETFIELD_VAL(MAX_ITERATIONS, reg, iter_scale);
699cc196 1423 stb0899_write_s2reg(state, STB0899_S2FEC, STB0899_BASE_MAX_ITER, STB0899_OFF0_MAX_ITER, reg);
8bd135ba
MA
1424}
1425
41da5320 1426static enum dvbfe_search stb0899_search(struct dvb_frontend *fe)
8bd135ba
MA
1427{
1428 struct stb0899_state *state = fe->demodulator_priv;
1429 struct stb0899_params *i_params = &state->params;
1430 struct stb0899_internal *internal = &state->internal;
b91a7cb0 1431 struct stb0899_config *config = state->config;
3f400925 1432 struct dtv_frontend_properties *props = &fe->dtv_property_cache;
8bd135ba
MA
1433
1434 u32 SearchRange, gain;
1435
41da5320
MCC
1436 i_params->freq = props->frequency;
1437 i_params->srate = props->symbol_rate;
3f400925 1438 state->delsys = props->delivery_system;
c615a27a 1439 dprintk(state->verbose, FE_DEBUG, 1, "delivery system=%d", state->delsys);
8bd135ba 1440
763fbaf6 1441 SearchRange = 10000000;
c615a27a 1442 dprintk(state->verbose, FE_DEBUG, 1, "Frequency=%d, Srate=%d", i_params->freq, i_params->srate);
8bd135ba
MA
1443 /* checking Search Range is meaningless for a fixed 3 Mhz */
1444 if (INRANGE(i_params->srate, 1000000, 45000000)) {
c615a27a 1445 dprintk(state->verbose, FE_DEBUG, 1, "Parameters IN RANGE");
e399a789 1446 stb0899_set_delivery(state);
8bd135ba
MA
1447
1448 if (state->config->tuner_set_rfsiggain) {
1449 if (internal->srate > 15000000)
3f400925 1450 gain = 8; /* 15Mb < srate < 45Mb, gain = 8dB */
8bd135ba 1451 else if (internal->srate > 5000000)
3f400925 1452 gain = 12; /* 5Mb < srate < 15Mb, gain = 12dB */
8bd135ba 1453 else
3f400925 1454 gain = 14; /* 1Mb < srate < 5Mb, gain = 14db */
8bd135ba
MA
1455 state->config->tuner_set_rfsiggain(fe, gain);
1456 }
1457
1458 if (i_params->srate <= 5000000)
b91a7cb0 1459 stb0899_set_mclk(state, config->lo_clk);
8bd135ba 1460 else
b91a7cb0 1461 stb0899_set_mclk(state, config->hi_clk);
8bd135ba
MA
1462
1463 switch (state->delsys) {
3f400925
MA
1464 case SYS_DVBS:
1465 case SYS_DSS:
c615a27a 1466 dprintk(state->verbose, FE_DEBUG, 1, "DVB-S delivery system");
8bd135ba
MA
1467 internal->freq = i_params->freq;
1468 internal->srate = i_params->srate;
1469 /*
1470 * search = user search range +
1471 * 500Khz +
1472 * 2 * Tuner_step_size +
1473 * 10% of the symbol rate
1474 */
1475 internal->srch_range = SearchRange + 1500000 + (i_params->srate / 5);
1476 internal->derot_percent = 30;
1477
1478 /* What to do for tuners having no bandwidth setup ? */
40e8ce3d
MA
1479 /* enable tuner I/O */
1480 stb0899_i2c_gate_ctrl(&state->frontend, 1);
1481
8bd135ba 1482 if (state->config->tuner_set_bandwidth)
02ec9d8f 1483 state->config->tuner_set_bandwidth(fe, (13 * (stb0899_carr_width(state) + SearchRange)) / 10);
8bd135ba
MA
1484 if (state->config->tuner_get_bandwidth)
1485 state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
40e8ce3d
MA
1486
1487 /* disable tuner I/O */
1488 stb0899_i2c_gate_ctrl(&state->frontend, 0);
1489
8bd135ba
MA
1490 /* Set DVB-S1 AGC */
1491 stb0899_write_reg(state, STB0899_AGCRFCFG, 0x11);
1492
1493 /* Run the search algorithm */
c615a27a 1494 dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S search algo ..");
8bd135ba
MA
1495 if (stb0899_dvbs_algo(state) == RANGEOK) {
1496 internal->lock = 1;
c615a27a 1497 dprintk(state->verbose, FE_DEBUG, 1,
8bd135ba
MA
1498 "-------------------------------------> DVB-S LOCK !");
1499
1500// stb0899_write_reg(state, STB0899_ERRCTRL1, 0x3d); /* Viterbi Errors */
1501// internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
1502// internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
c615a27a
RN
1503// dprintk(state->verbose, FE_DEBUG, 1, "VSTATUS=0x%02x", internal->v_status);
1504// dprintk(state->verbose, FE_DEBUG, 1, "ERR_CTRL=0x%02x", internal->err_ctrl);
8bd135ba
MA
1505
1506 return DVBFE_ALGO_SEARCH_SUCCESS;
1507 } else {
1508 internal->lock = 0;
1509
1510 return DVBFE_ALGO_SEARCH_FAILED;
1511 }
1512 break;
3f400925 1513 case SYS_DVBS2:
8bd135ba
MA
1514 internal->freq = i_params->freq;
1515 internal->srate = i_params->srate;
1516 internal->srch_range = SearchRange;
1517
40e8ce3d
MA
1518 /* enable tuner I/O */
1519 stb0899_i2c_gate_ctrl(&state->frontend, 1);
1520
8bd135ba 1521 if (state->config->tuner_set_bandwidth)
763fbaf6 1522 state->config->tuner_set_bandwidth(fe, (stb0899_carr_width(state) + SearchRange));
8bd135ba
MA
1523 if (state->config->tuner_get_bandwidth)
1524 state->config->tuner_get_bandwidth(fe, &internal->tuner_bw);
1525
40e8ce3d
MA
1526 /* disable tuner I/O */
1527 stb0899_i2c_gate_ctrl(&state->frontend, 0);
1528
8bd135ba
MA
1529// pParams->SpectralInv = pSearch->IQ_Inversion;
1530
1531 /* Set DVB-S2 AGC */
1532 stb0899_write_reg(state, STB0899_AGCRFCFG, 0x1c);
1533
1534 /* Set IterScale =f(MCLK,SYMB) */
1535 stb0899_set_iterations(state);
1536
1537 /* Run the search algorithm */
c615a27a 1538 dprintk(state->verbose, FE_DEBUG, 1, "running DVB-S2 search algo ..");
8bd135ba
MA
1539 if (stb0899_dvbs2_algo(state) == DVBS2_FEC_LOCK) {
1540 internal->lock = 1;
c615a27a 1541 dprintk(state->verbose, FE_DEBUG, 1,
8bd135ba
MA
1542 "-------------------------------------> DVB-S2 LOCK !");
1543
1544// stb0899_write_reg(state, STB0899_ERRCTRL1, 0xb6); /* Packet Errors */
1545// internal->v_status = stb0899_read_reg(state, STB0899_VSTATUS);
1546// internal->err_ctrl = stb0899_read_reg(state, STB0899_ERRCTRL1);
1547
1548 return DVBFE_ALGO_SEARCH_SUCCESS;
1549 } else {
1550 internal->lock = 0;
1551
1552 return DVBFE_ALGO_SEARCH_FAILED;
1553 }
1554 break;
1555 default:
c615a27a 1556 dprintk(state->verbose, FE_ERROR, 1, "Unsupported delivery system");
8bd135ba
MA
1557 return DVBFE_ALGO_SEARCH_INVALID;
1558 }
1559 }
1560
1561 return DVBFE_ALGO_SEARCH_ERROR;
1562}
8bd135ba 1563
7e3e68bc
MCC
1564static int stb0899_get_frontend(struct dvb_frontend *fe,
1565 struct dtv_frontend_properties *p)
8bd135ba
MA
1566{
1567 struct stb0899_state *state = fe->demodulator_priv;
1568 struct stb0899_internal *internal = &state->internal;
1569
3f400925 1570 dprintk(state->verbose, FE_DEBUG, 1, "Get params");
5715836f 1571 p->symbol_rate = internal->srate;
226143f9 1572 p->frequency = internal->freq;
8bd135ba
MA
1573
1574 return 0;
1575}
1576
1577static enum dvbfe_algo stb0899_frontend_algo(struct dvb_frontend *fe)
1578{
1579 return DVBFE_ALGO_CUSTOM;
1580}
1581
bd336e63 1582static const struct dvb_frontend_ops stb0899_ops = {
7581e61d 1583 .delsys = { SYS_DVBS, SYS_DVBS2, SYS_DSS },
8bd135ba 1584 .info = {
3f400925 1585 .name = "STB0899 Multistandard",
3f400925
MA
1586 .frequency_min = 950000,
1587 .frequency_max = 2150000,
1588 .frequency_stepsize = 0,
1589 .frequency_tolerance = 0,
07ecbf24 1590 .symbol_rate_min = 5000000,
3f400925
MA
1591 .symbol_rate_max = 45000000,
1592
1593 .caps = FE_CAN_INVERSION_AUTO |
1594 FE_CAN_FEC_AUTO |
faed4aa5 1595 FE_CAN_2G_MODULATION |
3f400925 1596 FE_CAN_QPSK
8bd135ba
MA
1597 },
1598
f686c143 1599 .detach = stb0899_detach,
8bd135ba
MA
1600 .release = stb0899_release,
1601 .init = stb0899_init,
1602 .sleep = stb0899_sleep,
1603// .wakeup = stb0899_wakeup,
1604
1605 .i2c_gate_ctrl = stb0899_i2c_gate_ctrl,
8bd135ba
MA
1606
1607 .get_frontend_algo = stb0899_frontend_algo,
1608 .search = stb0899_search,
5715836f 1609 .get_frontend = stb0899_get_frontend,
3f400925 1610
8bd135ba
MA
1611
1612 .read_status = stb0899_read_status,
1613 .read_snr = stb0899_read_snr,
1614 .read_signal_strength = stb0899_read_signal_strength,
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MA
1615 .read_ber = stb0899_read_ber,
1616
1617 .set_voltage = stb0899_set_voltage,
1618 .set_tone = stb0899_set_tone,
1619
1620 .diseqc_send_master_cmd = stb0899_send_diseqc_msg,
1621 .diseqc_recv_slave_reply = stb0899_recv_slave_reply,
1622 .diseqc_send_burst = stb0899_send_diseqc_burst,
1623};
1624
1625struct dvb_frontend *stb0899_attach(struct stb0899_config *config, struct i2c_adapter *i2c)
1626{
1627 struct stb0899_state *state = NULL;
1628
1629 state = kzalloc(sizeof (struct stb0899_state), GFP_KERNEL);
1630 if (state == NULL)
1631 goto error;
1632
c615a27a 1633 state->verbose = &verbose;
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MA
1634 state->config = config;
1635 state->i2c = i2c;
1636 state->frontend.ops = stb0899_ops;
1637 state->frontend.demodulator_priv = state;
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RN
1638 /* use configured inversion as default -- we'll later autodetect inversion */
1639 state->internal.inversion = config->inversion;
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MA
1640
1641 stb0899_wakeup(&state->frontend);
1642 if (stb0899_get_dev_id(state) == -ENODEV) {
1643 printk("%s: Exiting .. !\n", __func__);
1644 goto error;
1645 }
1646
1647 printk("%s: Attaching STB0899 \n", __func__);
1648 return &state->frontend;
1649
1650error:
1651 kfree(state);
1652 return NULL;
1653}
1654EXPORT_SYMBOL(stb0899_attach);
1655MODULE_PARM_DESC(verbose, "Set Verbosity level");
1656MODULE_AUTHOR("Manu Abraham");
1657MODULE_DESCRIPTION("STB0899 Multi-Std frontend");
1658MODULE_LICENSE("GPL");