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Commit | Line | Data |
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1da177e4 LT |
1 | /* |
2 | Driver for Philips TDA8083 based QPSK Demodulator | |
3 | ||
4 | Copyright (C) 2001 Convergence Integrated Media GmbH | |
5 | ||
6 | written by Ralph Metzler <ralph@convergence.de> | |
7 | ||
8 | adoption to the new DVB frontend API and diagnostic ioctl's | |
9 | by Holger Waechtler <holger@convergence.de> | |
10 | ||
11 | This program is free software; you can redistribute it and/or modify | |
12 | it under the terms of the GNU General Public License as published by | |
13 | the Free Software Foundation; either version 2 of the License, or | |
14 | (at your option) any later version. | |
15 | ||
16 | This program is distributed in the hope that it will be useful, | |
17 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
18 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
19 | GNU General Public License for more details. | |
20 | ||
21 | You should have received a copy of the GNU General Public License | |
22 | along with this program; if not, write to the Free Software | |
23 | Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
24 | ||
25 | */ | |
26 | ||
27 | #include <linux/init.h> | |
28 | #include <linux/kernel.h> | |
29 | #include <linux/module.h> | |
1da177e4 LT |
30 | #include <linux/string.h> |
31 | #include <linux/slab.h> | |
4e57b681 | 32 | #include <linux/jiffies.h> |
1da177e4 LT |
33 | #include "dvb_frontend.h" |
34 | #include "tda8083.h" | |
35 | ||
36 | ||
37 | struct tda8083_state { | |
38 | struct i2c_adapter* i2c; | |
1da177e4 LT |
39 | /* configuration settings */ |
40 | const struct tda8083_config* config; | |
41 | struct dvb_frontend frontend; | |
42 | }; | |
43 | ||
44 | static int debug; | |
45 | #define dprintk(args...) \ | |
46 | do { \ | |
47 | if (debug) printk(KERN_DEBUG "tda8083: " args); \ | |
48 | } while (0) | |
49 | ||
50 | ||
51 | static u8 tda8083_init_tab [] = { | |
52 | 0x04, 0x00, 0x4a, 0x79, 0x04, 0x00, 0xff, 0xea, | |
53 | 0x48, 0x42, 0x79, 0x60, 0x70, 0x52, 0x9a, 0x10, | |
54 | 0x0e, 0x10, 0xf2, 0xa7, 0x93, 0x0b, 0x05, 0xc8, | |
55 | 0x9d, 0x00, 0x42, 0x80, 0x00, 0x60, 0x40, 0x00, | |
56 | 0x00, 0x75, 0x00, 0xe0, 0x00, 0x00, 0x00, 0x00, | |
57 | 0x00, 0x00, 0x00, 0x00 | |
58 | }; | |
59 | ||
60 | ||
61 | static int tda8083_writereg (struct tda8083_state* state, u8 reg, u8 data) | |
62 | { | |
63 | int ret; | |
64 | u8 buf [] = { reg, data }; | |
65 | struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf, .len = 2 }; | |
66 | ||
9101e622 | 67 | ret = i2c_transfer(state->i2c, &msg, 1); |
1da177e4 | 68 | |
9101e622 MCC |
69 | if (ret != 1) |
70 | dprintk ("%s: writereg error (reg %02x, ret == %i)\n", | |
271ddbf7 | 71 | __func__, reg, ret); |
1da177e4 | 72 | |
9101e622 | 73 | return (ret != 1) ? -1 : 0; |
1da177e4 LT |
74 | } |
75 | ||
76 | static int tda8083_readregs (struct tda8083_state* state, u8 reg1, u8 *b, u8 len) | |
77 | { | |
78 | int ret; | |
79 | struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = ®1, .len = 1 }, | |
80 | { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = b, .len = len } }; | |
81 | ||
82 | ret = i2c_transfer(state->i2c, msg, 2); | |
83 | ||
84 | if (ret != 2) | |
85 | dprintk ("%s: readreg error (reg %02x, ret == %i)\n", | |
271ddbf7 | 86 | __func__, reg1, ret); |
1da177e4 | 87 | |
9101e622 | 88 | return ret == 2 ? 0 : -1; |
1da177e4 LT |
89 | } |
90 | ||
91 | static inline u8 tda8083_readreg (struct tda8083_state* state, u8 reg) | |
92 | { | |
93 | u8 val; | |
94 | ||
95 | tda8083_readregs (state, reg, &val, 1); | |
96 | ||
97 | return val; | |
98 | } | |
99 | ||
0df289a2 MCC |
100 | static int tda8083_set_inversion(struct tda8083_state *state, |
101 | enum fe_spectral_inversion inversion) | |
1da177e4 LT |
102 | { |
103 | /* XXX FIXME: implement other modes than FEC_AUTO */ | |
104 | if (inversion == INVERSION_AUTO) | |
105 | return 0; | |
106 | ||
107 | return -EINVAL; | |
108 | } | |
109 | ||
0df289a2 | 110 | static int tda8083_set_fec(struct tda8083_state *state, enum fe_code_rate fec) |
1da177e4 LT |
111 | { |
112 | if (fec == FEC_AUTO) | |
113 | return tda8083_writereg (state, 0x07, 0xff); | |
114 | ||
115 | if (fec >= FEC_1_2 && fec <= FEC_8_9) | |
116 | return tda8083_writereg (state, 0x07, 1 << (FEC_8_9 - fec)); | |
117 | ||
118 | return -EINVAL; | |
119 | } | |
120 | ||
0df289a2 | 121 | static enum fe_code_rate tda8083_get_fec(struct tda8083_state *state) |
1da177e4 LT |
122 | { |
123 | u8 index; | |
0df289a2 MCC |
124 | static enum fe_code_rate fec_tab[] = { |
125 | FEC_8_9, FEC_1_2, FEC_2_3, FEC_3_4, | |
126 | FEC_4_5, FEC_5_6, FEC_6_7, FEC_7_8 | |
127 | }; | |
1da177e4 LT |
128 | |
129 | index = tda8083_readreg(state, 0x0e) & 0x07; | |
130 | ||
131 | return fec_tab [index]; | |
132 | } | |
133 | ||
134 | static int tda8083_set_symbolrate (struct tda8083_state* state, u32 srate) | |
135 | { | |
9101e622 | 136 | u32 ratio; |
1da177e4 LT |
137 | u32 tmp; |
138 | u8 filter; | |
139 | ||
140 | if (srate > 32000000) | |
9101e622 MCC |
141 | srate = 32000000; |
142 | if (srate < 500000) | |
143 | srate = 500000; | |
1da177e4 LT |
144 | |
145 | filter = 0; | |
146 | if (srate < 24000000) | |
147 | filter = 2; | |
148 | if (srate < 16000000) | |
149 | filter = 3; | |
150 | ||
151 | tmp = 31250 << 16; | |
152 | ratio = tmp / srate; | |
153 | ||
154 | tmp = (tmp % srate) << 8; | |
155 | ratio = (ratio << 8) + tmp / srate; | |
156 | ||
157 | tmp = (tmp % srate) << 8; | |
158 | ratio = (ratio << 8) + tmp / srate; | |
159 | ||
160 | dprintk("tda8083: ratio == %08x\n", (unsigned int) ratio); | |
161 | ||
162 | tda8083_writereg (state, 0x05, filter); | |
163 | tda8083_writereg (state, 0x02, (ratio >> 16) & 0xff); | |
164 | tda8083_writereg (state, 0x03, (ratio >> 8) & 0xff); | |
165 | tda8083_writereg (state, 0x04, (ratio ) & 0xff); | |
166 | ||
167 | tda8083_writereg (state, 0x00, 0x3c); | |
168 | tda8083_writereg (state, 0x00, 0x04); | |
169 | ||
170 | return 1; | |
171 | } | |
172 | ||
173 | static void tda8083_wait_diseqc_fifo (struct tda8083_state* state, int timeout) | |
174 | { | |
175 | unsigned long start = jiffies; | |
176 | ||
177 | while (jiffies - start < timeout && | |
9101e622 | 178 | !(tda8083_readreg(state, 0x02) & 0x80)) |
1da177e4 LT |
179 | { |
180 | msleep(50); | |
c2c1b415 | 181 | } |
1da177e4 LT |
182 | } |
183 | ||
0df289a2 MCC |
184 | static int tda8083_set_tone(struct tda8083_state *state, |
185 | enum fe_sec_tone_mode tone) | |
1da177e4 LT |
186 | { |
187 | tda8083_writereg (state, 0x26, 0xf1); | |
188 | ||
189 | switch (tone) { | |
190 | case SEC_TONE_OFF: | |
191 | return tda8083_writereg (state, 0x29, 0x00); | |
192 | case SEC_TONE_ON: | |
193 | return tda8083_writereg (state, 0x29, 0x80); | |
194 | default: | |
195 | return -EINVAL; | |
2028c71d | 196 | } |
1da177e4 LT |
197 | } |
198 | ||
0df289a2 MCC |
199 | static int tda8083_set_voltage(struct tda8083_state *state, |
200 | enum fe_sec_voltage voltage) | |
1da177e4 LT |
201 | { |
202 | switch (voltage) { | |
203 | case SEC_VOLTAGE_13: | |
204 | return tda8083_writereg (state, 0x20, 0x00); | |
205 | case SEC_VOLTAGE_18: | |
206 | return tda8083_writereg (state, 0x20, 0x11); | |
207 | default: | |
208 | return -EINVAL; | |
2028c71d | 209 | } |
1da177e4 LT |
210 | } |
211 | ||
0df289a2 MCC |
212 | static int tda8083_send_diseqc_burst(struct tda8083_state *state, |
213 | enum fe_sec_mini_cmd burst) | |
1da177e4 LT |
214 | { |
215 | switch (burst) { | |
216 | case SEC_MINI_A: | |
217 | tda8083_writereg (state, 0x29, (5 << 2)); /* send burst A */ | |
218 | break; | |
219 | case SEC_MINI_B: | |
220 | tda8083_writereg (state, 0x29, (7 << 2)); /* send B */ | |
221 | break; | |
222 | default: | |
223 | return -EINVAL; | |
c2c1b415 | 224 | } |
1da177e4 LT |
225 | |
226 | tda8083_wait_diseqc_fifo (state, 100); | |
227 | ||
228 | return 0; | |
229 | } | |
230 | ||
0df289a2 MCC |
231 | static int tda8083_send_diseqc_msg(struct dvb_frontend *fe, |
232 | struct dvb_diseqc_master_cmd *m) | |
1da177e4 | 233 | { |
b8742700 | 234 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
235 | int i; |
236 | ||
237 | tda8083_writereg (state, 0x29, (m->msg_len - 3) | (1 << 2)); /* enable */ | |
238 | ||
239 | for (i=0; i<m->msg_len; i++) | |
240 | tda8083_writereg (state, 0x23 + i, m->msg[i]); | |
241 | ||
242 | tda8083_writereg (state, 0x29, (m->msg_len - 3) | (3 << 2)); /* send!! */ | |
243 | ||
244 | tda8083_wait_diseqc_fifo (state, 100); | |
245 | ||
246 | return 0; | |
247 | } | |
248 | ||
0df289a2 MCC |
249 | static int tda8083_read_status(struct dvb_frontend *fe, |
250 | enum fe_status *status) | |
1da177e4 | 251 | { |
b8742700 | 252 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
253 | |
254 | u8 signal = ~tda8083_readreg (state, 0x01); | |
255 | u8 sync = tda8083_readreg (state, 0x02); | |
256 | ||
257 | *status = 0; | |
258 | ||
259 | if (signal > 10) | |
260 | *status |= FE_HAS_SIGNAL; | |
261 | ||
262 | if (sync & 0x01) | |
263 | *status |= FE_HAS_CARRIER; | |
264 | ||
265 | if (sync & 0x02) | |
266 | *status |= FE_HAS_VITERBI; | |
267 | ||
268 | if (sync & 0x10) | |
269 | *status |= FE_HAS_SYNC; | |
270 | ||
dbb2e639 CH |
271 | if (sync & 0x20) /* frontend can not lock */ |
272 | *status |= FE_TIMEDOUT; | |
273 | ||
1da177e4 LT |
274 | if ((sync & 0x1f) == 0x1f) |
275 | *status |= FE_HAS_LOCK; | |
276 | ||
277 | return 0; | |
278 | } | |
279 | ||
dbb2e639 CH |
280 | static int tda8083_read_ber(struct dvb_frontend* fe, u32* ber) |
281 | { | |
282 | struct tda8083_state* state = fe->demodulator_priv; | |
283 | int ret; | |
284 | u8 buf[3]; | |
285 | ||
286 | if ((ret = tda8083_readregs(state, 0x0b, buf, sizeof(buf)))) | |
287 | return ret; | |
288 | ||
289 | *ber = ((buf[0] & 0x1f) << 16) | (buf[1] << 8) | buf[2]; | |
290 | ||
291 | return 0; | |
292 | } | |
293 | ||
1da177e4 LT |
294 | static int tda8083_read_signal_strength(struct dvb_frontend* fe, u16* strength) |
295 | { | |
b8742700 | 296 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
297 | |
298 | u8 signal = ~tda8083_readreg (state, 0x01); | |
299 | *strength = (signal << 8) | signal; | |
300 | ||
301 | return 0; | |
302 | } | |
303 | ||
304 | static int tda8083_read_snr(struct dvb_frontend* fe, u16* snr) | |
305 | { | |
b8742700 | 306 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
307 | |
308 | u8 _snr = tda8083_readreg (state, 0x08); | |
309 | *snr = (_snr << 8) | _snr; | |
310 | ||
311 | return 0; | |
312 | } | |
313 | ||
dbb2e639 CH |
314 | static int tda8083_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks) |
315 | { | |
316 | struct tda8083_state* state = fe->demodulator_priv; | |
317 | ||
318 | *ucblocks = tda8083_readreg(state, 0x0f); | |
319 | if (*ucblocks == 0xff) | |
320 | *ucblocks = 0xffffffff; | |
321 | ||
322 | return 0; | |
323 | } | |
324 | ||
042e5eb7 | 325 | static int tda8083_set_frontend(struct dvb_frontend *fe) |
1da177e4 | 326 | { |
042e5eb7 | 327 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
b8742700 | 328 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 | 329 | |
dea74869 | 330 | if (fe->ops.tuner_ops.set_params) { |
14d24d14 | 331 | fe->ops.tuner_ops.set_params(fe); |
dea74869 | 332 | if (fe->ops.i2c_gate_ctrl) fe->ops.i2c_gate_ctrl(fe, 0); |
d21eac03 AQ |
333 | } |
334 | ||
1da177e4 | 335 | tda8083_set_inversion (state, p->inversion); |
042e5eb7 MCC |
336 | tda8083_set_fec(state, p->fec_inner); |
337 | tda8083_set_symbolrate(state, p->symbol_rate); | |
1da177e4 LT |
338 | |
339 | tda8083_writereg (state, 0x00, 0x3c); | |
340 | tda8083_writereg (state, 0x00, 0x04); | |
341 | ||
342 | return 0; | |
343 | } | |
344 | ||
7e3e68bc MCC |
345 | static int tda8083_get_frontend(struct dvb_frontend *fe, |
346 | struct dtv_frontend_properties *p) | |
1da177e4 | 347 | { |
b8742700 | 348 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
349 | |
350 | /* FIXME: get symbolrate & frequency offset...*/ | |
351 | /*p->frequency = ???;*/ | |
352 | p->inversion = (tda8083_readreg (state, 0x0e) & 0x80) ? | |
353 | INVERSION_ON : INVERSION_OFF; | |
042e5eb7 MCC |
354 | p->fec_inner = tda8083_get_fec(state); |
355 | /*p->symbol_rate = tda8083_get_symbolrate (state);*/ | |
1da177e4 LT |
356 | |
357 | return 0; | |
358 | } | |
359 | ||
360 | static int tda8083_sleep(struct dvb_frontend* fe) | |
361 | { | |
b8742700 | 362 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
363 | |
364 | tda8083_writereg (state, 0x00, 0x02); | |
365 | return 0; | |
366 | } | |
367 | ||
368 | static int tda8083_init(struct dvb_frontend* fe) | |
369 | { | |
b8742700 | 370 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
371 | int i; |
372 | ||
373 | for (i=0; i<44; i++) | |
374 | tda8083_writereg (state, i, tda8083_init_tab[i]); | |
375 | ||
1da177e4 LT |
376 | tda8083_writereg (state, 0x00, 0x3c); |
377 | tda8083_writereg (state, 0x00, 0x04); | |
378 | ||
379 | return 0; | |
380 | } | |
381 | ||
0df289a2 MCC |
382 | static int tda8083_diseqc_send_burst(struct dvb_frontend *fe, |
383 | enum fe_sec_mini_cmd burst) | |
1da177e4 | 384 | { |
b8742700 | 385 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
386 | |
387 | tda8083_send_diseqc_burst (state, burst); | |
388 | tda8083_writereg (state, 0x00, 0x3c); | |
389 | tda8083_writereg (state, 0x00, 0x04); | |
390 | ||
391 | return 0; | |
392 | } | |
393 | ||
0df289a2 MCC |
394 | static int tda8083_diseqc_set_tone(struct dvb_frontend *fe, |
395 | enum fe_sec_tone_mode tone) | |
1da177e4 | 396 | { |
b8742700 | 397 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
398 | |
399 | tda8083_set_tone (state, tone); | |
400 | tda8083_writereg (state, 0x00, 0x3c); | |
401 | tda8083_writereg (state, 0x00, 0x04); | |
402 | ||
403 | return 0; | |
404 | } | |
405 | ||
0df289a2 MCC |
406 | static int tda8083_diseqc_set_voltage(struct dvb_frontend *fe, |
407 | enum fe_sec_voltage voltage) | |
1da177e4 | 408 | { |
b8742700 | 409 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
410 | |
411 | tda8083_set_voltage (state, voltage); | |
412 | tda8083_writereg (state, 0x00, 0x3c); | |
413 | tda8083_writereg (state, 0x00, 0x04); | |
414 | ||
415 | return 0; | |
416 | } | |
417 | ||
418 | static void tda8083_release(struct dvb_frontend* fe) | |
419 | { | |
b8742700 | 420 | struct tda8083_state* state = fe->demodulator_priv; |
1da177e4 LT |
421 | kfree(state); |
422 | } | |
423 | ||
424 | static struct dvb_frontend_ops tda8083_ops; | |
425 | ||
426 | struct dvb_frontend* tda8083_attach(const struct tda8083_config* config, | |
427 | struct i2c_adapter* i2c) | |
428 | { | |
429 | struct tda8083_state* state = NULL; | |
430 | ||
431 | /* allocate memory for the internal state */ | |
084e24ac | 432 | state = kzalloc(sizeof(struct tda8083_state), GFP_KERNEL); |
1da177e4 LT |
433 | if (state == NULL) goto error; |
434 | ||
435 | /* setup the state */ | |
436 | state->config = config; | |
437 | state->i2c = i2c; | |
1da177e4 LT |
438 | |
439 | /* check if the demod is there */ | |
440 | if ((tda8083_readreg(state, 0x00)) != 0x05) goto error; | |
441 | ||
442 | /* create dvb_frontend */ | |
dea74869 | 443 | memcpy(&state->frontend.ops, &tda8083_ops, sizeof(struct dvb_frontend_ops)); |
1da177e4 LT |
444 | state->frontend.demodulator_priv = state; |
445 | return &state->frontend; | |
446 | ||
447 | error: | |
448 | kfree(state); | |
449 | return NULL; | |
450 | } | |
451 | ||
452 | static struct dvb_frontend_ops tda8083_ops = { | |
042e5eb7 | 453 | .delsys = { SYS_DVBS }, |
1da177e4 LT |
454 | .info = { |
455 | .name = "Philips TDA8083 DVB-S", | |
4f76b672 OE |
456 | .frequency_min = 920000, /* TDA8060 */ |
457 | .frequency_max = 2200000, /* TDA8060 */ | |
1da177e4 LT |
458 | .frequency_stepsize = 125, /* kHz for QPSK frontends */ |
459 | /* .frequency_tolerance = ???,*/ | |
4f76b672 OE |
460 | .symbol_rate_min = 12000000, |
461 | .symbol_rate_max = 30000000, | |
1da177e4 LT |
462 | /* .symbol_rate_tolerance = ???,*/ |
463 | .caps = FE_CAN_INVERSION_AUTO | | |
464 | FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 | | |
465 | FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 | | |
466 | FE_CAN_FEC_7_8 | FE_CAN_FEC_8_9 | FE_CAN_FEC_AUTO | | |
467 | FE_CAN_QPSK | FE_CAN_MUTE_TS | |
468 | }, | |
469 | ||
470 | .release = tda8083_release, | |
471 | ||
472 | .init = tda8083_init, | |
473 | .sleep = tda8083_sleep, | |
474 | ||
042e5eb7 MCC |
475 | .set_frontend = tda8083_set_frontend, |
476 | .get_frontend = tda8083_get_frontend, | |
1da177e4 LT |
477 | |
478 | .read_status = tda8083_read_status, | |
479 | .read_signal_strength = tda8083_read_signal_strength, | |
480 | .read_snr = tda8083_read_snr, | |
dbb2e639 CH |
481 | .read_ber = tda8083_read_ber, |
482 | .read_ucblocks = tda8083_read_ucblocks, | |
1da177e4 LT |
483 | |
484 | .diseqc_send_master_cmd = tda8083_send_diseqc_msg, | |
485 | .diseqc_send_burst = tda8083_diseqc_send_burst, | |
486 | .set_tone = tda8083_diseqc_set_tone, | |
487 | .set_voltage = tda8083_diseqc_set_voltage, | |
488 | }; | |
489 | ||
490 | module_param(debug, int, 0644); | |
491 | MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off)."); | |
492 | ||
493 | MODULE_DESCRIPTION("Philips TDA8083 DVB-S Demodulator"); | |
494 | MODULE_AUTHOR("Ralph Metzler, Holger Waechtler"); | |
495 | MODULE_LICENSE("GPL"); | |
496 | ||
497 | EXPORT_SYMBOL(tda8083_attach); |