[mirror_ubuntu-artful-kernel.git] / drivers / media / i2c / saa7191.c

/*
 *  saa7191.c - Philips SAA7191 video decoder driver
 *
 *  Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
 *  Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License version 2 as
 *  published by the Free Software Foundation.
 */

#include <linux/delay.h>
#include <linux/errno.h>
#include <linux/fs.h>
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/major.h>
#include <linux/module.h>
#include <linux/mm.h>
#include <linux/slab.h>

#include <linux/videodev2.h>
#include <linux/i2c.h>
#include <media/v4l2-device.h>

#include "saa7191.h"

#define SAA7191_MODULE_VERSION	"0.0.5"

MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
MODULE_VERSION(SAA7191_MODULE_VERSION);
MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
MODULE_LICENSE("GPL");


// #define SAA7191_DEBUG

#ifdef SAA7191_DEBUG
#define dprintk(x...) printk("SAA7191: " x);
#else
#define dprintk(x...)
#endif

#define SAA7191_SYNC_COUNT	30
#define SAA7191_SYNC_DELAY	100	/* milliseconds */

struct saa7191 {
	struct v4l2_subdev sd;

	/* the register values are stored here as the actual
	 * I2C-registers are write-only */
	u8 reg[25];

	int input;
	v4l2_std_id norm;
};

static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
{
	return container_of(sd, struct saa7191, sd);
}

static const u8 initseq[] = {
	0,	/* Subaddress */

	0x50,	/* (0x50) SAA7191_REG_IDEL */

	/* 50 Hz signal timing */
	0x30,	/* (0x30) SAA7191_REG_HSYB */
	0x00,	/* (0x00) SAA7191_REG_HSYS */
	0xe8,	/* (0xe8) SAA7191_REG_HCLB */
	0xb6,	/* (0xb6) SAA7191_REG_HCLS */
	0xf4,	/* (0xf4) SAA7191_REG_HPHI */

	/* control */
	SAA7191_LUMA_APER_1,	/* (0x01) SAA7191_REG_LUMA - CVBS mode */
	0x00,	/* (0x00) SAA7191_REG_HUEC */
	0xf8,	/* (0xf8) SAA7191_REG_CKTQ */
	0xf8,	/* (0xf8) SAA7191_REG_CKTS */
	0x90,	/* (0x90) SAA7191_REG_PLSE */
	0x90,	/* (0x90) SAA7191_REG_SESE */
	0x00,	/* (0x00) SAA7191_REG_GAIN */
	SAA7191_STDC_NFEN | SAA7191_STDC_HRMV,	/* (0x0c) SAA7191_REG_STDC
						 * - not SECAM,
						 * slow time constant */
	SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
	| SAA7191_IOCK_OEDY,	/* (0x78) SAA7191_REG_IOCK
				 * - chroma from CVBS, GPSW1 & 2 off */
	SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
	| SAA7191_CTL3_YDEL0,	/* (0x99) SAA7191_REG_CTL3
				 * - automatic field detection */
	0x00,	/* (0x00) SAA7191_REG_CTL4 */
	0x2c,	/* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
	0x00,	/* unused */
	0x00,	/* unused */

	/* 60 Hz signal timing */
	0x34,	/* (0x34) SAA7191_REG_HS6B */
	0x0a,	/* (0x0a) SAA7191_REG_HS6S */
	0xf4,	/* (0xf4) SAA7191_REG_HC6B */
	0xce,	/* (0xce) SAA7191_REG_HC6S */
	0xf4,	/* (0xf4) SAA7191_REG_HP6I */
};

/* SAA7191 register handling */

static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
{
	return to_saa7191(sd)->reg[reg];
}

static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	int ret;

	ret = i2c_master_recv(client, value, 1);
	if (ret < 0) {
		printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
		return ret;
	}

	return 0;
}


static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);

	to_saa7191(sd)->reg[reg] = value;
	return i2c_smbus_write_byte_data(client, reg, value);
}

/* the first byte of data must be the first subaddress number (register) */
static int saa7191_write_block(struct v4l2_subdev *sd,
			       u8 length, const u8 *data)
{
	struct i2c_client *client = v4l2_get_subdevdata(sd);
	struct saa7191 *decoder = to_saa7191(sd);
	int i;
	int ret;

	for (i = 0; i < (length - 1); i++) {
		decoder->reg[data[0] + i] = data[i + 1];
	}

	ret = i2c_master_send(client, data, length);
	if (ret < 0) {
		printk(KERN_ERR "SAA7191: saa7191_write_block(): "
		       "write failed\n");
		return ret;
	}

	return 0;
}

/* Helper functions */

static int saa7191_s_routing(struct v4l2_subdev *sd,
			     u32 input, u32 output, u32 config)
{
	struct saa7191 *decoder = to_saa7191(sd);
	u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
	u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
	int err;

	switch (input) {
	case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
		iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
			  | SAA7191_IOCK_GPSW2);
		/* Chrominance trap active */
		luma &= ~SAA7191_LUMA_BYPS;
		break;
	case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
		iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
		/* Chrominance trap bypassed */
		luma |= SAA7191_LUMA_BYPS;
		break;
	default:
		return -EINVAL;
	}

	err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
	if (err)
		return -EIO;
	err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
	if (err)
		return -EIO;

	decoder->input = input;

	return 0;
}

static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
{
	struct saa7191 *decoder = to_saa7191(sd);
	u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
	u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
	u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
	int err;

	if (norm & V4L2_STD_PAL) {
		stdc &= ~SAA7191_STDC_SECS;
		ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
		chcv = SAA7191_CHCV_PAL;
	} else if (norm & V4L2_STD_NTSC) {
		stdc &= ~SAA7191_STDC_SECS;
		ctl3 &= ~SAA7191_CTL3_AUFD;
		ctl3 |= SAA7191_CTL3_FSEL;
		chcv = SAA7191_CHCV_NTSC;
	} else if (norm & V4L2_STD_SECAM) {
		stdc |= SAA7191_STDC_SECS;
		ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
		chcv = SAA7191_CHCV_PAL;
	} else {
		return -EINVAL;
	}

	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
	if (err)
		return -EIO;
	err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
	if (err)
		return -EIO;
	err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
	if (err)
		return -EIO;

	decoder->norm = norm;

	dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
		stdc, chcv);
	dprintk("norm: %llx\n", norm);

	return 0;
}

static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
{
	int i = 0;

	dprintk("Checking for signal...\n");

	for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
		if (saa7191_read_status(sd, status))
			return -EIO;

		if (((*status) & SAA7191_STATUS_HLCK) == 0) {
			dprintk("Signal found\n");
			return 0;
		}

		msleep(SAA7191_SYNC_DELAY);
	}

	dprintk("No signal\n");

	return -EBUSY;
}

static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
{
	struct saa7191 *decoder = to_saa7191(sd);
	u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
	u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
	u8 status;
	v4l2_std_id old_norm = decoder->norm;
	int err = 0;

	dprintk("SAA7191 extended signal auto-detection...\n");

	*norm &= V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
	stdc &= ~SAA7191_STDC_SECS;
	ctl3 &= ~(SAA7191_CTL3_FSEL);

	err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
	if (err) {
		err = -EIO;
		goto out;
	}
	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
	if (err) {
		err = -EIO;
		goto out;
	}

	ctl3 |= SAA7191_CTL3_AUFD;
	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
	if (err) {
		err = -EIO;
		goto out;
	}

	msleep(SAA7191_SYNC_DELAY);

	err = saa7191_wait_for_signal(sd, &status);
	if (err)
		goto out;

	if (status & SAA7191_STATUS_FIDT) {
		/* 60Hz signal -> NTSC */
		dprintk("60Hz signal: NTSC\n");
		*norm &= V4L2_STD_NTSC;
		return 0;
	}

	/* 50Hz signal */
	dprintk("50Hz signal: Trying PAL...\n");

	/* try PAL first */
	err = saa7191_s_std(sd, V4L2_STD_PAL);
	if (err)
		goto out;

	msleep(SAA7191_SYNC_DELAY);

	err = saa7191_wait_for_signal(sd, &status);
	if (err)
		goto out;

	/* not 50Hz ? */
	if (status & SAA7191_STATUS_FIDT) {
		dprintk("No 50Hz signal\n");
		saa7191_s_std(sd, old_norm);
		*norm = V4L2_STD_UNKNOWN;
		return 0;
	}

	if (status & SAA7191_STATUS_CODE) {
		dprintk("PAL\n");
		*norm &= V4L2_STD_PAL;
		return saa7191_s_std(sd, old_norm);
	}

	dprintk("No color detected with PAL - Trying SECAM...\n");

	/* no color detected ? -> try SECAM */
	err = saa7191_s_std(sd, V4L2_STD_SECAM);
	if (err)
		goto out;

	msleep(SAA7191_SYNC_DELAY);

	err = saa7191_wait_for_signal(sd, &status);
	if (err)
		goto out;

	/* not 50Hz ? */
	if (status & SAA7191_STATUS_FIDT) {
		dprintk("No 50Hz signal\n");
		*norm = V4L2_STD_UNKNOWN;
		goto out;
	}

	if (status & SAA7191_STATUS_CODE) {
		/* Color detected -> SECAM */
		dprintk("SECAM\n");
		*norm &= V4L2_STD_SECAM;
		return saa7191_s_std(sd, old_norm);
	}

	dprintk("No color detected with SECAM - Going back to PAL.\n");
	*norm = V4L2_STD_UNKNOWN;

out:
	return saa7191_s_std(sd, old_norm);
}

static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
{
	u8 status;

	dprintk("SAA7191 signal auto-detection...\n");

	dprintk("Reading status...\n");

	if (saa7191_read_status(sd, &status))
		return -EIO;

	dprintk("Checking for signal...\n");

	/* no signal ? */
	if (status & SAA7191_STATUS_HLCK) {
		dprintk("No signal\n");
		return -EBUSY;
	}

	dprintk("Signal found\n");

	if (status & SAA7191_STATUS_FIDT) {
		/* 60hz signal -> NTSC */
		dprintk("NTSC\n");
		return saa7191_s_std(sd, V4L2_STD_NTSC);
	} else {
		/* 50hz signal -> PAL */
		dprintk("PAL\n");
		return saa7191_s_std(sd, V4L2_STD_PAL);
	}
}

static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
	u8 reg;
	int ret = 0;

	switch (ctrl->id) {
	case SAA7191_CONTROL_BANDPASS:
	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	case SAA7191_CONTROL_CORING:
		reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
		switch (ctrl->id) {
		case SAA7191_CONTROL_BANDPASS:
			ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
				>> SAA7191_LUMA_BPSS_SHIFT;
			break;
		case SAA7191_CONTROL_BANDPASS_WEIGHT:
			ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
				>> SAA7191_LUMA_APER_SHIFT;
			break;
		case SAA7191_CONTROL_CORING:
			ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
				>> SAA7191_LUMA_CORI_SHIFT;
			break;
		}
		break;
	case SAA7191_CONTROL_FORCE_COLOUR:
	case SAA7191_CONTROL_CHROMA_GAIN:
		reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
		if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
			ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
		else
			ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
				>> SAA7191_GAIN_LFIS_SHIFT;
		break;
	case V4L2_CID_HUE:
		reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
		if (reg < 0x80)
			reg += 0x80;
		else
			reg -= 0x80;
		ctrl->value = (s32)reg;
		break;
	case SAA7191_CONTROL_VTRC:
		reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
		ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
		break;
	case SAA7191_CONTROL_LUMA_DELAY:
		reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
		ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
			>> SAA7191_CTL3_YDEL_SHIFT;
		if (ctrl->value >= 4)
			ctrl->value -= 8;
		break;
	case SAA7191_CONTROL_VNR:
		reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
		ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
			>> SAA7191_CTL4_VNOI_SHIFT;
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
{
	u8 reg;
	int ret = 0;

	switch (ctrl->id) {
	case SAA7191_CONTROL_BANDPASS:
	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	case SAA7191_CONTROL_CORING:
		reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
		switch (ctrl->id) {
		case SAA7191_CONTROL_BANDPASS:
			reg &= ~SAA7191_LUMA_BPSS_MASK;
			reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
				& SAA7191_LUMA_BPSS_MASK;
			break;
		case SAA7191_CONTROL_BANDPASS_WEIGHT:
			reg &= ~SAA7191_LUMA_APER_MASK;
			reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
				& SAA7191_LUMA_APER_MASK;
			break;
		case SAA7191_CONTROL_CORING:
			reg &= ~SAA7191_LUMA_CORI_MASK;
			reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
				& SAA7191_LUMA_CORI_MASK;
			break;
		}
		ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
		break;
	case SAA7191_CONTROL_FORCE_COLOUR:
	case SAA7191_CONTROL_CHROMA_GAIN:
		reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
		if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
			if (ctrl->value)
				reg |= SAA7191_GAIN_COLO;
			else
				reg &= ~SAA7191_GAIN_COLO;
		} else {
			reg &= ~SAA7191_GAIN_LFIS_MASK;
			reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
				& SAA7191_GAIN_LFIS_MASK;
		}
		ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
		break;
	case V4L2_CID_HUE:
		reg = ctrl->value & 0xff;
		if (reg < 0x80)
			reg += 0x80;
		else
			reg -= 0x80;
		ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
		break;
	case SAA7191_CONTROL_VTRC:
		reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
		if (ctrl->value)
			reg |= SAA7191_STDC_VTRC;
		else
			reg &= ~SAA7191_STDC_VTRC;
		ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
		break;
	case SAA7191_CONTROL_LUMA_DELAY: {
		s32 value = ctrl->value;
		if (value < 0)
			value += 8;
		reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
		reg &= ~SAA7191_CTL3_YDEL_MASK;
		reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
			& SAA7191_CTL3_YDEL_MASK;
		ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
		break;
	}
	case SAA7191_CONTROL_VNR:
		reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
		reg &= ~SAA7191_CTL4_VNOI_MASK;
		reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
			& SAA7191_CTL4_VNOI_MASK;
		ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
		break;
	default:
		ret = -EINVAL;
	}

	return ret;
}

/* I2C-interface */

static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
{
	u8 status_reg;
	int res = V4L2_IN_ST_NO_SIGNAL;

	if (saa7191_read_status(sd, &status_reg))
		return -EIO;
	if ((status_reg & SAA7191_STATUS_HLCK) == 0)
		res = 0;
	if (!(status_reg & SAA7191_STATUS_CODE))
		res |= V4L2_IN_ST_NO_COLOR;
	*status = res;
	return 0;
}


/* ----------------------------------------------------------------------- */

static const struct v4l2_subdev_core_ops saa7191_core_ops = {
	.g_ctrl = saa7191_g_ctrl,
	.s_ctrl = saa7191_s_ctrl,
};

static const struct v4l2_subdev_video_ops saa7191_video_ops = {
	.s_std = saa7191_s_std,
	.s_routing = saa7191_s_routing,
	.querystd = saa7191_querystd,
	.g_input_status = saa7191_g_input_status,
};

static const struct v4l2_subdev_ops saa7191_ops = {
	.core = &saa7191_core_ops,
	.video = &saa7191_video_ops,
};

static int saa7191_probe(struct i2c_client *client,
			  const struct i2c_device_id *id)
{
	int err = 0;
	struct saa7191 *decoder;
	struct v4l2_subdev *sd;

	v4l_info(client, "chip found @ 0x%x (%s)\n",
			client->addr << 1, client->adapter->name);

	decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
	if (!decoder)
		return -ENOMEM;

	sd = &decoder->sd;
	v4l2_i2c_subdev_init(sd, client, &saa7191_ops);

	err = saa7191_write_block(sd, sizeof(initseq), initseq);
	if (err) {
		printk(KERN_ERR "SAA7191 initialization failed\n");
		return err;
	}

	printk(KERN_INFO "SAA7191 initialized\n");

	decoder->input = SAA7191_INPUT_COMPOSITE;
	decoder->norm = V4L2_STD_PAL;

	err = saa7191_autodetect_norm(sd);
	if (err && (err != -EBUSY))
		printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");

	return 0;
}

static int saa7191_remove(struct i2c_client *client)
{
	struct v4l2_subdev *sd = i2c_get_clientdata(client);

	v4l2_device_unregister_subdev(sd);
	return 0;
}

static const struct i2c_device_id saa7191_id[] = {
	{ "saa7191", 0 },
	{ }
};
MODULE_DEVICE_TABLE(i2c, saa7191_id);

static struct i2c_driver saa7191_driver = {
	.driver = {
		.owner	= THIS_MODULE,
		.name	= "saa7191",
	},
	.probe		= saa7191_probe,
	.remove		= saa7191_remove,
	.id_table	= saa7191_id,
};

module_i2c_driver(saa7191_driver);
Commit	Line	Data
d203a7ec RB	1	/*
	2	* saa7191.c - Philips SAA7191 video decoder driver
	3	*
	4	* Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
	5	* Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
d203a7ec RB	12	#include <linux/delay.h>
	13	#include <linux/errno.h>
	14	#include <linux/fs.h>
495515b3	15	#include <linux/init.h>
d203a7ec RB	16	#include <linux/kernel.h>
d203a7ec RB	17	#include <linux/major.h>
495515b3	18	#include <linux/module.h>
d203a7ec	19	#include <linux/mm.h>
495515b3	20	#include <linux/slab.h>
d203a7ec	21
cf4e9484	22	#include <linux/videodev2.h>
d203a7ec	23	#include <linux/i2c.h>
8340ff43	24	#include <media/v4l2-device.h>
d203a7ec RB	25
	26	#include "saa7191.h"
	27
a637a114	28	#define SAA7191_MODULE_VERSION "0.0.5"
d203a7ec RB	29
	30	MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
	31	MODULE_VERSION(SAA7191_MODULE_VERSION);
	32	MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
	33	MODULE_LICENSE("GPL");
	34
babb7dc7	35
a637a114 LM	36	// #define SAA7191_DEBUG
	37
	38	#ifdef SAA7191_DEBUG
	39	#define dprintk(x...) printk("SAA7191: " x);
	40	#else
	41	#define dprintk(x...)
	42	#endif
	43
	44	#define SAA7191_SYNC_COUNT 30
	45	#define SAA7191_SYNC_DELAY 100 /* milliseconds */
	46
d203a7ec	47	struct saa7191 {
8340ff43	48	struct v4l2_subdev sd;
d203a7ec RB	49
	50	/* the register values are stored here as the actual
	51	* I2C-registers are write-only */
a637a114	52	u8 reg[25];
d203a7ec	53
a637a114	54	int input;
cf4e9484	55	v4l2_std_id norm;
d203a7ec RB	56	};
d203a7ec RB	57
8340ff43 HV	58	static inline struct saa7191 to_saa7191(struct v4l2_subdev sd)
	59	{
	60	return container_of(sd, struct saa7191, sd);
	61	}
	62
a637a114	63	static const u8 initseq[] = {
d203a7ec	64	0, /* Subaddress */
a637a114 LM	65
	66	0x50, /* (0x50) SAA7191_REG_IDEL */
	67
	68	/* 50 Hz signal timing */
	69	0x30, /* (0x30) SAA7191_REG_HSYB */
	70	0x00, /* (0x00) SAA7191_REG_HSYS */
	71	0xe8, /* (0xe8) SAA7191_REG_HCLB */
	72	0xb6, /* (0xb6) SAA7191_REG_HCLS */
	73	0xf4, /* (0xf4) SAA7191_REG_HPHI */
	74
	75	/* control */
	76	SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
	77	0x00, /* (0x00) SAA7191_REG_HUEC */
	78	0xf8, /* (0xf8) SAA7191_REG_CKTQ */
	79	0xf8, /* (0xf8) SAA7191_REG_CKTS */
	80	0x90, /* (0x90) SAA7191_REG_PLSE */
	81	0x90, /* (0x90) SAA7191_REG_SESE */
	82	0x00, /* (0x00) SAA7191_REG_GAIN */
	83	SAA7191_STDC_NFEN \| SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
	84	* - not SECAM,
	85	* slow time constant */
	86	SAA7191_IOCK_OEDC \| SAA7191_IOCK_OEHS \| SAA7191_IOCK_OEVS
	87	\| SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
	88	* - chroma from CVBS, GPSW1 & 2 off */
	89	SAA7191_CTL3_AUFD \| SAA7191_CTL3_SCEN \| SAA7191_CTL3_OFTS
	90	\| SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
	91	* - automatic field detection */
	92	0x00, /* (0x00) SAA7191_REG_CTL4 */
	93	0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
d203a7ec RB	94	0x00, /* unused */
d203a7ec RB	95	0x00, /* unused */
a637a114 LM	96
	97	/* 60 Hz signal timing */
	98	0x34, /* (0x34) SAA7191_REG_HS6B */
	99	0x0a, /* (0x0a) SAA7191_REG_HS6S */
	100	0xf4, /* (0xf4) SAA7191_REG_HC6B */
	101	0xce, /* (0xce) SAA7191_REG_HC6S */
	102	0xf4, /* (0xf4) SAA7191_REG_HP6I */
d203a7ec RB	103	};
	104
	105	/* SAA7191 register handling */
	106
8340ff43	107	static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
d203a7ec	108	{
8340ff43	109	return to_saa7191(sd)->reg[reg];
d203a7ec RB	110	}
d203a7ec RB	111
8340ff43	112	static int saa7191_read_status(struct v4l2_subdev sd, u8 value)
d203a7ec	113	{
8340ff43	114	struct i2c_client *client = v4l2_get_subdevdata(sd);
d203a7ec RB	115	int ret;
	116
	117	ret = i2c_master_recv(client, value, 1);
	118	if (ret < 0) {
a637a114	119	printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
d203a7ec RB	120	return ret;
	121	}
	122
	123	return 0;
	124	}
	125
	126
8340ff43	127	static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
d203a7ec	128	{
8340ff43 HV	129	struct i2c_client *client = v4l2_get_subdevdata(sd);
	130
	131	to_saa7191(sd)->reg[reg] = value;
d203a7ec RB	132	return i2c_smbus_write_byte_data(client, reg, value);
	133	}
	134
	135	/* the first byte of data must be the first subaddress number (register) */
8340ff43	136	static int saa7191_write_block(struct v4l2_subdev *sd,
f5ab272b	137	u8 length, const u8 *data)
d203a7ec	138	{
8340ff43 HV	139	struct i2c_client *client = v4l2_get_subdevdata(sd);
8340ff43 HV	140	struct saa7191 *decoder = to_saa7191(sd);
d203a7ec RB	141	int i;
	142	int ret;
	143
d203a7ec RB	144	for (i = 0; i < (length - 1); i++) {
	145	decoder->reg[data[0] + i] = data[i + 1];
	146	}
	147
	148	ret = i2c_master_send(client, data, length);
	149	if (ret < 0) {
	150	printk(KERN_ERR "SAA7191: saa7191_write_block(): "
a637a114	151	"write failed\n");
d203a7ec RB	152	return ret;
	153	}
	154
	155	return 0;
	156	}
	157
	158	/* Helper functions */
	159
8340ff43	160	static int saa7191_s_routing(struct v4l2_subdev *sd,
5325b427	161	u32 input, u32 output, u32 config)
d203a7ec	162	{
8340ff43 HV	163	struct saa7191 *decoder = to_saa7191(sd);
	164	u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
	165	u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
d203a7ec RB	166	int err;
d203a7ec RB	167
5325b427	168	switch (input) {
d203a7ec RB	169	case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
	170	iock &= ~(SAA7191_IOCK_CHRS \| SAA7191_IOCK_GPSW1
	171	\| SAA7191_IOCK_GPSW2);
	172	/* Chrominance trap active */
	173	luma &= ~SAA7191_LUMA_BYPS;
	174	break;
	175	case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
	176	iock \|= SAA7191_IOCK_CHRS \| SAA7191_IOCK_GPSW2;
	177	/* Chrominance trap bypassed */
	178	luma \|= SAA7191_LUMA_BYPS;
	179	break;
	180	default:
	181	return -EINVAL;
	182	}
	183
8340ff43	184	err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
d203a7ec RB	185	if (err)
d203a7ec RB	186	return -EIO;
8340ff43	187	err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
d203a7ec RB	188	if (err)
	189	return -EIO;
	190
5325b427	191	decoder->input = input;
a637a114	192
d203a7ec RB	193	return 0;
	194	}
	195
8340ff43	196	static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
d203a7ec	197	{
8340ff43 HV	198	struct saa7191 *decoder = to_saa7191(sd);
	199	u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
	200	u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
	201	u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
d203a7ec RB	202	int err;
d203a7ec RB	203
cf4e9484	204	if (norm & V4L2_STD_PAL) {
d203a7ec RB	205	stdc &= ~SAA7191_STDC_SECS;
	206	ctl3 &= ~(SAA7191_CTL3_AUFD \| SAA7191_CTL3_FSEL);
	207	chcv = SAA7191_CHCV_PAL;
cf4e9484	208	} else if (norm & V4L2_STD_NTSC) {
d203a7ec RB	209	stdc &= ~SAA7191_STDC_SECS;
	210	ctl3 &= ~SAA7191_CTL3_AUFD;
	211	ctl3 \|= SAA7191_CTL3_FSEL;
	212	chcv = SAA7191_CHCV_NTSC;
cf4e9484	213	} else if (norm & V4L2_STD_SECAM) {
d203a7ec RB	214	stdc \|= SAA7191_STDC_SECS;
	215	ctl3 &= ~(SAA7191_CTL3_AUFD \| SAA7191_CTL3_FSEL);
	216	chcv = SAA7191_CHCV_PAL;
cf4e9484	217	} else {
d203a7ec RB	218	return -EINVAL;
	219	}
	220
8340ff43	221	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
d203a7ec RB	222	if (err)
d203a7ec RB	223	return -EIO;
8340ff43	224	err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
d203a7ec RB	225	if (err)
d203a7ec RB	226	return -EIO;
8340ff43	227	err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
d203a7ec RB	228	if (err)
	229	return -EIO;
	230
	231	decoder->norm = norm;
	232
a637a114 LM	233	dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
a637a114 LM	234	stdc, chcv);
cf4e9484	235	dprintk("norm: %llx\n", norm);
a637a114	236
d203a7ec RB	237	return 0;
	238	}
	239
8340ff43	240	static int saa7191_wait_for_signal(struct v4l2_subdev sd, u8 status)
d203a7ec	241	{
a637a114	242	int i = 0;
d203a7ec	243
a637a114 LM	244	dprintk("Checking for signal...\n");
	245
	246	for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
8340ff43	247	if (saa7191_read_status(sd, status))
a637a114 LM	248	return -EIO;
	249
	250	if (((*status) & SAA7191_STATUS_HLCK) == 0) {
	251	dprintk("Signal found\n");
	252	return 0;
	253	}
	254
	255	msleep(SAA7191_SYNC_DELAY);
d203a7ec	256	}
d203a7ec	257
a637a114	258	dprintk("No signal\n");
d203a7ec	259
a637a114	260	return -EBUSY;
d203a7ec RB	261	}
d203a7ec RB	262
8340ff43	263	static int saa7191_querystd(struct v4l2_subdev sd, v4l2_std_id norm)
d203a7ec	264	{
8340ff43 HV	265	struct saa7191 *decoder = to_saa7191(sd);
	266	u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
	267	u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
a637a114	268	u8 status;
cf4e9484	269	v4l2_std_id old_norm = decoder->norm;
a637a114	270	int err = 0;
d203a7ec	271
a637a114 LM	272	dprintk("SAA7191 extended signal auto-detection...\n");
a637a114 LM	273
ec276a5a	274	*norm &= V4L2_STD_NTSC \| V4L2_STD_PAL \| V4L2_STD_SECAM;
a637a114 LM	275	stdc &= ~SAA7191_STDC_SECS;
	276	ctl3 &= ~(SAA7191_CTL3_FSEL);
	277
8340ff43	278	err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
a637a114 LM	279	if (err) {
	280	err = -EIO;
	281	goto out;
	282	}
8340ff43	283	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
a637a114 LM	284	if (err) {
	285	err = -EIO;
	286	goto out;
	287	}
	288
	289	ctl3 \|= SAA7191_CTL3_AUFD;
8340ff43	290	err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
a637a114 LM	291	if (err) {
	292	err = -EIO;
	293	goto out;
	294	}
	295
	296	msleep(SAA7191_SYNC_DELAY);
	297
8340ff43	298	err = saa7191_wait_for_signal(sd, &status);
a637a114 LM	299	if (err)
	300	goto out;
	301
	302	if (status & SAA7191_STATUS_FIDT) {
	303	/* 60Hz signal -> NTSC */
	304	dprintk("60Hz signal: NTSC\n");
ec276a5a	305	*norm &= V4L2_STD_NTSC;
cf4e9484	306	return 0;
a637a114 LM	307	}
	308
	309	/* 50Hz signal */
	310	dprintk("50Hz signal: Trying PAL...\n");
	311
	312	/* try PAL first */
8340ff43	313	err = saa7191_s_std(sd, V4L2_STD_PAL);
a637a114 LM	314	if (err)
	315	goto out;
	316
	317	msleep(SAA7191_SYNC_DELAY);
	318
8340ff43	319	err = saa7191_wait_for_signal(sd, &status);
a637a114 LM	320	if (err)
	321	goto out;
	322
	323	/* not 50Hz ? */
	324	if (status & SAA7191_STATUS_FIDT) {
	325	dprintk("No 50Hz signal\n");
8340ff43	326	saa7191_s_std(sd, old_norm);
ec276a5a HV	327	*norm = V4L2_STD_UNKNOWN;
ec276a5a HV	328	return 0;
a637a114 LM	329	}
	330
	331	if (status & SAA7191_STATUS_CODE) {
	332	dprintk("PAL\n");
ec276a5a	333	*norm &= V4L2_STD_PAL;
8340ff43	334	return saa7191_s_std(sd, old_norm);
a637a114 LM	335	}
	336
	337	dprintk("No color detected with PAL - Trying SECAM...\n");
	338
	339	/* no color detected ? -> try SECAM */
8340ff43	340	err = saa7191_s_std(sd, V4L2_STD_SECAM);
a637a114 LM	341	if (err)
	342	goto out;
	343
	344	msleep(SAA7191_SYNC_DELAY);
	345
8340ff43	346	err = saa7191_wait_for_signal(sd, &status);
a637a114 LM	347	if (err)
	348	goto out;
	349
	350	/* not 50Hz ? */
	351	if (status & SAA7191_STATUS_FIDT) {
	352	dprintk("No 50Hz signal\n");
ec276a5a	353	*norm = V4L2_STD_UNKNOWN;
a637a114 LM	354	goto out;
	355	}
	356
	357	if (status & SAA7191_STATUS_CODE) {
	358	/* Color detected -> SECAM */
	359	dprintk("SECAM\n");
ec276a5a	360	*norm &= V4L2_STD_SECAM;
8340ff43	361	return saa7191_s_std(sd, old_norm);
a637a114 LM	362	}
	363
	364	dprintk("No color detected with SECAM - Going back to PAL.\n");
ec276a5a	365	*norm = V4L2_STD_UNKNOWN;
a637a114	366
a637a114	367	out:
8340ff43	368	return saa7191_s_std(sd, old_norm);
a637a114 LM	369	}
a637a114 LM	370
8340ff43	371	static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
a637a114 LM	372	{
	373	u8 status;
	374
	375	dprintk("SAA7191 signal auto-detection...\n");
	376
	377	dprintk("Reading status...\n");
	378
8340ff43	379	if (saa7191_read_status(sd, &status))
a637a114 LM	380	return -EIO;
	381
	382	dprintk("Checking for signal...\n");
	383
	384	/* no signal ? */
	385	if (status & SAA7191_STATUS_HLCK) {
	386	dprintk("No signal\n");
	387	return -EBUSY;
	388	}
	389
	390	dprintk("Signal found\n");
	391
	392	if (status & SAA7191_STATUS_FIDT) {
	393	/* 60hz signal -> NTSC */
	394	dprintk("NTSC\n");
8340ff43	395	return saa7191_s_std(sd, V4L2_STD_NTSC);
a637a114 LM	396	} else {
	397	/* 50hz signal -> PAL */
	398	dprintk("PAL\n");
8340ff43	399	return saa7191_s_std(sd, V4L2_STD_PAL);
a637a114 LM	400	}
	401	}
	402
8340ff43	403	static int saa7191_g_ctrl(struct v4l2_subdev sd, struct v4l2_control ctrl)
a637a114 LM	404	{
	405	u8 reg;
	406	int ret = 0;
	407
cf4e9484	408	switch (ctrl->id) {
a637a114 LM	409	case SAA7191_CONTROL_BANDPASS:
	410	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	411	case SAA7191_CONTROL_CORING:
8340ff43	412	reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
cf4e9484	413	switch (ctrl->id) {
a637a114 LM	414	case SAA7191_CONTROL_BANDPASS:
	415	ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
	416	>> SAA7191_LUMA_BPSS_SHIFT;
	417	break;
	418	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	419	ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
	420	>> SAA7191_LUMA_APER_SHIFT;
	421	break;
	422	case SAA7191_CONTROL_CORING:
	423	ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
	424	>> SAA7191_LUMA_CORI_SHIFT;
	425	break;
d203a7ec	426	}
a637a114 LM	427	break;
	428	case SAA7191_CONTROL_FORCE_COLOUR:
	429	case SAA7191_CONTROL_CHROMA_GAIN:
8340ff43	430	reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
cf4e9484	431	if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
a637a114 LM	432	ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
	433	else
	434	ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
	435	>> SAA7191_GAIN_LFIS_SHIFT;
	436	break;
cf4e9484	437	case V4L2_CID_HUE:
8340ff43	438	reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
a637a114 LM	439	if (reg < 0x80)
	440	reg += 0x80;
	441	else
	442	reg -= 0x80;
	443	ctrl->value = (s32)reg;
	444	break;
	445	case SAA7191_CONTROL_VTRC:
8340ff43	446	reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
a637a114 LM	447	ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
	448	break;
	449	case SAA7191_CONTROL_LUMA_DELAY:
8340ff43	450	reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
a637a114 LM	451	ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
	452	>> SAA7191_CTL3_YDEL_SHIFT;
	453	if (ctrl->value >= 4)
	454	ctrl->value -= 8;
	455	break;
	456	case SAA7191_CONTROL_VNR:
8340ff43	457	reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
a637a114 LM	458	ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
	459	>> SAA7191_CTL4_VNOI_SHIFT;
	460	break;
	461	default:
	462	ret = -EINVAL;
	463	}
d203a7ec	464
a637a114 LM	465	return ret;
	466	}
	467
8340ff43	468	static int saa7191_s_ctrl(struct v4l2_subdev sd, struct v4l2_control ctrl)
a637a114 LM	469	{
	470	u8 reg;
	471	int ret = 0;
	472
cf4e9484	473	switch (ctrl->id) {
a637a114 LM	474	case SAA7191_CONTROL_BANDPASS:
	475	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	476	case SAA7191_CONTROL_CORING:
8340ff43	477	reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
cf4e9484	478	switch (ctrl->id) {
a637a114 LM	479	case SAA7191_CONTROL_BANDPASS:
	480	reg &= ~SAA7191_LUMA_BPSS_MASK;
	481	reg \|= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
	482	& SAA7191_LUMA_BPSS_MASK;
	483	break;
	484	case SAA7191_CONTROL_BANDPASS_WEIGHT:
	485	reg &= ~SAA7191_LUMA_APER_MASK;
	486	reg \|= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
	487	& SAA7191_LUMA_APER_MASK;
	488	break;
	489	case SAA7191_CONTROL_CORING:
	490	reg &= ~SAA7191_LUMA_CORI_MASK;
	491	reg \|= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
	492	& SAA7191_LUMA_CORI_MASK;
	493	break;
	494	}
8340ff43	495	ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
a637a114 LM	496	break;
	497	case SAA7191_CONTROL_FORCE_COLOUR:
	498	case SAA7191_CONTROL_CHROMA_GAIN:
8340ff43	499	reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
cf4e9484	500	if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
a637a114 LM	501	if (ctrl->value)
	502	reg \|= SAA7191_GAIN_COLO;
	503	else
	504	reg &= ~SAA7191_GAIN_COLO;
	505	} else {
	506	reg &= ~SAA7191_GAIN_LFIS_MASK;
	507	reg \|= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
	508	& SAA7191_GAIN_LFIS_MASK;
	509	}
8340ff43	510	ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
a637a114	511	break;
cf4e9484	512	case V4L2_CID_HUE:
a637a114 LM	513	reg = ctrl->value & 0xff;
	514	if (reg < 0x80)
	515	reg += 0x80;
	516	else
	517	reg -= 0x80;
8340ff43	518	ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
a637a114 LM	519	break;
a637a114 LM	520	case SAA7191_CONTROL_VTRC:
8340ff43	521	reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
a637a114 LM	522	if (ctrl->value)
	523	reg \|= SAA7191_STDC_VTRC;
	524	else
	525	reg &= ~SAA7191_STDC_VTRC;
8340ff43	526	ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
a637a114 LM	527	break;
	528	case SAA7191_CONTROL_LUMA_DELAY: {
	529	s32 value = ctrl->value;
	530	if (value < 0)
	531	value += 8;
8340ff43	532	reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
a637a114 LM	533	reg &= ~SAA7191_CTL3_YDEL_MASK;
	534	reg \|= (value << SAA7191_CTL3_YDEL_SHIFT)
	535	& SAA7191_CTL3_YDEL_MASK;
8340ff43	536	ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
a637a114 LM	537	break;
	538	}
	539	case SAA7191_CONTROL_VNR:
8340ff43	540	reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
a637a114 LM	541	reg &= ~SAA7191_CTL4_VNOI_MASK;
	542	reg \|= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
	543	& SAA7191_CTL4_VNOI_MASK;
8340ff43	544	ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
a637a114 LM	545	break;
	546	default:
	547	ret = -EINVAL;
d203a7ec RB	548	}
d203a7ec RB	549
a637a114	550	return ret;
d203a7ec RB	551	}
	552
	553	/* I2C-interface */
	554
8340ff43	555	static int saa7191_g_input_status(struct v4l2_subdev sd, u32 status)
d203a7ec	556	{
8340ff43 HV	557	u8 status_reg;
8340ff43 HV	558	int res = V4L2_IN_ST_NO_SIGNAL;
d203a7ec	559
8340ff43 HV	560	if (saa7191_read_status(sd, &status_reg))
	561	return -EIO;
	562	if ((status_reg & SAA7191_STATUS_HLCK) == 0)
	563	res = 0;
	564	if (!(status_reg & SAA7191_STATUS_CODE))
	565	res \|= V4L2_IN_ST_NO_COLOR;
	566	*status = res;
	567	return 0;
	568	}
d203a7ec	569
a637a114	570
8340ff43	571	/* ----------------------------------------------------------------------- */
cf4e9484	572
8340ff43	573	static const struct v4l2_subdev_core_ops saa7191_core_ops = {
8340ff43 HV	574	.g_ctrl = saa7191_g_ctrl,
8340ff43 HV	575	.s_ctrl = saa7191_s_ctrl,
8340ff43	576	};
d203a7ec	577
8340ff43	578	static const struct v4l2_subdev_video_ops saa7191_video_ops = {
8774bed9	579	.s_std = saa7191_s_std,
8340ff43 HV	580	.s_routing = saa7191_s_routing,
	581	.querystd = saa7191_querystd,
	582	.g_input_status = saa7191_g_input_status,
	583	};
	584
	585	static const struct v4l2_subdev_ops saa7191_ops = {
	586	.core = &saa7191_core_ops,
	587	.video = &saa7191_video_ops,
	588	};
d203a7ec	589
babb7dc7 HV	590	static int saa7191_probe(struct i2c_client *client,
	591	const struct i2c_device_id *id)
	592	{
	593	int err = 0;
	594	struct saa7191 *decoder;
8340ff43	595	struct v4l2_subdev *sd;
d203a7ec	596
babb7dc7 HV	597	v4l_info(client, "chip found @ 0x%x (%s)\n",
	598	client->addr << 1, client->adapter->name);
	599
c02b211d	600	decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
babb7dc7 HV	601	if (!decoder)
	602	return -ENOMEM;
	603
8340ff43 HV	604	sd = &decoder->sd;
8340ff43 HV	605	v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
babb7dc7	606
8340ff43	607	err = saa7191_write_block(sd, sizeof(initseq), initseq);
babb7dc7 HV	608	if (err) {
babb7dc7 HV	609	printk(KERN_ERR "SAA7191 initialization failed\n");
babb7dc7 HV	610	return err;
	611	}
	612
	613	printk(KERN_INFO "SAA7191 initialized\n");
	614
	615	decoder->input = SAA7191_INPUT_COMPOSITE;
cf4e9484	616	decoder->norm = V4L2_STD_PAL;
babb7dc7	617
8340ff43	618	err = saa7191_autodetect_norm(sd);
babb7dc7 HV	619	if (err && (err != -EBUSY))
	620	printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
	621
	622	return 0;
	623	}
	624
	625	static int saa7191_remove(struct i2c_client *client)
d203a7ec	626	{
8340ff43	627	struct v4l2_subdev *sd = i2c_get_clientdata(client);
babb7dc7	628
8340ff43	629	v4l2_device_unregister_subdev(sd);
babb7dc7	630	return 0;
d203a7ec RB	631	}
d203a7ec RB	632
babb7dc7 HV	633	static const struct i2c_device_id saa7191_id[] = {
	634	{ "saa7191", 0 },
	635	{ }
	636	};
	637	MODULE_DEVICE_TABLE(i2c, saa7191_id);
	638
534d4f83 HV	639	static struct i2c_driver saa7191_driver = {
	640	.driver = {
	641	.owner = THIS_MODULE,
	642	.name = "saa7191",
	643	},
	644	.probe = saa7191_probe,
	645	.remove = saa7191_remove,
	646	.id_table = saa7191_id,
babb7dc7	647	};
534d4f83	648
c6e8d86f	649	module_i2c_driver(saa7191_driver);