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f523dd0d GL |
1 | /* |
2 | * Driver for MT9M001 CMOS Image Sensor from Micron | |
3 | * | |
4 | * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | */ | |
10 | ||
11 | #include <linux/videodev2.h> | |
12 | #include <linux/slab.h> | |
13 | #include <linux/i2c.h> | |
14 | #include <linux/log2.h> | |
7a707b89 | 15 | #include <linux/module.h> |
f523dd0d | 16 | |
32ca2085 | 17 | #include <media/soc_camera.h> |
d647f0b7 | 18 | #include <media/drv-intf/soc_mediabus.h> |
9aea470b | 19 | #include <media/v4l2-clk.h> |
979ea1dd | 20 | #include <media/v4l2-subdev.h> |
2dd7d29c | 21 | #include <media/v4l2-ctrls.h> |
f523dd0d | 22 | |
5d28d525 GL |
23 | /* |
24 | * mt9m001 i2c address 0x5d | |
22cf83fa | 25 | * The platform has to define struct i2c_board_info objects and link to them |
25a34811 | 26 | * from struct soc_camera_host_desc |
5d28d525 | 27 | */ |
f523dd0d GL |
28 | |
29 | /* mt9m001 selected register addresses */ | |
30 | #define MT9M001_CHIP_VERSION 0x00 | |
31 | #define MT9M001_ROW_START 0x01 | |
32 | #define MT9M001_COLUMN_START 0x02 | |
33 | #define MT9M001_WINDOW_HEIGHT 0x03 | |
34 | #define MT9M001_WINDOW_WIDTH 0x04 | |
35 | #define MT9M001_HORIZONTAL_BLANKING 0x05 | |
36 | #define MT9M001_VERTICAL_BLANKING 0x06 | |
37 | #define MT9M001_OUTPUT_CONTROL 0x07 | |
38 | #define MT9M001_SHUTTER_WIDTH 0x09 | |
39 | #define MT9M001_FRAME_RESTART 0x0b | |
40 | #define MT9M001_SHUTTER_DELAY 0x0c | |
41 | #define MT9M001_RESET 0x0d | |
42 | #define MT9M001_READ_OPTIONS1 0x1e | |
43 | #define MT9M001_READ_OPTIONS2 0x20 | |
44 | #define MT9M001_GLOBAL_GAIN 0x35 | |
45 | #define MT9M001_CHIP_ENABLE 0xF1 | |
46 | ||
6a6c8786 GL |
47 | #define MT9M001_MAX_WIDTH 1280 |
48 | #define MT9M001_MAX_HEIGHT 1024 | |
49 | #define MT9M001_MIN_WIDTH 48 | |
50 | #define MT9M001_MIN_HEIGHT 32 | |
51 | #define MT9M001_COLUMN_SKIP 20 | |
52 | #define MT9M001_ROW_SKIP 12 | |
53 | ||
760697be GL |
54 | /* MT9M001 has only one fixed colorspace per pixelcode */ |
55 | struct mt9m001_datafmt { | |
f5fe58fd | 56 | u32 code; |
760697be GL |
57 | enum v4l2_colorspace colorspace; |
58 | }; | |
59 | ||
60 | /* Find a data format by a pixel code in an array */ | |
61 | static const struct mt9m001_datafmt *mt9m001_find_datafmt( | |
f5fe58fd | 62 | u32 code, const struct mt9m001_datafmt *fmt, |
760697be GL |
63 | int n) |
64 | { | |
65 | int i; | |
66 | for (i = 0; i < n; i++) | |
67 | if (fmt[i].code == code) | |
68 | return fmt + i; | |
69 | ||
70 | return NULL; | |
71 | } | |
72 | ||
73 | static const struct mt9m001_datafmt mt9m001_colour_fmts[] = { | |
5d28d525 GL |
74 | /* |
75 | * Order important: first natively supported, | |
76 | * second supported with a GPIO extender | |
77 | */ | |
f5fe58fd BB |
78 | {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB}, |
79 | {MEDIA_BUS_FMT_SBGGR8_1X8, V4L2_COLORSPACE_SRGB}, | |
f523dd0d GL |
80 | }; |
81 | ||
760697be | 82 | static const struct mt9m001_datafmt mt9m001_monochrome_fmts[] = { |
bb55de3b | 83 | /* Order important - see above */ |
f5fe58fd BB |
84 | {MEDIA_BUS_FMT_Y10_1X10, V4L2_COLORSPACE_JPEG}, |
85 | {MEDIA_BUS_FMT_Y8_1X8, V4L2_COLORSPACE_JPEG}, | |
f523dd0d GL |
86 | }; |
87 | ||
88 | struct mt9m001 { | |
979ea1dd | 89 | struct v4l2_subdev subdev; |
2dd7d29c HV |
90 | struct v4l2_ctrl_handler hdl; |
91 | struct { | |
92 | /* exposure/auto-exposure cluster */ | |
93 | struct v4l2_ctrl *autoexposure; | |
94 | struct v4l2_ctrl *exposure; | |
95 | }; | |
6a6c8786 | 96 | struct v4l2_rect rect; /* Sensor window */ |
9aea470b | 97 | struct v4l2_clk *clk; |
760697be GL |
98 | const struct mt9m001_datafmt *fmt; |
99 | const struct mt9m001_datafmt *fmts; | |
100 | int num_fmts; | |
2dd7d29c | 101 | unsigned int total_h; |
32536108 | 102 | unsigned short y_skip_top; /* Lines to skip at the top */ |
f523dd0d GL |
103 | }; |
104 | ||
979ea1dd GL |
105 | static struct mt9m001 *to_mt9m001(const struct i2c_client *client) |
106 | { | |
107 | return container_of(i2c_get_clientdata(client), struct mt9m001, subdev); | |
108 | } | |
109 | ||
9538e1c2 | 110 | static int reg_read(struct i2c_client *client, const u8 reg) |
f523dd0d | 111 | { |
3f877045 | 112 | return i2c_smbus_read_word_swapped(client, reg); |
f523dd0d GL |
113 | } |
114 | ||
9538e1c2 | 115 | static int reg_write(struct i2c_client *client, const u8 reg, |
f523dd0d GL |
116 | const u16 data) |
117 | { | |
3f877045 | 118 | return i2c_smbus_write_word_swapped(client, reg, data); |
f523dd0d GL |
119 | } |
120 | ||
9538e1c2 | 121 | static int reg_set(struct i2c_client *client, const u8 reg, |
f523dd0d GL |
122 | const u16 data) |
123 | { | |
124 | int ret; | |
125 | ||
9538e1c2 | 126 | ret = reg_read(client, reg); |
f523dd0d GL |
127 | if (ret < 0) |
128 | return ret; | |
9538e1c2 | 129 | return reg_write(client, reg, ret | data); |
f523dd0d GL |
130 | } |
131 | ||
9538e1c2 | 132 | static int reg_clear(struct i2c_client *client, const u8 reg, |
f523dd0d GL |
133 | const u16 data) |
134 | { | |
135 | int ret; | |
136 | ||
9538e1c2 | 137 | ret = reg_read(client, reg); |
f523dd0d GL |
138 | if (ret < 0) |
139 | return ret; | |
9538e1c2 | 140 | return reg_write(client, reg, ret & ~data); |
f523dd0d GL |
141 | } |
142 | ||
a4c56fd8 | 143 | static int mt9m001_init(struct i2c_client *client) |
f523dd0d GL |
144 | { |
145 | int ret; | |
146 | ||
85f8be68 | 147 | dev_dbg(&client->dev, "%s\n", __func__); |
f523dd0d | 148 | |
979ea1dd | 149 | /* |
96c75399 GL |
150 | * We don't know, whether platform provides reset, issue a soft reset |
151 | * too. This returns all registers to their default values. | |
979ea1dd GL |
152 | */ |
153 | ret = reg_write(client, MT9M001_RESET, 1); | |
154 | if (!ret) | |
155 | ret = reg_write(client, MT9M001_RESET, 0); | |
81034663 | 156 | |
11211641 GL |
157 | /* Disable chip, synchronous option update */ |
158 | if (!ret) | |
9538e1c2 | 159 | ret = reg_write(client, MT9M001_OUTPUT_CONTROL, 0); |
f523dd0d | 160 | |
11211641 | 161 | return ret; |
f523dd0d GL |
162 | } |
163 | ||
979ea1dd | 164 | static int mt9m001_s_stream(struct v4l2_subdev *sd, int enable) |
f523dd0d | 165 | { |
c4ce6d14 | 166 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
9538e1c2 | 167 | |
979ea1dd GL |
168 | /* Switch to master "normal" mode or stop sensor readout */ |
169 | if (reg_write(client, MT9M001_OUTPUT_CONTROL, enable ? 2 : 0) < 0) | |
f523dd0d GL |
170 | return -EIO; |
171 | return 0; | |
172 | } | |
173 | ||
10d5509c HV |
174 | static int mt9m001_set_selection(struct v4l2_subdev *sd, |
175 | struct v4l2_subdev_pad_config *cfg, | |
176 | struct v4l2_subdev_selection *sel) | |
ad5f2e85 | 177 | { |
c4ce6d14 | 178 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
979ea1dd | 179 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
10d5509c | 180 | struct v4l2_rect rect = sel->r; |
ad5f2e85 | 181 | const u16 hblank = 9, vblank = 25; |
10d5509c HV |
182 | int ret; |
183 | ||
184 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE || | |
185 | sel->target != V4L2_SEL_TGT_CROP) | |
186 | return -EINVAL; | |
ad5f2e85 | 187 | |
760697be | 188 | if (mt9m001->fmts == mt9m001_colour_fmts) |
6a6c8786 GL |
189 | /* |
190 | * Bayer format - even number of rows for simplicity, | |
191 | * but let the user play with the top row. | |
192 | */ | |
193 | rect.height = ALIGN(rect.height, 2); | |
194 | ||
195 | /* Datasheet requirement: see register description */ | |
196 | rect.width = ALIGN(rect.width, 2); | |
197 | rect.left = ALIGN(rect.left, 2); | |
198 | ||
199 | soc_camera_limit_side(&rect.left, &rect.width, | |
200 | MT9M001_COLUMN_SKIP, MT9M001_MIN_WIDTH, MT9M001_MAX_WIDTH); | |
201 | ||
202 | soc_camera_limit_side(&rect.top, &rect.height, | |
203 | MT9M001_ROW_SKIP, MT9M001_MIN_HEIGHT, MT9M001_MAX_HEIGHT); | |
204 | ||
2dd7d29c | 205 | mt9m001->total_h = rect.height + mt9m001->y_skip_top + vblank; |
96c75399 | 206 | |
f523dd0d | 207 | /* Blanking and start values - default... */ |
9538e1c2 | 208 | ret = reg_write(client, MT9M001_HORIZONTAL_BLANKING, hblank); |
11211641 | 209 | if (!ret) |
9538e1c2 | 210 | ret = reg_write(client, MT9M001_VERTICAL_BLANKING, vblank); |
f523dd0d | 211 | |
5d28d525 GL |
212 | /* |
213 | * The caller provides a supported format, as verified per | |
717fd5b4 | 214 | * call to .set_fmt(FORMAT_TRY). |
5d28d525 | 215 | */ |
11211641 | 216 | if (!ret) |
6a6c8786 | 217 | ret = reg_write(client, MT9M001_COLUMN_START, rect.left); |
11211641 | 218 | if (!ret) |
6a6c8786 | 219 | ret = reg_write(client, MT9M001_ROW_START, rect.top); |
11211641 | 220 | if (!ret) |
6a6c8786 | 221 | ret = reg_write(client, MT9M001_WINDOW_WIDTH, rect.width - 1); |
11211641 | 222 | if (!ret) |
9538e1c2 | 223 | ret = reg_write(client, MT9M001_WINDOW_HEIGHT, |
32536108 | 224 | rect.height + mt9m001->y_skip_top - 1); |
2dd7d29c HV |
225 | if (!ret && v4l2_ctrl_g_ctrl(mt9m001->autoexposure) == V4L2_EXPOSURE_AUTO) |
226 | ret = reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h); | |
f523dd0d | 227 | |
6a6c8786 GL |
228 | if (!ret) |
229 | mt9m001->rect = rect; | |
230 | ||
11211641 | 231 | return ret; |
f523dd0d GL |
232 | } |
233 | ||
10d5509c HV |
234 | static int mt9m001_get_selection(struct v4l2_subdev *sd, |
235 | struct v4l2_subdev_pad_config *cfg, | |
236 | struct v4l2_subdev_selection *sel) | |
6a6c8786 | 237 | { |
c4ce6d14 | 238 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 GL |
239 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
240 | ||
10d5509c HV |
241 | if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE) |
242 | return -EINVAL; | |
6a6c8786 | 243 | |
10d5509c HV |
244 | switch (sel->target) { |
245 | case V4L2_SEL_TGT_CROP_BOUNDS: | |
10d5509c HV |
246 | sel->r.left = MT9M001_COLUMN_SKIP; |
247 | sel->r.top = MT9M001_ROW_SKIP; | |
248 | sel->r.width = MT9M001_MAX_WIDTH; | |
249 | sel->r.height = MT9M001_MAX_HEIGHT; | |
250 | return 0; | |
251 | case V4L2_SEL_TGT_CROP: | |
252 | sel->r = mt9m001->rect; | |
253 | return 0; | |
254 | default: | |
255 | return -EINVAL; | |
256 | } | |
6a6c8786 GL |
257 | } |
258 | ||
da298c6d HV |
259 | static int mt9m001_get_fmt(struct v4l2_subdev *sd, |
260 | struct v4l2_subdev_pad_config *cfg, | |
261 | struct v4l2_subdev_format *format) | |
6a6c8786 | 262 | { |
c4ce6d14 | 263 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 | 264 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
da298c6d HV |
265 | struct v4l2_mbus_framefmt *mf = &format->format; |
266 | ||
267 | if (format->pad) | |
268 | return -EINVAL; | |
6a6c8786 | 269 | |
760697be GL |
270 | mf->width = mt9m001->rect.width; |
271 | mf->height = mt9m001->rect.height; | |
272 | mf->code = mt9m001->fmt->code; | |
273 | mf->colorspace = mt9m001->fmt->colorspace; | |
274 | mf->field = V4L2_FIELD_NONE; | |
6a6c8786 GL |
275 | |
276 | return 0; | |
277 | } | |
278 | ||
760697be | 279 | static int mt9m001_s_fmt(struct v4l2_subdev *sd, |
961f0ab7 | 280 | const struct mt9m001_datafmt *fmt, |
760697be | 281 | struct v4l2_mbus_framefmt *mf) |
09e231b3 | 282 | { |
c4ce6d14 | 283 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
6a6c8786 | 284 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
10d5509c HV |
285 | struct v4l2_subdev_selection sel = { |
286 | .which = V4L2_SUBDEV_FORMAT_ACTIVE, | |
287 | .target = V4L2_SEL_TGT_CROP, | |
288 | .r.left = mt9m001->rect.left, | |
289 | .r.top = mt9m001->rect.top, | |
290 | .r.width = mf->width, | |
291 | .r.height = mf->height, | |
09e231b3 | 292 | }; |
6a6c8786 | 293 | int ret; |
09e231b3 GL |
294 | |
295 | /* No support for scaling so far, just crop. TODO: use skipping */ | |
10d5509c | 296 | ret = mt9m001_set_selection(sd, NULL, &sel); |
6a6c8786 | 297 | if (!ret) { |
760697be GL |
298 | mf->width = mt9m001->rect.width; |
299 | mf->height = mt9m001->rect.height; | |
961f0ab7 HV |
300 | mt9m001->fmt = fmt; |
301 | mf->colorspace = fmt->colorspace; | |
6a6c8786 GL |
302 | } |
303 | ||
304 | return ret; | |
09e231b3 GL |
305 | } |
306 | ||
717fd5b4 HV |
307 | static int mt9m001_set_fmt(struct v4l2_subdev *sd, |
308 | struct v4l2_subdev_pad_config *cfg, | |
309 | struct v4l2_subdev_format *format) | |
f523dd0d | 310 | { |
717fd5b4 | 311 | struct v4l2_mbus_framefmt *mf = &format->format; |
c4ce6d14 | 312 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 | 313 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
760697be | 314 | const struct mt9m001_datafmt *fmt; |
64f5905e | 315 | |
717fd5b4 HV |
316 | if (format->pad) |
317 | return -EINVAL; | |
318 | ||
760697be | 319 | v4l_bound_align_image(&mf->width, MT9M001_MIN_WIDTH, |
6a6c8786 | 320 | MT9M001_MAX_WIDTH, 1, |
760697be | 321 | &mf->height, MT9M001_MIN_HEIGHT + mt9m001->y_skip_top, |
32536108 | 322 | MT9M001_MAX_HEIGHT + mt9m001->y_skip_top, 0, 0); |
6a6c8786 | 323 | |
760697be GL |
324 | if (mt9m001->fmts == mt9m001_colour_fmts) |
325 | mf->height = ALIGN(mf->height - 1, 2); | |
326 | ||
327 | fmt = mt9m001_find_datafmt(mf->code, mt9m001->fmts, | |
328 | mt9m001->num_fmts); | |
329 | if (!fmt) { | |
330 | fmt = mt9m001->fmt; | |
331 | mf->code = fmt->code; | |
332 | } | |
333 | ||
334 | mf->colorspace = fmt->colorspace; | |
f523dd0d | 335 | |
717fd5b4 | 336 | if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) |
961f0ab7 | 337 | return mt9m001_s_fmt(sd, fmt, mf); |
717fd5b4 | 338 | cfg->try_fmt = *mf; |
f523dd0d GL |
339 | return 0; |
340 | } | |
341 | ||
f523dd0d | 342 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
979ea1dd GL |
343 | static int mt9m001_g_register(struct v4l2_subdev *sd, |
344 | struct v4l2_dbg_register *reg) | |
f523dd0d | 345 | { |
c4ce6d14 | 346 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
f523dd0d | 347 | |
6be89daa | 348 | if (reg->reg > 0xff) |
f523dd0d GL |
349 | return -EINVAL; |
350 | ||
aecde8b5 | 351 | reg->size = 2; |
9538e1c2 | 352 | reg->val = reg_read(client, reg->reg); |
f523dd0d GL |
353 | |
354 | if (reg->val > 0xffff) | |
355 | return -EIO; | |
356 | ||
357 | return 0; | |
358 | } | |
359 | ||
979ea1dd | 360 | static int mt9m001_s_register(struct v4l2_subdev *sd, |
977ba3b1 | 361 | const struct v4l2_dbg_register *reg) |
f523dd0d | 362 | { |
c4ce6d14 | 363 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
f523dd0d | 364 | |
6be89daa | 365 | if (reg->reg > 0xff) |
f523dd0d GL |
366 | return -EINVAL; |
367 | ||
9538e1c2 | 368 | if (reg_write(client, reg->reg, reg->val) < 0) |
f523dd0d GL |
369 | return -EIO; |
370 | ||
371 | return 0; | |
372 | } | |
373 | #endif | |
374 | ||
4ec10bac LP |
375 | static int mt9m001_s_power(struct v4l2_subdev *sd, int on) |
376 | { | |
377 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
25a34811 | 378 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); |
9aea470b | 379 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
4ec10bac | 380 | |
9aea470b | 381 | return soc_camera_set_power(&client->dev, ssdd, mt9m001->clk, on); |
4ec10bac LP |
382 | } |
383 | ||
2dd7d29c | 384 | static int mt9m001_g_volatile_ctrl(struct v4l2_ctrl *ctrl) |
f523dd0d | 385 | { |
2dd7d29c HV |
386 | struct mt9m001 *mt9m001 = container_of(ctrl->handler, |
387 | struct mt9m001, hdl); | |
388 | s32 min, max; | |
f523dd0d GL |
389 | |
390 | switch (ctrl->id) { | |
f523dd0d | 391 | case V4L2_CID_EXPOSURE_AUTO: |
2dd7d29c HV |
392 | min = mt9m001->exposure->minimum; |
393 | max = mt9m001->exposure->maximum; | |
394 | mt9m001->exposure->val = | |
395 | (524 + (mt9m001->total_h - 1) * (max - min)) / 1048 + min; | |
96c75399 | 396 | break; |
f523dd0d GL |
397 | } |
398 | return 0; | |
399 | } | |
400 | ||
2dd7d29c | 401 | static int mt9m001_s_ctrl(struct v4l2_ctrl *ctrl) |
f523dd0d | 402 | { |
2dd7d29c HV |
403 | struct mt9m001 *mt9m001 = container_of(ctrl->handler, |
404 | struct mt9m001, hdl); | |
405 | struct v4l2_subdev *sd = &mt9m001->subdev; | |
c4ce6d14 | 406 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
2dd7d29c | 407 | struct v4l2_ctrl *exp = mt9m001->exposure; |
f523dd0d GL |
408 | int data; |
409 | ||
f523dd0d GL |
410 | switch (ctrl->id) { |
411 | case V4L2_CID_VFLIP: | |
2dd7d29c | 412 | if (ctrl->val) |
9538e1c2 | 413 | data = reg_set(client, MT9M001_READ_OPTIONS2, 0x8000); |
f523dd0d | 414 | else |
9538e1c2 | 415 | data = reg_clear(client, MT9M001_READ_OPTIONS2, 0x8000); |
f523dd0d GL |
416 | if (data < 0) |
417 | return -EIO; | |
2dd7d29c HV |
418 | return 0; |
419 | ||
f523dd0d | 420 | case V4L2_CID_GAIN: |
f523dd0d | 421 | /* See Datasheet Table 7, Gain settings. */ |
2dd7d29c | 422 | if (ctrl->val <= ctrl->default_value) { |
f523dd0d | 423 | /* Pack it into 0..1 step 0.125, register values 0..8 */ |
2dd7d29c | 424 | unsigned long range = ctrl->default_value - ctrl->minimum; |
0d5e8c43 | 425 | data = ((ctrl->val - (s32)ctrl->minimum) * 8 + range / 2) / range; |
f523dd0d | 426 | |
85f8be68 | 427 | dev_dbg(&client->dev, "Setting gain %d\n", data); |
9538e1c2 | 428 | data = reg_write(client, MT9M001_GLOBAL_GAIN, data); |
f523dd0d GL |
429 | if (data < 0) |
430 | return -EIO; | |
431 | } else { | |
432 | /* Pack it into 1.125..15 variable step, register values 9..67 */ | |
433 | /* We assume qctrl->maximum - qctrl->default_value - 1 > 0 */ | |
2dd7d29c | 434 | unsigned long range = ctrl->maximum - ctrl->default_value - 1; |
0d5e8c43 | 435 | unsigned long gain = ((ctrl->val - (s32)ctrl->default_value - 1) * |
f523dd0d GL |
436 | 111 + range / 2) / range + 9; |
437 | ||
438 | if (gain <= 32) | |
439 | data = gain; | |
440 | else if (gain <= 64) | |
441 | data = ((gain - 32) * 16 + 16) / 32 + 80; | |
442 | else | |
443 | data = ((gain - 64) * 7 + 28) / 56 + 96; | |
444 | ||
85f8be68 | 445 | dev_dbg(&client->dev, "Setting gain from %d to %d\n", |
9538e1c2 GL |
446 | reg_read(client, MT9M001_GLOBAL_GAIN), data); |
447 | data = reg_write(client, MT9M001_GLOBAL_GAIN, data); | |
f523dd0d GL |
448 | if (data < 0) |
449 | return -EIO; | |
450 | } | |
2dd7d29c | 451 | return 0; |
f523dd0d | 452 | |
2dd7d29c HV |
453 | case V4L2_CID_EXPOSURE_AUTO: |
454 | if (ctrl->val == V4L2_EXPOSURE_MANUAL) { | |
455 | unsigned long range = exp->maximum - exp->minimum; | |
0d5e8c43 | 456 | unsigned long shutter = ((exp->val - (s32)exp->minimum) * 1048 + |
f523dd0d GL |
457 | range / 2) / range + 1; |
458 | ||
85f8be68 GL |
459 | dev_dbg(&client->dev, |
460 | "Setting shutter width from %d to %lu\n", | |
2dd7d29c | 461 | reg_read(client, MT9M001_SHUTTER_WIDTH), shutter); |
9538e1c2 | 462 | if (reg_write(client, MT9M001_SHUTTER_WIDTH, shutter) < 0) |
f523dd0d | 463 | return -EIO; |
2dd7d29c | 464 | } else { |
f523dd0d | 465 | const u16 vblank = 25; |
2dd7d29c HV |
466 | |
467 | mt9m001->total_h = mt9m001->rect.height + | |
32536108 | 468 | mt9m001->y_skip_top + vblank; |
2dd7d29c | 469 | if (reg_write(client, MT9M001_SHUTTER_WIDTH, mt9m001->total_h) < 0) |
f523dd0d | 470 | return -EIO; |
2dd7d29c HV |
471 | } |
472 | return 0; | |
f523dd0d | 473 | } |
2dd7d29c | 474 | return -EINVAL; |
f523dd0d GL |
475 | } |
476 | ||
5d28d525 GL |
477 | /* |
478 | * Interface active, can use i2c. If it fails, it can indeed mean, that | |
479 | * this wasn't our capture interface, so, we wait for the right one | |
480 | */ | |
25a34811 | 481 | static int mt9m001_video_probe(struct soc_camera_subdev_desc *ssdd, |
40e2e092 | 482 | struct i2c_client *client) |
f523dd0d | 483 | { |
979ea1dd | 484 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
f523dd0d | 485 | s32 data; |
36034dc3 | 486 | unsigned long flags; |
a4c56fd8 | 487 | int ret; |
f523dd0d | 488 | |
4bbc6d52 LP |
489 | ret = mt9m001_s_power(&mt9m001->subdev, 1); |
490 | if (ret < 0) | |
491 | return ret; | |
492 | ||
f523dd0d | 493 | /* Enable the chip */ |
9538e1c2 | 494 | data = reg_write(client, MT9M001_CHIP_ENABLE, 1); |
85f8be68 | 495 | dev_dbg(&client->dev, "write: %d\n", data); |
f523dd0d GL |
496 | |
497 | /* Read out the chip version register */ | |
9538e1c2 | 498 | data = reg_read(client, MT9M001_CHIP_VERSION); |
f523dd0d GL |
499 | |
500 | /* must be 0x8411 or 0x8421 for colour sensor and 8431 for bw */ | |
501 | switch (data) { | |
502 | case 0x8411: | |
503 | case 0x8421: | |
760697be | 504 | mt9m001->fmts = mt9m001_colour_fmts; |
f523dd0d GL |
505 | break; |
506 | case 0x8431: | |
760697be | 507 | mt9m001->fmts = mt9m001_monochrome_fmts; |
f523dd0d GL |
508 | break; |
509 | default: | |
85f8be68 | 510 | dev_err(&client->dev, |
f523dd0d | 511 | "No MT9M001 chip detected, register read %x\n", data); |
4bbc6d52 LP |
512 | ret = -ENODEV; |
513 | goto done; | |
f523dd0d GL |
514 | } |
515 | ||
760697be | 516 | mt9m001->num_fmts = 0; |
36034dc3 SH |
517 | |
518 | /* | |
519 | * This is a 10bit sensor, so by default we only allow 10bit. | |
520 | * The platform may support different bus widths due to | |
521 | * different routing of the data lines. | |
522 | */ | |
25a34811 GL |
523 | if (ssdd->query_bus_param) |
524 | flags = ssdd->query_bus_param(ssdd); | |
36034dc3 SH |
525 | else |
526 | flags = SOCAM_DATAWIDTH_10; | |
527 | ||
528 | if (flags & SOCAM_DATAWIDTH_10) | |
760697be | 529 | mt9m001->num_fmts++; |
36034dc3 | 530 | else |
760697be | 531 | mt9m001->fmts++; |
36034dc3 SH |
532 | |
533 | if (flags & SOCAM_DATAWIDTH_8) | |
760697be | 534 | mt9m001->num_fmts++; |
36034dc3 | 535 | |
760697be | 536 | mt9m001->fmt = &mt9m001->fmts[0]; |
6a6c8786 | 537 | |
85f8be68 | 538 | dev_info(&client->dev, "Detected a MT9M001 chip ID %x (%s)\n", data, |
f523dd0d GL |
539 | data == 0x8431 ? "C12STM" : "C12ST"); |
540 | ||
a4c56fd8 | 541 | ret = mt9m001_init(client); |
4bbc6d52 | 542 | if (ret < 0) { |
a4c56fd8 | 543 | dev_err(&client->dev, "Failed to initialise the camera\n"); |
4bbc6d52 LP |
544 | goto done; |
545 | } | |
a4c56fd8 | 546 | |
96c75399 | 547 | /* mt9m001_init() has reset the chip, returning registers to defaults */ |
4bbc6d52 LP |
548 | ret = v4l2_ctrl_handler_setup(&mt9m001->hdl); |
549 | ||
550 | done: | |
551 | mt9m001_s_power(&mt9m001->subdev, 0); | |
552 | return ret; | |
f523dd0d GL |
553 | } |
554 | ||
25a34811 | 555 | static void mt9m001_video_remove(struct soc_camera_subdev_desc *ssdd) |
f523dd0d | 556 | { |
25a34811 GL |
557 | if (ssdd->free_bus) |
558 | ssdd->free_bus(ssdd); | |
f523dd0d GL |
559 | } |
560 | ||
32536108 GL |
561 | static int mt9m001_g_skip_top_lines(struct v4l2_subdev *sd, u32 *lines) |
562 | { | |
c4ce6d14 | 563 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
32536108 GL |
564 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
565 | ||
566 | *lines = mt9m001->y_skip_top; | |
567 | ||
568 | return 0; | |
569 | } | |
570 | ||
2dd7d29c HV |
571 | static const struct v4l2_ctrl_ops mt9m001_ctrl_ops = { |
572 | .g_volatile_ctrl = mt9m001_g_volatile_ctrl, | |
573 | .s_ctrl = mt9m001_s_ctrl, | |
574 | }; | |
575 | ||
6713c88f | 576 | static const struct v4l2_subdev_core_ops mt9m001_subdev_core_ops = { |
979ea1dd GL |
577 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
578 | .g_register = mt9m001_g_register, | |
579 | .s_register = mt9m001_s_register, | |
580 | #endif | |
4ec10bac | 581 | .s_power = mt9m001_s_power, |
979ea1dd GL |
582 | }; |
583 | ||
ebcff5fc HV |
584 | static int mt9m001_enum_mbus_code(struct v4l2_subdev *sd, |
585 | struct v4l2_subdev_pad_config *cfg, | |
586 | struct v4l2_subdev_mbus_code_enum *code) | |
760697be | 587 | { |
c4ce6d14 | 588 | struct i2c_client *client = v4l2_get_subdevdata(sd); |
760697be GL |
589 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
590 | ||
ebcff5fc | 591 | if (code->pad || code->index >= mt9m001->num_fmts) |
760697be GL |
592 | return -EINVAL; |
593 | ||
ebcff5fc | 594 | code->code = mt9m001->fmts[code->index].code; |
760697be GL |
595 | return 0; |
596 | } | |
597 | ||
32ca2085 GL |
598 | static int mt9m001_g_mbus_config(struct v4l2_subdev *sd, |
599 | struct v4l2_mbus_config *cfg) | |
600 | { | |
601 | struct i2c_client *client = v4l2_get_subdevdata(sd); | |
25a34811 | 602 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); |
32ca2085 GL |
603 | |
604 | /* MT9M001 has all capture_format parameters fixed */ | |
605 | cfg->flags = V4L2_MBUS_PCLK_SAMPLE_FALLING | | |
606 | V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH | | |
607 | V4L2_MBUS_DATA_ACTIVE_HIGH | V4L2_MBUS_MASTER; | |
608 | cfg->type = V4L2_MBUS_PARALLEL; | |
25a34811 | 609 | cfg->flags = soc_camera_apply_board_flags(ssdd, cfg); |
32ca2085 GL |
610 | |
611 | return 0; | |
612 | } | |
613 | ||
614 | static int mt9m001_s_mbus_config(struct v4l2_subdev *sd, | |
615 | const struct v4l2_mbus_config *cfg) | |
616 | { | |
14178aa5 | 617 | const struct i2c_client *client = v4l2_get_subdevdata(sd); |
25a34811 | 618 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); |
443f483a GL |
619 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
620 | unsigned int bps = soc_mbus_get_fmtdesc(mt9m001->fmt->code)->bits_per_sample; | |
32ca2085 | 621 | |
25a34811 GL |
622 | if (ssdd->set_bus_param) |
623 | return ssdd->set_bus_param(ssdd, 1 << (bps - 1)); | |
32ca2085 GL |
624 | |
625 | /* | |
626 | * Without board specific bus width settings we only support the | |
627 | * sensors native bus width | |
628 | */ | |
629 | return bps == 10 ? 0 : -EINVAL; | |
630 | } | |
631 | ||
6713c88f | 632 | static const struct v4l2_subdev_video_ops mt9m001_subdev_video_ops = { |
979ea1dd | 633 | .s_stream = mt9m001_s_stream, |
32ca2085 GL |
634 | .g_mbus_config = mt9m001_g_mbus_config, |
635 | .s_mbus_config = mt9m001_s_mbus_config, | |
979ea1dd GL |
636 | }; |
637 | ||
368a53df | 638 | static const struct v4l2_subdev_sensor_ops mt9m001_subdev_sensor_ops = { |
32536108 GL |
639 | .g_skip_top_lines = mt9m001_g_skip_top_lines, |
640 | }; | |
641 | ||
ebcff5fc HV |
642 | static const struct v4l2_subdev_pad_ops mt9m001_subdev_pad_ops = { |
643 | .enum_mbus_code = mt9m001_enum_mbus_code, | |
10d5509c HV |
644 | .get_selection = mt9m001_get_selection, |
645 | .set_selection = mt9m001_set_selection, | |
da298c6d | 646 | .get_fmt = mt9m001_get_fmt, |
717fd5b4 | 647 | .set_fmt = mt9m001_set_fmt, |
ebcff5fc HV |
648 | }; |
649 | ||
6713c88f | 650 | static const struct v4l2_subdev_ops mt9m001_subdev_ops = { |
979ea1dd GL |
651 | .core = &mt9m001_subdev_core_ops, |
652 | .video = &mt9m001_subdev_video_ops, | |
32536108 | 653 | .sensor = &mt9m001_subdev_sensor_ops, |
ebcff5fc | 654 | .pad = &mt9m001_subdev_pad_ops, |
979ea1dd GL |
655 | }; |
656 | ||
d2653e92 JD |
657 | static int mt9m001_probe(struct i2c_client *client, |
658 | const struct i2c_device_id *did) | |
f523dd0d GL |
659 | { |
660 | struct mt9m001 *mt9m001; | |
f523dd0d | 661 | struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent); |
25a34811 | 662 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); |
f523dd0d GL |
663 | int ret; |
664 | ||
25a34811 | 665 | if (!ssdd) { |
f523dd0d GL |
666 | dev_err(&client->dev, "MT9M001 driver needs platform data\n"); |
667 | return -EINVAL; | |
668 | } | |
669 | ||
670 | if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_WORD_DATA)) { | |
671 | dev_warn(&adapter->dev, | |
672 | "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n"); | |
673 | return -EIO; | |
674 | } | |
675 | ||
70e176a5 | 676 | mt9m001 = devm_kzalloc(&client->dev, sizeof(struct mt9m001), GFP_KERNEL); |
f523dd0d GL |
677 | if (!mt9m001) |
678 | return -ENOMEM; | |
679 | ||
979ea1dd | 680 | v4l2_i2c_subdev_init(&mt9m001->subdev, client, &mt9m001_subdev_ops); |
2dd7d29c HV |
681 | v4l2_ctrl_handler_init(&mt9m001->hdl, 4); |
682 | v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops, | |
683 | V4L2_CID_VFLIP, 0, 1, 1, 0); | |
684 | v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops, | |
685 | V4L2_CID_GAIN, 0, 127, 1, 64); | |
686 | mt9m001->exposure = v4l2_ctrl_new_std(&mt9m001->hdl, &mt9m001_ctrl_ops, | |
687 | V4L2_CID_EXPOSURE, 1, 255, 1, 255); | |
688 | /* | |
689 | * Simulated autoexposure. If enabled, we calculate shutter width | |
690 | * ourselves in the driver based on vertical blanking and frame width | |
691 | */ | |
692 | mt9m001->autoexposure = v4l2_ctrl_new_std_menu(&mt9m001->hdl, | |
693 | &mt9m001_ctrl_ops, V4L2_CID_EXPOSURE_AUTO, 1, 0, | |
694 | V4L2_EXPOSURE_AUTO); | |
695 | mt9m001->subdev.ctrl_handler = &mt9m001->hdl; | |
70e176a5 GL |
696 | if (mt9m001->hdl.error) |
697 | return mt9m001->hdl.error; | |
f523dd0d | 698 | |
2dd7d29c HV |
699 | v4l2_ctrl_auto_cluster(2, &mt9m001->autoexposure, |
700 | V4L2_EXPOSURE_MANUAL, true); | |
6a6c8786 | 701 | |
2dd7d29c | 702 | /* Second stage probe - when a capture adapter is there */ |
32536108 | 703 | mt9m001->y_skip_top = 0; |
6a6c8786 GL |
704 | mt9m001->rect.left = MT9M001_COLUMN_SKIP; |
705 | mt9m001->rect.top = MT9M001_ROW_SKIP; | |
706 | mt9m001->rect.width = MT9M001_MAX_WIDTH; | |
707 | mt9m001->rect.height = MT9M001_MAX_HEIGHT; | |
708 | ||
9aea470b GL |
709 | mt9m001->clk = v4l2_clk_get(&client->dev, "mclk"); |
710 | if (IS_ERR(mt9m001->clk)) { | |
711 | ret = PTR_ERR(mt9m001->clk); | |
712 | goto eclkget; | |
713 | } | |
714 | ||
25a34811 | 715 | ret = mt9m001_video_probe(ssdd, client); |
9aea470b GL |
716 | if (ret) { |
717 | v4l2_clk_put(mt9m001->clk); | |
718 | eclkget: | |
2dd7d29c | 719 | v4l2_ctrl_handler_free(&mt9m001->hdl); |
9aea470b | 720 | } |
f523dd0d | 721 | |
f523dd0d GL |
722 | return ret; |
723 | } | |
724 | ||
725 | static int mt9m001_remove(struct i2c_client *client) | |
726 | { | |
979ea1dd | 727 | struct mt9m001 *mt9m001 = to_mt9m001(client); |
25a34811 | 728 | struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client); |
f523dd0d | 729 | |
9aea470b | 730 | v4l2_clk_put(mt9m001->clk); |
2dd7d29c HV |
731 | v4l2_device_unregister_subdev(&mt9m001->subdev); |
732 | v4l2_ctrl_handler_free(&mt9m001->hdl); | |
25a34811 | 733 | mt9m001_video_remove(ssdd); |
f523dd0d GL |
734 | |
735 | return 0; | |
736 | } | |
737 | ||
3760f736 JD |
738 | static const struct i2c_device_id mt9m001_id[] = { |
739 | { "mt9m001", 0 }, | |
740 | { } | |
741 | }; | |
742 | MODULE_DEVICE_TABLE(i2c, mt9m001_id); | |
743 | ||
f523dd0d GL |
744 | static struct i2c_driver mt9m001_i2c_driver = { |
745 | .driver = { | |
746 | .name = "mt9m001", | |
747 | }, | |
748 | .probe = mt9m001_probe, | |
749 | .remove = mt9m001_remove, | |
3760f736 | 750 | .id_table = mt9m001_id, |
f523dd0d GL |
751 | }; |
752 | ||
c6e8d86f | 753 | module_i2c_driver(mt9m001_i2c_driver); |
f523dd0d GL |
754 | |
755 | MODULE_DESCRIPTION("Micron MT9M001 Camera driver"); | |
756 | MODULE_AUTHOR("Guennadi Liakhovetski <kernel@pengutronix.de>"); | |
757 | MODULE_LICENSE("GPL"); |