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[mirror_ubuntu-kernels.git] / drivers / media / i2c / soc_camera / soc_rj54n1cb0c.c
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8f37cf25 1/*
0172fea3 2 * Driver for RJ54N1CB0C CMOS Image Sensor from Sharp
8f37cf25
GL		 3 *
4 * Copyright (C) 2009, Guennadi Liakhovetski <g.liakhovetski@gmx.de>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 */
10
11#include <linux/delay.h>
12#include <linux/i2c.h>
13#include <linux/slab.h>
95d20109 14#include <linux/v4l2-mediabus.h>
8f37cf25 15#include <linux/videodev2.h>
7a707b89 16#include <linux/module.h>
8f37cf25 17
b5dcee22 18#include <media/i2c/rj54n1cb0c.h>
8f37cf25 19#include <media/soc_camera.h>
9aea470b 20#include <media/v4l2-clk.h>
a6b5f200 21#include <media/v4l2-subdev.h>
25e965ad 22#include <media/v4l2-ctrls.h>
8f37cf25
GL		 23
24#define RJ54N1_DEV_CODE 0x0400
25#define RJ54N1_DEV_CODE2 0x0401
26#define RJ54N1_OUT_SEL 0x0403
27#define RJ54N1_XY_OUTPUT_SIZE_S_H 0x0404
28#define RJ54N1_X_OUTPUT_SIZE_S_L 0x0405
29#define RJ54N1_Y_OUTPUT_SIZE_S_L 0x0406
30#define RJ54N1_XY_OUTPUT_SIZE_P_H 0x0407
31#define RJ54N1_X_OUTPUT_SIZE_P_L 0x0408
32#define RJ54N1_Y_OUTPUT_SIZE_P_L 0x0409
33#define RJ54N1_LINE_LENGTH_PCK_S_H 0x040a
34#define RJ54N1_LINE_LENGTH_PCK_S_L 0x040b
35#define RJ54N1_LINE_LENGTH_PCK_P_H 0x040c
36#define RJ54N1_LINE_LENGTH_PCK_P_L 0x040d
37#define RJ54N1_RESIZE_N 0x040e
38#define RJ54N1_RESIZE_N_STEP 0x040f
39#define RJ54N1_RESIZE_STEP 0x0410
40#define RJ54N1_RESIZE_HOLD_H 0x0411
41#define RJ54N1_RESIZE_HOLD_L 0x0412
42#define RJ54N1_H_OBEN_OFS 0x0413
43#define RJ54N1_V_OBEN_OFS 0x0414
44#define RJ54N1_RESIZE_CONTROL 0x0415
a6b5f200 45#define RJ54N1_STILL_CONTROL 0x0417
8f37cf25
GL		 46#define RJ54N1_INC_USE_SEL_H 0x0425
47#define RJ54N1_INC_USE_SEL_L 0x0426
48#define RJ54N1_MIRROR_STILL_MODE 0x0427
49#define RJ54N1_INIT_START 0x0428
50#define RJ54N1_SCALE_1_2_LEV 0x0429
51#define RJ54N1_SCALE_4_LEV 0x042a
52#define RJ54N1_Y_GAIN 0x04d8
53#define RJ54N1_APT_GAIN_UP 0x04fa
54#define RJ54N1_RA_SEL_UL 0x0530
55#define RJ54N1_BYTE_SWAP 0x0531
56#define RJ54N1_OUT_SIGPO 0x053b
a6b5f200
GL		 57#define RJ54N1_WB_SEL_WEIGHT_I 0x054e
58#define RJ54N1_BIT8_WB 0x0569
59#define RJ54N1_HCAPS_WB 0x056a
60#define RJ54N1_VCAPS_WB 0x056b
61#define RJ54N1_HCAPE_WB 0x056c
62#define RJ54N1_VCAPE_WB 0x056d
63#define RJ54N1_EXPOSURE_CONTROL 0x058c
8f37cf25
GL		 64#define RJ54N1_FRAME_LENGTH_S_H 0x0595
65#define RJ54N1_FRAME_LENGTH_S_L 0x0596
66#define RJ54N1_FRAME_LENGTH_P_H 0x0597
67#define RJ54N1_FRAME_LENGTH_P_L 0x0598
a6b5f200
GL		 68#define RJ54N1_PEAK_H 0x05b7
69#define RJ54N1_PEAK_50 0x05b8
70#define RJ54N1_PEAK_60 0x05b9
71#define RJ54N1_PEAK_DIFF 0x05ba
8f37cf25
GL		 72#define RJ54N1_IOC 0x05ef
73#define RJ54N1_TG_BYPASS 0x0700
74#define RJ54N1_PLL_L 0x0701
75#define RJ54N1_PLL_N 0x0702
76#define RJ54N1_PLL_EN 0x0704
77#define RJ54N1_RATIO_TG 0x0706
78#define RJ54N1_RATIO_T 0x0707
79#define RJ54N1_RATIO_R 0x0708
80#define RJ54N1_RAMP_TGCLK_EN 0x0709
81#define RJ54N1_OCLK_DSP 0x0710
82#define RJ54N1_RATIO_OP 0x0711
83#define RJ54N1_RATIO_O 0x0712
84#define RJ54N1_OCLK_SEL_EN 0x0713
85#define RJ54N1_CLK_RST 0x0717
86#define RJ54N1_RESET_STANDBY 0x0718
a6b5f200 87#define RJ54N1_FWFLG 0x07fe
8f37cf25
GL		 88
89#define E_EXCLK (1 << 7)
90#define SOFT_STDBY (1 << 4)
91#define SEN_RSTX (1 << 2)
92#define TG_RSTX (1 << 1)
93#define DSP_RSTX (1 << 0)
94
95#define RESIZE_HOLD_SEL (1 << 2)
96#define RESIZE_GO (1 << 1)
97
a6b5f200
GL		 98/*
99 * When cropping, the camera automatically centers the cropped region, there
100 * doesn't seem to be a way to specify an explicit location of the rectangle.
101 */
8f37cf25
GL		 102#define RJ54N1_COLUMN_SKIP 0
103#define RJ54N1_ROW_SKIP 0
104#define RJ54N1_MAX_WIDTH 1600
105#define RJ54N1_MAX_HEIGHT 1200
106
a6b5f200
GL		 107#define PLL_L 2
108#define PLL_N 0x31
109
8f37cf25
GL		 110/* I2C addresses: 0x50, 0x51, 0x60, 0x61 */
111
760697be
GL		 112/* RJ54N1CB0C has only one fixed colorspace per pixelcode */
113struct rj54n1_datafmt {
f5fe58fd 114 u32 code;
760697be
GL		 115 enum v4l2_colorspace colorspace;
116};
117
118/* Find a data format by a pixel code in an array */
119static const struct rj54n1_datafmt *rj54n1_find_datafmt(
f5fe58fd 120 u32 code, const struct rj54n1_datafmt *fmt,
760697be
GL		 121 int n)
122{
123 int i;
124 for (i = 0; i < n; i++)
125 if (fmt[i].code == code)
126 return fmt + i;
127
128 return NULL;
129}
130
131static const struct rj54n1_datafmt rj54n1_colour_fmts[] = {
f5fe58fd
BB		 132 {MEDIA_BUS_FMT_YUYV8_2X8, V4L2_COLORSPACE_JPEG},
133 {MEDIA_BUS_FMT_YVYU8_2X8, V4L2_COLORSPACE_JPEG},
134 {MEDIA_BUS_FMT_RGB565_2X8_LE, V4L2_COLORSPACE_SRGB},
135 {MEDIA_BUS_FMT_RGB565_2X8_BE, V4L2_COLORSPACE_SRGB},
136 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE, V4L2_COLORSPACE_SRGB},
137 {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE, V4L2_COLORSPACE_SRGB},
138 {MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE, V4L2_COLORSPACE_SRGB},
139 {MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE, V4L2_COLORSPACE_SRGB},
140 {MEDIA_BUS_FMT_SBGGR10_1X10, V4L2_COLORSPACE_SRGB},
8f37cf25
GL		 141};
142
143struct rj54n1_clock_div {
a6b5f200 144 u8 ratio_tg; /* can be 0 or an odd number */
8f37cf25
GL		 145 u8 ratio_t;
146 u8 ratio_r;
147 u8 ratio_op;
148 u8 ratio_o;
149};
150
151struct rj54n1 {
152 struct v4l2_subdev subdev;
25e965ad 153 struct v4l2_ctrl_handler hdl;
9aea470b 154 struct v4l2_clk *clk;
a6b5f200 155 struct rj54n1_clock_div clk_div;
760697be 156 const struct rj54n1_datafmt *fmt;
8f37cf25 157 struct v4l2_rect rect; /* Sensor window */
a6b5f200
GL		 158 unsigned int tgclk_mhz;
159 bool auto_wb;
8f37cf25
GL		 160 unsigned short width; /* Output window */
161 unsigned short height;
162 unsigned short resize; /* Sensor * 1024 / resize = Output */
8f37cf25
GL		 163 unsigned short scale;
164 u8 bank;
165};
166
167struct rj54n1_reg_val {
168 u16 reg;
169 u8 val;
170};
171
9d68e8de 172static const struct rj54n1_reg_val bank_4[] = {
8f37cf25
GL		 173 {0x417, 0},
174 {0x42c, 0},
175 {0x42d, 0xf0},
176 {0x42e, 0},
177 {0x42f, 0x50},
178 {0x430, 0xf5},
179 {0x431, 0x16},
180 {0x432, 0x20},
181 {0x433, 0},
182 {0x434, 0xc8},
183 {0x43c, 8},
184 {0x43e, 0x90},
185 {0x445, 0x83},
186 {0x4ba, 0x58},
187 {0x4bb, 4},
188 {0x4bc, 0x20},
189 {0x4db, 4},
190 {0x4fe, 2},
191};
192
9d68e8de 193static const struct rj54n1_reg_val bank_5[] = {
8f37cf25
GL		 194 {0x514, 0},
195 {0x516, 0},
196 {0x518, 0},
197 {0x51a, 0},
198 {0x51d, 0xff},
199 {0x56f, 0x28},
200 {0x575, 0x40},
201 {0x5bc, 0x48},
202 {0x5c1, 6},
203 {0x5e5, 0x11},
204 {0x5e6, 0x43},
205 {0x5e7, 0x33},
206 {0x5e8, 0x21},
207 {0x5e9, 0x30},
208 {0x5ea, 0x0},
209 {0x5eb, 0xa5},
210 {0x5ec, 0xff},
211 {0x5fe, 2},
212};
213
9d68e8de 214static const struct rj54n1_reg_val bank_7[] = {
8f37cf25
GL		 215 {0x70a, 0},
216 {0x714, 0xff},
217 {0x715, 0xff},
218 {0x716, 0x1f},
a6b5f200 219 {0x7FE, 2},
8f37cf25
GL		 220};
221
9d68e8de 222static const struct rj54n1_reg_val bank_8[] = {
8f37cf25
GL		 223 {0x800, 0x00},
224 {0x801, 0x01},
225 {0x802, 0x61},
226 {0x805, 0x00},
227 {0x806, 0x00},
228 {0x807, 0x00},
229 {0x808, 0x00},
230 {0x809, 0x01},
231 {0x80A, 0x61},
232 {0x80B, 0x00},
233 {0x80C, 0x01},
234 {0x80D, 0x00},
235 {0x80E, 0x00},
236 {0x80F, 0x00},
237 {0x810, 0x00},
238 {0x811, 0x01},
239 {0x812, 0x61},
240 {0x813, 0x00},
241 {0x814, 0x11},
242 {0x815, 0x00},
243 {0x816, 0x41},
244 {0x817, 0x00},
245 {0x818, 0x51},
246 {0x819, 0x01},
247 {0x81A, 0x1F},
248 {0x81B, 0x00},
249 {0x81C, 0x01},
250 {0x81D, 0x00},
251 {0x81E, 0x11},
252 {0x81F, 0x00},
253 {0x820, 0x41},
254 {0x821, 0x00},
255 {0x822, 0x51},
256 {0x823, 0x00},
257 {0x824, 0x00},
258 {0x825, 0x00},
259 {0x826, 0x47},
260 {0x827, 0x01},
261 {0x828, 0x4F},
262 {0x829, 0x00},
263 {0x82A, 0x00},
264 {0x82B, 0x00},
265 {0x82C, 0x30},
266 {0x82D, 0x00},
267 {0x82E, 0x40},
268 {0x82F, 0x00},
269 {0x830, 0xB3},
270 {0x831, 0x00},
271 {0x832, 0xE3},
272 {0x833, 0x00},
273 {0x834, 0x00},
274 {0x835, 0x00},
275 {0x836, 0x00},
276 {0x837, 0x00},
277 {0x838, 0x00},
278 {0x839, 0x01},
279 {0x83A, 0x61},
280 {0x83B, 0x00},
281 {0x83C, 0x01},
282 {0x83D, 0x00},
283 {0x83E, 0x00},
284 {0x83F, 0x00},
285 {0x840, 0x00},
286 {0x841, 0x01},
287 {0x842, 0x61},
288 {0x843, 0x00},
289 {0x844, 0x1D},
290 {0x845, 0x00},
291 {0x846, 0x00},
292 {0x847, 0x00},
293 {0x848, 0x00},
294 {0x849, 0x01},
295 {0x84A, 0x1F},
296 {0x84B, 0x00},
297 {0x84C, 0x05},
298 {0x84D, 0x00},
299 {0x84E, 0x19},
300 {0x84F, 0x01},
301 {0x850, 0x21},
302 {0x851, 0x01},
303 {0x852, 0x5D},
304 {0x853, 0x00},
305 {0x854, 0x00},
306 {0x855, 0x00},
307 {0x856, 0x19},
308 {0x857, 0x01},
309 {0x858, 0x21},
310 {0x859, 0x00},
311 {0x85A, 0x00},
312 {0x85B, 0x00},
313 {0x85C, 0x00},
314 {0x85D, 0x00},
315 {0x85E, 0x00},
316 {0x85F, 0x00},
317 {0x860, 0xB3},
318 {0x861, 0x00},
319 {0x862, 0xE3},
320 {0x863, 0x00},
321 {0x864, 0x00},
322 {0x865, 0x00},
323 {0x866, 0x00},
324 {0x867, 0x00},
325 {0x868, 0x00},
326 {0x869, 0xE2},
327 {0x86A, 0x00},
328 {0x86B, 0x01},
329 {0x86C, 0x06},
330 {0x86D, 0x00},
331 {0x86E, 0x00},
332 {0x86F, 0x00},
333 {0x870, 0x60},
334 {0x871, 0x8C},
335 {0x872, 0x10},
336 {0x873, 0x00},
337 {0x874, 0xE0},
338 {0x875, 0x00},
339 {0x876, 0x27},
340 {0x877, 0x01},
341 {0x878, 0x00},
342 {0x879, 0x00},
343 {0x87A, 0x00},
344 {0x87B, 0x03},
345 {0x87C, 0x00},
346 {0x87D, 0x00},
347 {0x87E, 0x00},
348 {0x87F, 0x00},
349 {0x880, 0x00},
350 {0x881, 0x00},
351 {0x882, 0x00},
352 {0x883, 0x00},
353 {0x884, 0x00},
354 {0x885, 0x00},
355 {0x886, 0xF8},
356 {0x887, 0x00},
357 {0x888, 0x03},
358 {0x889, 0x00},
359 {0x88A, 0x64},
360 {0x88B, 0x00},
361 {0x88C, 0x03},
362 {0x88D, 0x00},
363 {0x88E, 0xB1},
364 {0x88F, 0x00},
365 {0x890, 0x03},
366 {0x891, 0x01},
367 {0x892, 0x1D},
368 {0x893, 0x00},
369 {0x894, 0x03},
370 {0x895, 0x01},
371 {0x896, 0x4B},
372 {0x897, 0x00},
373 {0x898, 0xE5},
374 {0x899, 0x00},
375 {0x89A, 0x01},
376 {0x89B, 0x00},
377 {0x89C, 0x01},
378 {0x89D, 0x04},
379 {0x89E, 0xC8},
380 {0x89F, 0x00},
381 {0x8A0, 0x01},
382 {0x8A1, 0x01},
383 {0x8A2, 0x61},
384 {0x8A3, 0x00},
385 {0x8A4, 0x01},
386 {0x8A5, 0x00},
387 {0x8A6, 0x00},
388 {0x8A7, 0x00},
389 {0x8A8, 0x00},
390 {0x8A9, 0x00},
391 {0x8AA, 0x7F},
392 {0x8AB, 0x03},
393 {0x8AC, 0x00},
394 {0x8AD, 0x00},
395 {0x8AE, 0x00},
396 {0x8AF, 0x00},
397 {0x8B0, 0x00},
398 {0x8B1, 0x00},
399 {0x8B6, 0x00},
400 {0x8B7, 0x01},
401 {0x8B8, 0x00},
402 {0x8B9, 0x00},
403 {0x8BA, 0x02},
404 {0x8BB, 0x00},
405 {0x8BC, 0xFF},
406 {0x8BD, 0x00},
a6b5f200 407 {0x8FE, 2},
8f37cf25
GL		 408};
409
9d68e8de 410static const struct rj54n1_reg_val bank_10[] = {
8f37cf25
GL		 411 {0x10bf, 0x69}
412};
413
414/* Clock dividers - these are default register values, divider = register + 1 */
9d68e8de 415static const struct rj54n1_clock_div clk_div = {
8f37cf25
GL		 416 .ratio_tg = 3 /* default: 5 */,
417 .ratio_t = 4 /* default: 1 */,
418 .ratio_r = 4 /* default: 0 */,
419 .ratio_op = 1 /* default: 5 */,
420 .ratio_o = 9 /* default: 0 */,
421};
422
423static struct rj54n1 *to_rj54n1(const struct i2c_client *client)
424{
425 return container_of(i2c_get_clientdata(client), struct rj54n1, subdev);
426}
427
428static int reg_read(struct i2c_client *client, const u16 reg)
429{
430 struct rj54n1 *rj54n1 = to_rj54n1(client);
431 int ret;
432
433 /* set bank */
434 if (rj54n1->bank != reg >> 8) {
435 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
436 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
437 if (ret < 0)
438 return ret;
439 rj54n1->bank = reg >> 8;
440 }
441 return i2c_smbus_read_byte_data(client, reg & 0xff);
442}
443
444static int reg_write(struct i2c_client *client, const u16 reg,
445 const u8 data)
446{
447 struct rj54n1 *rj54n1 = to_rj54n1(client);
448 int ret;
449
450 /* set bank */
451 if (rj54n1->bank != reg >> 8) {
452 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", 0xff, reg >> 8);
453 ret = i2c_smbus_write_byte_data(client, 0xff, reg >> 8);
454 if (ret < 0)
455 return ret;
456 rj54n1->bank = reg >> 8;
457 }
458 dev_dbg(&client->dev, "[0x%x] = 0x%x\n", reg & 0xff, data);
459 return i2c_smbus_write_byte_data(client, reg & 0xff, data);
460}
461
462static int reg_set(struct i2c_client *client, const u16 reg,
463 const u8 data, const u8 mask)
464{
465 int ret;
466
467 ret = reg_read(client, reg);
468 if (ret < 0)
469 return ret;
470 return reg_write(client, reg, (ret & ~mask) | (data & mask));
471}
472
473static int reg_write_multiple(struct i2c_client *client,
474 const struct rj54n1_reg_val *rv, const int n)
475{
476 int i, ret;
477
478 for (i = 0; i < n; i++) {
479 ret = reg_write(client, rv->reg, rv->val);
480 if (ret < 0)
481 return ret;
482 rv++;
483 }
484
485 return 0;
486}
487
ebcff5fc
HV		 488static int rj54n1_enum_mbus_code(struct v4l2_subdev *sd,
489 struct v4l2_subdev_pad_config *cfg,
490 struct v4l2_subdev_mbus_code_enum *code)
760697be 491{
ebcff5fc 492 if (code->pad || code->index >= ARRAY_SIZE(rj54n1_colour_fmts))
760697be
GL		 493 return -EINVAL;
494
ebcff5fc 495 code->code = rj54n1_colour_fmts[code->index].code;
760697be
GL		 496 return 0;
497}
498
8f37cf25
GL		 499static int rj54n1_s_stream(struct v4l2_subdev *sd, int enable)
500{
c4ce6d14 501 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200
GL		 502
503 /* Switch between preview and still shot modes */
504 return reg_set(client, RJ54N1_STILL_CONTROL, (!enable) << 7, 0x80);
8f37cf25
GL		 505}
506
8f37cf25
GL		 507static int rj54n1_set_rect(struct i2c_client *client,
508 u16 reg_x, u16 reg_y, u16 reg_xy,
509 u32 width, u32 height)
510{
511 int ret;
512
513 ret = reg_write(client, reg_xy,
514 ((width >> 4) & 0x70) |
515 ((height >> 8) & 7));
516
517 if (!ret)
518 ret = reg_write(client, reg_x, width & 0xff);
519 if (!ret)
520 ret = reg_write(client, reg_y, height & 0xff);
521
522 return ret;
523}
524
525/*
526 * Some commands, specifically certain initialisation sequences, require
527 * a commit operation.
528 */
529static int rj54n1_commit(struct i2c_client *client)
530{
531 int ret = reg_write(client, RJ54N1_INIT_START, 1);
532 msleep(10);
533 if (!ret)
534 ret = reg_write(client, RJ54N1_INIT_START, 0);
535 return ret;
536}
537
e26b3144
MN		 538static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
539 s32 *out_w, s32 *out_h);
a6b5f200 540
10d5509c
HV		 541static int rj54n1_set_selection(struct v4l2_subdev *sd,
542 struct v4l2_subdev_pad_config *cfg,
543 struct v4l2_subdev_selection *sel)
a6b5f200 544{
c4ce6d14 545 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200 546 struct rj54n1 *rj54n1 = to_rj54n1(client);
10d5509c 547 const struct v4l2_rect *rect = &sel->r;
e26b3144 548 int dummy = 0, output_w, output_h,
a6b5f200
GL		 549 input_w = rect->width, input_h = rect->height;
550 int ret;
551
10d5509c
HV		 552 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
553 sel->target != V4L2_SEL_TGT_CROP)
554 return -EINVAL;
555
a6b5f200
GL		 556 /* arbitrary minimum width and height, edges unimportant */
557 soc_camera_limit_side(&dummy, &input_w,
558 RJ54N1_COLUMN_SKIP, 8, RJ54N1_MAX_WIDTH);
559
560 soc_camera_limit_side(&dummy, &input_h,
561 RJ54N1_ROW_SKIP, 8, RJ54N1_MAX_HEIGHT);
562
563 output_w = (input_w * 1024 + rj54n1->resize / 2) / rj54n1->resize;
564 output_h = (input_h * 1024 + rj54n1->resize / 2) / rj54n1->resize;
565
e26b3144 566 dev_dbg(&client->dev, "Scaling for %dx%d : %u = %dx%d\n",
a6b5f200
GL		 567 input_w, input_h, rj54n1->resize, output_w, output_h);
568
569 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
570 if (ret < 0)
571 return ret;
572
573 rj54n1->width = output_w;
574 rj54n1->height = output_h;
575 rj54n1->resize = ret;
576 rj54n1->rect.width = input_w;
577 rj54n1->rect.height = input_h;
578
579 return 0;
580}
581
10d5509c
HV		 582static int rj54n1_get_selection(struct v4l2_subdev *sd,
583 struct v4l2_subdev_pad_config *cfg,
584 struct v4l2_subdev_selection *sel)
8f37cf25 585{
c4ce6d14 586 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 587 struct rj54n1 *rj54n1 = to_rj54n1(client);
588
10d5509c
HV		 589 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
590 return -EINVAL;
8f37cf25 591
10d5509c
HV		 592 switch (sel->target) {
593 case V4L2_SEL_TGT_CROP_BOUNDS:
10d5509c
HV		 594 sel->r.left = RJ54N1_COLUMN_SKIP;
595 sel->r.top = RJ54N1_ROW_SKIP;
596 sel->r.width = RJ54N1_MAX_WIDTH;
597 sel->r.height = RJ54N1_MAX_HEIGHT;
598 return 0;
599 case V4L2_SEL_TGT_CROP:
600 sel->r = rj54n1->rect;
601 return 0;
602 default:
603 return -EINVAL;
604 }
8f37cf25
GL		 605}
606
da298c6d
HV		 607static int rj54n1_get_fmt(struct v4l2_subdev *sd,
608 struct v4l2_subdev_pad_config *cfg,
609 struct v4l2_subdev_format *format)
8f37cf25 610{
da298c6d 611 struct v4l2_mbus_framefmt *mf = &format->format;
c4ce6d14 612 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25 613 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25 614
da298c6d
HV		 615 if (format->pad)
616 return -EINVAL;
617
760697be
GL		 618 mf->code = rj54n1->fmt->code;
619 mf->colorspace = rj54n1->fmt->colorspace;
620 mf->field = V4L2_FIELD_NONE;
621 mf->width = rj54n1->width;
622 mf->height = rj54n1->height;
8f37cf25
GL		 623
624 return 0;
625}
626
627/*
628 * The actual geometry configuration routine. It scales the input window into
629 * the output one, updates the window sizes and returns an error or the resize
630 * coefficient on success. Note: we only use the "Fixed Scaling" on this camera.
631 */
e26b3144
MN		 632static int rj54n1_sensor_scale(struct v4l2_subdev *sd, s32 *in_w, s32 *in_h,
633 s32 *out_w, s32 *out_h)
8f37cf25 634{
c4ce6d14 635 struct i2c_client *client = v4l2_get_subdevdata(sd);
a6b5f200 636 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25
GL		 637 unsigned int skip, resize, input_w = *in_w, input_h = *in_h,
638 output_w = *out_w, output_h = *out_h;
a6b5f200
GL		 639 u16 inc_sel, wb_bit8, wb_left, wb_right, wb_top, wb_bottom;
640 unsigned int peak, peak_50, peak_60;
8f37cf25
GL		 641 int ret;
642
a6b5f200
GL		 643 /*
644 * We have a problem with crops, where the window is larger than 512x384
645 * and output window is larger than a half of the input one. In this
646 * case we have to either reduce the input window to equal or below
647 * 512x384 or the output window to equal or below 1/2 of the input.
648 */
649 if (output_w > max(512U, input_w / 2)) {
650 if (2 * output_w > RJ54N1_MAX_WIDTH) {
651 input_w = RJ54N1_MAX_WIDTH;
652 output_w = RJ54N1_MAX_WIDTH / 2;
653 } else {
654 input_w = output_w * 2;
655 }
656
657 dev_dbg(&client->dev, "Adjusted output width: in %u, out %u\n",
658 input_w, output_w);
659 }
660
661 if (output_h > max(384U, input_h / 2)) {
662 if (2 * output_h > RJ54N1_MAX_HEIGHT) {
663 input_h = RJ54N1_MAX_HEIGHT;
664 output_h = RJ54N1_MAX_HEIGHT / 2;
665 } else {
666 input_h = output_h * 2;
667 }
668
669 dev_dbg(&client->dev, "Adjusted output height: in %u, out %u\n",
670 input_h, output_h);
671 }
672
673 /* Idea: use the read mode for snapshots, handle separate geometries */
8f37cf25
GL		 674 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_S_L,
675 RJ54N1_Y_OUTPUT_SIZE_S_L,
676 RJ54N1_XY_OUTPUT_SIZE_S_H, output_w, output_h);
677 if (!ret)
678 ret = rj54n1_set_rect(client, RJ54N1_X_OUTPUT_SIZE_P_L,
679 RJ54N1_Y_OUTPUT_SIZE_P_L,
680 RJ54N1_XY_OUTPUT_SIZE_P_H, output_w, output_h);
681
682 if (ret < 0)
683 return ret;
684
a6b5f200 685 if (output_w > input_w && output_h > input_h) {
8f37cf25
GL		 686 input_w = output_w;
687 input_h = output_h;
688
689 resize = 1024;
690 } else {
691 unsigned int resize_x, resize_y;
a6b5f200
GL		 692 resize_x = (input_w * 1024 + output_w / 2) / output_w;
693 resize_y = (input_h * 1024 + output_h / 2) / output_h;
694
695 /* We want max(resize_x, resize_y), check if it still fits */
696 if (resize_x > resize_y &&
697 (output_h * resize_x + 512) / 1024 > RJ54N1_MAX_HEIGHT)
698 resize = (RJ54N1_MAX_HEIGHT * 1024 + output_h / 2) /
699 output_h;
700 else if (resize_y > resize_x &&
701 (output_w * resize_y + 512) / 1024 > RJ54N1_MAX_WIDTH)
702 resize = (RJ54N1_MAX_WIDTH * 1024 + output_w / 2) /
703 output_w;
704 else
705 resize = max(resize_x, resize_y);
8f37cf25
GL		 706
707 /* Prohibited value ranges */
708 switch (resize) {
709 case 2040 ... 2047:
710 resize = 2039;
711 break;
712 case 4080 ... 4095:
713 resize = 4079;
714 break;
715 case 8160 ... 8191:
716 resize = 8159;
717 break;
a6b5f200 718 case 16320 ... 16384:
8f37cf25
GL		 719 resize = 16319;
720 }
8f37cf25
GL		 721 }
722
723 /* Set scaling */
724 ret = reg_write(client, RJ54N1_RESIZE_HOLD_L, resize & 0xff);
725 if (!ret)
726 ret = reg_write(client, RJ54N1_RESIZE_HOLD_H, resize >> 8);
727
728 if (ret < 0)
729 return ret;
730
731 /*
732 * Configure a skipping bitmask. The sensor will select a skipping value
a6b5f200
GL		 733 * among set bits automatically. This is very unclear in the datasheet
734 * too. I was told, in this register one enables all skipping values,
735 * that are required for a specific resize, and the camera selects
736 * automatically, which ones to use. But it is unclear how to identify,
737 * which cropping values are needed. Secondly, why don't we just set all
738 * bits and let the camera choose? Would it increase processing time and
739 * reduce the framerate? Using 0xfffc for INC_USE_SEL doesn't seem to
740 * improve the image quality or stability for larger frames (see comment
741 * above), but I didn't check the framerate.
8f37cf25 742 */
e26b3144 743 skip = min(resize / 1024, 15U);
a6b5f200 744
8f37cf25
GL		 745 inc_sel = 1 << skip;
746
747 if (inc_sel <= 2)
748 inc_sel = 0xc;
749 else if (resize & 1023 && skip < 15)
750 inc_sel |= 1 << (skip + 1);
751
752 ret = reg_write(client, RJ54N1_INC_USE_SEL_L, inc_sel & 0xfc);
753 if (!ret)
754 ret = reg_write(client, RJ54N1_INC_USE_SEL_H, inc_sel >> 8);
755
a6b5f200
GL		 756 if (!rj54n1->auto_wb) {
757 /* Auto white balance window */
758 wb_left = output_w / 16;
759 wb_right = (3 * output_w / 4 - 3) / 4;
760 wb_top = output_h / 16;
761 wb_bottom = (3 * output_h / 4 - 3) / 4;
762 wb_bit8 = ((wb_left >> 2) & 0x40) | ((wb_top >> 4) & 0x10) |
763 ((wb_right >> 6) & 4) | ((wb_bottom >> 8) & 1);
764
765 if (!ret)
766 ret = reg_write(client, RJ54N1_BIT8_WB, wb_bit8);
767 if (!ret)
768 ret = reg_write(client, RJ54N1_HCAPS_WB, wb_left);
769 if (!ret)
770 ret = reg_write(client, RJ54N1_VCAPS_WB, wb_top);
771 if (!ret)
772 ret = reg_write(client, RJ54N1_HCAPE_WB, wb_right);
773 if (!ret)
774 ret = reg_write(client, RJ54N1_VCAPE_WB, wb_bottom);
775 }
776
777 /* Antiflicker */
778 peak = 12 * RJ54N1_MAX_WIDTH * (1 << 14) * resize / rj54n1->tgclk_mhz /
779 10000;
780 peak_50 = peak / 6;
781 peak_60 = peak / 5;
782
783 if (!ret)
784 ret = reg_write(client, RJ54N1_PEAK_H,
785 ((peak_50 >> 4) & 0xf0) | (peak_60 >> 8));
786 if (!ret)
787 ret = reg_write(client, RJ54N1_PEAK_50, peak_50);
788 if (!ret)
789 ret = reg_write(client, RJ54N1_PEAK_60, peak_60);
790 if (!ret)
791 ret = reg_write(client, RJ54N1_PEAK_DIFF, peak / 150);
792
8f37cf25
GL		 793 /* Start resizing */
794 if (!ret)
795 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
796 RESIZE_HOLD_SEL | RESIZE_GO | 1);
797
798 if (ret < 0)
799 return ret;
800
8f37cf25
GL		 801 /* Constant taken from manufacturer's example */
802 msleep(230);
803
804 ret = reg_write(client, RJ54N1_RESIZE_CONTROL, RESIZE_HOLD_SEL | 1);
805 if (ret < 0)
806 return ret;
807
a6b5f200
GL		 808 *in_w = (output_w * resize + 512) / 1024;
809 *in_h = (output_h * resize + 512) / 1024;
8f37cf25
GL		 810 *out_w = output_w;
811 *out_h = output_h;
812
e26b3144 813 dev_dbg(&client->dev, "Scaled for %dx%d : %u = %ux%u, skip %u\n",
a6b5f200
GL		 814 *in_w, *in_h, resize, output_w, output_h, skip);
815
8f37cf25
GL		 816 return resize;
817}
818
819static int rj54n1_set_clock(struct i2c_client *client)
820{
821 struct rj54n1 *rj54n1 = to_rj54n1(client);
822 int ret;
823
824 /* Enable external clock */
825 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK | SOFT_STDBY);
a6b5f200 826 /* Leave stand-by. Note: use this when implementing suspend / resume */
8f37cf25
GL		 827 if (!ret)
828 ret = reg_write(client, RJ54N1_RESET_STANDBY, E_EXCLK);
829
830 if (!ret)
a6b5f200 831 ret = reg_write(client, RJ54N1_PLL_L, PLL_L);
8f37cf25 832 if (!ret)
a6b5f200 833 ret = reg_write(client, RJ54N1_PLL_N, PLL_N);
8f37cf25
GL		 834
835 /* TGCLK dividers */
836 if (!ret)
837 ret = reg_write(client, RJ54N1_RATIO_TG,
838 rj54n1->clk_div.ratio_tg);
839 if (!ret)
840 ret = reg_write(client, RJ54N1_RATIO_T,
841 rj54n1->clk_div.ratio_t);
842 if (!ret)
843 ret = reg_write(client, RJ54N1_RATIO_R,
844 rj54n1->clk_div.ratio_r);
845
846 /* Enable TGCLK & RAMP */
847 if (!ret)
848 ret = reg_write(client, RJ54N1_RAMP_TGCLK_EN, 3);
849
850 /* Disable clock output */
851 if (!ret)
852 ret = reg_write(client, RJ54N1_OCLK_DSP, 0);
853
854 /* Set divisors */
855 if (!ret)
856 ret = reg_write(client, RJ54N1_RATIO_OP,
857 rj54n1->clk_div.ratio_op);
858 if (!ret)
859 ret = reg_write(client, RJ54N1_RATIO_O,
860 rj54n1->clk_div.ratio_o);
861
862 /* Enable OCLK */
863 if (!ret)
864 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
865
866 /* Use PLL for Timing Generator, write 2 to reserved bits */
867 if (!ret)
868 ret = reg_write(client, RJ54N1_TG_BYPASS, 2);
869
870 /* Take sensor out of reset */
871 if (!ret)
872 ret = reg_write(client, RJ54N1_RESET_STANDBY,
873 E_EXCLK | SEN_RSTX);
874 /* Enable PLL */
875 if (!ret)
876 ret = reg_write(client, RJ54N1_PLL_EN, 1);
877
878 /* Wait for PLL to stabilise */
879 msleep(10);
880
881 /* Enable clock to frequency divider */
882 if (!ret)
883 ret = reg_write(client, RJ54N1_CLK_RST, 1);
884
885 if (!ret)
886 ret = reg_read(client, RJ54N1_CLK_RST);
887 if (ret != 1) {
888 dev_err(&client->dev,
889 "Resetting RJ54N1CB0C clock failed: %d!\n", ret);
890 return -EIO;
891 }
a6b5f200 892
8f37cf25
GL		 893 /* Start the PLL */
894 ret = reg_set(client, RJ54N1_OCLK_DSP, 1, 1);
895
896 /* Enable OCLK */
897 if (!ret)
898 ret = reg_write(client, RJ54N1_OCLK_SEL_EN, 1);
899
900 return ret;
901}
902
903static int rj54n1_reg_init(struct i2c_client *client)
904{
a6b5f200 905 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25
GL		 906 int ret = rj54n1_set_clock(client);
907
908 if (!ret)
909 ret = reg_write_multiple(client, bank_7, ARRAY_SIZE(bank_7));
910 if (!ret)
911 ret = reg_write_multiple(client, bank_10, ARRAY_SIZE(bank_10));
912
913 /* Set binning divisors */
914 if (!ret)
915 ret = reg_write(client, RJ54N1_SCALE_1_2_LEV, 3 | (7 << 4));
916 if (!ret)
917 ret = reg_write(client, RJ54N1_SCALE_4_LEV, 0xf);
918
919 /* Switch to fixed resize mode */
920 if (!ret)
921 ret = reg_write(client, RJ54N1_RESIZE_CONTROL,
922 RESIZE_HOLD_SEL | 1);
923
924 /* Set gain */
925 if (!ret)
926 ret = reg_write(client, RJ54N1_Y_GAIN, 0x84);
927
a6b5f200
GL		 928 /*
929 * Mirror the image back: default is upside down and left-to-right...
930 * Set manual preview / still shot switching
931 */
8f37cf25 932 if (!ret)
a6b5f200 933 ret = reg_write(client, RJ54N1_MIRROR_STILL_MODE, 0x27);
8f37cf25
GL		 934
935 if (!ret)
936 ret = reg_write_multiple(client, bank_4, ARRAY_SIZE(bank_4));
a6b5f200
GL		 937
938 /* Auto exposure area */
939 if (!ret)
940 ret = reg_write(client, RJ54N1_EXPOSURE_CONTROL, 0x80);
941 /* Check current auto WB config */
8f37cf25 942 if (!ret)
a6b5f200
GL		 943 ret = reg_read(client, RJ54N1_WB_SEL_WEIGHT_I);
944 if (ret >= 0) {
945 rj54n1->auto_wb = ret & 0x80;
8f37cf25 946 ret = reg_write_multiple(client, bank_5, ARRAY_SIZE(bank_5));
a6b5f200 947 }
8f37cf25
GL		 948 if (!ret)
949 ret = reg_write_multiple(client, bank_8, ARRAY_SIZE(bank_8));
950
951 if (!ret)
952 ret = reg_write(client, RJ54N1_RESET_STANDBY,
953 E_EXCLK | DSP_RSTX | SEN_RSTX);
954
955 /* Commit init */
956 if (!ret)
957 ret = rj54n1_commit(client);
958
959 /* Take DSP, TG, sensor out of reset */
960 if (!ret)
961 ret = reg_write(client, RJ54N1_RESET_STANDBY,
962 E_EXCLK | DSP_RSTX | TG_RSTX | SEN_RSTX);
963
a6b5f200 964 /* Start register update? Same register as 0x?FE in many bank_* sets */
8f37cf25 965 if (!ret)
a6b5f200 966 ret = reg_write(client, RJ54N1_FWFLG, 2);
8f37cf25
GL		 967
968 /* Constant taken from manufacturer's example */
969 msleep(700);
970
971 return ret;
972}
973
717fd5b4
HV		 974static int rj54n1_set_fmt(struct v4l2_subdev *sd,
975 struct v4l2_subdev_pad_config *cfg,
976 struct v4l2_subdev_format *format)
8f37cf25 977{
717fd5b4 978 struct v4l2_mbus_framefmt *mf = &format->format;
c4ce6d14 979 struct i2c_client *client = v4l2_get_subdevdata(sd);
760697be
GL		 980 struct rj54n1 *rj54n1 = to_rj54n1(client);
981 const struct rj54n1_datafmt *fmt;
717fd5b4
HV		 982 int output_w, output_h, max_w, max_h,
983 input_w = rj54n1->rect.width, input_h = rj54n1->rect.height;
f5fe58fd
BB		 984 int align = mf->code == MEDIA_BUS_FMT_SBGGR10_1X10 ||
985 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE ||
986 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE ||
987 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE ||
988 mf->code == MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE;
717fd5b4
HV		 989 int ret;
990
991 if (format->pad)
992 return -EINVAL;
760697be
GL		 993
994 dev_dbg(&client->dev, "%s: code = %d, width = %u, height = %u\n",
995 __func__, mf->code, mf->width, mf->height);
996
997 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
998 ARRAY_SIZE(rj54n1_colour_fmts));
999 if (!fmt) {
1000 fmt = rj54n1->fmt;
1001 mf->code = fmt->code;
1002 }
8f37cf25 1003
760697be
GL		 1004 mf->field = V4L2_FIELD_NONE;
1005 mf->colorspace = fmt->colorspace;
8f37cf25 1006
760697be
GL		 1007 v4l_bound_align_image(&mf->width, 112, RJ54N1_MAX_WIDTH, align,
1008 &mf->height, 84, RJ54N1_MAX_HEIGHT, align, 0);
8f37cf25 1009
717fd5b4
HV		 1010 if (format->which == V4L2_SUBDEV_FORMAT_TRY) {
1011 cfg->try_fmt = *mf;
1012 return 0;
1013 }
8f37cf25
GL		 1014
1015 /*
1016 * Verify if the sensor has just been powered on. TODO: replace this
1017 * with proper PM, when a suitable API is available.
1018 */
a6b5f200 1019 ret = reg_read(client, RJ54N1_RESET_STANDBY);
8f37cf25
GL		 1020 if (ret < 0)
1021 return ret;
1022
1023 if (!(ret & E_EXCLK)) {
1024 ret = rj54n1_reg_init(client);
1025 if (ret < 0)
1026 return ret;
1027 }
1028
1029 /* RA_SEL_UL is only relevant for raw modes, ignored otherwise. */
760697be 1030 switch (mf->code) {
f5fe58fd 1031 case MEDIA_BUS_FMT_YUYV8_2X8:
8f37cf25
GL		 1032 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1033 if (!ret)
1034 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1035 break;
f5fe58fd 1036 case MEDIA_BUS_FMT_YVYU8_2X8:
760697be
GL		 1037 ret = reg_write(client, RJ54N1_OUT_SEL, 0);
1038 if (!ret)
1039 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1040 break;
f5fe58fd 1041 case MEDIA_BUS_FMT_RGB565_2X8_LE:
8f37cf25
GL		 1042 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1043 if (!ret)
1044 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1045 break;
f5fe58fd 1046 case MEDIA_BUS_FMT_RGB565_2X8_BE:
760697be
GL		 1047 ret = reg_write(client, RJ54N1_OUT_SEL, 0x11);
1048 if (!ret)
1049 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1050 break;
f5fe58fd 1051 case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_LE:
760697be
GL		 1052 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1053 if (!ret)
1054 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1055 if (!ret)
1056 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1057 break;
f5fe58fd 1058 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_LE:
760697be
GL		 1059 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1060 if (!ret)
1061 ret = reg_set(client, RJ54N1_BYTE_SWAP, 8, 8);
1062 if (!ret)
1063 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1064 break;
f5fe58fd 1065 case MEDIA_BUS_FMT_SBGGR10_2X8_PADLO_BE:
760697be
GL		 1066 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1067 if (!ret)
1068 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1069 if (!ret)
1070 ret = reg_write(client, RJ54N1_RA_SEL_UL, 0);
1071 break;
f5fe58fd 1072 case MEDIA_BUS_FMT_SBGGR10_2X8_PADHI_BE:
760697be
GL		 1073 ret = reg_write(client, RJ54N1_OUT_SEL, 4);
1074 if (!ret)
1075 ret = reg_set(client, RJ54N1_BYTE_SWAP, 0, 8);
1076 if (!ret)
1077 ret = reg_write(client, RJ54N1_RA_SEL_UL, 8);
1078 break;
f5fe58fd 1079 case MEDIA_BUS_FMT_SBGGR10_1X10:
760697be
GL		 1080 ret = reg_write(client, RJ54N1_OUT_SEL, 5);
1081 break;
8f37cf25
GL		 1082 default:
1083 ret = -EINVAL;
1084 }
1085
760697be
GL		 1086 /* Special case: a raw mode with 10 bits of data per clock tick */
1087 if (!ret)
1088 ret = reg_set(client, RJ54N1_OCLK_SEL_EN,
f5fe58fd 1089 (mf->code == MEDIA_BUS_FMT_SBGGR10_1X10) << 1, 2);
760697be 1090
8f37cf25
GL		 1091 if (ret < 0)
1092 return ret;
1093
760697be
GL		 1094 /* Supported scales 1:1 >= scale > 1:16 */
1095 max_w = mf->width * (16 * 1024 - 1) / 1024;
1096 if (input_w > max_w)
1097 input_w = max_w;
1098 max_h = mf->height * (16 * 1024 - 1) / 1024;
1099 if (input_h > max_h)
1100 input_h = max_h;
8f37cf25 1101
760697be
GL		 1102 output_w = mf->width;
1103 output_h = mf->height;
8f37cf25
GL		 1104
1105 ret = rj54n1_sensor_scale(sd, &input_w, &input_h, &output_w, &output_h);
1106 if (ret < 0)
1107 return ret;
1108
760697be
GL		 1109 fmt = rj54n1_find_datafmt(mf->code, rj54n1_colour_fmts,
1110 ARRAY_SIZE(rj54n1_colour_fmts));
1111
1112 rj54n1->fmt = fmt;
8f37cf25
GL		 1113 rj54n1->resize = ret;
1114 rj54n1->rect.width = input_w;
1115 rj54n1->rect.height = input_h;
1116 rj54n1->width = output_w;
1117 rj54n1->height = output_h;
1118
760697be
GL		 1119 mf->width = output_w;
1120 mf->height = output_h;
1121 mf->field = V4L2_FIELD_NONE;
1122 mf->colorspace = fmt->colorspace;
8f37cf25 1123
760697be 1124 return 0;
8f37cf25
GL		 1125}
1126
8f37cf25
GL		 1127#ifdef CONFIG_VIDEO_ADV_DEBUG
1128static int rj54n1_g_register(struct v4l2_subdev *sd,
1129 struct v4l2_dbg_register *reg)
1130{
c4ce6d14 1131 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25 1132
6be89daa 1133 if (reg->reg < 0x400 || reg->reg > 0x1fff)
8f37cf25
GL		 1134 /* Registers > 0x0800 are only available from Sharp support */
1135 return -EINVAL;
1136
8f37cf25
GL		 1137 reg->size = 1;
1138 reg->val = reg_read(client, reg->reg);
1139
1140 if (reg->val > 0xff)
1141 return -EIO;
1142
1143 return 0;
1144}
1145
1146static int rj54n1_s_register(struct v4l2_subdev *sd,
977ba3b1 1147 const struct v4l2_dbg_register *reg)
8f37cf25 1148{
c4ce6d14 1149 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25 1150
6be89daa 1151 if (reg->reg < 0x400 || reg->reg > 0x1fff)
8f37cf25
GL		 1152 /* Registers >= 0x0800 are only available from Sharp support */
1153 return -EINVAL;
1154
8f37cf25
GL		 1155 if (reg_write(client, reg->reg, reg->val) < 0)
1156 return -EIO;
1157
1158 return 0;
1159}
1160#endif
1161
4ec10bac
LP		 1162static int rj54n1_s_power(struct v4l2_subdev *sd, int on)
1163{
1164 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 1165 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
9aea470b 1166 struct rj54n1 *rj54n1 = to_rj54n1(client);
4ec10bac 1167
9aea470b 1168 return soc_camera_set_power(&client->dev, ssdd, rj54n1->clk, on);
4ec10bac
LP		 1169}
1170
25e965ad 1171static int rj54n1_s_ctrl(struct v4l2_ctrl *ctrl)
8f37cf25 1172{
25e965ad
HV		 1173 struct rj54n1 *rj54n1 = container_of(ctrl->handler, struct rj54n1, hdl);
1174 struct v4l2_subdev *sd = &rj54n1->subdev;
c4ce6d14 1175 struct i2c_client *client = v4l2_get_subdevdata(sd);
8f37cf25
GL		 1176 int data;
1177
1178 switch (ctrl->id) {
1179 case V4L2_CID_VFLIP:
25e965ad 1180 if (ctrl->val)
8f37cf25
GL		 1181 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 1);
1182 else
1183 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 1, 1);
1184 if (data < 0)
1185 return -EIO;
25e965ad 1186 return 0;
8f37cf25 1187 case V4L2_CID_HFLIP:
25e965ad 1188 if (ctrl->val)
8f37cf25
GL		 1189 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 0, 2);
1190 else
1191 data = reg_set(client, RJ54N1_MIRROR_STILL_MODE, 2, 2);
1192 if (data < 0)
1193 return -EIO;
25e965ad 1194 return 0;
8f37cf25 1195 case V4L2_CID_GAIN:
25e965ad 1196 if (reg_write(client, RJ54N1_Y_GAIN, ctrl->val * 2) < 0)
8f37cf25 1197 return -EIO;
25e965ad 1198 return 0;
a6b5f200
GL		 1199 case V4L2_CID_AUTO_WHITE_BALANCE:
1200 /* Auto WB area - whole image */
25e965ad 1201 if (reg_set(client, RJ54N1_WB_SEL_WEIGHT_I, ctrl->val << 7,
a6b5f200
GL		 1202 0x80) < 0)
1203 return -EIO;
25e965ad
HV		 1204 rj54n1->auto_wb = ctrl->val;
1205 return 0;
8f37cf25
GL		 1206 }
1207
25e965ad 1208 return -EINVAL;
8f37cf25
GL		 1209}
1210
25e965ad
HV		 1211static const struct v4l2_ctrl_ops rj54n1_ctrl_ops = {
1212 .s_ctrl = rj54n1_s_ctrl,
1213};
1214
6713c88f 1215static const struct v4l2_subdev_core_ops rj54n1_subdev_core_ops = {
8f37cf25
GL		 1216#ifdef CONFIG_VIDEO_ADV_DEBUG
1217 .g_register = rj54n1_g_register,
1218 .s_register = rj54n1_s_register,
1219#endif
4ec10bac 1220 .s_power = rj54n1_s_power,
8f37cf25
GL		 1221};
1222
bc1a1f3a
GL		 1223static int rj54n1_g_mbus_config(struct v4l2_subdev *sd,
1224 struct v4l2_mbus_config *cfg)
1225{
1226 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 1227 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
bc1a1f3a
GL		 1228
1229 cfg->flags =
1230 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING |
1231 V4L2_MBUS_MASTER | V4L2_MBUS_DATA_ACTIVE_HIGH |
1232 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1233 cfg->type = V4L2_MBUS_PARALLEL;
25a34811 1234 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
bc1a1f3a
GL		 1235
1236 return 0;
1237}
1238
1239static int rj54n1_s_mbus_config(struct v4l2_subdev *sd,
1240 const struct v4l2_mbus_config *cfg)
1241{
1242 struct i2c_client *client = v4l2_get_subdevdata(sd);
25a34811 1243 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
bc1a1f3a
GL		 1244
1245 /* Figures 2.5-1 to 2.5-3 - default falling pixclk edge */
25a34811 1246 if (soc_camera_apply_board_flags(ssdd, cfg) &
bc1a1f3a
GL		 1247 V4L2_MBUS_PCLK_SAMPLE_RISING)
1248 return reg_write(client, RJ54N1_OUT_SIGPO, 1 << 4);
1249 else
1250 return reg_write(client, RJ54N1_OUT_SIGPO, 0);
1251}
1252
6713c88f 1253static const struct v4l2_subdev_video_ops rj54n1_subdev_video_ops = {
8f37cf25 1254 .s_stream = rj54n1_s_stream,
bc1a1f3a
GL		 1255 .g_mbus_config = rj54n1_g_mbus_config,
1256 .s_mbus_config = rj54n1_s_mbus_config,
8f37cf25
GL		 1257};
1258
ebcff5fc
HV		 1259static const struct v4l2_subdev_pad_ops rj54n1_subdev_pad_ops = {
1260 .enum_mbus_code = rj54n1_enum_mbus_code,
10d5509c
HV		 1261 .get_selection = rj54n1_get_selection,
1262 .set_selection = rj54n1_set_selection,
da298c6d 1263 .get_fmt = rj54n1_get_fmt,
717fd5b4 1264 .set_fmt = rj54n1_set_fmt,
ebcff5fc
HV		 1265};
1266
6713c88f 1267static const struct v4l2_subdev_ops rj54n1_subdev_ops = {
8f37cf25
GL		 1268 .core = &rj54n1_subdev_core_ops,
1269 .video = &rj54n1_subdev_video_ops,
ebcff5fc 1270 .pad = &rj54n1_subdev_pad_ops,
8f37cf25
GL		 1271};
1272
8f37cf25
GL		 1273/*
1274 * Interface active, can use i2c. If it fails, it can indeed mean, that
1275 * this wasn't our capture interface, so, we wait for the right one
1276 */
14178aa5 1277static int rj54n1_video_probe(struct i2c_client *client,
a6b5f200 1278 struct rj54n1_pdata *priv)
8f37cf25 1279{
4bbc6d52 1280 struct rj54n1 *rj54n1 = to_rj54n1(client);
8f37cf25
GL		 1281 int data1, data2;
1282 int ret;
1283
4bbc6d52
LP		 1284 ret = rj54n1_s_power(&rj54n1->subdev, 1);
1285 if (ret < 0)
1286 return ret;
1287
8f37cf25
GL		 1288 /* Read out the chip version register */
1289 data1 = reg_read(client, RJ54N1_DEV_CODE);
1290 data2 = reg_read(client, RJ54N1_DEV_CODE2);
1291
1292 if (data1 != 0x51 || data2 != 0x10) {
1293 ret = -ENODEV;
1294 dev_info(&client->dev, "No RJ54N1CB0C found, read 0x%x:0x%x\n",
1295 data1, data2);
4bbc6d52 1296 goto done;
8f37cf25
GL		 1297 }
1298
a6b5f200
GL		 1299 /* Configure IOCTL polarity from the platform data: 0 or 1 << 7. */
1300 ret = reg_write(client, RJ54N1_IOC, priv->ioctl_high << 7);
8f37cf25 1301 if (ret < 0)
4bbc6d52 1302 goto done;
8f37cf25
GL		 1303
1304 dev_info(&client->dev, "Detected a RJ54N1CB0C chip ID 0x%x:0x%x\n",
1305 data1, data2);
1306
4bbc6d52
LP		 1307 ret = v4l2_ctrl_handler_setup(&rj54n1->hdl);
1308
1309done:
1310 rj54n1_s_power(&rj54n1->subdev, 0);
8f37cf25
GL		 1311 return ret;
1312}
1313
1314static int rj54n1_probe(struct i2c_client *client,
1315 const struct i2c_device_id *did)
1316{
1317 struct rj54n1 *rj54n1;
25a34811 1318 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
8f37cf25 1319 struct i2c_adapter *adapter = to_i2c_adapter(client->dev.parent);
a6b5f200 1320 struct rj54n1_pdata *rj54n1_priv;
8f37cf25
GL		 1321 int ret;
1322
25a34811 1323 if (!ssdd || !ssdd->drv_priv) {
8f37cf25
GL		 1324 dev_err(&client->dev, "RJ54N1CB0C: missing platform data!\n");
1325 return -EINVAL;
1326 }
1327
25a34811 1328 rj54n1_priv = ssdd->drv_priv;
a6b5f200 1329
8f37cf25
GL		 1330 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
1331 dev_warn(&adapter->dev,
1332 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_BYTE\n");
1333 return -EIO;
1334 }
1335
70e176a5 1336 rj54n1 = devm_kzalloc(&client->dev, sizeof(struct rj54n1), GFP_KERNEL);
8f37cf25
GL		 1337 if (!rj54n1)
1338 return -ENOMEM;
1339
1340 v4l2_i2c_subdev_init(&rj54n1->subdev, client, &rj54n1_subdev_ops);
25e965ad
HV		 1341 v4l2_ctrl_handler_init(&rj54n1->hdl, 4);
1342 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1343 V4L2_CID_VFLIP, 0, 1, 1, 0);
1344 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1345 V4L2_CID_HFLIP, 0, 1, 1, 0);
1346 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1347 V4L2_CID_GAIN, 0, 127, 1, 66);
1348 v4l2_ctrl_new_std(&rj54n1->hdl, &rj54n1_ctrl_ops,
1349 V4L2_CID_AUTO_WHITE_BALANCE, 0, 1, 1, 1);
1350 rj54n1->subdev.ctrl_handler = &rj54n1->hdl;
70e176a5
GL		 1351 if (rj54n1->hdl.error)
1352 return rj54n1->hdl.error;
8f37cf25
GL		 1353
1354 rj54n1->clk_div = clk_div;
1355 rj54n1->rect.left = RJ54N1_COLUMN_SKIP;
1356 rj54n1->rect.top = RJ54N1_ROW_SKIP;
1357 rj54n1->rect.width = RJ54N1_MAX_WIDTH;
1358 rj54n1->rect.height = RJ54N1_MAX_HEIGHT;
1359 rj54n1->width = RJ54N1_MAX_WIDTH;
1360 rj54n1->height = RJ54N1_MAX_HEIGHT;
760697be 1361 rj54n1->fmt = &rj54n1_colour_fmts[0];
8f37cf25 1362 rj54n1->resize = 1024;
a6b5f200
GL		 1363 rj54n1->tgclk_mhz = (rj54n1_priv->mclk_freq / PLL_L * PLL_N) /
1364 (clk_div.ratio_tg + 1) / (clk_div.ratio_t + 1);
8f37cf25 1365
9aea470b
GL		 1366 rj54n1->clk = v4l2_clk_get(&client->dev, "mclk");
1367 if (IS_ERR(rj54n1->clk)) {
1368 ret = PTR_ERR(rj54n1->clk);
1369 goto eclkget;
1370 }
1371
14178aa5 1372 ret = rj54n1_video_probe(client, rj54n1_priv);
9aea470b
GL		 1373 if (ret < 0) {
1374 v4l2_clk_put(rj54n1->clk);
1375eclkget:
25e965ad 1376 v4l2_ctrl_handler_free(&rj54n1->hdl);
9aea470b 1377 }
4bbc6d52
LP		 1378
1379 return ret;
8f37cf25
GL		 1380}
1381
1382static int rj54n1_remove(struct i2c_client *client)
1383{
1384 struct rj54n1 *rj54n1 = to_rj54n1(client);
25a34811 1385 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
8f37cf25 1386
9aea470b 1387 v4l2_clk_put(rj54n1->clk);
25e965ad 1388 v4l2_device_unregister_subdev(&rj54n1->subdev);
25a34811
GL		 1389 if (ssdd->free_bus)
1390 ssdd->free_bus(ssdd);
25e965ad 1391 v4l2_ctrl_handler_free(&rj54n1->hdl);
8f37cf25
GL		 1392
1393 return 0;
1394}
1395
1396static const struct i2c_device_id rj54n1_id[] = {
1397 { "rj54n1cb0c", 0 },
1398 { }
1399};
1400MODULE_DEVICE_TABLE(i2c, rj54n1_id);
1401
1402static struct i2c_driver rj54n1_i2c_driver = {
1403 .driver = {
1404 .name = "rj54n1cb0c",
1405 },
1406 .probe = rj54n1_probe,
1407 .remove = rj54n1_remove,
1408 .id_table = rj54n1_id,
1409};
1410
c6e8d86f 1411module_i2c_driver(rj54n1_i2c_driver);
8f37cf25
GL		 1412
1413MODULE_DESCRIPTION("Sharp RJ54N1CB0C Camera driver");
1414MODULE_AUTHOR("Guennadi Liakhovetski <g.liakhovetski@gmx.de>");
1415MODULE_LICENSE("GPL v2");
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