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[mirror_ubuntu-jammy-kernel.git] / drivers / media / i2c / tvp514x.c
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f2e3bd9a 1// SPDX-License-Identifier: GPL-2.0-only
07b1747c 2/*
cb7a01ac 3 * drivers/media/i2c/tvp514x.c
07b1747c
VH
4 *
5 * TI TVP5146/47 decoder driver
6 *
7 * Copyright (C) 2008 Texas Instruments Inc
8 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
9 *
10 * Contributors:
11 * Sivaraj R <sivaraj@ti.com>
12 * Brijesh R Jadav <brijesh.j@ti.com>
13 * Hardik Shah <hardik.shah@ti.com>
14 * Manjunath Hadli <mrh@ti.com>
15 * Karicheri Muralidharan <m-karicheri2@ti.com>
5b38b0f8 16 * Prabhakar Lad <prabhakar.lad@ti.com>
07b1747c
VH
17 */
18
19#include <linux/i2c.h>
5a0e3ad6 20#include <linux/slab.h>
07b1747c
VH
21#include <linux/delay.h>
22#include <linux/videodev2.h>
7a707b89 23#include <linux/module.h>
5b38b0f8 24#include <linux/v4l2-mediabus.h>
098bcba3 25#include <linux/of.h>
fd9fdb78 26#include <linux/of_graph.h>
62ef80a1 27
8f23acb5 28#include <media/v4l2-async.h>
62ef80a1
MK
29#include <media/v4l2-device.h>
30#include <media/v4l2-common.h>
83811913 31#include <media/v4l2-mediabus.h>
859969b3 32#include <media/v4l2-fwnode.h>
cf6832af 33#include <media/v4l2-ctrls.h>
b5dcee22 34#include <media/i2c/tvp514x.h>
5b38b0f8 35#include <media/media-entity.h>
07b1747c
VH
36
37#include "tvp514x_regs.h"
38
07b1747c
VH
39/* Private macros for TVP */
40#define I2C_RETRY_COUNT (5)
41#define LOCK_RETRY_COUNT (5)
42#define LOCK_RETRY_DELAY (200)
43
44/* Debug functions */
90ab5ee9 45static bool debug;
07b1747c
VH
46module_param(debug, bool, 0644);
47MODULE_PARM_DESC(debug, "Debug level (0-1)");
48
62ef80a1
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49MODULE_AUTHOR("Texas Instruments");
50MODULE_DESCRIPTION("TVP514X linux decoder driver");
51MODULE_LICENSE("GPL");
07b1747c 52
c1c9d09c 53/* enum tvp514x_std - enum for supported standards */
07b1747c
VH
54enum tvp514x_std {
55 STD_NTSC_MJ = 0,
56 STD_PAL_BDGHIN,
57 STD_INVALID
58};
59
c1c9d09c 60/**
f8a7647d 61 * struct tvp514x_std_info - Structure to store standard information
07b1747c
VH
62 * @width: Line width in pixels
63 * @height:Number of active lines
64 * @video_std: Value to write in REG_VIDEO_STD register
65 * @standard: v4l2 standard structure information
66 */
67struct tvp514x_std_info {
68 unsigned long width;
69 unsigned long height;
70 u8 video_std;
71 struct v4l2_standard standard;
72};
73
6722e0ef 74static struct tvp514x_reg tvp514x_reg_list_default[0x40];
63b59cec
VH
75
76static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable);
c1c9d09c 77/**
6722e0ef 78 * struct tvp514x_decoder - TVP5146/47 decoder object
62ef80a1 79 * @sd: Subdevice Slave handle
c5bb8318 80 * @hdl: embedded &struct v4l2_ctrl_handler
6722e0ef 81 * @tvp514x_regs: copy of hw's regs with preset values.
07b1747c 82 * @pdata: Board specific
07b1747c 83 * @ver: Chip version
62ef80a1 84 * @streaming: TVP5146/47 decoder streaming - enabled or disabled.
5b38b0f8
MH
85 * @pix: Current pixel format
86 * @num_fmts: Number of formats
87 * @fmt_list: Format list
07b1747c
VH
88 * @current_std: Current standard
89 * @num_stds: Number of standards
90 * @std_list: Standards list
62ef80a1
MK
91 * @input: Input routing at chip level
92 * @output: Output routing at chip level
c5bb8318
MCC
93 * @pad: subdev media pad associated with the decoder
94 * @format: media bus frame format
95 * @int_seq: driver's register init sequence
07b1747c
VH
96 */
97struct tvp514x_decoder {
62ef80a1 98 struct v4l2_subdev sd;
cf6832af 99 struct v4l2_ctrl_handler hdl;
6722e0ef 100 struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
07b1747c 101 const struct tvp514x_platform_data *pdata;
07b1747c
VH
102
103 int ver;
62ef80a1 104 int streaming;
07b1747c 105
5b38b0f8
MH
106 struct v4l2_pix_format pix;
107 int num_fmts;
108 const struct v4l2_fmtdesc *fmt_list;
109
07b1747c
VH
110 enum tvp514x_std current_std;
111 int num_stds;
a75ffc12 112 const struct tvp514x_std_info *std_list;
c1c9d09c 113 /* Input and Output Routing parameters */
62ef80a1
MK
114 u32 input;
115 u32 output;
5b38b0f8
MH
116
117 /* mc related members */
118 struct media_pad pad;
119 struct v4l2_mbus_framefmt format;
f0a12d0c
LPC
120
121 struct tvp514x_reg *int_seq;
07b1747c
VH
122};
123
124/* TVP514x default register values */
6722e0ef 125static struct tvp514x_reg tvp514x_reg_list_default[] = {
c1c9d09c
MK
126 /* Composite selected */
127 {TOK_WRITE, REG_INPUT_SEL, 0x05},
07b1747c 128 {TOK_WRITE, REG_AFE_GAIN_CTRL, 0x0F},
c1c9d09c
MK
129 /* Auto mode */
130 {TOK_WRITE, REG_VIDEO_STD, 0x00},
07b1747c
VH
131 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
132 {TOK_SKIP, REG_AUTOSWITCH_MASK, 0x3F},
133 {TOK_WRITE, REG_COLOR_KILLER, 0x10},
134 {TOK_WRITE, REG_LUMA_CONTROL1, 0x00},
135 {TOK_WRITE, REG_LUMA_CONTROL2, 0x00},
136 {TOK_WRITE, REG_LUMA_CONTROL3, 0x02},
137 {TOK_WRITE, REG_BRIGHTNESS, 0x80},
138 {TOK_WRITE, REG_CONTRAST, 0x80},
139 {TOK_WRITE, REG_SATURATION, 0x80},
140 {TOK_WRITE, REG_HUE, 0x00},
141 {TOK_WRITE, REG_CHROMA_CONTROL1, 0x00},
142 {TOK_WRITE, REG_CHROMA_CONTROL2, 0x0E},
c1c9d09c
MK
143 /* Reserved */
144 {TOK_SKIP, 0x0F, 0x00},
07b1747c
VH
145 {TOK_WRITE, REG_COMP_PR_SATURATION, 0x80},
146 {TOK_WRITE, REG_COMP_Y_CONTRAST, 0x80},
147 {TOK_WRITE, REG_COMP_PB_SATURATION, 0x80},
c1c9d09c
MK
148 /* Reserved */
149 {TOK_SKIP, 0x13, 0x00},
07b1747c 150 {TOK_WRITE, REG_COMP_Y_BRIGHTNESS, 0x80},
c1c9d09c
MK
151 /* Reserved */
152 {TOK_SKIP, 0x15, 0x00},
153 /* NTSC timing */
154 {TOK_SKIP, REG_AVID_START_PIXEL_LSB, 0x55},
07b1747c
VH
155 {TOK_SKIP, REG_AVID_START_PIXEL_MSB, 0x00},
156 {TOK_SKIP, REG_AVID_STOP_PIXEL_LSB, 0x25},
157 {TOK_SKIP, REG_AVID_STOP_PIXEL_MSB, 0x03},
c1c9d09c
MK
158 /* NTSC timing */
159 {TOK_SKIP, REG_HSYNC_START_PIXEL_LSB, 0x00},
07b1747c
VH
160 {TOK_SKIP, REG_HSYNC_START_PIXEL_MSB, 0x00},
161 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_LSB, 0x40},
162 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_MSB, 0x00},
c1c9d09c
MK
163 /* NTSC timing */
164 {TOK_SKIP, REG_VSYNC_START_LINE_LSB, 0x04},
07b1747c
VH
165 {TOK_SKIP, REG_VSYNC_START_LINE_MSB, 0x00},
166 {TOK_SKIP, REG_VSYNC_STOP_LINE_LSB, 0x07},
167 {TOK_SKIP, REG_VSYNC_STOP_LINE_MSB, 0x00},
c1c9d09c
MK
168 /* NTSC timing */
169 {TOK_SKIP, REG_VBLK_START_LINE_LSB, 0x01},
07b1747c
VH
170 {TOK_SKIP, REG_VBLK_START_LINE_MSB, 0x00},
171 {TOK_SKIP, REG_VBLK_STOP_LINE_LSB, 0x15},
172 {TOK_SKIP, REG_VBLK_STOP_LINE_MSB, 0x00},
c1c9d09c
MK
173 /* Reserved */
174 {TOK_SKIP, 0x26, 0x00},
175 /* Reserved */
176 {TOK_SKIP, 0x27, 0x00},
07b1747c 177 {TOK_SKIP, REG_FAST_SWTICH_CONTROL, 0xCC},
c1c9d09c
MK
178 /* Reserved */
179 {TOK_SKIP, 0x29, 0x00},
07b1747c 180 {TOK_SKIP, REG_FAST_SWTICH_SCART_DELAY, 0x00},
c1c9d09c
MK
181 /* Reserved */
182 {TOK_SKIP, 0x2B, 0x00},
07b1747c
VH
183 {TOK_SKIP, REG_SCART_DELAY, 0x00},
184 {TOK_SKIP, REG_CTI_DELAY, 0x00},
185 {TOK_SKIP, REG_CTI_CONTROL, 0x00},
c1c9d09c
MK
186 /* Reserved */
187 {TOK_SKIP, 0x2F, 0x00},
188 /* Reserved */
189 {TOK_SKIP, 0x30, 0x00},
190 /* Reserved */
191 {TOK_SKIP, 0x31, 0x00},
192 /* HS, VS active high */
193 {TOK_WRITE, REG_SYNC_CONTROL, 0x00},
194 /* 10-bit BT.656 */
195 {TOK_WRITE, REG_OUTPUT_FORMATTER1, 0x00},
196 /* Enable clk & data */
197 {TOK_WRITE, REG_OUTPUT_FORMATTER2, 0x11},
198 /* Enable AVID & FLD */
199 {TOK_WRITE, REG_OUTPUT_FORMATTER3, 0xEE},
200 /* Enable VS & HS */
201 {TOK_WRITE, REG_OUTPUT_FORMATTER4, 0xAF},
07b1747c
VH
202 {TOK_WRITE, REG_OUTPUT_FORMATTER5, 0xFF},
203 {TOK_WRITE, REG_OUTPUT_FORMATTER6, 0xFF},
c1c9d09c
MK
204 /* Clear status */
205 {TOK_WRITE, REG_CLEAR_LOST_LOCK, 0x01},
07b1747c
VH
206 {TOK_TERM, 0, 0},
207};
208
c5bb8318 209/*
5b38b0f8
MH
210 * List of image formats supported by TVP5146/47 decoder
211 * Currently we are using 8 bit mode only, but can be
212 * extended to 10/20 bit mode.
213 */
214static const struct v4l2_fmtdesc tvp514x_fmt_list[] = {
215 {
216 .index = 0,
217 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
218 .flags = 0,
219 .description = "8-bit UYVY 4:2:2 Format",
220 .pixelformat = V4L2_PIX_FMT_UYVY,
221 },
222};
223
c5bb8318 224/*
07b1747c
VH
225 * Supported standards -
226 *
227 * Currently supports two standards only, need to add support for rest of the
228 * modes, like SECAM, etc...
229 */
a75ffc12 230static const struct tvp514x_std_info tvp514x_std_list[] = {
07b1747c
VH
231 /* Standard: STD_NTSC_MJ */
232 [STD_NTSC_MJ] = {
233 .width = NTSC_NUM_ACTIVE_PIXELS,
234 .height = NTSC_NUM_ACTIVE_LINES,
235 .video_std = VIDEO_STD_NTSC_MJ_BIT,
236 .standard = {
237 .index = 0,
238 .id = V4L2_STD_NTSC,
239 .name = "NTSC",
240 .frameperiod = {1001, 30000},
241 .framelines = 525
242 },
243 /* Standard: STD_PAL_BDGHIN */
244 },
245 [STD_PAL_BDGHIN] = {
246 .width = PAL_NUM_ACTIVE_PIXELS,
247 .height = PAL_NUM_ACTIVE_LINES,
248 .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
249 .standard = {
250 .index = 1,
251 .id = V4L2_STD_PAL,
252 .name = "PAL",
253 .frameperiod = {1, 25},
254 .framelines = 625
255 },
256 },
257 /* Standard: need to add for additional standard */
258};
62ef80a1
MK
259
260
261static inline struct tvp514x_decoder *to_decoder(struct v4l2_subdev *sd)
262{
263 return container_of(sd, struct tvp514x_decoder, sd);
264}
265
cf6832af
HV
266static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
267{
268 return &container_of(ctrl->handler, struct tvp514x_decoder, hdl)->sd;
269}
270
07b1747c 271
c1c9d09c
MK
272/**
273 * tvp514x_read_reg() - Read a value from a register in an TVP5146/47.
274 * @sd: ptr to v4l2_subdev struct
275 * @reg: TVP5146/47 register address
276 *
07b1747c
VH
277 * Returns value read if successful, or non-zero (-1) otherwise.
278 */
62ef80a1 279static int tvp514x_read_reg(struct v4l2_subdev *sd, u8 reg)
07b1747c 280{
62ef80a1
MK
281 int err, retry = 0;
282 struct i2c_client *client = v4l2_get_subdevdata(sd);
283
07b1747c
VH
284read_again:
285
286 err = i2c_smbus_read_byte_data(client, reg);
6f901a99 287 if (err < 0) {
07b1747c 288 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 289 v4l2_warn(sd, "Read: retry ... %d\n", retry);
07b1747c
VH
290 retry++;
291 msleep_interruptible(10);
292 goto read_again;
293 }
294 }
295
296 return err;
297}
298
c1c9d09c
MK
299/**
300 * dump_reg() - dump the register content of TVP5146/47.
301 * @sd: ptr to v4l2_subdev struct
302 * @reg: TVP5146/47 register address
303 */
62ef80a1
MK
304static void dump_reg(struct v4l2_subdev *sd, u8 reg)
305{
306 u32 val;
307
308 val = tvp514x_read_reg(sd, reg);
309 v4l2_info(sd, "Reg(0x%.2X): 0x%.2X\n", reg, val);
310}
311
c1c9d09c
MK
312/**
313 * tvp514x_write_reg() - Write a value to a register in TVP5146/47
314 * @sd: ptr to v4l2_subdev struct
315 * @reg: TVP5146/47 register address
316 * @val: value to be written to the register
317 *
07b1747c
VH
318 * Write a value to a register in an TVP5146/47 decoder device.
319 * Returns zero if successful, or non-zero otherwise.
320 */
62ef80a1 321static int tvp514x_write_reg(struct v4l2_subdev *sd, u8 reg, u8 val)
07b1747c 322{
62ef80a1
MK
323 int err, retry = 0;
324 struct i2c_client *client = v4l2_get_subdevdata(sd);
325
07b1747c
VH
326write_again:
327
328 err = i2c_smbus_write_byte_data(client, reg, val);
329 if (err) {
330 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 331 v4l2_warn(sd, "Write: retry ... %d\n", retry);
07b1747c
VH
332 retry++;
333 msleep_interruptible(10);
334 goto write_again;
335 }
336 }
337
338 return err;
339}
340
c1c9d09c
MK
341/**
342 * tvp514x_write_regs() : Initializes a list of TVP5146/47 registers
343 * @sd: ptr to v4l2_subdev struct
344 * @reglist: list of TVP5146/47 registers and values
345 *
346 * Initializes a list of TVP5146/47 registers:-
07b1747c
VH
347 * if token is TOK_TERM, then entire write operation terminates
348 * if token is TOK_DELAY, then a delay of 'val' msec is introduced
349 * if token is TOK_SKIP, then the register write is skipped
350 * if token is TOK_WRITE, then the register write is performed
07b1747c
VH
351 * Returns zero if successful, or non-zero otherwise.
352 */
62ef80a1 353static int tvp514x_write_regs(struct v4l2_subdev *sd,
07b1747c
VH
354 const struct tvp514x_reg reglist[])
355{
356 int err;
357 const struct tvp514x_reg *next = reglist;
358
359 for (; next->token != TOK_TERM; next++) {
360 if (next->token == TOK_DELAY) {
361 msleep(next->val);
362 continue;
363 }
364
365 if (next->token == TOK_SKIP)
366 continue;
367
62ef80a1 368 err = tvp514x_write_reg(sd, next->reg, (u8) next->val);
07b1747c 369 if (err) {
62ef80a1 370 v4l2_err(sd, "Write failed. Err[%d]\n", err);
07b1747c
VH
371 return err;
372 }
373 }
374 return 0;
375}
376
c1c9d09c 377/**
2db4e78f 378 * tvp514x_query_current_std() : Query the current standard detected by TVP5146/47
c1c9d09c
MK
379 * @sd: ptr to v4l2_subdev struct
380 *
2db4e78f 381 * Returns the current standard detected by TVP5146/47, STD_INVALID if there is no
c1c9d09c 382 * standard detected.
07b1747c 383 */
2db4e78f 384static enum tvp514x_std tvp514x_query_current_std(struct v4l2_subdev *sd)
07b1747c
VH
385{
386 u8 std, std_status;
387
62ef80a1
MK
388 std = tvp514x_read_reg(sd, REG_VIDEO_STD);
389 if ((std & VIDEO_STD_MASK) == VIDEO_STD_AUTO_SWITCH_BIT)
07b1747c 390 /* use the standard status register */
62ef80a1
MK
391 std_status = tvp514x_read_reg(sd, REG_VIDEO_STD_STATUS);
392 else
c1c9d09c
MK
393 /* use the standard register itself */
394 std_status = std;
07b1747c
VH
395
396 switch (std_status & VIDEO_STD_MASK) {
397 case VIDEO_STD_NTSC_MJ_BIT:
398 return STD_NTSC_MJ;
399
400 case VIDEO_STD_PAL_BDGHIN_BIT:
401 return STD_PAL_BDGHIN;
402
403 default:
404 return STD_INVALID;
405 }
406
407 return STD_INVALID;
408}
409
c1c9d09c 410/* TVP5146/47 register dump function */
62ef80a1 411static void tvp514x_reg_dump(struct v4l2_subdev *sd)
07b1747c 412{
62ef80a1
MK
413 dump_reg(sd, REG_INPUT_SEL);
414 dump_reg(sd, REG_AFE_GAIN_CTRL);
415 dump_reg(sd, REG_VIDEO_STD);
416 dump_reg(sd, REG_OPERATION_MODE);
417 dump_reg(sd, REG_COLOR_KILLER);
418 dump_reg(sd, REG_LUMA_CONTROL1);
419 dump_reg(sd, REG_LUMA_CONTROL2);
420 dump_reg(sd, REG_LUMA_CONTROL3);
421 dump_reg(sd, REG_BRIGHTNESS);
422 dump_reg(sd, REG_CONTRAST);
423 dump_reg(sd, REG_SATURATION);
424 dump_reg(sd, REG_HUE);
425 dump_reg(sd, REG_CHROMA_CONTROL1);
426 dump_reg(sd, REG_CHROMA_CONTROL2);
427 dump_reg(sd, REG_COMP_PR_SATURATION);
428 dump_reg(sd, REG_COMP_Y_CONTRAST);
429 dump_reg(sd, REG_COMP_PB_SATURATION);
430 dump_reg(sd, REG_COMP_Y_BRIGHTNESS);
431 dump_reg(sd, REG_AVID_START_PIXEL_LSB);
432 dump_reg(sd, REG_AVID_START_PIXEL_MSB);
433 dump_reg(sd, REG_AVID_STOP_PIXEL_LSB);
434 dump_reg(sd, REG_AVID_STOP_PIXEL_MSB);
435 dump_reg(sd, REG_HSYNC_START_PIXEL_LSB);
436 dump_reg(sd, REG_HSYNC_START_PIXEL_MSB);
437 dump_reg(sd, REG_HSYNC_STOP_PIXEL_LSB);
438 dump_reg(sd, REG_HSYNC_STOP_PIXEL_MSB);
439 dump_reg(sd, REG_VSYNC_START_LINE_LSB);
440 dump_reg(sd, REG_VSYNC_START_LINE_MSB);
441 dump_reg(sd, REG_VSYNC_STOP_LINE_LSB);
442 dump_reg(sd, REG_VSYNC_STOP_LINE_MSB);
443 dump_reg(sd, REG_VBLK_START_LINE_LSB);
444 dump_reg(sd, REG_VBLK_START_LINE_MSB);
445 dump_reg(sd, REG_VBLK_STOP_LINE_LSB);
446 dump_reg(sd, REG_VBLK_STOP_LINE_MSB);
447 dump_reg(sd, REG_SYNC_CONTROL);
448 dump_reg(sd, REG_OUTPUT_FORMATTER1);
449 dump_reg(sd, REG_OUTPUT_FORMATTER2);
450 dump_reg(sd, REG_OUTPUT_FORMATTER3);
451 dump_reg(sd, REG_OUTPUT_FORMATTER4);
452 dump_reg(sd, REG_OUTPUT_FORMATTER5);
453 dump_reg(sd, REG_OUTPUT_FORMATTER6);
454 dump_reg(sd, REG_CLEAR_LOST_LOCK);
07b1747c
VH
455}
456
c1c9d09c
MK
457/**
458 * tvp514x_configure() - Configure the TVP5146/47 registers
459 * @sd: ptr to v4l2_subdev struct
460 * @decoder: ptr to tvp514x_decoder structure
461 *
07b1747c
VH
462 * Returns zero if successful, or non-zero otherwise.
463 */
62ef80a1
MK
464static int tvp514x_configure(struct v4l2_subdev *sd,
465 struct tvp514x_decoder *decoder)
07b1747c
VH
466{
467 int err;
468
469 /* common register initialization */
470 err =
62ef80a1 471 tvp514x_write_regs(sd, decoder->tvp514x_regs);
07b1747c
VH
472 if (err)
473 return err;
474
475 if (debug)
62ef80a1 476 tvp514x_reg_dump(sd);
07b1747c
VH
477
478 return 0;
479}
480
c1c9d09c
MK
481/**
482 * tvp514x_detect() - Detect if an tvp514x is present, and if so which revision.
483 * @sd: pointer to standard V4L2 sub-device structure
484 * @decoder: pointer to tvp514x_decoder structure
485 *
07b1747c
VH
486 * A device is considered to be detected if the chip ID (LSB and MSB)
487 * registers match the expected values.
488 * Any value of the rom version register is accepted.
489 * Returns ENODEV error number if no device is detected, or zero
490 * if a device is detected.
491 */
62ef80a1
MK
492static int tvp514x_detect(struct v4l2_subdev *sd,
493 struct tvp514x_decoder *decoder)
07b1747c
VH
494{
495 u8 chip_id_msb, chip_id_lsb, rom_ver;
62ef80a1 496 struct i2c_client *client = v4l2_get_subdevdata(sd);
07b1747c 497
62ef80a1
MK
498 chip_id_msb = tvp514x_read_reg(sd, REG_CHIP_ID_MSB);
499 chip_id_lsb = tvp514x_read_reg(sd, REG_CHIP_ID_LSB);
500 rom_ver = tvp514x_read_reg(sd, REG_ROM_VERSION);
07b1747c 501
62ef80a1 502 v4l2_dbg(1, debug, sd,
07b1747c
VH
503 "chip id detected msb:0x%x lsb:0x%x rom version:0x%x\n",
504 chip_id_msb, chip_id_lsb, rom_ver);
505 if ((chip_id_msb != TVP514X_CHIP_ID_MSB)
506 || ((chip_id_lsb != TVP5146_CHIP_ID_LSB)
507 && (chip_id_lsb != TVP5147_CHIP_ID_LSB))) {
508 /* We didn't read the values we expected, so this must not be
509 * an TVP5146/47.
510 */
62ef80a1
MK
511 v4l2_err(sd, "chip id mismatch msb:0x%x lsb:0x%x\n",
512 chip_id_msb, chip_id_lsb);
07b1747c
VH
513 return -ENODEV;
514 }
515
516 decoder->ver = rom_ver;
07b1747c 517
62ef80a1
MK
518 v4l2_info(sd, "%s (Version - 0x%.2x) found at 0x%x (%s)\n",
519 client->name, decoder->ver,
520 client->addr << 1, client->adapter->name);
07b1747c
VH
521 return 0;
522}
523
c1c9d09c
MK
524/**
525 * tvp514x_querystd() - V4L2 decoder interface handler for querystd
62ef80a1 526 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
527 * @std_id: standard V4L2 std_id ioctl enum
528 *
529 * Returns the current standard detected by TVP5146/47. If no active input is
2db4e78f 530 * detected then *std_id is set to 0 and the function returns 0.
07b1747c 531 */
62ef80a1 532static int tvp514x_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
07b1747c 533{
62ef80a1 534 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
535 enum tvp514x_std current_std;
536 enum tvp514x_input input_sel;
537 u8 sync_lock_status, lock_mask;
538
539 if (std_id == NULL)
540 return -EINVAL;
541
c389648a
HV
542 /* To query the standard the TVP514x must power on the ADCs. */
543 if (!decoder->streaming) {
544 tvp514x_s_stream(sd, 1);
545 msleep(LOCK_RETRY_DELAY);
546 }
547
2db4e78f
HV
548 /* query the current standard */
549 current_std = tvp514x_query_current_std(sd);
55852cbb
HV
550 if (current_std == STD_INVALID) {
551 *std_id = V4L2_STD_UNKNOWN;
2db4e78f 552 return 0;
55852cbb 553 }
07b1747c 554
62ef80a1 555 input_sel = decoder->input;
07b1747c
VH
556
557 switch (input_sel) {
558 case INPUT_CVBS_VI1A:
559 case INPUT_CVBS_VI1B:
560 case INPUT_CVBS_VI1C:
561 case INPUT_CVBS_VI2A:
562 case INPUT_CVBS_VI2B:
563 case INPUT_CVBS_VI2C:
564 case INPUT_CVBS_VI3A:
565 case INPUT_CVBS_VI3B:
566 case INPUT_CVBS_VI3C:
567 case INPUT_CVBS_VI4A:
568 lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
569 STATUS_HORZ_SYNC_LOCK_BIT |
570 STATUS_VIRT_SYNC_LOCK_BIT;
571 break;
572
573 case INPUT_SVIDEO_VI2A_VI1A:
574 case INPUT_SVIDEO_VI2B_VI1B:
575 case INPUT_SVIDEO_VI2C_VI1C:
576 case INPUT_SVIDEO_VI2A_VI3A:
577 case INPUT_SVIDEO_VI2B_VI3B:
578 case INPUT_SVIDEO_VI2C_VI3C:
579 case INPUT_SVIDEO_VI4A_VI1A:
580 case INPUT_SVIDEO_VI4A_VI1B:
581 case INPUT_SVIDEO_VI4A_VI1C:
582 case INPUT_SVIDEO_VI4A_VI3A:
583 case INPUT_SVIDEO_VI4A_VI3B:
584 case INPUT_SVIDEO_VI4A_VI3C:
585 lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
586 STATUS_VIRT_SYNC_LOCK_BIT;
587 break;
588 /*Need to add other interfaces*/
589 default:
590 return -EINVAL;
591 }
592 /* check whether signal is locked */
62ef80a1 593 sync_lock_status = tvp514x_read_reg(sd, REG_STATUS1);
55852cbb
HV
594 if (lock_mask != (sync_lock_status & lock_mask)) {
595 *std_id = V4L2_STD_UNKNOWN;
2db4e78f 596 return 0; /* No input detected */
55852cbb 597 }
07b1747c 598
55852cbb 599 *std_id &= decoder->std_list[current_std].standard.id;
07b1747c 600
2db4e78f 601 v4l2_dbg(1, debug, sd, "Current STD: %s\n",
07b1747c
VH
602 decoder->std_list[current_std].standard.name);
603 return 0;
604}
605
c1c9d09c
MK
606/**
607 * tvp514x_s_std() - V4L2 decoder interface handler for s_std
62ef80a1 608 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
609 * @std_id: standard V4L2 v4l2_std_id ioctl enum
610 *
611 * If std_id is supported, sets the requested standard. Otherwise, returns
612 * -EINVAL
613 */
62ef80a1 614static int tvp514x_s_std(struct v4l2_subdev *sd, v4l2_std_id std_id)
07b1747c 615{
62ef80a1 616 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
617 int err, i;
618
07b1747c 619 for (i = 0; i < decoder->num_stds; i++)
62ef80a1 620 if (std_id & decoder->std_list[i].standard.id)
07b1747c
VH
621 break;
622
623 if ((i == decoder->num_stds) || (i == STD_INVALID))
624 return -EINVAL;
625
62ef80a1 626 err = tvp514x_write_reg(sd, REG_VIDEO_STD,
07b1747c
VH
627 decoder->std_list[i].video_std);
628 if (err)
629 return err;
630
631 decoder->current_std = i;
6722e0ef
SAS
632 decoder->tvp514x_regs[REG_VIDEO_STD].val =
633 decoder->std_list[i].video_std;
07b1747c 634
3907b072 635 v4l2_dbg(1, debug, sd, "Standard set to: %s\n",
07b1747c
VH
636 decoder->std_list[i].standard.name);
637 return 0;
638}
639
c1c9d09c
MK
640/**
641 * tvp514x_s_routing() - V4L2 decoder interface handler for s_routing
62ef80a1 642 * @sd: pointer to standard V4L2 sub-device structure
c1c9d09c
MK
643 * @input: input selector for routing the signal
644 * @output: output selector for routing the signal
645 * @config: config value. Not used
07b1747c
VH
646 *
647 * If index is valid, selects the requested input. Otherwise, returns -EINVAL if
648 * the input is not supported or there is no active signal present in the
649 * selected input.
650 */
62ef80a1
MK
651static int tvp514x_s_routing(struct v4l2_subdev *sd,
652 u32 input, u32 output, u32 config)
07b1747c 653{
62ef80a1 654 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
655 int err;
656 enum tvp514x_input input_sel;
657 enum tvp514x_output output_sel;
07b1747c 658
62ef80a1
MK
659 if ((input >= INPUT_INVALID) ||
660 (output >= OUTPUT_INVALID))
c1c9d09c
MK
661 /* Index out of bound */
662 return -EINVAL;
07b1747c 663
62ef80a1
MK
664 input_sel = input;
665 output_sel = output;
07b1747c 666
62ef80a1 667 err = tvp514x_write_reg(sd, REG_INPUT_SEL, input_sel);
07b1747c
VH
668 if (err)
669 return err;
670
62ef80a1 671 output_sel |= tvp514x_read_reg(sd,
07b1747c 672 REG_OUTPUT_FORMATTER1) & 0x7;
62ef80a1 673 err = tvp514x_write_reg(sd, REG_OUTPUT_FORMATTER1,
07b1747c
VH
674 output_sel);
675 if (err)
676 return err;
677
6722e0ef
SAS
678 decoder->tvp514x_regs[REG_INPUT_SEL].val = input_sel;
679 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER1].val = output_sel;
62ef80a1
MK
680 decoder->input = input;
681 decoder->output = output;
07b1747c 682
2db4e78f 683 v4l2_dbg(1, debug, sd, "Input set to: %d\n", input_sel);
07b1747c
VH
684
685 return 0;
686}
687
c1c9d09c
MK
688/**
689 * tvp514x_s_ctrl() - V4L2 decoder interface handler for s_ctrl
cf6832af 690 * @ctrl: pointer to v4l2_ctrl structure
07b1747c
VH
691 *
692 * If the requested control is supported, sets the control's current
693 * value in HW. Otherwise, returns -EINVAL if the control is not supported.
694 */
cf6832af 695static int tvp514x_s_ctrl(struct v4l2_ctrl *ctrl)
07b1747c 696{
cf6832af 697 struct v4l2_subdev *sd = to_sd(ctrl);
62ef80a1 698 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
699 int err = -EINVAL, value;
700
cf6832af 701 value = ctrl->val;
07b1747c
VH
702
703 switch (ctrl->id) {
704 case V4L2_CID_BRIGHTNESS:
cf6832af
HV
705 err = tvp514x_write_reg(sd, REG_BRIGHTNESS, value);
706 if (!err)
707 decoder->tvp514x_regs[REG_BRIGHTNESS].val = value;
07b1747c
VH
708 break;
709 case V4L2_CID_CONTRAST:
62ef80a1 710 err = tvp514x_write_reg(sd, REG_CONTRAST, value);
cf6832af
HV
711 if (!err)
712 decoder->tvp514x_regs[REG_CONTRAST].val = value;
07b1747c
VH
713 break;
714 case V4L2_CID_SATURATION:
62ef80a1 715 err = tvp514x_write_reg(sd, REG_SATURATION, value);
cf6832af
HV
716 if (!err)
717 decoder->tvp514x_regs[REG_SATURATION].val = value;
07b1747c
VH
718 break;
719 case V4L2_CID_HUE:
720 if (value == 180)
721 value = 0x7F;
722 else if (value == -180)
723 value = 0x80;
62ef80a1 724 err = tvp514x_write_reg(sd, REG_HUE, value);
cf6832af
HV
725 if (!err)
726 decoder->tvp514x_regs[REG_HUE].val = value;
07b1747c
VH
727 break;
728 case V4L2_CID_AUTOGAIN:
cf6832af
HV
729 err = tvp514x_write_reg(sd, REG_AFE_GAIN_CTRL, value ? 0x0f : 0x0c);
730 if (!err)
731 decoder->tvp514x_regs[REG_AFE_GAIN_CTRL].val = value;
07b1747c 732 break;
07b1747c
VH
733 }
734
3907b072 735 v4l2_dbg(1, debug, sd, "Set Control: ID - %d - %d\n",
cf6832af 736 ctrl->id, ctrl->val);
07b1747c
VH
737 return err;
738}
739
c1c9d09c 740/**
4471109e 741 * tvp514x_g_frame_interval() - V4L2 decoder interface handler
62ef80a1 742 * @sd: pointer to standard V4L2 sub-device structure
225fe212 743 * @ival: pointer to a v4l2_subdev_frame_interval structure
07b1747c
VH
744 *
745 * Returns the decoder's video CAPTURE parameters.
746 */
747static int
4471109e
HV
748tvp514x_g_frame_interval(struct v4l2_subdev *sd,
749 struct v4l2_subdev_frame_interval *ival)
07b1747c 750{
62ef80a1 751 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
752 enum tvp514x_std current_std;
753
07b1747c 754
07b1747c 755 /* get the current standard */
2db4e78f 756 current_std = decoder->current_std;
07b1747c 757
4471109e 758 ival->interval =
07b1747c
VH
759 decoder->std_list[current_std].standard.frameperiod;
760
761 return 0;
762}
763
c1c9d09c 764/**
4471109e 765 * tvp514x_s_frame_interval() - V4L2 decoder interface handler
62ef80a1 766 * @sd: pointer to standard V4L2 sub-device structure
225fe212 767 * @ival: pointer to a v4l2_subdev_frame_interval structure
07b1747c
VH
768 *
769 * Configures the decoder to use the input parameters, if possible. If
770 * not possible, returns the appropriate error code.
771 */
772static int
4471109e
HV
773tvp514x_s_frame_interval(struct v4l2_subdev *sd,
774 struct v4l2_subdev_frame_interval *ival)
07b1747c 775{
62ef80a1 776 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
777 struct v4l2_fract *timeperframe;
778 enum tvp514x_std current_std;
779
07b1747c 780
4471109e 781 timeperframe = &ival->interval;
07b1747c
VH
782
783 /* get the current standard */
2db4e78f 784 current_std = decoder->current_std;
07b1747c
VH
785
786 *timeperframe =
787 decoder->std_list[current_std].standard.frameperiod;
788
789 return 0;
790}
791
c1c9d09c
MK
792/**
793 * tvp514x_s_stream() - V4L2 decoder i/f handler for s_stream
62ef80a1
MK
794 * @sd: pointer to standard V4L2 sub-device structure
795 * @enable: streaming enable or disable
07b1747c 796 *
62ef80a1 797 * Sets streaming to enable or disable, if possible.
07b1747c 798 */
62ef80a1 799static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable)
07b1747c 800{
07b1747c 801 int err = 0;
62ef80a1 802 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 803
62ef80a1
MK
804 if (decoder->streaming == enable)
805 return 0;
07b1747c 806
62ef80a1
MK
807 switch (enable) {
808 case 0:
809 {
810 /* Power Down Sequence */
811 err = tvp514x_write_reg(sd, REG_OPERATION_MODE, 0x01);
812 if (err) {
813 v4l2_err(sd, "Unable to turn off decoder\n");
814 return err;
815 }
816 decoder->streaming = enable;
07b1747c 817 break;
62ef80a1
MK
818 }
819 case 1:
820 {
62ef80a1 821 /* Power Up Sequence */
f0a12d0c 822 err = tvp514x_write_regs(sd, decoder->int_seq);
62ef80a1
MK
823 if (err) {
824 v4l2_err(sd, "Unable to turn on decoder\n");
825 return err;
826 }
827 /* Detect if not already detected */
828 err = tvp514x_detect(sd, decoder);
829 if (err) {
830 v4l2_err(sd, "Unable to detect decoder\n");
831 return err;
07b1747c 832 }
62ef80a1
MK
833 err = tvp514x_configure(sd, decoder);
834 if (err) {
835 v4l2_err(sd, "Unable to configure decoder\n");
836 return err;
837 }
838 decoder->streaming = enable;
07b1747c 839 break;
62ef80a1 840 }
07b1747c
VH
841 default:
842 err = -ENODEV;
843 break;
844 }
845
846 return err;
847}
848
cf6832af 849static const struct v4l2_ctrl_ops tvp514x_ctrl_ops = {
62ef80a1 850 .s_ctrl = tvp514x_s_ctrl,
cf6832af
HV
851};
852
5b38b0f8
MH
853/**
854 * tvp514x_enum_mbus_code() - V4L2 decoder interface handler for enum_mbus_code
855 * @sd: pointer to standard V4L2 sub-device structure
0d346d2a 856 * @sd_state: subdev state
5b38b0f8
MH
857 * @code: pointer to v4l2_subdev_mbus_code_enum structure
858 *
859 * Enumertaes mbus codes supported
860 */
861static int tvp514x_enum_mbus_code(struct v4l2_subdev *sd,
0d346d2a 862 struct v4l2_subdev_state *sd_state,
5b38b0f8
MH
863 struct v4l2_subdev_mbus_code_enum *code)
864{
865 u32 pad = code->pad;
866 u32 index = code->index;
867
868 memset(code, 0, sizeof(*code));
869 code->index = index;
870 code->pad = pad;
871
872 if (index != 0)
873 return -EINVAL;
874
1a33ac00 875 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
5b38b0f8
MH
876
877 return 0;
878}
879
880/**
881 * tvp514x_get_pad_format() - V4L2 decoder interface handler for get pad format
882 * @sd: pointer to standard V4L2 sub-device structure
0d346d2a 883 * @sd_state: subdev state
5b38b0f8
MH
884 * @format: pointer to v4l2_subdev_format structure
885 *
886 * Retrieves pad format which is active or tried based on requirement
887 */
888static int tvp514x_get_pad_format(struct v4l2_subdev *sd,
0d346d2a 889 struct v4l2_subdev_state *sd_state,
5b38b0f8
MH
890 struct v4l2_subdev_format *format)
891{
892 struct tvp514x_decoder *decoder = to_decoder(sd);
893 __u32 which = format->which;
894
da298c6d
HV
895 if (format->pad)
896 return -EINVAL;
897
5b38b0f8
MH
898 if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {
899 format->format = decoder->format;
900 return 0;
901 }
902
1a33ac00 903 format->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
5b38b0f8
MH
904 format->format.width = tvp514x_std_list[decoder->current_std].width;
905 format->format.height = tvp514x_std_list[decoder->current_std].height;
906 format->format.colorspace = V4L2_COLORSPACE_SMPTE170M;
907 format->format.field = V4L2_FIELD_INTERLACED;
908
909 return 0;
910}
911
912/**
913 * tvp514x_set_pad_format() - V4L2 decoder interface handler for set pad format
914 * @sd: pointer to standard V4L2 sub-device structure
0d346d2a 915 * @sd_state: subdev state
c5bb8318 916 * @fmt: pointer to v4l2_subdev_format structure
5b38b0f8
MH
917 *
918 * Set pad format for the output pad
919 */
920static int tvp514x_set_pad_format(struct v4l2_subdev *sd,
0d346d2a 921 struct v4l2_subdev_state *sd_state,
5b38b0f8
MH
922 struct v4l2_subdev_format *fmt)
923{
924 struct tvp514x_decoder *decoder = to_decoder(sd);
925
926 if (fmt->format.field != V4L2_FIELD_INTERLACED ||
1a33ac00 927 fmt->format.code != MEDIA_BUS_FMT_UYVY8_2X8 ||
5b38b0f8
MH
928 fmt->format.colorspace != V4L2_COLORSPACE_SMPTE170M ||
929 fmt->format.width != tvp514x_std_list[decoder->current_std].width ||
930 fmt->format.height != tvp514x_std_list[decoder->current_std].height)
931 return -EINVAL;
932
933 decoder->format = fmt->format;
934
935 return 0;
936}
937
62ef80a1 938static const struct v4l2_subdev_video_ops tvp514x_video_ops = {
8774bed9 939 .s_std = tvp514x_s_std,
62ef80a1
MK
940 .s_routing = tvp514x_s_routing,
941 .querystd = tvp514x_querystd,
4471109e
HV
942 .g_frame_interval = tvp514x_g_frame_interval,
943 .s_frame_interval = tvp514x_s_frame_interval,
62ef80a1
MK
944 .s_stream = tvp514x_s_stream,
945};
07b1747c 946
5b38b0f8
MH
947static const struct v4l2_subdev_pad_ops tvp514x_pad_ops = {
948 .enum_mbus_code = tvp514x_enum_mbus_code,
949 .get_fmt = tvp514x_get_pad_format,
950 .set_fmt = tvp514x_set_pad_format,
951};
952
62ef80a1 953static const struct v4l2_subdev_ops tvp514x_ops = {
62ef80a1 954 .video = &tvp514x_video_ops,
5b38b0f8 955 .pad = &tvp514x_pad_ops,
07b1747c
VH
956};
957
db83d08d 958static const struct tvp514x_decoder tvp514x_dev = {
62ef80a1 959 .streaming = 0,
5b38b0f8
MH
960 .fmt_list = tvp514x_fmt_list,
961 .num_fmts = ARRAY_SIZE(tvp514x_fmt_list),
962 .pix = {
963 /* Default to NTSC 8-bit YUV 422 */
964 .width = NTSC_NUM_ACTIVE_PIXELS,
965 .height = NTSC_NUM_ACTIVE_LINES,
966 .pixelformat = V4L2_PIX_FMT_UYVY,
967 .field = V4L2_FIELD_INTERLACED,
968 .bytesperline = NTSC_NUM_ACTIVE_PIXELS * 2,
969 .sizeimage = NTSC_NUM_ACTIVE_PIXELS * 2 *
970 NTSC_NUM_ACTIVE_LINES,
971 .colorspace = V4L2_COLORSPACE_SMPTE170M,
972 },
07b1747c
VH
973 .current_std = STD_NTSC_MJ,
974 .std_list = tvp514x_std_list,
975 .num_stds = ARRAY_SIZE(tvp514x_std_list),
62ef80a1 976
07b1747c
VH
977};
978
b610b592
LP
979static struct tvp514x_platform_data *
980tvp514x_get_pdata(struct i2c_client *client)
981{
fe1e6ac6 982 struct tvp514x_platform_data *pdata = NULL;
60359a28 983 struct v4l2_fwnode_endpoint bus_cfg = { .bus_type = 0 };
b610b592
LP
984 struct device_node *endpoint;
985 unsigned int flags;
986
987 if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
988 return client->dev.platform_data;
989
fd9fdb78 990 endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
b610b592
LP
991 if (!endpoint)
992 return NULL;
993
859969b3 994 if (v4l2_fwnode_endpoint_parse(of_fwnode_handle(endpoint), &bus_cfg))
fe1e6ac6
JMC
995 goto done;
996
b610b592
LP
997 pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
998 if (!pdata)
999 goto done;
1000
b610b592
LP
1001 flags = bus_cfg.bus.parallel.flags;
1002
1003 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1004 pdata->hs_polarity = 1;
1005
1006 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
1007 pdata->vs_polarity = 1;
1008
1009 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1010 pdata->clk_polarity = 1;
1011
1012done:
1013 of_node_put(endpoint);
1014 return pdata;
1015}
1016
c1c9d09c
MK
1017/**
1018 * tvp514x_probe() - decoder driver i2c probe handler
07b1747c 1019 * @client: i2c driver client device structure
62ef80a1 1020 * @id: i2c driver id table
07b1747c
VH
1021 *
1022 * Register decoder as an i2c client device and V4L2
1023 * device.
1024 */
1025static int
1026tvp514x_probe(struct i2c_client *client, const struct i2c_device_id *id)
1027{
b610b592 1028 struct tvp514x_platform_data *pdata = tvp514x_get_pdata(client);
6722e0ef 1029 struct tvp514x_decoder *decoder;
62ef80a1 1030 struct v4l2_subdev *sd;
5b38b0f8 1031 int ret;
07b1747c 1032
b610b592
LP
1033 if (pdata == NULL) {
1034 dev_err(&client->dev, "No platform data\n");
1035 return -EINVAL;
1036 }
1037
07b1747c
VH
1038 /* Check if the adapter supports the needed features */
1039 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1040 return -EIO;
1041
08754d31 1042 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
6722e0ef
SAS
1043 if (!decoder)
1044 return -ENOMEM;
1045
c1c9d09c 1046 /* Initialize the tvp514x_decoder with default configuration */
6722e0ef 1047 *decoder = tvp514x_dev;
62ef80a1 1048 /* Copy default register configuration */
6722e0ef
SAS
1049 memcpy(decoder->tvp514x_regs, tvp514x_reg_list_default,
1050 sizeof(tvp514x_reg_list_default));
62ef80a1 1051
f0a12d0c
LPC
1052 decoder->int_seq = (struct tvp514x_reg *)id->driver_data;
1053
c1c9d09c 1054 /* Copy board specific information here */
b610b592 1055 decoder->pdata = pdata;
62ef80a1 1056
c1c9d09c 1057 /**
07b1747c
VH
1058 * Fetch platform specific data, and configure the
1059 * tvp514x_reg_list[] accordingly. Since this is one
1060 * time configuration, no need to preserve.
1061 */
6722e0ef 1062 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER2].val |=
62ef80a1 1063 (decoder->pdata->clk_polarity << 1);
6722e0ef 1064 decoder->tvp514x_regs[REG_SYNC_CONTROL].val |=
62ef80a1
MK
1065 ((decoder->pdata->hs_polarity << 2) |
1066 (decoder->pdata->vs_polarity << 3));
1067 /* Set default standard to auto */
1068 decoder->tvp514x_regs[REG_VIDEO_STD].val =
1069 VIDEO_STD_AUTO_SWITCH_BIT;
07b1747c
VH
1070
1071 /* Register with V4L2 layer as slave device */
62ef80a1
MK
1072 sd = &decoder->sd;
1073 v4l2_i2c_subdev_init(sd, client, &tvp514x_ops);
5b38b0f8
MH
1074
1075#if defined(CONFIG_MEDIA_CONTROLLER)
1076 decoder->pad.flags = MEDIA_PAD_FL_SOURCE;
1077 decoder->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
ca0fa5f0 1078 decoder->sd.entity.function = MEDIA_ENT_F_ATV_DECODER;
5b38b0f8 1079
ab22e77c 1080 ret = media_entity_pads_init(&decoder->sd.entity, 1, &decoder->pad);
5b38b0f8
MH
1081 if (ret < 0) {
1082 v4l2_err(sd, "%s decoder driver failed to register !!\n",
1083 sd->name);
5b38b0f8
MH
1084 return ret;
1085 }
1086#endif
cf6832af
HV
1087 v4l2_ctrl_handler_init(&decoder->hdl, 5);
1088 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1089 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1090 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1091 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1092 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1093 V4L2_CID_SATURATION, 0, 255, 1, 128);
1094 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1095 V4L2_CID_HUE, -180, 180, 180, 0);
1096 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1097 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1098 sd->ctrl_handler = &decoder->hdl;
1099 if (decoder->hdl.error) {
5b38b0f8 1100 ret = decoder->hdl.error;
8f23acb5 1101 goto done;
cf6832af
HV
1102 }
1103 v4l2_ctrl_handler_setup(&decoder->hdl);
1104
8f23acb5
LP
1105 ret = v4l2_async_register_subdev(&decoder->sd);
1106 if (!ret)
1107 v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
6722e0ef 1108
8f23acb5
LP
1109done:
1110 if (ret < 0) {
1111 v4l2_ctrl_handler_free(&decoder->hdl);
8f23acb5 1112 media_entity_cleanup(&decoder->sd.entity);
8f23acb5
LP
1113 }
1114 return ret;
07b1747c
VH
1115}
1116
c1c9d09c
MK
1117/**
1118 * tvp514x_remove() - decoder driver i2c remove handler
07b1747c
VH
1119 * @client: i2c driver client device structure
1120 *
1121 * Unregister decoder as an i2c client device and V4L2
1122 * device. Complement of tvp514x_probe().
1123 */
62ef80a1 1124static int tvp514x_remove(struct i2c_client *client)
07b1747c 1125{
62ef80a1
MK
1126 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1127 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 1128
8f23acb5 1129 v4l2_async_unregister_subdev(&decoder->sd);
5b38b0f8 1130 media_entity_cleanup(&decoder->sd.entity);
cf6832af 1131 v4l2_ctrl_handler_free(&decoder->hdl);
07b1747c
VH
1132 return 0;
1133}
c1c9d09c 1134/* TVP5146 Init/Power on Sequence */
07b1747c
VH
1135static const struct tvp514x_reg tvp5146_init_reg_seq[] = {
1136 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1137 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1138 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1139 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1140 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1141 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1142 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1143 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1144 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1145 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1146 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1147 {TOK_TERM, 0, 0},
07b1747c 1148};
62ef80a1 1149
c1c9d09c 1150/* TVP5147 Init/Power on Sequence */
07b1747c
VH
1151static const struct tvp514x_reg tvp5147_init_reg_seq[] = {
1152 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1153 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1154 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1155 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1156 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1157 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1158 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1159 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1160 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x16},
1161 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1162 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xA0},
1163 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x16},
1164 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1165 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1166 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1167 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1168 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1169 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1170 {TOK_TERM, 0, 0},
07b1747c 1171};
62ef80a1 1172
c1c9d09c 1173/* TVP5146M2/TVP5147M1 Init/Power on Sequence */
07b1747c
VH
1174static const struct tvp514x_reg tvp514xm_init_reg_seq[] = {
1175 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1176 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1177 {TOK_TERM, 0, 0},
07b1747c 1178};
62ef80a1 1179
c5bb8318 1180/*
07b1747c
VH
1181 * I2C Device Table -
1182 *
1183 * name - Name of the actual device/chip.
1184 * driver_data - Driver data
1185 */
1186static const struct i2c_device_id tvp514x_id[] = {
62ef80a1
MK
1187 {"tvp5146", (unsigned long)tvp5146_init_reg_seq},
1188 {"tvp5146m2", (unsigned long)tvp514xm_init_reg_seq},
1189 {"tvp5147", (unsigned long)tvp5147_init_reg_seq},
1190 {"tvp5147m1", (unsigned long)tvp514xm_init_reg_seq},
07b1747c
VH
1191 {},
1192};
1193
1194MODULE_DEVICE_TABLE(i2c, tvp514x_id);
1195
b610b592
LP
1196#if IS_ENABLED(CONFIG_OF)
1197static const struct of_device_id tvp514x_of_match[] = {
1198 { .compatible = "ti,tvp5146", },
1199 { .compatible = "ti,tvp5146m2", },
1200 { .compatible = "ti,tvp5147", },
1201 { .compatible = "ti,tvp5147m1", },
1202 { /* sentinel */ },
1203};
1204MODULE_DEVICE_TABLE(of, tvp514x_of_match);
1205#endif
1206
62ef80a1 1207static struct i2c_driver tvp514x_driver = {
07b1747c 1208 .driver = {
b610b592 1209 .of_match_table = of_match_ptr(tvp514x_of_match),
62ef80a1
MK
1210 .name = TVP514X_MODULE_NAME,
1211 },
07b1747c 1212 .probe = tvp514x_probe,
62ef80a1 1213 .remove = tvp514x_remove,
07b1747c
VH
1214 .id_table = tvp514x_id,
1215};
1216
c6e8d86f 1217module_i2c_driver(tvp514x_driver);