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[mirror_ubuntu-artful-kernel.git] / drivers / media / i2c / tvp514x.c
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07b1747c 1/*
cb7a01ac 2 * drivers/media/i2c/tvp514x.c
07b1747c
VH
3 *
4 * TI TVP5146/47 decoder driver
5 *
6 * Copyright (C) 2008 Texas Instruments Inc
7 * Author: Vaibhav Hiremath <hvaibhav@ti.com>
8 *
9 * Contributors:
10 * Sivaraj R <sivaraj@ti.com>
11 * Brijesh R Jadav <brijesh.j@ti.com>
12 * Hardik Shah <hardik.shah@ti.com>
13 * Manjunath Hadli <mrh@ti.com>
14 * Karicheri Muralidharan <m-karicheri2@ti.com>
5b38b0f8 15 * Prabhakar Lad <prabhakar.lad@ti.com>
07b1747c
VH
16 *
17 * This package is free software; you can redistribute it and/or modify
18 * it under the terms of the GNU General Public License version 2 as
19 * published by the Free Software Foundation.
20 *
21 * This program is distributed in the hope that it will be useful,
22 * but WITHOUT ANY WARRANTY; without even the implied warranty of
23 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
24 * GNU General Public License for more details.
25 *
07b1747c
VH
26 */
27
28#include <linux/i2c.h>
5a0e3ad6 29#include <linux/slab.h>
07b1747c
VH
30#include <linux/delay.h>
31#include <linux/videodev2.h>
7a707b89 32#include <linux/module.h>
5b38b0f8 33#include <linux/v4l2-mediabus.h>
098bcba3 34#include <linux/of.h>
fd9fdb78 35#include <linux/of_graph.h>
62ef80a1 36
8f23acb5 37#include <media/v4l2-async.h>
62ef80a1
MK
38#include <media/v4l2-device.h>
39#include <media/v4l2-common.h>
83811913 40#include <media/v4l2-mediabus.h>
b610b592 41#include <media/v4l2-of.h>
cf6832af 42#include <media/v4l2-ctrls.h>
b5dcee22 43#include <media/i2c/tvp514x.h>
5b38b0f8 44#include <media/media-entity.h>
07b1747c
VH
45
46#include "tvp514x_regs.h"
47
07b1747c
VH
48/* Private macros for TVP */
49#define I2C_RETRY_COUNT (5)
50#define LOCK_RETRY_COUNT (5)
51#define LOCK_RETRY_DELAY (200)
52
53/* Debug functions */
90ab5ee9 54static bool debug;
07b1747c
VH
55module_param(debug, bool, 0644);
56MODULE_PARM_DESC(debug, "Debug level (0-1)");
57
62ef80a1
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58MODULE_AUTHOR("Texas Instruments");
59MODULE_DESCRIPTION("TVP514X linux decoder driver");
60MODULE_LICENSE("GPL");
07b1747c 61
c1c9d09c 62/* enum tvp514x_std - enum for supported standards */
07b1747c
VH
63enum tvp514x_std {
64 STD_NTSC_MJ = 0,
65 STD_PAL_BDGHIN,
66 STD_INVALID
67};
68
c1c9d09c 69/**
07b1747c
VH
70 * struct tvp514x_std_info - Structure to store standard informations
71 * @width: Line width in pixels
72 * @height:Number of active lines
73 * @video_std: Value to write in REG_VIDEO_STD register
74 * @standard: v4l2 standard structure information
75 */
76struct tvp514x_std_info {
77 unsigned long width;
78 unsigned long height;
79 u8 video_std;
80 struct v4l2_standard standard;
81};
82
6722e0ef 83static struct tvp514x_reg tvp514x_reg_list_default[0x40];
63b59cec
VH
84
85static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable);
c1c9d09c 86/**
6722e0ef 87 * struct tvp514x_decoder - TVP5146/47 decoder object
62ef80a1 88 * @sd: Subdevice Slave handle
6722e0ef 89 * @tvp514x_regs: copy of hw's regs with preset values.
07b1747c 90 * @pdata: Board specific
07b1747c 91 * @ver: Chip version
62ef80a1 92 * @streaming: TVP5146/47 decoder streaming - enabled or disabled.
5b38b0f8
MH
93 * @pix: Current pixel format
94 * @num_fmts: Number of formats
95 * @fmt_list: Format list
07b1747c
VH
96 * @current_std: Current standard
97 * @num_stds: Number of standards
98 * @std_list: Standards list
62ef80a1
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99 * @input: Input routing at chip level
100 * @output: Output routing at chip level
07b1747c
VH
101 */
102struct tvp514x_decoder {
62ef80a1 103 struct v4l2_subdev sd;
cf6832af 104 struct v4l2_ctrl_handler hdl;
6722e0ef 105 struct tvp514x_reg tvp514x_regs[ARRAY_SIZE(tvp514x_reg_list_default)];
07b1747c 106 const struct tvp514x_platform_data *pdata;
07b1747c
VH
107
108 int ver;
62ef80a1 109 int streaming;
07b1747c 110
5b38b0f8
MH
111 struct v4l2_pix_format pix;
112 int num_fmts;
113 const struct v4l2_fmtdesc *fmt_list;
114
07b1747c
VH
115 enum tvp514x_std current_std;
116 int num_stds;
a75ffc12 117 const struct tvp514x_std_info *std_list;
c1c9d09c 118 /* Input and Output Routing parameters */
62ef80a1
MK
119 u32 input;
120 u32 output;
5b38b0f8
MH
121
122 /* mc related members */
123 struct media_pad pad;
124 struct v4l2_mbus_framefmt format;
f0a12d0c
LPC
125
126 struct tvp514x_reg *int_seq;
07b1747c
VH
127};
128
129/* TVP514x default register values */
6722e0ef 130static struct tvp514x_reg tvp514x_reg_list_default[] = {
c1c9d09c
MK
131 /* Composite selected */
132 {TOK_WRITE, REG_INPUT_SEL, 0x05},
07b1747c 133 {TOK_WRITE, REG_AFE_GAIN_CTRL, 0x0F},
c1c9d09c
MK
134 /* Auto mode */
135 {TOK_WRITE, REG_VIDEO_STD, 0x00},
07b1747c
VH
136 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
137 {TOK_SKIP, REG_AUTOSWITCH_MASK, 0x3F},
138 {TOK_WRITE, REG_COLOR_KILLER, 0x10},
139 {TOK_WRITE, REG_LUMA_CONTROL1, 0x00},
140 {TOK_WRITE, REG_LUMA_CONTROL2, 0x00},
141 {TOK_WRITE, REG_LUMA_CONTROL3, 0x02},
142 {TOK_WRITE, REG_BRIGHTNESS, 0x80},
143 {TOK_WRITE, REG_CONTRAST, 0x80},
144 {TOK_WRITE, REG_SATURATION, 0x80},
145 {TOK_WRITE, REG_HUE, 0x00},
146 {TOK_WRITE, REG_CHROMA_CONTROL1, 0x00},
147 {TOK_WRITE, REG_CHROMA_CONTROL2, 0x0E},
c1c9d09c
MK
148 /* Reserved */
149 {TOK_SKIP, 0x0F, 0x00},
07b1747c
VH
150 {TOK_WRITE, REG_COMP_PR_SATURATION, 0x80},
151 {TOK_WRITE, REG_COMP_Y_CONTRAST, 0x80},
152 {TOK_WRITE, REG_COMP_PB_SATURATION, 0x80},
c1c9d09c
MK
153 /* Reserved */
154 {TOK_SKIP, 0x13, 0x00},
07b1747c 155 {TOK_WRITE, REG_COMP_Y_BRIGHTNESS, 0x80},
c1c9d09c
MK
156 /* Reserved */
157 {TOK_SKIP, 0x15, 0x00},
158 /* NTSC timing */
159 {TOK_SKIP, REG_AVID_START_PIXEL_LSB, 0x55},
07b1747c
VH
160 {TOK_SKIP, REG_AVID_START_PIXEL_MSB, 0x00},
161 {TOK_SKIP, REG_AVID_STOP_PIXEL_LSB, 0x25},
162 {TOK_SKIP, REG_AVID_STOP_PIXEL_MSB, 0x03},
c1c9d09c
MK
163 /* NTSC timing */
164 {TOK_SKIP, REG_HSYNC_START_PIXEL_LSB, 0x00},
07b1747c
VH
165 {TOK_SKIP, REG_HSYNC_START_PIXEL_MSB, 0x00},
166 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_LSB, 0x40},
167 {TOK_SKIP, REG_HSYNC_STOP_PIXEL_MSB, 0x00},
c1c9d09c
MK
168 /* NTSC timing */
169 {TOK_SKIP, REG_VSYNC_START_LINE_LSB, 0x04},
07b1747c
VH
170 {TOK_SKIP, REG_VSYNC_START_LINE_MSB, 0x00},
171 {TOK_SKIP, REG_VSYNC_STOP_LINE_LSB, 0x07},
172 {TOK_SKIP, REG_VSYNC_STOP_LINE_MSB, 0x00},
c1c9d09c
MK
173 /* NTSC timing */
174 {TOK_SKIP, REG_VBLK_START_LINE_LSB, 0x01},
07b1747c
VH
175 {TOK_SKIP, REG_VBLK_START_LINE_MSB, 0x00},
176 {TOK_SKIP, REG_VBLK_STOP_LINE_LSB, 0x15},
177 {TOK_SKIP, REG_VBLK_STOP_LINE_MSB, 0x00},
c1c9d09c
MK
178 /* Reserved */
179 {TOK_SKIP, 0x26, 0x00},
180 /* Reserved */
181 {TOK_SKIP, 0x27, 0x00},
07b1747c 182 {TOK_SKIP, REG_FAST_SWTICH_CONTROL, 0xCC},
c1c9d09c
MK
183 /* Reserved */
184 {TOK_SKIP, 0x29, 0x00},
07b1747c 185 {TOK_SKIP, REG_FAST_SWTICH_SCART_DELAY, 0x00},
c1c9d09c
MK
186 /* Reserved */
187 {TOK_SKIP, 0x2B, 0x00},
07b1747c
VH
188 {TOK_SKIP, REG_SCART_DELAY, 0x00},
189 {TOK_SKIP, REG_CTI_DELAY, 0x00},
190 {TOK_SKIP, REG_CTI_CONTROL, 0x00},
c1c9d09c
MK
191 /* Reserved */
192 {TOK_SKIP, 0x2F, 0x00},
193 /* Reserved */
194 {TOK_SKIP, 0x30, 0x00},
195 /* Reserved */
196 {TOK_SKIP, 0x31, 0x00},
197 /* HS, VS active high */
198 {TOK_WRITE, REG_SYNC_CONTROL, 0x00},
199 /* 10-bit BT.656 */
200 {TOK_WRITE, REG_OUTPUT_FORMATTER1, 0x00},
201 /* Enable clk & data */
202 {TOK_WRITE, REG_OUTPUT_FORMATTER2, 0x11},
203 /* Enable AVID & FLD */
204 {TOK_WRITE, REG_OUTPUT_FORMATTER3, 0xEE},
205 /* Enable VS & HS */
206 {TOK_WRITE, REG_OUTPUT_FORMATTER4, 0xAF},
07b1747c
VH
207 {TOK_WRITE, REG_OUTPUT_FORMATTER5, 0xFF},
208 {TOK_WRITE, REG_OUTPUT_FORMATTER6, 0xFF},
c1c9d09c
MK
209 /* Clear status */
210 {TOK_WRITE, REG_CLEAR_LOST_LOCK, 0x01},
07b1747c
VH
211 {TOK_TERM, 0, 0},
212};
213
5b38b0f8
MH
214/**
215 * List of image formats supported by TVP5146/47 decoder
216 * Currently we are using 8 bit mode only, but can be
217 * extended to 10/20 bit mode.
218 */
219static const struct v4l2_fmtdesc tvp514x_fmt_list[] = {
220 {
221 .index = 0,
222 .type = V4L2_BUF_TYPE_VIDEO_CAPTURE,
223 .flags = 0,
224 .description = "8-bit UYVY 4:2:2 Format",
225 .pixelformat = V4L2_PIX_FMT_UYVY,
226 },
227};
228
c1c9d09c 229/**
07b1747c
VH
230 * Supported standards -
231 *
232 * Currently supports two standards only, need to add support for rest of the
233 * modes, like SECAM, etc...
234 */
a75ffc12 235static const struct tvp514x_std_info tvp514x_std_list[] = {
07b1747c
VH
236 /* Standard: STD_NTSC_MJ */
237 [STD_NTSC_MJ] = {
238 .width = NTSC_NUM_ACTIVE_PIXELS,
239 .height = NTSC_NUM_ACTIVE_LINES,
240 .video_std = VIDEO_STD_NTSC_MJ_BIT,
241 .standard = {
242 .index = 0,
243 .id = V4L2_STD_NTSC,
244 .name = "NTSC",
245 .frameperiod = {1001, 30000},
246 .framelines = 525
247 },
248 /* Standard: STD_PAL_BDGHIN */
249 },
250 [STD_PAL_BDGHIN] = {
251 .width = PAL_NUM_ACTIVE_PIXELS,
252 .height = PAL_NUM_ACTIVE_LINES,
253 .video_std = VIDEO_STD_PAL_BDGHIN_BIT,
254 .standard = {
255 .index = 1,
256 .id = V4L2_STD_PAL,
257 .name = "PAL",
258 .frameperiod = {1, 25},
259 .framelines = 625
260 },
261 },
262 /* Standard: need to add for additional standard */
263};
62ef80a1
MK
264
265
266static inline struct tvp514x_decoder *to_decoder(struct v4l2_subdev *sd)
267{
268 return container_of(sd, struct tvp514x_decoder, sd);
269}
270
cf6832af
HV
271static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
272{
273 return &container_of(ctrl->handler, struct tvp514x_decoder, hdl)->sd;
274}
275
07b1747c 276
c1c9d09c
MK
277/**
278 * tvp514x_read_reg() - Read a value from a register in an TVP5146/47.
279 * @sd: ptr to v4l2_subdev struct
280 * @reg: TVP5146/47 register address
281 *
07b1747c
VH
282 * Returns value read if successful, or non-zero (-1) otherwise.
283 */
62ef80a1 284static int tvp514x_read_reg(struct v4l2_subdev *sd, u8 reg)
07b1747c 285{
62ef80a1
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286 int err, retry = 0;
287 struct i2c_client *client = v4l2_get_subdevdata(sd);
288
07b1747c
VH
289read_again:
290
291 err = i2c_smbus_read_byte_data(client, reg);
6f901a99 292 if (err < 0) {
07b1747c 293 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 294 v4l2_warn(sd, "Read: retry ... %d\n", retry);
07b1747c
VH
295 retry++;
296 msleep_interruptible(10);
297 goto read_again;
298 }
299 }
300
301 return err;
302}
303
c1c9d09c
MK
304/**
305 * dump_reg() - dump the register content of TVP5146/47.
306 * @sd: ptr to v4l2_subdev struct
307 * @reg: TVP5146/47 register address
308 */
62ef80a1
MK
309static void dump_reg(struct v4l2_subdev *sd, u8 reg)
310{
311 u32 val;
312
313 val = tvp514x_read_reg(sd, reg);
314 v4l2_info(sd, "Reg(0x%.2X): 0x%.2X\n", reg, val);
315}
316
c1c9d09c
MK
317/**
318 * tvp514x_write_reg() - Write a value to a register in TVP5146/47
319 * @sd: ptr to v4l2_subdev struct
320 * @reg: TVP5146/47 register address
321 * @val: value to be written to the register
322 *
07b1747c
VH
323 * Write a value to a register in an TVP5146/47 decoder device.
324 * Returns zero if successful, or non-zero otherwise.
325 */
62ef80a1 326static int tvp514x_write_reg(struct v4l2_subdev *sd, u8 reg, u8 val)
07b1747c 327{
62ef80a1
MK
328 int err, retry = 0;
329 struct i2c_client *client = v4l2_get_subdevdata(sd);
330
07b1747c
VH
331write_again:
332
333 err = i2c_smbus_write_byte_data(client, reg, val);
334 if (err) {
335 if (retry <= I2C_RETRY_COUNT) {
62ef80a1 336 v4l2_warn(sd, "Write: retry ... %d\n", retry);
07b1747c
VH
337 retry++;
338 msleep_interruptible(10);
339 goto write_again;
340 }
341 }
342
343 return err;
344}
345
c1c9d09c
MK
346/**
347 * tvp514x_write_regs() : Initializes a list of TVP5146/47 registers
348 * @sd: ptr to v4l2_subdev struct
349 * @reglist: list of TVP5146/47 registers and values
350 *
351 * Initializes a list of TVP5146/47 registers:-
07b1747c
VH
352 * if token is TOK_TERM, then entire write operation terminates
353 * if token is TOK_DELAY, then a delay of 'val' msec is introduced
354 * if token is TOK_SKIP, then the register write is skipped
355 * if token is TOK_WRITE, then the register write is performed
07b1747c
VH
356 * Returns zero if successful, or non-zero otherwise.
357 */
62ef80a1 358static int tvp514x_write_regs(struct v4l2_subdev *sd,
07b1747c
VH
359 const struct tvp514x_reg reglist[])
360{
361 int err;
362 const struct tvp514x_reg *next = reglist;
363
364 for (; next->token != TOK_TERM; next++) {
365 if (next->token == TOK_DELAY) {
366 msleep(next->val);
367 continue;
368 }
369
370 if (next->token == TOK_SKIP)
371 continue;
372
62ef80a1 373 err = tvp514x_write_reg(sd, next->reg, (u8) next->val);
07b1747c 374 if (err) {
62ef80a1 375 v4l2_err(sd, "Write failed. Err[%d]\n", err);
07b1747c
VH
376 return err;
377 }
378 }
379 return 0;
380}
381
c1c9d09c 382/**
2db4e78f 383 * tvp514x_query_current_std() : Query the current standard detected by TVP5146/47
c1c9d09c
MK
384 * @sd: ptr to v4l2_subdev struct
385 *
2db4e78f 386 * Returns the current standard detected by TVP5146/47, STD_INVALID if there is no
c1c9d09c 387 * standard detected.
07b1747c 388 */
2db4e78f 389static enum tvp514x_std tvp514x_query_current_std(struct v4l2_subdev *sd)
07b1747c
VH
390{
391 u8 std, std_status;
392
62ef80a1
MK
393 std = tvp514x_read_reg(sd, REG_VIDEO_STD);
394 if ((std & VIDEO_STD_MASK) == VIDEO_STD_AUTO_SWITCH_BIT)
07b1747c 395 /* use the standard status register */
62ef80a1
MK
396 std_status = tvp514x_read_reg(sd, REG_VIDEO_STD_STATUS);
397 else
c1c9d09c
MK
398 /* use the standard register itself */
399 std_status = std;
07b1747c
VH
400
401 switch (std_status & VIDEO_STD_MASK) {
402 case VIDEO_STD_NTSC_MJ_BIT:
403 return STD_NTSC_MJ;
404
405 case VIDEO_STD_PAL_BDGHIN_BIT:
406 return STD_PAL_BDGHIN;
407
408 default:
409 return STD_INVALID;
410 }
411
412 return STD_INVALID;
413}
414
c1c9d09c 415/* TVP5146/47 register dump function */
62ef80a1 416static void tvp514x_reg_dump(struct v4l2_subdev *sd)
07b1747c 417{
62ef80a1
MK
418 dump_reg(sd, REG_INPUT_SEL);
419 dump_reg(sd, REG_AFE_GAIN_CTRL);
420 dump_reg(sd, REG_VIDEO_STD);
421 dump_reg(sd, REG_OPERATION_MODE);
422 dump_reg(sd, REG_COLOR_KILLER);
423 dump_reg(sd, REG_LUMA_CONTROL1);
424 dump_reg(sd, REG_LUMA_CONTROL2);
425 dump_reg(sd, REG_LUMA_CONTROL3);
426 dump_reg(sd, REG_BRIGHTNESS);
427 dump_reg(sd, REG_CONTRAST);
428 dump_reg(sd, REG_SATURATION);
429 dump_reg(sd, REG_HUE);
430 dump_reg(sd, REG_CHROMA_CONTROL1);
431 dump_reg(sd, REG_CHROMA_CONTROL2);
432 dump_reg(sd, REG_COMP_PR_SATURATION);
433 dump_reg(sd, REG_COMP_Y_CONTRAST);
434 dump_reg(sd, REG_COMP_PB_SATURATION);
435 dump_reg(sd, REG_COMP_Y_BRIGHTNESS);
436 dump_reg(sd, REG_AVID_START_PIXEL_LSB);
437 dump_reg(sd, REG_AVID_START_PIXEL_MSB);
438 dump_reg(sd, REG_AVID_STOP_PIXEL_LSB);
439 dump_reg(sd, REG_AVID_STOP_PIXEL_MSB);
440 dump_reg(sd, REG_HSYNC_START_PIXEL_LSB);
441 dump_reg(sd, REG_HSYNC_START_PIXEL_MSB);
442 dump_reg(sd, REG_HSYNC_STOP_PIXEL_LSB);
443 dump_reg(sd, REG_HSYNC_STOP_PIXEL_MSB);
444 dump_reg(sd, REG_VSYNC_START_LINE_LSB);
445 dump_reg(sd, REG_VSYNC_START_LINE_MSB);
446 dump_reg(sd, REG_VSYNC_STOP_LINE_LSB);
447 dump_reg(sd, REG_VSYNC_STOP_LINE_MSB);
448 dump_reg(sd, REG_VBLK_START_LINE_LSB);
449 dump_reg(sd, REG_VBLK_START_LINE_MSB);
450 dump_reg(sd, REG_VBLK_STOP_LINE_LSB);
451 dump_reg(sd, REG_VBLK_STOP_LINE_MSB);
452 dump_reg(sd, REG_SYNC_CONTROL);
453 dump_reg(sd, REG_OUTPUT_FORMATTER1);
454 dump_reg(sd, REG_OUTPUT_FORMATTER2);
455 dump_reg(sd, REG_OUTPUT_FORMATTER3);
456 dump_reg(sd, REG_OUTPUT_FORMATTER4);
457 dump_reg(sd, REG_OUTPUT_FORMATTER5);
458 dump_reg(sd, REG_OUTPUT_FORMATTER6);
459 dump_reg(sd, REG_CLEAR_LOST_LOCK);
07b1747c
VH
460}
461
c1c9d09c
MK
462/**
463 * tvp514x_configure() - Configure the TVP5146/47 registers
464 * @sd: ptr to v4l2_subdev struct
465 * @decoder: ptr to tvp514x_decoder structure
466 *
07b1747c
VH
467 * Returns zero if successful, or non-zero otherwise.
468 */
62ef80a1
MK
469static int tvp514x_configure(struct v4l2_subdev *sd,
470 struct tvp514x_decoder *decoder)
07b1747c
VH
471{
472 int err;
473
474 /* common register initialization */
475 err =
62ef80a1 476 tvp514x_write_regs(sd, decoder->tvp514x_regs);
07b1747c
VH
477 if (err)
478 return err;
479
480 if (debug)
62ef80a1 481 tvp514x_reg_dump(sd);
07b1747c
VH
482
483 return 0;
484}
485
c1c9d09c
MK
486/**
487 * tvp514x_detect() - Detect if an tvp514x is present, and if so which revision.
488 * @sd: pointer to standard V4L2 sub-device structure
489 * @decoder: pointer to tvp514x_decoder structure
490 *
07b1747c
VH
491 * A device is considered to be detected if the chip ID (LSB and MSB)
492 * registers match the expected values.
493 * Any value of the rom version register is accepted.
494 * Returns ENODEV error number if no device is detected, or zero
495 * if a device is detected.
496 */
62ef80a1
MK
497static int tvp514x_detect(struct v4l2_subdev *sd,
498 struct tvp514x_decoder *decoder)
07b1747c
VH
499{
500 u8 chip_id_msb, chip_id_lsb, rom_ver;
62ef80a1 501 struct i2c_client *client = v4l2_get_subdevdata(sd);
07b1747c 502
62ef80a1
MK
503 chip_id_msb = tvp514x_read_reg(sd, REG_CHIP_ID_MSB);
504 chip_id_lsb = tvp514x_read_reg(sd, REG_CHIP_ID_LSB);
505 rom_ver = tvp514x_read_reg(sd, REG_ROM_VERSION);
07b1747c 506
62ef80a1 507 v4l2_dbg(1, debug, sd,
07b1747c
VH
508 "chip id detected msb:0x%x lsb:0x%x rom version:0x%x\n",
509 chip_id_msb, chip_id_lsb, rom_ver);
510 if ((chip_id_msb != TVP514X_CHIP_ID_MSB)
511 || ((chip_id_lsb != TVP5146_CHIP_ID_LSB)
512 && (chip_id_lsb != TVP5147_CHIP_ID_LSB))) {
513 /* We didn't read the values we expected, so this must not be
514 * an TVP5146/47.
515 */
62ef80a1
MK
516 v4l2_err(sd, "chip id mismatch msb:0x%x lsb:0x%x\n",
517 chip_id_msb, chip_id_lsb);
07b1747c
VH
518 return -ENODEV;
519 }
520
521 decoder->ver = rom_ver;
07b1747c 522
62ef80a1
MK
523 v4l2_info(sd, "%s (Version - 0x%.2x) found at 0x%x (%s)\n",
524 client->name, decoder->ver,
525 client->addr << 1, client->adapter->name);
07b1747c
VH
526 return 0;
527}
528
c1c9d09c
MK
529/**
530 * tvp514x_querystd() - V4L2 decoder interface handler for querystd
62ef80a1 531 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
532 * @std_id: standard V4L2 std_id ioctl enum
533 *
534 * Returns the current standard detected by TVP5146/47. If no active input is
2db4e78f 535 * detected then *std_id is set to 0 and the function returns 0.
07b1747c 536 */
62ef80a1 537static int tvp514x_querystd(struct v4l2_subdev *sd, v4l2_std_id *std_id)
07b1747c 538{
62ef80a1 539 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
540 enum tvp514x_std current_std;
541 enum tvp514x_input input_sel;
542 u8 sync_lock_status, lock_mask;
543
544 if (std_id == NULL)
545 return -EINVAL;
546
c389648a
HV
547 /* To query the standard the TVP514x must power on the ADCs. */
548 if (!decoder->streaming) {
549 tvp514x_s_stream(sd, 1);
550 msleep(LOCK_RETRY_DELAY);
551 }
552
2db4e78f
HV
553 /* query the current standard */
554 current_std = tvp514x_query_current_std(sd);
55852cbb
HV
555 if (current_std == STD_INVALID) {
556 *std_id = V4L2_STD_UNKNOWN;
2db4e78f 557 return 0;
55852cbb 558 }
07b1747c 559
62ef80a1 560 input_sel = decoder->input;
07b1747c
VH
561
562 switch (input_sel) {
563 case INPUT_CVBS_VI1A:
564 case INPUT_CVBS_VI1B:
565 case INPUT_CVBS_VI1C:
566 case INPUT_CVBS_VI2A:
567 case INPUT_CVBS_VI2B:
568 case INPUT_CVBS_VI2C:
569 case INPUT_CVBS_VI3A:
570 case INPUT_CVBS_VI3B:
571 case INPUT_CVBS_VI3C:
572 case INPUT_CVBS_VI4A:
573 lock_mask = STATUS_CLR_SUBCAR_LOCK_BIT |
574 STATUS_HORZ_SYNC_LOCK_BIT |
575 STATUS_VIRT_SYNC_LOCK_BIT;
576 break;
577
578 case INPUT_SVIDEO_VI2A_VI1A:
579 case INPUT_SVIDEO_VI2B_VI1B:
580 case INPUT_SVIDEO_VI2C_VI1C:
581 case INPUT_SVIDEO_VI2A_VI3A:
582 case INPUT_SVIDEO_VI2B_VI3B:
583 case INPUT_SVIDEO_VI2C_VI3C:
584 case INPUT_SVIDEO_VI4A_VI1A:
585 case INPUT_SVIDEO_VI4A_VI1B:
586 case INPUT_SVIDEO_VI4A_VI1C:
587 case INPUT_SVIDEO_VI4A_VI3A:
588 case INPUT_SVIDEO_VI4A_VI3B:
589 case INPUT_SVIDEO_VI4A_VI3C:
590 lock_mask = STATUS_HORZ_SYNC_LOCK_BIT |
591 STATUS_VIRT_SYNC_LOCK_BIT;
592 break;
593 /*Need to add other interfaces*/
594 default:
595 return -EINVAL;
596 }
597 /* check whether signal is locked */
62ef80a1 598 sync_lock_status = tvp514x_read_reg(sd, REG_STATUS1);
55852cbb
HV
599 if (lock_mask != (sync_lock_status & lock_mask)) {
600 *std_id = V4L2_STD_UNKNOWN;
2db4e78f 601 return 0; /* No input detected */
55852cbb 602 }
07b1747c 603
55852cbb 604 *std_id &= decoder->std_list[current_std].standard.id;
07b1747c 605
2db4e78f 606 v4l2_dbg(1, debug, sd, "Current STD: %s\n",
07b1747c
VH
607 decoder->std_list[current_std].standard.name);
608 return 0;
609}
610
c1c9d09c
MK
611/**
612 * tvp514x_s_std() - V4L2 decoder interface handler for s_std
62ef80a1 613 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
614 * @std_id: standard V4L2 v4l2_std_id ioctl enum
615 *
616 * If std_id is supported, sets the requested standard. Otherwise, returns
617 * -EINVAL
618 */
62ef80a1 619static int tvp514x_s_std(struct v4l2_subdev *sd, v4l2_std_id std_id)
07b1747c 620{
62ef80a1 621 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
622 int err, i;
623
07b1747c 624 for (i = 0; i < decoder->num_stds; i++)
62ef80a1 625 if (std_id & decoder->std_list[i].standard.id)
07b1747c
VH
626 break;
627
628 if ((i == decoder->num_stds) || (i == STD_INVALID))
629 return -EINVAL;
630
62ef80a1 631 err = tvp514x_write_reg(sd, REG_VIDEO_STD,
07b1747c
VH
632 decoder->std_list[i].video_std);
633 if (err)
634 return err;
635
636 decoder->current_std = i;
6722e0ef
SAS
637 decoder->tvp514x_regs[REG_VIDEO_STD].val =
638 decoder->std_list[i].video_std;
07b1747c 639
3907b072 640 v4l2_dbg(1, debug, sd, "Standard set to: %s\n",
07b1747c
VH
641 decoder->std_list[i].standard.name);
642 return 0;
643}
644
c1c9d09c
MK
645/**
646 * tvp514x_s_routing() - V4L2 decoder interface handler for s_routing
62ef80a1 647 * @sd: pointer to standard V4L2 sub-device structure
c1c9d09c
MK
648 * @input: input selector for routing the signal
649 * @output: output selector for routing the signal
650 * @config: config value. Not used
07b1747c
VH
651 *
652 * If index is valid, selects the requested input. Otherwise, returns -EINVAL if
653 * the input is not supported or there is no active signal present in the
654 * selected input.
655 */
62ef80a1
MK
656static int tvp514x_s_routing(struct v4l2_subdev *sd,
657 u32 input, u32 output, u32 config)
07b1747c 658{
62ef80a1 659 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
660 int err;
661 enum tvp514x_input input_sel;
662 enum tvp514x_output output_sel;
07b1747c 663
62ef80a1
MK
664 if ((input >= INPUT_INVALID) ||
665 (output >= OUTPUT_INVALID))
c1c9d09c
MK
666 /* Index out of bound */
667 return -EINVAL;
07b1747c 668
62ef80a1
MK
669 input_sel = input;
670 output_sel = output;
07b1747c 671
62ef80a1 672 err = tvp514x_write_reg(sd, REG_INPUT_SEL, input_sel);
07b1747c
VH
673 if (err)
674 return err;
675
62ef80a1 676 output_sel |= tvp514x_read_reg(sd,
07b1747c 677 REG_OUTPUT_FORMATTER1) & 0x7;
62ef80a1 678 err = tvp514x_write_reg(sd, REG_OUTPUT_FORMATTER1,
07b1747c
VH
679 output_sel);
680 if (err)
681 return err;
682
6722e0ef
SAS
683 decoder->tvp514x_regs[REG_INPUT_SEL].val = input_sel;
684 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER1].val = output_sel;
62ef80a1
MK
685 decoder->input = input;
686 decoder->output = output;
07b1747c 687
2db4e78f 688 v4l2_dbg(1, debug, sd, "Input set to: %d\n", input_sel);
07b1747c
VH
689
690 return 0;
691}
692
c1c9d09c
MK
693/**
694 * tvp514x_s_ctrl() - V4L2 decoder interface handler for s_ctrl
cf6832af 695 * @ctrl: pointer to v4l2_ctrl structure
07b1747c
VH
696 *
697 * If the requested control is supported, sets the control's current
698 * value in HW. Otherwise, returns -EINVAL if the control is not supported.
699 */
cf6832af 700static int tvp514x_s_ctrl(struct v4l2_ctrl *ctrl)
07b1747c 701{
cf6832af 702 struct v4l2_subdev *sd = to_sd(ctrl);
62ef80a1 703 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
704 int err = -EINVAL, value;
705
cf6832af 706 value = ctrl->val;
07b1747c
VH
707
708 switch (ctrl->id) {
709 case V4L2_CID_BRIGHTNESS:
cf6832af
HV
710 err = tvp514x_write_reg(sd, REG_BRIGHTNESS, value);
711 if (!err)
712 decoder->tvp514x_regs[REG_BRIGHTNESS].val = value;
07b1747c
VH
713 break;
714 case V4L2_CID_CONTRAST:
62ef80a1 715 err = tvp514x_write_reg(sd, REG_CONTRAST, value);
cf6832af
HV
716 if (!err)
717 decoder->tvp514x_regs[REG_CONTRAST].val = value;
07b1747c
VH
718 break;
719 case V4L2_CID_SATURATION:
62ef80a1 720 err = tvp514x_write_reg(sd, REG_SATURATION, value);
cf6832af
HV
721 if (!err)
722 decoder->tvp514x_regs[REG_SATURATION].val = value;
07b1747c
VH
723 break;
724 case V4L2_CID_HUE:
725 if (value == 180)
726 value = 0x7F;
727 else if (value == -180)
728 value = 0x80;
62ef80a1 729 err = tvp514x_write_reg(sd, REG_HUE, value);
cf6832af
HV
730 if (!err)
731 decoder->tvp514x_regs[REG_HUE].val = value;
07b1747c
VH
732 break;
733 case V4L2_CID_AUTOGAIN:
cf6832af
HV
734 err = tvp514x_write_reg(sd, REG_AFE_GAIN_CTRL, value ? 0x0f : 0x0c);
735 if (!err)
736 decoder->tvp514x_regs[REG_AFE_GAIN_CTRL].val = value;
07b1747c 737 break;
07b1747c
VH
738 }
739
3907b072 740 v4l2_dbg(1, debug, sd, "Set Control: ID - %d - %d\n",
cf6832af 741 ctrl->id, ctrl->val);
07b1747c
VH
742 return err;
743}
744
c1c9d09c
MK
745/**
746 * tvp514x_g_parm() - V4L2 decoder interface handler for g_parm
62ef80a1 747 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
748 * @a: pointer to standard V4L2 VIDIOC_G_PARM ioctl structure
749 *
750 * Returns the decoder's video CAPTURE parameters.
751 */
752static int
62ef80a1 753tvp514x_g_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *a)
07b1747c 754{
62ef80a1 755 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
756 struct v4l2_captureparm *cparm;
757 enum tvp514x_std current_std;
758
759 if (a == NULL)
760 return -EINVAL;
761
762 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
c1c9d09c
MK
763 /* only capture is supported */
764 return -EINVAL;
07b1747c 765
07b1747c 766 /* get the current standard */
2db4e78f 767 current_std = decoder->current_std;
07b1747c
VH
768
769 cparm = &a->parm.capture;
770 cparm->capability = V4L2_CAP_TIMEPERFRAME;
771 cparm->timeperframe =
772 decoder->std_list[current_std].standard.frameperiod;
773
774 return 0;
775}
776
c1c9d09c
MK
777/**
778 * tvp514x_s_parm() - V4L2 decoder interface handler for s_parm
62ef80a1 779 * @sd: pointer to standard V4L2 sub-device structure
07b1747c
VH
780 * @a: pointer to standard V4L2 VIDIOC_S_PARM ioctl structure
781 *
782 * Configures the decoder to use the input parameters, if possible. If
783 * not possible, returns the appropriate error code.
784 */
785static int
62ef80a1 786tvp514x_s_parm(struct v4l2_subdev *sd, struct v4l2_streamparm *a)
07b1747c 787{
62ef80a1 788 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c
VH
789 struct v4l2_fract *timeperframe;
790 enum tvp514x_std current_std;
791
792 if (a == NULL)
793 return -EINVAL;
794
795 if (a->type != V4L2_BUF_TYPE_VIDEO_CAPTURE)
c1c9d09c
MK
796 /* only capture is supported */
797 return -EINVAL;
07b1747c
VH
798
799 timeperframe = &a->parm.capture.timeperframe;
800
801 /* get the current standard */
2db4e78f 802 current_std = decoder->current_std;
07b1747c
VH
803
804 *timeperframe =
805 decoder->std_list[current_std].standard.frameperiod;
806
807 return 0;
808}
809
c1c9d09c
MK
810/**
811 * tvp514x_s_stream() - V4L2 decoder i/f handler for s_stream
62ef80a1
MK
812 * @sd: pointer to standard V4L2 sub-device structure
813 * @enable: streaming enable or disable
07b1747c 814 *
62ef80a1 815 * Sets streaming to enable or disable, if possible.
07b1747c 816 */
62ef80a1 817static int tvp514x_s_stream(struct v4l2_subdev *sd, int enable)
07b1747c 818{
07b1747c 819 int err = 0;
62ef80a1 820 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 821
62ef80a1
MK
822 if (decoder->streaming == enable)
823 return 0;
07b1747c 824
62ef80a1
MK
825 switch (enable) {
826 case 0:
827 {
828 /* Power Down Sequence */
829 err = tvp514x_write_reg(sd, REG_OPERATION_MODE, 0x01);
830 if (err) {
831 v4l2_err(sd, "Unable to turn off decoder\n");
832 return err;
833 }
834 decoder->streaming = enable;
07b1747c 835 break;
62ef80a1
MK
836 }
837 case 1:
838 {
62ef80a1 839 /* Power Up Sequence */
f0a12d0c 840 err = tvp514x_write_regs(sd, decoder->int_seq);
62ef80a1
MK
841 if (err) {
842 v4l2_err(sd, "Unable to turn on decoder\n");
843 return err;
844 }
845 /* Detect if not already detected */
846 err = tvp514x_detect(sd, decoder);
847 if (err) {
848 v4l2_err(sd, "Unable to detect decoder\n");
849 return err;
07b1747c 850 }
62ef80a1
MK
851 err = tvp514x_configure(sd, decoder);
852 if (err) {
853 v4l2_err(sd, "Unable to configure decoder\n");
854 return err;
855 }
856 decoder->streaming = enable;
07b1747c 857 break;
62ef80a1 858 }
07b1747c
VH
859 default:
860 err = -ENODEV;
861 break;
862 }
863
864 return err;
865}
866
cf6832af 867static const struct v4l2_ctrl_ops tvp514x_ctrl_ops = {
62ef80a1 868 .s_ctrl = tvp514x_s_ctrl,
cf6832af
HV
869};
870
5b38b0f8
MH
871/**
872 * tvp514x_enum_mbus_code() - V4L2 decoder interface handler for enum_mbus_code
873 * @sd: pointer to standard V4L2 sub-device structure
f7234138 874 * @cfg: pad configuration
5b38b0f8
MH
875 * @code: pointer to v4l2_subdev_mbus_code_enum structure
876 *
877 * Enumertaes mbus codes supported
878 */
879static int tvp514x_enum_mbus_code(struct v4l2_subdev *sd,
f7234138 880 struct v4l2_subdev_pad_config *cfg,
5b38b0f8
MH
881 struct v4l2_subdev_mbus_code_enum *code)
882{
883 u32 pad = code->pad;
884 u32 index = code->index;
885
886 memset(code, 0, sizeof(*code));
887 code->index = index;
888 code->pad = pad;
889
890 if (index != 0)
891 return -EINVAL;
892
1a33ac00 893 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
5b38b0f8
MH
894
895 return 0;
896}
897
898/**
899 * tvp514x_get_pad_format() - V4L2 decoder interface handler for get pad format
900 * @sd: pointer to standard V4L2 sub-device structure
f7234138 901 * @cfg: pad configuration
5b38b0f8
MH
902 * @format: pointer to v4l2_subdev_format structure
903 *
904 * Retrieves pad format which is active or tried based on requirement
905 */
906static int tvp514x_get_pad_format(struct v4l2_subdev *sd,
f7234138 907 struct v4l2_subdev_pad_config *cfg,
5b38b0f8
MH
908 struct v4l2_subdev_format *format)
909{
910 struct tvp514x_decoder *decoder = to_decoder(sd);
911 __u32 which = format->which;
912
da298c6d
HV
913 if (format->pad)
914 return -EINVAL;
915
5b38b0f8
MH
916 if (which == V4L2_SUBDEV_FORMAT_ACTIVE) {
917 format->format = decoder->format;
918 return 0;
919 }
920
1a33ac00 921 format->format.code = MEDIA_BUS_FMT_UYVY8_2X8;
5b38b0f8
MH
922 format->format.width = tvp514x_std_list[decoder->current_std].width;
923 format->format.height = tvp514x_std_list[decoder->current_std].height;
924 format->format.colorspace = V4L2_COLORSPACE_SMPTE170M;
925 format->format.field = V4L2_FIELD_INTERLACED;
926
927 return 0;
928}
929
930/**
931 * tvp514x_set_pad_format() - V4L2 decoder interface handler for set pad format
932 * @sd: pointer to standard V4L2 sub-device structure
f7234138 933 * @cfg: pad configuration
5b38b0f8
MH
934 * @format: pointer to v4l2_subdev_format structure
935 *
936 * Set pad format for the output pad
937 */
938static int tvp514x_set_pad_format(struct v4l2_subdev *sd,
f7234138 939 struct v4l2_subdev_pad_config *cfg,
5b38b0f8
MH
940 struct v4l2_subdev_format *fmt)
941{
942 struct tvp514x_decoder *decoder = to_decoder(sd);
943
944 if (fmt->format.field != V4L2_FIELD_INTERLACED ||
1a33ac00 945 fmt->format.code != MEDIA_BUS_FMT_UYVY8_2X8 ||
5b38b0f8
MH
946 fmt->format.colorspace != V4L2_COLORSPACE_SMPTE170M ||
947 fmt->format.width != tvp514x_std_list[decoder->current_std].width ||
948 fmt->format.height != tvp514x_std_list[decoder->current_std].height)
949 return -EINVAL;
950
951 decoder->format = fmt->format;
952
953 return 0;
954}
955
62ef80a1 956static const struct v4l2_subdev_video_ops tvp514x_video_ops = {
8774bed9 957 .s_std = tvp514x_s_std,
62ef80a1
MK
958 .s_routing = tvp514x_s_routing,
959 .querystd = tvp514x_querystd,
62ef80a1
MK
960 .g_parm = tvp514x_g_parm,
961 .s_parm = tvp514x_s_parm,
962 .s_stream = tvp514x_s_stream,
963};
07b1747c 964
5b38b0f8
MH
965static const struct v4l2_subdev_pad_ops tvp514x_pad_ops = {
966 .enum_mbus_code = tvp514x_enum_mbus_code,
967 .get_fmt = tvp514x_get_pad_format,
968 .set_fmt = tvp514x_set_pad_format,
969};
970
62ef80a1 971static const struct v4l2_subdev_ops tvp514x_ops = {
62ef80a1 972 .video = &tvp514x_video_ops,
5b38b0f8 973 .pad = &tvp514x_pad_ops,
07b1747c
VH
974};
975
db83d08d 976static const struct tvp514x_decoder tvp514x_dev = {
62ef80a1 977 .streaming = 0,
5b38b0f8
MH
978 .fmt_list = tvp514x_fmt_list,
979 .num_fmts = ARRAY_SIZE(tvp514x_fmt_list),
980 .pix = {
981 /* Default to NTSC 8-bit YUV 422 */
982 .width = NTSC_NUM_ACTIVE_PIXELS,
983 .height = NTSC_NUM_ACTIVE_LINES,
984 .pixelformat = V4L2_PIX_FMT_UYVY,
985 .field = V4L2_FIELD_INTERLACED,
986 .bytesperline = NTSC_NUM_ACTIVE_PIXELS * 2,
987 .sizeimage = NTSC_NUM_ACTIVE_PIXELS * 2 *
988 NTSC_NUM_ACTIVE_LINES,
989 .colorspace = V4L2_COLORSPACE_SMPTE170M,
990 },
07b1747c
VH
991 .current_std = STD_NTSC_MJ,
992 .std_list = tvp514x_std_list,
993 .num_stds = ARRAY_SIZE(tvp514x_std_list),
62ef80a1 994
07b1747c
VH
995};
996
b610b592
LP
997static struct tvp514x_platform_data *
998tvp514x_get_pdata(struct i2c_client *client)
999{
fe1e6ac6 1000 struct tvp514x_platform_data *pdata = NULL;
b610b592
LP
1001 struct v4l2_of_endpoint bus_cfg;
1002 struct device_node *endpoint;
1003 unsigned int flags;
1004
1005 if (!IS_ENABLED(CONFIG_OF) || !client->dev.of_node)
1006 return client->dev.platform_data;
1007
fd9fdb78 1008 endpoint = of_graph_get_next_endpoint(client->dev.of_node, NULL);
b610b592
LP
1009 if (!endpoint)
1010 return NULL;
1011
fe1e6ac6
JMC
1012 if (v4l2_of_parse_endpoint(endpoint, &bus_cfg))
1013 goto done;
1014
b610b592
LP
1015 pdata = devm_kzalloc(&client->dev, sizeof(*pdata), GFP_KERNEL);
1016 if (!pdata)
1017 goto done;
1018
b610b592
LP
1019 flags = bus_cfg.bus.parallel.flags;
1020
1021 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
1022 pdata->hs_polarity = 1;
1023
1024 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
1025 pdata->vs_polarity = 1;
1026
1027 if (flags & V4L2_MBUS_PCLK_SAMPLE_RISING)
1028 pdata->clk_polarity = 1;
1029
1030done:
1031 of_node_put(endpoint);
1032 return pdata;
1033}
1034
c1c9d09c
MK
1035/**
1036 * tvp514x_probe() - decoder driver i2c probe handler
07b1747c 1037 * @client: i2c driver client device structure
62ef80a1 1038 * @id: i2c driver id table
07b1747c
VH
1039 *
1040 * Register decoder as an i2c client device and V4L2
1041 * device.
1042 */
1043static int
1044tvp514x_probe(struct i2c_client *client, const struct i2c_device_id *id)
1045{
b610b592 1046 struct tvp514x_platform_data *pdata = tvp514x_get_pdata(client);
6722e0ef 1047 struct tvp514x_decoder *decoder;
62ef80a1 1048 struct v4l2_subdev *sd;
5b38b0f8 1049 int ret;
07b1747c 1050
b610b592
LP
1051 if (pdata == NULL) {
1052 dev_err(&client->dev, "No platform data\n");
1053 return -EINVAL;
1054 }
1055
07b1747c
VH
1056 /* Check if the adapter supports the needed features */
1057 if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1058 return -EIO;
1059
08754d31 1060 decoder = devm_kzalloc(&client->dev, sizeof(*decoder), GFP_KERNEL);
6722e0ef
SAS
1061 if (!decoder)
1062 return -ENOMEM;
1063
c1c9d09c 1064 /* Initialize the tvp514x_decoder with default configuration */
6722e0ef 1065 *decoder = tvp514x_dev;
62ef80a1 1066 /* Copy default register configuration */
6722e0ef
SAS
1067 memcpy(decoder->tvp514x_regs, tvp514x_reg_list_default,
1068 sizeof(tvp514x_reg_list_default));
62ef80a1 1069
f0a12d0c
LPC
1070 decoder->int_seq = (struct tvp514x_reg *)id->driver_data;
1071
c1c9d09c 1072 /* Copy board specific information here */
b610b592 1073 decoder->pdata = pdata;
62ef80a1 1074
c1c9d09c 1075 /**
07b1747c
VH
1076 * Fetch platform specific data, and configure the
1077 * tvp514x_reg_list[] accordingly. Since this is one
1078 * time configuration, no need to preserve.
1079 */
6722e0ef 1080 decoder->tvp514x_regs[REG_OUTPUT_FORMATTER2].val |=
62ef80a1 1081 (decoder->pdata->clk_polarity << 1);
6722e0ef 1082 decoder->tvp514x_regs[REG_SYNC_CONTROL].val |=
62ef80a1
MK
1083 ((decoder->pdata->hs_polarity << 2) |
1084 (decoder->pdata->vs_polarity << 3));
1085 /* Set default standard to auto */
1086 decoder->tvp514x_regs[REG_VIDEO_STD].val =
1087 VIDEO_STD_AUTO_SWITCH_BIT;
07b1747c
VH
1088
1089 /* Register with V4L2 layer as slave device */
62ef80a1
MK
1090 sd = &decoder->sd;
1091 v4l2_i2c_subdev_init(sd, client, &tvp514x_ops);
5b38b0f8
MH
1092
1093#if defined(CONFIG_MEDIA_CONTROLLER)
1094 decoder->pad.flags = MEDIA_PAD_FL_SOURCE;
1095 decoder->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
4ca72efa 1096 decoder->sd.entity.flags |= MEDIA_ENT_F_ATV_DECODER;
5b38b0f8 1097
ab22e77c 1098 ret = media_entity_pads_init(&decoder->sd.entity, 1, &decoder->pad);
5b38b0f8
MH
1099 if (ret < 0) {
1100 v4l2_err(sd, "%s decoder driver failed to register !!\n",
1101 sd->name);
5b38b0f8
MH
1102 return ret;
1103 }
1104#endif
cf6832af
HV
1105 v4l2_ctrl_handler_init(&decoder->hdl, 5);
1106 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1107 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1108 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1109 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1110 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1111 V4L2_CID_SATURATION, 0, 255, 1, 128);
1112 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1113 V4L2_CID_HUE, -180, 180, 180, 0);
1114 v4l2_ctrl_new_std(&decoder->hdl, &tvp514x_ctrl_ops,
1115 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
1116 sd->ctrl_handler = &decoder->hdl;
1117 if (decoder->hdl.error) {
5b38b0f8 1118 ret = decoder->hdl.error;
8f23acb5 1119 goto done;
cf6832af
HV
1120 }
1121 v4l2_ctrl_handler_setup(&decoder->hdl);
1122
8f23acb5
LP
1123 ret = v4l2_async_register_subdev(&decoder->sd);
1124 if (!ret)
1125 v4l2_info(sd, "%s decoder driver registered !!\n", sd->name);
6722e0ef 1126
8f23acb5
LP
1127done:
1128 if (ret < 0) {
1129 v4l2_ctrl_handler_free(&decoder->hdl);
1130#if defined(CONFIG_MEDIA_CONTROLLER)
1131 media_entity_cleanup(&decoder->sd.entity);
1132#endif
1133 }
1134 return ret;
07b1747c
VH
1135}
1136
c1c9d09c
MK
1137/**
1138 * tvp514x_remove() - decoder driver i2c remove handler
07b1747c
VH
1139 * @client: i2c driver client device structure
1140 *
1141 * Unregister decoder as an i2c client device and V4L2
1142 * device. Complement of tvp514x_probe().
1143 */
62ef80a1 1144static int tvp514x_remove(struct i2c_client *client)
07b1747c 1145{
62ef80a1
MK
1146 struct v4l2_subdev *sd = i2c_get_clientdata(client);
1147 struct tvp514x_decoder *decoder = to_decoder(sd);
07b1747c 1148
8f23acb5 1149 v4l2_async_unregister_subdev(&decoder->sd);
5b38b0f8
MH
1150#if defined(CONFIG_MEDIA_CONTROLLER)
1151 media_entity_cleanup(&decoder->sd.entity);
1152#endif
cf6832af 1153 v4l2_ctrl_handler_free(&decoder->hdl);
07b1747c
VH
1154 return 0;
1155}
c1c9d09c 1156/* TVP5146 Init/Power on Sequence */
07b1747c
VH
1157static const struct tvp514x_reg tvp5146_init_reg_seq[] = {
1158 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1159 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1160 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1161 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1162 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1163 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1164 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1165 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1166 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1167 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1168 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1169 {TOK_TERM, 0, 0},
07b1747c 1170};
62ef80a1 1171
c1c9d09c 1172/* TVP5147 Init/Power on Sequence */
07b1747c
VH
1173static const struct tvp514x_reg tvp5147_init_reg_seq[] = {
1174 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x02},
1175 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1176 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0x80},
1177 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1178 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1179 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1180 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1181 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x01},
1182 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x16},
1183 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1184 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xA0},
1185 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x16},
1186 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS1, 0x60},
1187 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS2, 0x00},
1188 {TOK_WRITE, REG_VBUS_ADDRESS_ACCESS3, 0xB0},
1189 {TOK_WRITE, REG_VBUS_DATA_ACCESS_NO_VBUS_ADDR_INCR, 0x00},
1190 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1191 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1192 {TOK_TERM, 0, 0},
07b1747c 1193};
62ef80a1 1194
c1c9d09c 1195/* TVP5146M2/TVP5147M1 Init/Power on Sequence */
07b1747c
VH
1196static const struct tvp514x_reg tvp514xm_init_reg_seq[] = {
1197 {TOK_WRITE, REG_OPERATION_MODE, 0x01},
1198 {TOK_WRITE, REG_OPERATION_MODE, 0x00},
62ef80a1 1199 {TOK_TERM, 0, 0},
07b1747c 1200};
62ef80a1 1201
c1c9d09c 1202/**
07b1747c
VH
1203 * I2C Device Table -
1204 *
1205 * name - Name of the actual device/chip.
1206 * driver_data - Driver data
1207 */
1208static const struct i2c_device_id tvp514x_id[] = {
62ef80a1
MK
1209 {"tvp5146", (unsigned long)tvp5146_init_reg_seq},
1210 {"tvp5146m2", (unsigned long)tvp514xm_init_reg_seq},
1211 {"tvp5147", (unsigned long)tvp5147_init_reg_seq},
1212 {"tvp5147m1", (unsigned long)tvp514xm_init_reg_seq},
07b1747c
VH
1213 {},
1214};
1215
1216MODULE_DEVICE_TABLE(i2c, tvp514x_id);
1217
b610b592
LP
1218#if IS_ENABLED(CONFIG_OF)
1219static const struct of_device_id tvp514x_of_match[] = {
1220 { .compatible = "ti,tvp5146", },
1221 { .compatible = "ti,tvp5146m2", },
1222 { .compatible = "ti,tvp5147", },
1223 { .compatible = "ti,tvp5147m1", },
1224 { /* sentinel */ },
1225};
1226MODULE_DEVICE_TABLE(of, tvp514x_of_match);
1227#endif
1228
62ef80a1 1229static struct i2c_driver tvp514x_driver = {
07b1747c 1230 .driver = {
b610b592 1231 .of_match_table = of_match_ptr(tvp514x_of_match),
62ef80a1
MK
1232 .name = TVP514X_MODULE_NAME,
1233 },
07b1747c 1234 .probe = tvp514x_probe,
62ef80a1 1235 .remove = tvp514x_remove,
07b1747c
VH
1236 .id_table = tvp514x_id,
1237};
1238
c6e8d86f 1239module_i2c_driver(tvp514x_driver);