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[mirror_ubuntu-artful-kernel.git] / drivers / media / i2c / tvp5150.c
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cd4665c5 1/*
c43875f6 2 * tvp5150 - Texas Instruments TVP5150A/AM1 and TVP5151 video decoder driver
cd4665c5 3 *
6ac48b45
MCC
4 * Copyright (c) 2005,2006 Mauro Carvalho Chehab (mchehab@infradead.org)
5 * This code is placed under the terms of the GNU General Public License v2
cd4665c5
MCC
6 */
7
b802fb99 8#include <dt-bindings/media/tvp5150.h>
cd4665c5 9#include <linux/i2c.h>
5a0e3ad6 10#include <linux/slab.h>
33b687cf 11#include <linux/videodev2.h>
cd4665c5 12#include <linux/delay.h>
09aa2609 13#include <linux/gpio/consumer.h>
7a707b89 14#include <linux/module.h>
859969b3 15#include <linux/of_graph.h>
c7d97499 16#include <media/v4l2-async.h>
6b8fe025 17#include <media/v4l2-device.h>
6c45ec71 18#include <media/v4l2-ctrls.h>
859969b3 19#include <media/v4l2-fwnode.h>
55606310 20#include <media/v4l2-mc.h>
cd4665c5
MCC
21
22#include "tvp5150_reg.h"
23
785a3de1
PZ
24#define TVP5150_H_MAX 720U
25#define TVP5150_V_MAX_525_60 480U
26#define TVP5150_V_MAX_OTHERS 576U
963ddc63
JM
27#define TVP5150_MAX_CROP_LEFT 511
28#define TVP5150_MAX_CROP_TOP 127
29#define TVP5150_CROP_SHIFT 2
30
c43875f6 31MODULE_DESCRIPTION("Texas Instruments TVP5150A/TVP5150AM1/TVP5151 video decoder driver");
cd4665c5
MCC
32MODULE_AUTHOR("Mauro Carvalho Chehab");
33MODULE_LICENSE("GPL");
34
cd4665c5 35
ff699e6b 36static int debug;
2a0489d3 37module_param(debug, int, 0644);
6b8fe025 38MODULE_PARM_DESC(debug, "Debug level (0-2)");
cd4665c5 39
ad0e3744
MCC
40#define dprintk0(__dev, __arg...) dev_dbg_lvl(__dev, 0, 0, __arg)
41
cd4665c5 42struct tvp5150 {
6b8fe025 43 struct v4l2_subdev sd;
55606310
MCC
44#ifdef CONFIG_MEDIA_CONTROLLER
45 struct media_pad pads[DEMOD_NUM_PADS];
f7b4b54e
JMC
46 struct media_entity input_ent[TVP5150_INPUT_NUM];
47 struct media_pad input_pad[TVP5150_INPUT_NUM];
55606310 48#endif
6c45ec71 49 struct v4l2_ctrl_handler hdl;
963ddc63 50 struct v4l2_rect rect;
84486d53 51
3ad96835 52 v4l2_std_id norm; /* Current set standard */
5325b427
HV
53 u32 input;
54 u32 output;
84486d53 55 int enable;
a2e5f1b3 56
82275133
JMC
57 u16 dev_id;
58 u16 rom_ver;
59
a2e5f1b3 60 enum v4l2_mbus_type mbus_type;
cd4665c5
MCC
61};
62
6b8fe025 63static inline struct tvp5150 *to_tvp5150(struct v4l2_subdev *sd)
cd4665c5 64{
6b8fe025
HV
65 return container_of(sd, struct tvp5150, sd);
66}
67
6c45ec71
HV
68static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
69{
70 return &container_of(ctrl->handler, struct tvp5150, hdl)->sd;
71}
72
6b8fe025
HV
73static int tvp5150_read(struct v4l2_subdev *sd, unsigned char addr)
74{
75 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5 76 int rc;
e35ce2e4
LP
77
78 rc = i2c_smbus_read_byte_data(c, addr);
79 if (rc < 0) {
257e29f8 80 dev_err(sd->dev, "i2c i/o error: rc == %d\n", rc);
e35ce2e4 81 return rc;
8cd0d4ca 82 }
e1bc80ad 83
257e29f8 84 dev_dbg_lvl(sd->dev, 2, debug, "tvp5150: read 0x%02x = %02x\n", addr, rc);
cd4665c5 85
e35ce2e4 86 return rc;
cd4665c5
MCC
87}
88
cacdd6a4 89static int tvp5150_write(struct v4l2_subdev *sd, unsigned char addr,
84486d53 90 unsigned char value)
cd4665c5 91{
6b8fe025 92 struct i2c_client *c = v4l2_get_subdevdata(sd);
cd4665c5 93 int rc;
cd4665c5 94
257e29f8 95 dev_dbg_lvl(sd->dev, 2, debug, "tvp5150: writing %02x %02x\n", addr, value);
e35ce2e4
LP
96 rc = i2c_smbus_write_byte_data(c, addr, value);
97 if (rc < 0)
257e29f8 98 dev_err(sd->dev, "i2c i/o error: rc == %d\n", rc);
cacdd6a4
JMC
99
100 return rc;
cd4665c5
MCC
101}
102
6b8fe025
HV
103static void dump_reg_range(struct v4l2_subdev *sd, char *s, u8 init,
104 const u8 end, int max_line)
3ad96835 105{
e5134114
MCC
106 u8 buf[16];
107 int i = 0, j, len;
108
109 if (max_line > 16) {
110 dprintk0(sd->dev, "too much data to dump\n");
111 return;
112 }
113
114 for (i = init; i < end; i += max_line) {
115 len = (end - i > max_line) ? max_line : end - i;
116
117 for (j = 0; j < len; j++)
118 buf[j] = tvp5150_read(sd, i + j);
119
120 dprintk0(sd->dev, "%s reg %02x = %*ph\n", s, i, len, buf);
3ad96835 121 }
3ad96835
MCC
122}
123
6b8fe025 124static int tvp5150_log_status(struct v4l2_subdev *sd)
cd4665c5 125{
ad0e3744
MCC
126 dprintk0(sd->dev, "tvp5150: Video input source selection #1 = 0x%02x\n",
127 tvp5150_read(sd, TVP5150_VD_IN_SRC_SEL_1));
128 dprintk0(sd->dev, "tvp5150: Analog channel controls = 0x%02x\n",
129 tvp5150_read(sd, TVP5150_ANAL_CHL_CTL));
130 dprintk0(sd->dev, "tvp5150: Operation mode controls = 0x%02x\n",
131 tvp5150_read(sd, TVP5150_OP_MODE_CTL));
132 dprintk0(sd->dev, "tvp5150: Miscellaneous controls = 0x%02x\n",
133 tvp5150_read(sd, TVP5150_MISC_CTL));
134 dprintk0(sd->dev, "tvp5150: Autoswitch mask= 0x%02x\n",
135 tvp5150_read(sd, TVP5150_AUTOSW_MSK));
136 dprintk0(sd->dev, "tvp5150: Color killer threshold control = 0x%02x\n",
137 tvp5150_read(sd, TVP5150_COLOR_KIL_THSH_CTL));
138 dprintk0(sd->dev, "tvp5150: Luminance processing controls #1 #2 and #3 = %02x %02x %02x\n",
139 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_1),
140 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_2),
141 tvp5150_read(sd, TVP5150_LUMA_PROC_CTL_3));
142 dprintk0(sd->dev, "tvp5150: Brightness control = 0x%02x\n",
143 tvp5150_read(sd, TVP5150_BRIGHT_CTL));
144 dprintk0(sd->dev, "tvp5150: Color saturation control = 0x%02x\n",
145 tvp5150_read(sd, TVP5150_SATURATION_CTL));
146 dprintk0(sd->dev, "tvp5150: Hue control = 0x%02x\n",
147 tvp5150_read(sd, TVP5150_HUE_CTL));
148 dprintk0(sd->dev, "tvp5150: Contrast control = 0x%02x\n",
149 tvp5150_read(sd, TVP5150_CONTRAST_CTL));
150 dprintk0(sd->dev, "tvp5150: Outputs and data rates select = 0x%02x\n",
151 tvp5150_read(sd, TVP5150_DATA_RATE_SEL));
152 dprintk0(sd->dev, "tvp5150: Configuration shared pins = 0x%02x\n",
153 tvp5150_read(sd, TVP5150_CONF_SHARED_PIN));
154 dprintk0(sd->dev, "tvp5150: Active video cropping start = 0x%02x%02x\n",
155 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_MSB),
156 tvp5150_read(sd, TVP5150_ACT_VD_CROP_ST_LSB));
157 dprintk0(sd->dev, "tvp5150: Active video cropping stop = 0x%02x%02x\n",
158 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_MSB),
159 tvp5150_read(sd, TVP5150_ACT_VD_CROP_STP_LSB));
160 dprintk0(sd->dev, "tvp5150: Genlock/RTC = 0x%02x\n",
161 tvp5150_read(sd, TVP5150_GENLOCK));
162 dprintk0(sd->dev, "tvp5150: Horizontal sync start = 0x%02x\n",
163 tvp5150_read(sd, TVP5150_HORIZ_SYNC_START));
164 dprintk0(sd->dev, "tvp5150: Vertical blanking start = 0x%02x\n",
165 tvp5150_read(sd, TVP5150_VERT_BLANKING_START));
166 dprintk0(sd->dev, "tvp5150: Vertical blanking stop = 0x%02x\n",
167 tvp5150_read(sd, TVP5150_VERT_BLANKING_STOP));
168 dprintk0(sd->dev, "tvp5150: Chrominance processing control #1 and #2 = %02x %02x\n",
169 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_1),
170 tvp5150_read(sd, TVP5150_CHROMA_PROC_CTL_2));
171 dprintk0(sd->dev, "tvp5150: Interrupt reset register B = 0x%02x\n",
172 tvp5150_read(sd, TVP5150_INT_RESET_REG_B));
173 dprintk0(sd->dev, "tvp5150: Interrupt enable register B = 0x%02x\n",
174 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_B));
175 dprintk0(sd->dev, "tvp5150: Interrupt configuration register B = 0x%02x\n",
176 tvp5150_read(sd, TVP5150_INTT_CONFIG_REG_B));
177 dprintk0(sd->dev, "tvp5150: Video standard = 0x%02x\n",
178 tvp5150_read(sd, TVP5150_VIDEO_STD));
179 dprintk0(sd->dev, "tvp5150: Chroma gain factor: Cb=0x%02x Cr=0x%02x\n",
180 tvp5150_read(sd, TVP5150_CB_GAIN_FACT),
181 tvp5150_read(sd, TVP5150_CR_GAIN_FACTOR));
182 dprintk0(sd->dev, "tvp5150: Macrovision on counter = 0x%02x\n",
183 tvp5150_read(sd, TVP5150_MACROVISION_ON_CTR));
184 dprintk0(sd->dev, "tvp5150: Macrovision off counter = 0x%02x\n",
185 tvp5150_read(sd, TVP5150_MACROVISION_OFF_CTR));
186 dprintk0(sd->dev, "tvp5150: ITU-R BT.656.%d timing(TVP5150AM1 only)\n",
187 (tvp5150_read(sd, TVP5150_REV_SELECT) & 1) ? 3 : 4);
188 dprintk0(sd->dev, "tvp5150: Device ID = %02x%02x\n",
189 tvp5150_read(sd, TVP5150_MSB_DEV_ID),
190 tvp5150_read(sd, TVP5150_LSB_DEV_ID));
191 dprintk0(sd->dev, "tvp5150: ROM version = (hex) %02x.%02x\n",
192 tvp5150_read(sd, TVP5150_ROM_MAJOR_VER),
193 tvp5150_read(sd, TVP5150_ROM_MINOR_VER));
194 dprintk0(sd->dev, "tvp5150: Vertical line count = 0x%02x%02x\n",
195 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_MSB),
196 tvp5150_read(sd, TVP5150_VERT_LN_COUNT_LSB));
197 dprintk0(sd->dev, "tvp5150: Interrupt status register B = 0x%02x\n",
198 tvp5150_read(sd, TVP5150_INT_STATUS_REG_B));
199 dprintk0(sd->dev, "tvp5150: Interrupt active register B = 0x%02x\n",
200 tvp5150_read(sd, TVP5150_INT_ACTIVE_REG_B));
201 dprintk0(sd->dev, "tvp5150: Status regs #1 to #5 = %02x %02x %02x %02x %02x\n",
202 tvp5150_read(sd, TVP5150_STATUS_REG_1),
203 tvp5150_read(sd, TVP5150_STATUS_REG_2),
204 tvp5150_read(sd, TVP5150_STATUS_REG_3),
205 tvp5150_read(sd, TVP5150_STATUS_REG_4),
206 tvp5150_read(sd, TVP5150_STATUS_REG_5));
3ad96835 207
6b8fe025
HV
208 dump_reg_range(sd, "Teletext filter 1", TVP5150_TELETEXT_FIL1_INI,
209 TVP5150_TELETEXT_FIL1_END, 8);
210 dump_reg_range(sd, "Teletext filter 2", TVP5150_TELETEXT_FIL2_INI,
211 TVP5150_TELETEXT_FIL2_END, 8);
3ad96835 212
ad0e3744
MCC
213 dprintk0(sd->dev, "tvp5150: Teletext filter enable = 0x%02x\n",
214 tvp5150_read(sd, TVP5150_TELETEXT_FIL_ENA));
215 dprintk0(sd->dev, "tvp5150: Interrupt status register A = 0x%02x\n",
216 tvp5150_read(sd, TVP5150_INT_STATUS_REG_A));
217 dprintk0(sd->dev, "tvp5150: Interrupt enable register A = 0x%02x\n",
218 tvp5150_read(sd, TVP5150_INT_ENABLE_REG_A));
219 dprintk0(sd->dev, "tvp5150: Interrupt configuration = 0x%02x\n",
220 tvp5150_read(sd, TVP5150_INT_CONF));
221 dprintk0(sd->dev, "tvp5150: VDP status register = 0x%02x\n",
222 tvp5150_read(sd, TVP5150_VDP_STATUS_REG));
223 dprintk0(sd->dev, "tvp5150: FIFO word count = 0x%02x\n",
224 tvp5150_read(sd, TVP5150_FIFO_WORD_COUNT));
225 dprintk0(sd->dev, "tvp5150: FIFO interrupt threshold = 0x%02x\n",
226 tvp5150_read(sd, TVP5150_FIFO_INT_THRESHOLD));
227 dprintk0(sd->dev, "tvp5150: FIFO reset = 0x%02x\n",
228 tvp5150_read(sd, TVP5150_FIFO_RESET));
229 dprintk0(sd->dev, "tvp5150: Line number interrupt = 0x%02x\n",
230 tvp5150_read(sd, TVP5150_LINE_NUMBER_INT));
231 dprintk0(sd->dev, "tvp5150: Pixel alignment register = 0x%02x%02x\n",
232 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_HIGH),
233 tvp5150_read(sd, TVP5150_PIX_ALIGN_REG_LOW));
234 dprintk0(sd->dev, "tvp5150: FIFO output control = 0x%02x\n",
235 tvp5150_read(sd, TVP5150_FIFO_OUT_CTRL));
236 dprintk0(sd->dev, "tvp5150: Full field enable = 0x%02x\n",
237 tvp5150_read(sd, TVP5150_FULL_FIELD_ENA));
238 dprintk0(sd->dev, "tvp5150: Full field mode register = 0x%02x\n",
239 tvp5150_read(sd, TVP5150_FULL_FIELD_MODE_REG));
3ad96835 240
6b8fe025
HV
241 dump_reg_range(sd, "CC data", TVP5150_CC_DATA_INI,
242 TVP5150_CC_DATA_END, 8);
3ad96835 243
6b8fe025
HV
244 dump_reg_range(sd, "WSS data", TVP5150_WSS_DATA_INI,
245 TVP5150_WSS_DATA_END, 8);
3ad96835 246
6b8fe025
HV
247 dump_reg_range(sd, "VPS data", TVP5150_VPS_DATA_INI,
248 TVP5150_VPS_DATA_END, 8);
3ad96835 249
6b8fe025
HV
250 dump_reg_range(sd, "VITC data", TVP5150_VITC_DATA_INI,
251 TVP5150_VITC_DATA_END, 10);
3ad96835 252
6b8fe025
HV
253 dump_reg_range(sd, "Line mode", TVP5150_LINE_MODE_INI,
254 TVP5150_LINE_MODE_END, 8);
255 return 0;
cd4665c5
MCC
256}
257
258/****************************************************************************
259 Basic functions
260 ****************************************************************************/
cd4665c5 261
6e98bee2 262static void tvp5150_selmux(struct v4l2_subdev *sd)
cd4665c5 263{
2962fc01 264 int opmode = 0;
6b8fe025 265 struct tvp5150 *decoder = to_tvp5150(sd);
c7c0b34c 266 int input = 0;
afcc8e8c 267 int val;
84486d53 268
c43875f6
MCC
269 /* Only tvp5150am1 and tvp5151 have signal generator support */
270 if ((decoder->dev_id == 0x5150 && decoder->rom_ver == 0x0400) ||
271 (decoder->dev_id == 0x5151 && decoder->rom_ver == 0x0100)) {
272 if (!decoder->enable)
273 input = 8;
274 }
4c86f973 275
5325b427 276 switch (decoder->input) {
c7c0b34c
HV
277 case TVP5150_COMPOSITE1:
278 input |= 2;
279 /* fall through */
280 case TVP5150_COMPOSITE0:
c0477ad9 281 break;
c7c0b34c 282 case TVP5150_SVIDEO:
c0477ad9 283 default:
c7c0b34c 284 input |= 1;
c0477ad9
MCC
285 break;
286 }
287
257e29f8 288 dev_dbg_lvl(sd->dev, 1, debug, "Selecting video route: route input=%i, output=%i => tvp5150 input=%i, opmode=%i\n",
5325b427
HV
289 decoder->input, decoder->output,
290 input, opmode);
12500f07 291
6b8fe025
HV
292 tvp5150_write(sd, TVP5150_OP_MODE_CTL, opmode);
293 tvp5150_write(sd, TVP5150_VD_IN_SRC_SEL_1, input);
f4b8b3ae 294
b4b2de38
LP
295 /*
296 * Setup the FID/GLCO/VLK/HVLK and INTREQ/GPCL/VBLK output signals. For
297 * S-Video we output the vertical lock (VLK) signal on FID/GLCO/VLK/HVLK
298 * and set INTREQ/GPCL/VBLK to logic 0. For composite we output the
299 * field indicator (FID) signal on FID/GLCO/VLK/HVLK and set
300 * INTREQ/GPCL/VBLK to logic 1.
f4b8b3ae 301 */
6b8fe025 302 val = tvp5150_read(sd, TVP5150_MISC_CTL);
8cd0d4ca 303 if (val < 0) {
257e29f8 304 dev_err(sd->dev, "%s: failed with error = %d\n", __func__, val);
8cd0d4ca
DL
305 return;
306 }
307
5325b427 308 if (decoder->input == TVP5150_SVIDEO)
b4b2de38 309 val = (val & ~TVP5150_MISC_CTL_GPCL) | TVP5150_MISC_CTL_HVLK;
f4b8b3ae 310 else
b4b2de38 311 val = (val & ~TVP5150_MISC_CTL_HVLK) | TVP5150_MISC_CTL_GPCL;
6b8fe025 312 tvp5150_write(sd, TVP5150_MISC_CTL, val);
cd4665c5
MCC
313};
314
e1bc80ad
MCC
315struct i2c_reg_value {
316 unsigned char reg;
317 unsigned char value;
318};
319
320/* Default values as sugested at TVP5150AM1 datasheet */
321static const struct i2c_reg_value tvp5150_init_default[] = {
322 { /* 0x00 */
323 TVP5150_VD_IN_SRC_SEL_1,0x00
324 },
325 { /* 0x01 */
326 TVP5150_ANAL_CHL_CTL,0x15
327 },
328 { /* 0x02 */
329 TVP5150_OP_MODE_CTL,0x00
330 },
331 { /* 0x03 */
332 TVP5150_MISC_CTL,0x01
333 },
334 { /* 0x06 */
335 TVP5150_COLOR_KIL_THSH_CTL,0x10
336 },
337 { /* 0x07 */
338 TVP5150_LUMA_PROC_CTL_1,0x60
339 },
340 { /* 0x08 */
341 TVP5150_LUMA_PROC_CTL_2,0x00
342 },
343 { /* 0x09 */
344 TVP5150_BRIGHT_CTL,0x80
345 },
346 { /* 0x0a */
347 TVP5150_SATURATION_CTL,0x80
348 },
349 { /* 0x0b */
350 TVP5150_HUE_CTL,0x00
351 },
352 { /* 0x0c */
353 TVP5150_CONTRAST_CTL,0x80
354 },
355 { /* 0x0d */
356 TVP5150_DATA_RATE_SEL,0x47
357 },
358 { /* 0x0e */
359 TVP5150_LUMA_PROC_CTL_3,0x00
360 },
361 { /* 0x0f */
362 TVP5150_CONF_SHARED_PIN,0x08
363 },
364 { /* 0x11 */
365 TVP5150_ACT_VD_CROP_ST_MSB,0x00
366 },
367 { /* 0x12 */
368 TVP5150_ACT_VD_CROP_ST_LSB,0x00
369 },
370 { /* 0x13 */
371 TVP5150_ACT_VD_CROP_STP_MSB,0x00
372 },
373 { /* 0x14 */
374 TVP5150_ACT_VD_CROP_STP_LSB,0x00
375 },
376 { /* 0x15 */
377 TVP5150_GENLOCK,0x01
378 },
379 { /* 0x16 */
380 TVP5150_HORIZ_SYNC_START,0x80
381 },
382 { /* 0x18 */
383 TVP5150_VERT_BLANKING_START,0x00
384 },
385 { /* 0x19 */
386 TVP5150_VERT_BLANKING_STOP,0x00
387 },
388 { /* 0x1a */
389 TVP5150_CHROMA_PROC_CTL_1,0x0c
390 },
391 { /* 0x1b */
392 TVP5150_CHROMA_PROC_CTL_2,0x14
393 },
394 { /* 0x1c */
395 TVP5150_INT_RESET_REG_B,0x00
396 },
397 { /* 0x1d */
398 TVP5150_INT_ENABLE_REG_B,0x00
399 },
400 { /* 0x1e */
401 TVP5150_INTT_CONFIG_REG_B,0x00
402 },
403 { /* 0x28 */
404 TVP5150_VIDEO_STD,0x00
405 },
406 { /* 0x2e */
407 TVP5150_MACROVISION_ON_CTR,0x0f
408 },
409 { /* 0x2f */
410 TVP5150_MACROVISION_OFF_CTR,0x01
411 },
412 { /* 0xbb */
413 TVP5150_TELETEXT_FIL_ENA,0x00
414 },
415 { /* 0xc0 */
416 TVP5150_INT_STATUS_REG_A,0x00
417 },
418 { /* 0xc1 */
419 TVP5150_INT_ENABLE_REG_A,0x00
420 },
421 { /* 0xc2 */
422 TVP5150_INT_CONF,0x04
423 },
424 { /* 0xc8 */
425 TVP5150_FIFO_INT_THRESHOLD,0x80
426 },
427 { /* 0xc9 */
428 TVP5150_FIFO_RESET,0x00
429 },
430 { /* 0xca */
431 TVP5150_LINE_NUMBER_INT,0x00
432 },
433 { /* 0xcb */
434 TVP5150_PIX_ALIGN_REG_LOW,0x4e
435 },
436 { /* 0xcc */
437 TVP5150_PIX_ALIGN_REG_HIGH,0x00
438 },
439 { /* 0xcd */
440 TVP5150_FIFO_OUT_CTRL,0x01
441 },
442 { /* 0xcf */
3ad96835 443 TVP5150_FULL_FIELD_ENA,0x00
e1bc80ad
MCC
444 },
445 { /* 0xd0 */
3ad96835 446 TVP5150_LINE_MODE_INI,0x00
e1bc80ad
MCC
447 },
448 { /* 0xfc */
449 TVP5150_FULL_FIELD_MODE_REG,0x7f
450 },
451 { /* end of data */
452 0xff,0xff
453 }
454};
455
456/* Default values as sugested at TVP5150AM1 datasheet */
457static const struct i2c_reg_value tvp5150_init_enable[] = {
458 {
459 TVP5150_CONF_SHARED_PIN, 2
460 },{ /* Automatic offset and AGC enabled */
461 TVP5150_ANAL_CHL_CTL, 0x15
462 },{ /* Activate YCrCb output 0x9 or 0xd ? */
b4b2de38
LP
463 TVP5150_MISC_CTL, TVP5150_MISC_CTL_GPCL |
464 TVP5150_MISC_CTL_INTREQ_OE |
465 TVP5150_MISC_CTL_YCBCR_OE |
466 TVP5150_MISC_CTL_SYNC_OE |
467 TVP5150_MISC_CTL_VBLANK |
468 TVP5150_MISC_CTL_CLOCK_OE,
e1bc80ad
MCC
469 },{ /* Activates video std autodetection for all standards */
470 TVP5150_AUTOSW_MSK, 0x0
471 },{ /* Default format: 0x47. For 4:2:2: 0x40 */
472 TVP5150_DATA_RATE_SEL, 0x47
473 },{
474 TVP5150_CHROMA_PROC_CTL_1, 0x0c
475 },{
476 TVP5150_CHROMA_PROC_CTL_2, 0x54
477 },{ /* Non documented, but initialized on WinTV USB2 */
478 0x27, 0x20
479 },{
480 0xff,0xff
481 }
482};
483
6ac48b45
MCC
484struct tvp5150_vbi_type {
485 unsigned int vbi_type;
486 unsigned int ini_line;
487 unsigned int end_line;
488 unsigned int by_field :1;
489};
490
e1bc80ad
MCC
491struct i2c_vbi_ram_value {
492 u16 reg;
6ac48b45
MCC
493 struct tvp5150_vbi_type type;
494 unsigned char values[16];
e1bc80ad
MCC
495};
496
6ac48b45
MCC
497/* This struct have the values for each supported VBI Standard
498 * by
499 tvp5150_vbi_types should follow the same order as vbi_ram_default
3ad96835
MCC
500 * value 0 means rom position 0x10, value 1 means rom position 0x30
501 * and so on. There are 16 possible locations from 0 to 15.
502 */
3ad96835 503
a9cff90e 504static struct i2c_vbi_ram_value vbi_ram_default[] =
cd4665c5 505{
9bc7400a
HV
506 /* FIXME: Current api doesn't handle all VBI types, those not
507 yet supported are placed under #if 0 */
508#if 0
6ac48b45
MCC
509 {0x010, /* Teletext, SECAM, WST System A */
510 {V4L2_SLICED_TELETEXT_SECAM,6,23,1},
511 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x26,
512 0xe6, 0xb4, 0x0e, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 513 },
9bc7400a 514#endif
6ac48b45 515 {0x030, /* Teletext, PAL, WST System B */
9bc7400a 516 {V4L2_SLICED_TELETEXT_B,6,22,1},
6ac48b45
MCC
517 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x2b,
518 0xa6, 0x72, 0x10, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 519 },
9bc7400a 520#if 0
6ac48b45
MCC
521 {0x050, /* Teletext, PAL, WST System C */
522 {V4L2_SLICED_TELETEXT_PAL_C,6,22,1},
523 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
524 0xa6, 0x98, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 525 },
6ac48b45
MCC
526 {0x070, /* Teletext, NTSC, WST System B */
527 {V4L2_SLICED_TELETEXT_NTSC_B,10,21,1},
528 { 0xaa, 0xaa, 0xff, 0xff, 0x27, 0x2e, 0x20, 0x23,
529 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 530 },
6ac48b45
MCC
531 {0x090, /* Tetetext, NTSC NABTS System C */
532 {V4L2_SLICED_TELETEXT_NTSC_C,10,21,1},
533 { 0xaa, 0xaa, 0xff, 0xff, 0xe7, 0x2e, 0x20, 0x22,
534 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x15, 0x00 }
e1bc80ad 535 },
6ac48b45
MCC
536 {0x0b0, /* Teletext, NTSC-J, NABTS System D */
537 {V4L2_SLICED_TELETEXT_NTSC_D,10,21,1},
538 { 0xaa, 0xaa, 0xff, 0xff, 0xa7, 0x2e, 0x20, 0x23,
539 0x69, 0x93, 0x0d, 0x00, 0x00, 0x00, 0x10, 0x00 }
e1bc80ad 540 },
6ac48b45
MCC
541 {0x0d0, /* Closed Caption, PAL/SECAM */
542 {V4L2_SLICED_CAPTION_625,22,22,1},
543 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
544 0xa6, 0x7b, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 545 },
9bc7400a 546#endif
6ac48b45
MCC
547 {0x0f0, /* Closed Caption, NTSC */
548 {V4L2_SLICED_CAPTION_525,21,21,1},
549 { 0xaa, 0x2a, 0xff, 0x3f, 0x04, 0x51, 0x6e, 0x02,
550 0x69, 0x8c, 0x09, 0x00, 0x00, 0x00, 0x27, 0x00 }
e1bc80ad 551 },
6ac48b45 552 {0x110, /* Wide Screen Signal, PAL/SECAM */
12db5607 553 {V4L2_SLICED_WSS_625,23,23,1},
6ac48b45
MCC
554 { 0x5b, 0x55, 0xc5, 0xff, 0x00, 0x71, 0x6e, 0x42,
555 0xa6, 0xcd, 0x0f, 0x00, 0x00, 0x00, 0x3a, 0x00 }
e1bc80ad 556 },
9bc7400a 557#if 0
6ac48b45
MCC
558 {0x130, /* Wide Screen Signal, NTSC C */
559 {V4L2_SLICED_WSS_525,20,20,1},
560 { 0x38, 0x00, 0x3f, 0x00, 0x00, 0x71, 0x6e, 0x43,
561 0x69, 0x7c, 0x08, 0x00, 0x00, 0x00, 0x39, 0x00 }
e1bc80ad 562 },
6ac48b45
MCC
563 {0x150, /* Vertical Interval Timecode (VITC), PAL/SECAM */
564 {V4l2_SLICED_VITC_625,6,22,0},
565 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
566 0xa6, 0x85, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 567 },
6ac48b45
MCC
568 {0x170, /* Vertical Interval Timecode (VITC), NTSC */
569 {V4l2_SLICED_VITC_525,10,20,0},
570 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x8f, 0x6d, 0x49,
571 0x69, 0x94, 0x08, 0x00, 0x00, 0x00, 0x4c, 0x00 }
e1bc80ad 572 },
9bc7400a 573#endif
6ac48b45
MCC
574 {0x190, /* Video Program System (VPS), PAL */
575 {V4L2_SLICED_VPS,16,16,0},
576 { 0xaa, 0xaa, 0xff, 0xff, 0xba, 0xce, 0x2b, 0x0d,
577 0xa6, 0xda, 0x0b, 0x00, 0x00, 0x00, 0x60, 0x00 }
3ad96835 578 },
6ac48b45
MCC
579 /* 0x1d0 User programmable */
580
581 /* End of struct */
582 { (u16)-1 }
e1bc80ad 583};
4c86f973 584
6b8fe025 585static int tvp5150_write_inittab(struct v4l2_subdev *sd,
6ac48b45 586 const struct i2c_reg_value *regs)
e1bc80ad
MCC
587{
588 while (regs->reg != 0xff) {
6b8fe025 589 tvp5150_write(sd, regs->reg, regs->value);
e1bc80ad
MCC
590 regs++;
591 }
592 return 0;
593}
84486d53 594
6b8fe025 595static int tvp5150_vdp_init(struct v4l2_subdev *sd,
6ac48b45 596 const struct i2c_vbi_ram_value *regs)
e1bc80ad
MCC
597{
598 unsigned int i;
cd4665c5 599
e1bc80ad 600 /* Disable Full Field */
6b8fe025 601 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
cd4665c5 602
e1bc80ad 603 /* Before programming, Line mode should be at 0xff */
6b8fe025
HV
604 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
605 tvp5150_write(sd, i, 0xff);
cd4665c5 606
e1bc80ad 607 /* Load Ram Table */
6b8fe025
HV
608 while (regs->reg != (u16)-1) {
609 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_HIGH, regs->reg >> 8);
610 tvp5150_write(sd, TVP5150_CONF_RAM_ADDR_LOW, regs->reg);
cd4665c5 611
6b8fe025
HV
612 for (i = 0; i < 16; i++)
613 tvp5150_write(sd, TVP5150_VDP_CONF_RAM_DATA, regs->values[i]);
84486d53 614
e1bc80ad
MCC
615 regs++;
616 }
617 return 0;
618}
cd4665c5 619
6ac48b45 620/* Fills VBI capabilities based on i2c_vbi_ram_value struct */
6b8fe025 621static int tvp5150_g_sliced_vbi_cap(struct v4l2_subdev *sd,
6ac48b45
MCC
622 struct v4l2_sliced_vbi_cap *cap)
623{
6b8fe025 624 const struct i2c_vbi_ram_value *regs = vbi_ram_default;
6ac48b45
MCC
625 int line;
626
257e29f8 627 dev_dbg_lvl(sd->dev, 1, debug, "g_sliced_vbi_cap\n");
6ac48b45
MCC
628 memset(cap, 0, sizeof *cap);
629
630 while (regs->reg != (u16)-1 ) {
631 for (line=regs->type.ini_line;line<=regs->type.end_line;line++) {
632 cap->service_lines[0][line] |= regs->type.vbi_type;
633 }
634 cap->service_set |= regs->type.vbi_type;
635
636 regs++;
637 }
6b8fe025 638 return 0;
6ac48b45
MCC
639}
640
3ad96835
MCC
641/* Set vbi processing
642 * type - one of tvp5150_vbi_types
643 * line - line to gather data
644 * fields: bit 0 field1, bit 1, field2
645 * flags (default=0xf0) is a bitmask, were set means:
646 * bit 7: enable filtering null bytes on CC
647 * bit 6: send data also to FIFO
648 * bit 5: don't allow data with errors on FIFO
649 * bit 4: enable ECC when possible
650 * pix_align = pix alignment:
651 * LSB = field1
652 * MSB = field2
653 */
6b8fe025 654static int tvp5150_set_vbi(struct v4l2_subdev *sd,
2701dacb
MCC
655 const struct i2c_vbi_ram_value *regs,
656 unsigned int type,u8 flags, int line,
657 const int fields)
3ad96835 658{
6b8fe025
HV
659 struct tvp5150 *decoder = to_tvp5150(sd);
660 v4l2_std_id std = decoder->norm;
3ad96835 661 u8 reg;
b3d930aa 662 int pos = 0;
3ad96835
MCC
663
664 if (std == V4L2_STD_ALL) {
257e29f8 665 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
12db5607 666 return 0;
7d5b7b98 667 } else if (std & V4L2_STD_625_50) {
3ad96835
MCC
668 /* Don't follow NTSC Line number convension */
669 line += 3;
670 }
671
b3d930aa 672 if (line < 6 || line > 27)
2701dacb
MCC
673 return 0;
674
b3d930aa 675 while (regs->reg != (u16)-1) {
2701dacb 676 if ((type & regs->type.vbi_type) &&
b3d930aa
GS
677 (line >= regs->type.ini_line) &&
678 (line <= regs->type.end_line))
2701dacb 679 break;
2701dacb
MCC
680
681 regs++;
682 pos++;
683 }
b3d930aa 684
2701dacb
MCC
685 if (regs->reg == (u16)-1)
686 return 0;
3ad96835 687
b3d930aa
GS
688 type = pos | (flags & 0xf0);
689 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
3ad96835 690
b3d930aa 691 if (fields & 1)
6b8fe025 692 tvp5150_write(sd, reg, type);
3ad96835 693
b3d930aa
GS
694 if (fields & 2)
695 tvp5150_write(sd, reg + 1, type);
3ad96835 696
2701dacb 697 return type;
3ad96835
MCC
698}
699
6b8fe025 700static int tvp5150_get_vbi(struct v4l2_subdev *sd,
12db5607
MCC
701 const struct i2c_vbi_ram_value *regs, int line)
702{
6b8fe025
HV
703 struct tvp5150 *decoder = to_tvp5150(sd);
704 v4l2_std_id std = decoder->norm;
12db5607 705 u8 reg;
6b8fe025 706 int pos, type = 0;
8cd0d4ca 707 int i, ret = 0;
12db5607
MCC
708
709 if (std == V4L2_STD_ALL) {
257e29f8 710 dev_err(sd->dev, "VBI can't be configured without knowing number of lines\n");
12db5607 711 return 0;
7d5b7b98 712 } else if (std & V4L2_STD_625_50) {
12db5607
MCC
713 /* Don't follow NTSC Line number convension */
714 line += 3;
715 }
716
6b8fe025 717 if (line < 6 || line > 27)
12db5607
MCC
718 return 0;
719
6b8fe025 720 reg = ((line - 6) << 1) + TVP5150_LINE_MODE_INI;
12db5607 721
8cd0d4ca
DL
722 for (i = 0; i <= 1; i++) {
723 ret = tvp5150_read(sd, reg + i);
724 if (ret < 0) {
257e29f8 725 dev_err(sd->dev, "%s: failed with error = %d\n",
8cd0d4ca
DL
726 __func__, ret);
727 return 0;
728 }
729 pos = ret & 0x0f;
730 if (pos < 0x0f)
731 type |= regs[pos].type.vbi_type;
732 }
12db5607
MCC
733
734 return type;
735}
6b8fe025
HV
736
737static int tvp5150_set_std(struct v4l2_subdev *sd, v4l2_std_id std)
e1bc80ad 738{
6b8fe025
HV
739 struct tvp5150 *decoder = to_tvp5150(sd);
740 int fmt = 0;
e1bc80ad 741
6b8fe025 742 decoder->norm = std;
e1bc80ad
MCC
743
744 /* First tests should be against specific std */
745
26811ae0 746 if (std == V4L2_STD_NTSC_443) {
2da12fcb 747 fmt = VIDEO_STD_NTSC_4_43_BIT;
26811ae0 748 } else if (std == V4L2_STD_PAL_M) {
2da12fcb 749 fmt = VIDEO_STD_PAL_M_BIT;
26811ae0 750 } else if (std == V4L2_STD_PAL_N || std == V4L2_STD_PAL_Nc) {
2da12fcb 751 fmt = VIDEO_STD_PAL_COMBINATION_N_BIT;
e1bc80ad
MCC
752 } else {
753 /* Then, test against generic ones */
6b8fe025 754 if (std & V4L2_STD_NTSC)
2da12fcb 755 fmt = VIDEO_STD_NTSC_MJ_BIT;
6b8fe025 756 else if (std & V4L2_STD_PAL)
2da12fcb 757 fmt = VIDEO_STD_PAL_BDGHIN_BIT;
6b8fe025 758 else if (std & V4L2_STD_SECAM)
2da12fcb 759 fmt = VIDEO_STD_SECAM_BIT;
e1bc80ad 760 }
84486d53 761
257e29f8 762 dev_dbg_lvl(sd->dev, 1, debug, "Set video std register to %d.\n", fmt);
6b8fe025 763 tvp5150_write(sd, TVP5150_VIDEO_STD, fmt);
e1bc80ad
MCC
764 return 0;
765}
766
6b8fe025
HV
767static int tvp5150_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
768{
769 struct tvp5150 *decoder = to_tvp5150(sd);
770
771 if (decoder->norm == std)
772 return 0;
773
963ddc63
JM
774 /* Change cropping height limits */
775 if (std & V4L2_STD_525_60)
776 decoder->rect.height = TVP5150_V_MAX_525_60;
777 else
778 decoder->rect.height = TVP5150_V_MAX_OTHERS;
779
780
6b8fe025
HV
781 return tvp5150_set_std(sd, std);
782}
783
784static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
e1bc80ad 785{
6b8fe025 786 struct tvp5150 *decoder = to_tvp5150(sd);
84486d53 787
e1bc80ad 788 /* Initializes TVP5150 to its default values */
6b8fe025 789 tvp5150_write_inittab(sd, tvp5150_init_default);
e1bc80ad
MCC
790
791 /* Initializes VDP registers */
6b8fe025 792 tvp5150_vdp_init(sd, vbi_ram_default);
e1bc80ad
MCC
793
794 /* Selects decoder input */
6b8fe025 795 tvp5150_selmux(sd);
e1bc80ad
MCC
796
797 /* Initializes TVP5150 to stream enabled values */
6b8fe025 798 tvp5150_write_inittab(sd, tvp5150_init_enable);
e1bc80ad
MCC
799
800 /* Initialize image preferences */
6c45ec71 801 v4l2_ctrl_handler_setup(&decoder->hdl);
e1bc80ad 802
6b8fe025 803 tvp5150_set_std(sd, decoder->norm);
a2e5f1b3
JMC
804
805 if (decoder->mbus_type == V4L2_MBUS_PARALLEL)
806 tvp5150_write(sd, TVP5150_DATA_RATE_SEL, 0x40);
807
6b8fe025 808 return 0;
cd4665c5
MCC
809};
810
6c45ec71 811static int tvp5150_s_ctrl(struct v4l2_ctrl *ctrl)
a6c2ba28 812{
6c45ec71 813 struct v4l2_subdev *sd = to_sd(ctrl);
c43875f6 814 struct tvp5150 *decoder = to_tvp5150(sd);
a6c2ba28 815
816 switch (ctrl->id) {
817 case V4L2_CID_BRIGHTNESS:
6c45ec71 818 tvp5150_write(sd, TVP5150_BRIGHT_CTL, ctrl->val);
a6c2ba28 819 return 0;
820 case V4L2_CID_CONTRAST:
6c45ec71 821 tvp5150_write(sd, TVP5150_CONTRAST_CTL, ctrl->val);
a6c2ba28 822 return 0;
823 case V4L2_CID_SATURATION:
6c45ec71 824 tvp5150_write(sd, TVP5150_SATURATION_CTL, ctrl->val);
a6c2ba28 825 return 0;
826 case V4L2_CID_HUE:
6c45ec71 827 tvp5150_write(sd, TVP5150_HUE_CTL, ctrl->val);
d183e4ef 828 break;
c43875f6
MCC
829 case V4L2_CID_TEST_PATTERN:
830 decoder->enable = ctrl->val ? false : true;
831 tvp5150_selmux(sd);
a6c2ba28 832 return 0;
a6c2ba28 833 }
c0477ad9 834 return -EINVAL;
a6c2ba28 835}
836
ec2c4f3f
JM
837static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
838{
839 int val = tvp5150_read(sd, TVP5150_STATUS_REG_5);
840
841 switch (val & 0x0F) {
842 case 0x01:
843 return V4L2_STD_NTSC;
844 case 0x03:
845 return V4L2_STD_PAL;
846 case 0x05:
847 return V4L2_STD_PAL_M;
848 case 0x07:
849 return V4L2_STD_PAL_N | V4L2_STD_PAL_Nc;
850 case 0x09:
851 return V4L2_STD_NTSC_443;
852 case 0xb:
853 return V4L2_STD_SECAM;
854 default:
855 return V4L2_STD_UNKNOWN;
856 }
857}
858
da298c6d
HV
859static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
860 struct v4l2_subdev_pad_config *cfg,
861 struct v4l2_subdev_format *format)
ec2c4f3f 862{
da298c6d 863 struct v4l2_mbus_framefmt *f;
ec2c4f3f 864 struct tvp5150 *decoder = to_tvp5150(sd);
ec2c4f3f 865
f6f0e2f5 866 if (!format || (format->pad != DEMOD_PAD_VID_OUT))
ec2c4f3f
JM
867 return -EINVAL;
868
da298c6d
HV
869 f = &format->format;
870
963ddc63 871 f->width = decoder->rect.width;
0866df8d 872 f->height = decoder->rect.height;
ec2c4f3f 873
f5fe58fd 874 f->code = MEDIA_BUS_FMT_UYVY8_2X8;
4f57d27b 875 f->field = V4L2_FIELD_ALTERNATE;
ec2c4f3f
JM
876 f->colorspace = V4L2_COLORSPACE_SMPTE170M;
877
257e29f8 878 dev_dbg_lvl(sd->dev, 1, debug, "width = %d, height = %d\n", f->width,
ec2c4f3f
JM
879 f->height);
880 return 0;
881}
882
10d5509c
HV
883static int tvp5150_set_selection(struct v4l2_subdev *sd,
884 struct v4l2_subdev_pad_config *cfg,
885 struct v4l2_subdev_selection *sel)
963ddc63 886{
963ddc63 887 struct tvp5150 *decoder = to_tvp5150(sd);
10d5509c 888 struct v4l2_rect rect = sel->r;
963ddc63 889 v4l2_std_id std;
10d5509c
HV
890 int hmax;
891
892 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE ||
893 sel->target != V4L2_SEL_TGT_CROP)
894 return -EINVAL;
963ddc63 895
257e29f8 896 dev_dbg_lvl(sd->dev, 1, debug, "%s left=%d, top=%d, width=%d, height=%d\n",
963ddc63
JM
897 __func__, rect.left, rect.top, rect.width, rect.height);
898
963ddc63
JM
899 /* tvp5150 has some special limits */
900 rect.left = clamp(rect.left, 0, TVP5150_MAX_CROP_LEFT);
f90580ca
RRD
901 rect.width = clamp_t(unsigned int, rect.width,
902 TVP5150_H_MAX - TVP5150_MAX_CROP_LEFT - rect.left,
903 TVP5150_H_MAX - rect.left);
963ddc63
JM
904 rect.top = clamp(rect.top, 0, TVP5150_MAX_CROP_TOP);
905
906 /* Calculate height based on current standard */
907 if (decoder->norm == V4L2_STD_ALL)
908 std = tvp5150_read_std(sd);
909 else
910 std = decoder->norm;
911
912 if (std & V4L2_STD_525_60)
913 hmax = TVP5150_V_MAX_525_60;
914 else
915 hmax = TVP5150_V_MAX_OTHERS;
916
f90580ca
RRD
917 rect.height = clamp_t(unsigned int, rect.height,
918 hmax - TVP5150_MAX_CROP_TOP - rect.top,
919 hmax - rect.top);
963ddc63
JM
920
921 tvp5150_write(sd, TVP5150_VERT_BLANKING_START, rect.top);
922 tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP,
923 rect.top + rect.height - hmax);
924 tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_MSB,
925 rect.left >> TVP5150_CROP_SHIFT);
926 tvp5150_write(sd, TVP5150_ACT_VD_CROP_ST_LSB,
927 rect.left | (1 << TVP5150_CROP_SHIFT));
928 tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_MSB,
929 (rect.left + rect.width - TVP5150_MAX_CROP_LEFT) >>
930 TVP5150_CROP_SHIFT);
931 tvp5150_write(sd, TVP5150_ACT_VD_CROP_STP_LSB,
932 rect.left + rect.width - TVP5150_MAX_CROP_LEFT);
933
934 decoder->rect = rect;
935
936 return 0;
937}
938
10d5509c
HV
939static int tvp5150_get_selection(struct v4l2_subdev *sd,
940 struct v4l2_subdev_pad_config *cfg,
941 struct v4l2_subdev_selection *sel)
963ddc63 942{
10d5509c 943 struct tvp5150 *decoder = container_of(sd, struct tvp5150, sd);
963ddc63
JM
944 v4l2_std_id std;
945
10d5509c 946 if (sel->which != V4L2_SUBDEV_FORMAT_ACTIVE)
963ddc63
JM
947 return -EINVAL;
948
10d5509c
HV
949 switch (sel->target) {
950 case V4L2_SEL_TGT_CROP_BOUNDS:
951 case V4L2_SEL_TGT_CROP_DEFAULT:
952 sel->r.left = 0;
953 sel->r.top = 0;
954 sel->r.width = TVP5150_H_MAX;
955
956 /* Calculate height based on current standard */
957 if (decoder->norm == V4L2_STD_ALL)
958 std = tvp5150_read_std(sd);
959 else
960 std = decoder->norm;
961 if (std & V4L2_STD_525_60)
962 sel->r.height = TVP5150_V_MAX_525_60;
963 else
964 sel->r.height = TVP5150_V_MAX_OTHERS;
965 return 0;
966 case V4L2_SEL_TGT_CROP:
967 sel->r = decoder->rect;
968 return 0;
969 default:
970 return -EINVAL;
971 }
963ddc63
JM
972}
973
dd3a46bb
LP
974static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
975 struct v4l2_mbus_config *cfg)
976{
a2e5f1b3
JMC
977 struct tvp5150 *decoder = to_tvp5150(sd);
978
979 cfg->type = decoder->mbus_type;
dd3a46bb
LP
980 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
981 | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
982
983 return 0;
984}
985
e545ac87
LP
986/****************************************************************************
987 V4L2 subdev pad ops
988 ****************************************************************************/
989static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
990 struct v4l2_subdev_pad_config *cfg,
991 struct v4l2_subdev_mbus_code_enum *code)
992{
993 if (code->pad || code->index)
994 return -EINVAL;
995
996 code->code = MEDIA_BUS_FMT_UYVY8_2X8;
997 return 0;
998}
999
1000static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
1001 struct v4l2_subdev_pad_config *cfg,
1002 struct v4l2_subdev_frame_size_enum *fse)
1003{
1004 struct tvp5150 *decoder = to_tvp5150(sd);
1005
1006 if (fse->index >= 8 || fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
1007 return -EINVAL;
1008
1009 fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
1010 fse->min_width = decoder->rect.width;
1011 fse->max_width = decoder->rect.width;
1012 fse->min_height = decoder->rect.height / 2;
1013 fse->max_height = decoder->rect.height / 2;
1014
1015 return 0;
1016}
1017
f7b4b54e
JMC
1018/****************************************************************************
1019 Media entity ops
1020 ****************************************************************************/
1021
406ff67d 1022#ifdef CONFIG_MEDIA_CONTROLLER
f7b4b54e
JMC
1023static int tvp5150_link_setup(struct media_entity *entity,
1024 const struct media_pad *local,
1025 const struct media_pad *remote, u32 flags)
1026{
f7b4b54e
JMC
1027 struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
1028 struct tvp5150 *decoder = to_tvp5150(sd);
1029 int i;
1030
1031 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1032 if (remote->entity == &decoder->input_ent[i])
1033 break;
1034 }
1035
1036 /* Do nothing for entities that are not input connectors */
1037 if (i == TVP5150_INPUT_NUM)
1038 return 0;
1039
1040 decoder->input = i;
1041
f7b4b54e 1042 tvp5150_selmux(sd);
f7b4b54e
JMC
1043
1044 return 0;
1045}
1046
1047static const struct media_entity_operations tvp5150_sd_media_ops = {
1048 .link_setup = tvp5150_link_setup,
1049};
406ff67d 1050#endif
f7b4b54e 1051
84486d53
MCC
1052/****************************************************************************
1053 I2C Command
1054 ****************************************************************************/
c7c0b34c 1055
460b6c08
LP
1056static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
1057{
a2e5f1b3 1058 struct tvp5150 *decoder = to_tvp5150(sd);
79d6205a 1059 int val;
a2e5f1b3 1060
79d6205a
LP
1061 /* Enable or disable the video output signals. */
1062 val = tvp5150_read(sd, TVP5150_MISC_CTL);
1063 if (val < 0)
1064 return val;
1065
1066 val &= ~(TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_SYNC_OE |
1067 TVP5150_MISC_CTL_CLOCK_OE);
1068
1069 if (enable) {
1070 /*
1071 * Enable the YCbCr and clock outputs. In discrete sync mode
1072 * (non-BT.656) additionally enable the the sync outputs.
1073 */
1074 val |= TVP5150_MISC_CTL_YCBCR_OE | TVP5150_MISC_CTL_CLOCK_OE;
1075 if (decoder->mbus_type == V4L2_MBUS_PARALLEL)
1076 val |= TVP5150_MISC_CTL_SYNC_OE;
1077 }
460b6c08 1078
79d6205a 1079 tvp5150_write(sd, TVP5150_MISC_CTL, val);
460b6c08
LP
1080
1081 return 0;
1082}
1083
5325b427
HV
1084static int tvp5150_s_routing(struct v4l2_subdev *sd,
1085 u32 input, u32 output, u32 config)
6b8fe025
HV
1086{
1087 struct tvp5150 *decoder = to_tvp5150(sd);
84486d53 1088
5325b427
HV
1089 decoder->input = input;
1090 decoder->output = output;
c43875f6
MCC
1091
1092 if (output == TVP5150_BLACK_SCREEN)
1093 decoder->enable = false;
1094 else
1095 decoder->enable = true;
1096
6b8fe025
HV
1097 tvp5150_selmux(sd);
1098 return 0;
1099}
6ac48b45 1100
d37dad49
HV
1101static int tvp5150_s_raw_fmt(struct v4l2_subdev *sd, struct v4l2_vbi_format *fmt)
1102{
1103 /* this is for capturing 36 raw vbi lines
1104 if there's a way to cut off the beginning 2 vbi lines
1105 with the tvp5150 then the vbi line count could be lowered
1106 to 17 lines/field again, although I couldn't find a register
1107 which could do that cropping */
1108 if (fmt->sample_format == V4L2_PIX_FMT_GREY)
1109 tvp5150_write(sd, TVP5150_LUMA_PROC_CTL_1, 0x70);
1110 if (fmt->count[0] == 18 && fmt->count[1] == 18) {
1111 tvp5150_write(sd, TVP5150_VERT_BLANKING_START, 0x00);
1112 tvp5150_write(sd, TVP5150_VERT_BLANKING_STOP, 0x01);
1113 }
1114 return 0;
1115}
1116
1117static int tvp5150_s_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
6b8fe025 1118{
6b8fe025
HV
1119 int i;
1120
6b8fe025
HV
1121 if (svbi->service_set != 0) {
1122 for (i = 0; i <= 23; i++) {
1123 svbi->service_lines[1][i] = 0;
1124 svbi->service_lines[0][i] =
1125 tvp5150_set_vbi(sd, vbi_ram_default,
1126 svbi->service_lines[0][i], 0xf0, i, 3);
2c5aacc6 1127 }
6b8fe025
HV
1128 /* Enables FIFO */
1129 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 1);
1130 } else {
1131 /* Disables FIFO*/
1132 tvp5150_write(sd, TVP5150_FIFO_OUT_CTRL, 0);
12db5607 1133
6b8fe025
HV
1134 /* Disable Full Field */
1135 tvp5150_write(sd, TVP5150_FULL_FIELD_ENA, 0);
12db5607 1136
6b8fe025
HV
1137 /* Disable Line modes */
1138 for (i = TVP5150_LINE_MODE_INI; i <= TVP5150_LINE_MODE_END; i++)
1139 tvp5150_write(sd, i, 0xff);
12db5607 1140 }
6b8fe025
HV
1141 return 0;
1142}
12db5607 1143
d37dad49
HV
1144static int tvp5150_g_sliced_fmt(struct v4l2_subdev *sd, struct v4l2_sliced_vbi_format *svbi)
1145{
1146 int i, mask = 0;
1147
30634e8e 1148 memset(svbi->service_lines, 0, sizeof(svbi->service_lines));
12db5607 1149
6b8fe025
HV
1150 for (i = 0; i <= 23; i++) {
1151 svbi->service_lines[0][i] =
1152 tvp5150_get_vbi(sd, vbi_ram_default, i);
1153 mask |= svbi->service_lines[0][i];
2701dacb 1154 }
6b8fe025
HV
1155 svbi->service_set = mask;
1156 return 0;
1157}
1158
21dcd8cc 1159#ifdef CONFIG_VIDEO_ADV_DEBUG
aecde8b5 1160static int tvp5150_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
6b8fe025 1161{
8cd0d4ca
DL
1162 int res;
1163
8cd0d4ca
DL
1164 res = tvp5150_read(sd, reg->reg & 0xff);
1165 if (res < 0) {
257e29f8 1166 dev_err(sd->dev, "%s: failed with error = %d\n", __func__, res);
8cd0d4ca
DL
1167 return res;
1168 }
1169
1170 reg->val = res;
aecde8b5 1171 reg->size = 1;
6b8fe025
HV
1172 return 0;
1173}
84486d53 1174
977ba3b1 1175static int tvp5150_s_register(struct v4l2_subdev *sd, const struct v4l2_dbg_register *reg)
6b8fe025 1176{
eca4ca84 1177 return tvp5150_write(sd, reg->reg & 0xff, reg->val & 0xff);
6b8fe025
HV
1178}
1179#endif
a6c2ba28 1180
6b8fe025
HV
1181static int tvp5150_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1182{
1183 int status = tvp5150_read(sd, 0x88);
a6c2ba28 1184
6b8fe025
HV
1185 vt->signal = ((status & 0x04) && (status & 0x02)) ? 0xffff : 0x0;
1186 return 0;
1187}
a6c2ba28 1188
5a08bc00 1189static int tvp5150_registered(struct v4l2_subdev *sd)
f7b4b54e
JMC
1190{
1191#ifdef CONFIG_MEDIA_CONTROLLER
1192 struct tvp5150 *decoder = to_tvp5150(sd);
1193 int ret = 0;
1194 int i;
1195
1196 for (i = 0; i < TVP5150_INPUT_NUM; i++) {
1197 struct media_entity *input = &decoder->input_ent[i];
1198 struct media_pad *pad = &decoder->input_pad[i];
1199
1200 if (!input->name)
1201 continue;
1202
1203 decoder->input_pad[i].flags = MEDIA_PAD_FL_SOURCE;
1204
1205 ret = media_entity_pads_init(input, 1, pad);
1206 if (ret < 0)
1207 return ret;
1208
1209 ret = media_device_register_entity(sd->v4l2_dev->mdev, input);
1210 if (ret < 0)
1211 return ret;
1212
1213 ret = media_create_pad_link(input, 0, &sd->entity,
1214 DEMOD_PAD_IF_INPUT, 0);
1215 if (ret < 0) {
1216 media_device_unregister_entity(input);
1217 return ret;
1218 }
1219 }
1220#endif
1221
1222 return 0;
1223}
1224
6b8fe025
HV
1225/* ----------------------------------------------------------------------- */
1226
6c45ec71
HV
1227static const struct v4l2_ctrl_ops tvp5150_ctrl_ops = {
1228 .s_ctrl = tvp5150_s_ctrl,
1229};
1230
6b8fe025
HV
1231static const struct v4l2_subdev_core_ops tvp5150_core_ops = {
1232 .log_status = tvp5150_log_status,
6b8fe025
HV
1233 .reset = tvp5150_reset,
1234#ifdef CONFIG_VIDEO_ADV_DEBUG
1235 .g_register = tvp5150_g_register,
1236 .s_register = tvp5150_s_register,
1237#endif
1238};
1239
1240static const struct v4l2_subdev_tuner_ops tvp5150_tuner_ops = {
6b8fe025
HV
1241 .g_tuner = tvp5150_g_tuner,
1242};
1243
1244static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
8774bed9 1245 .s_std = tvp5150_s_std,
460b6c08 1246 .s_stream = tvp5150_s_stream,
6b8fe025 1247 .s_routing = tvp5150_s_routing,
dd3a46bb 1248 .g_mbus_config = tvp5150_g_mbus_config,
32cd527f
HV
1249};
1250
1251static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
6b8fe025 1252 .g_sliced_vbi_cap = tvp5150_g_sliced_vbi_cap,
d37dad49
HV
1253 .g_sliced_fmt = tvp5150_g_sliced_fmt,
1254 .s_sliced_fmt = tvp5150_s_sliced_fmt,
1255 .s_raw_fmt = tvp5150_s_raw_fmt,
6b8fe025
HV
1256};
1257
ebcff5fc
HV
1258static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
1259 .enum_mbus_code = tvp5150_enum_mbus_code,
e545ac87 1260 .enum_frame_size = tvp5150_enum_frame_size,
da298c6d
HV
1261 .set_fmt = tvp5150_fill_fmt,
1262 .get_fmt = tvp5150_fill_fmt,
10d5509c
HV
1263 .get_selection = tvp5150_get_selection,
1264 .set_selection = tvp5150_set_selection,
ebcff5fc
HV
1265};
1266
6b8fe025
HV
1267static const struct v4l2_subdev_ops tvp5150_ops = {
1268 .core = &tvp5150_core_ops,
1269 .tuner = &tvp5150_tuner_ops,
1270 .video = &tvp5150_video_ops,
32cd527f 1271 .vbi = &tvp5150_vbi_ops,
ebcff5fc 1272 .pad = &tvp5150_pad_ops,
6b8fe025
HV
1273};
1274
5a08bc00
JMC
1275static const struct v4l2_subdev_internal_ops tvp5150_internal_ops = {
1276 .registered = tvp5150_registered,
1277};
1278
6b8fe025 1279
cd4665c5
MCC
1280/****************************************************************************
1281 I2C Client & Driver
1282 ****************************************************************************/
cd4665c5 1283
7871597a
LP
1284static int tvp5150_detect_version(struct tvp5150 *core)
1285{
1286 struct v4l2_subdev *sd = &core->sd;
1287 struct i2c_client *c = v4l2_get_subdevdata(sd);
1288 unsigned int i;
7871597a
LP
1289 u8 regs[4];
1290 int res;
1291
1292 /*
1293 * Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
1294 * TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER
1295 */
1296 for (i = 0; i < 4; i++) {
1297 res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i);
1298 if (res < 0)
1299 return res;
1300 regs[i] = res;
1301 }
1302
82275133
JMC
1303 core->dev_id = (regs[0] << 8) | regs[1];
1304 core->rom_ver = (regs[2] << 8) | regs[3];
7871597a 1305
257e29f8 1306 dev_info(sd->dev, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
82275133
JMC
1307 core->dev_id, regs[2], regs[3], c->addr << 1,
1308 c->adapter->name);
7871597a 1309
82275133 1310 if (core->dev_id == 0x5150 && core->rom_ver == 0x0321) {
257e29f8 1311 dev_info(sd->dev, "tvp5150a detected.\n");
82275133 1312 } else if (core->dev_id == 0x5150 && core->rom_ver == 0x0400) {
257e29f8 1313 dev_info(sd->dev, "tvp5150am1 detected.\n");
7871597a
LP
1314
1315 /* ITU-T BT.656.4 timing */
1316 tvp5150_write(sd, TVP5150_REV_SELECT, 0);
82275133 1317 } else if (core->dev_id == 0x5151 && core->rom_ver == 0x0100) {
257e29f8 1318 dev_info(sd->dev, "tvp5151 detected.\n");
7871597a 1319 } else {
257e29f8 1320 dev_info(sd->dev, "*** unknown tvp%04x chip detected.\n",
82275133 1321 core->dev_id);
7871597a
LP
1322 }
1323
1324 return 0;
1325}
1326
09aa2609
JMC
1327static int tvp5150_init(struct i2c_client *c)
1328{
1329 struct gpio_desc *pdn_gpio;
1330 struct gpio_desc *reset_gpio;
1331
1332 pdn_gpio = devm_gpiod_get_optional(&c->dev, "pdn", GPIOD_OUT_HIGH);
1333 if (IS_ERR(pdn_gpio))
1334 return PTR_ERR(pdn_gpio);
1335
1336 if (pdn_gpio) {
1337 gpiod_set_value_cansleep(pdn_gpio, 0);
1338 /* Delay time between power supplies active and reset */
1339 msleep(20);
1340 }
1341
1342 reset_gpio = devm_gpiod_get_optional(&c->dev, "reset", GPIOD_OUT_HIGH);
1343 if (IS_ERR(reset_gpio))
1344 return PTR_ERR(reset_gpio);
1345
1346 if (reset_gpio) {
1347 /* RESETB pulse duration */
1348 ndelay(500);
1349 gpiod_set_value_cansleep(reset_gpio, 0);
1350 /* Delay time between end of reset to I2C active */
1351 usleep_range(200, 250);
1352 }
1353
1354 return 0;
1355}
1356
a2e5f1b3
JMC
1357static int tvp5150_parse_dt(struct tvp5150 *decoder, struct device_node *np)
1358{
859969b3 1359 struct v4l2_fwnode_endpoint bus_cfg;
a2e5f1b3 1360 struct device_node *ep;
f7b4b54e
JMC
1361#ifdef CONFIG_MEDIA_CONTROLLER
1362 struct device_node *connectors, *child;
1363 struct media_entity *input;
1364 const char *name;
1365 u32 input_type;
1366#endif
a2e5f1b3
JMC
1367 unsigned int flags;
1368 int ret = 0;
1369
1370 ep = of_graph_get_next_endpoint(np, NULL);
1371 if (!ep)
1372 return -EINVAL;
1373
859969b3 1374 ret = v4l2_fwnode_endpoint_parse(of_fwnode_handle(ep), &bus_cfg);
a2e5f1b3
JMC
1375 if (ret)
1376 goto err;
1377
1378 flags = bus_cfg.bus.parallel.flags;
1379
1380 if (bus_cfg.bus_type == V4L2_MBUS_PARALLEL &&
1381 !(flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH &&
1382 flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH &&
2bd5e437
JMC
1383 flags & V4L2_MBUS_FIELD_EVEN_LOW)) {
1384 ret = -EINVAL;
1385 goto err;
1386 }
a2e5f1b3
JMC
1387
1388 decoder->mbus_type = bus_cfg.bus_type;
1389
f7b4b54e
JMC
1390#ifdef CONFIG_MEDIA_CONTROLLER
1391 connectors = of_get_child_by_name(np, "connectors");
1392
1393 if (!connectors)
1394 goto err;
1395
1396 for_each_available_child_of_node(connectors, child) {
1397 ret = of_property_read_u32(child, "input", &input_type);
1398 if (ret) {
257e29f8 1399 dev_err(decoder->sd.dev,
f7b4b54e
JMC
1400 "missing type property in node %s\n",
1401 child->name);
1402 goto err_connector;
1403 }
1404
60ad7689 1405 if (input_type >= TVP5150_INPUT_NUM) {
f7b4b54e
JMC
1406 ret = -EINVAL;
1407 goto err_connector;
1408 }
1409
1410 input = &decoder->input_ent[input_type];
1411
1412 /* Each input connector can only be defined once */
1413 if (input->name) {
257e29f8 1414 dev_err(decoder->sd.dev,
f7b4b54e
JMC
1415 "input %s with same type already exists\n",
1416 input->name);
1417 ret = -EINVAL;
1418 goto err_connector;
1419 }
1420
1421 switch (input_type) {
1422 case TVP5150_COMPOSITE0:
1423 case TVP5150_COMPOSITE1:
1424 input->function = MEDIA_ENT_F_CONN_COMPOSITE;
1425 break;
1426 case TVP5150_SVIDEO:
1427 input->function = MEDIA_ENT_F_CONN_SVIDEO;
1428 break;
f7b4b54e
JMC
1429 }
1430
1431 input->flags = MEDIA_ENT_FL_CONNECTOR;
1432
1433 ret = of_property_read_string(child, "label", &name);
1434 if (ret < 0) {
257e29f8 1435 dev_err(decoder->sd.dev,
f7b4b54e
JMC
1436 "missing label property in node %s\n",
1437 child->name);
1438 goto err_connector;
1439 }
1440
1441 input->name = name;
1442 }
1443
1444err_connector:
1445 of_node_put(connectors);
1446#endif
a2e5f1b3
JMC
1447err:
1448 of_node_put(ep);
1449 return ret;
1450}
1451
c43875f6
MCC
1452static const char * const tvp5150_test_patterns[2] = {
1453 "Disabled",
1454 "Black screen"
1455};
1456
6b8fe025
HV
1457static int tvp5150_probe(struct i2c_client *c,
1458 const struct i2c_device_id *id)
cd4665c5 1459{
cd4665c5 1460 struct tvp5150 *core;
6b8fe025 1461 struct v4l2_subdev *sd;
a2e5f1b3 1462 struct device_node *np = c->dev.of_node;
7871597a 1463 int res;
cd4665c5
MCC
1464
1465 /* Check if the adapter supports the needed features */
6b8fe025 1466 if (!i2c_check_functionality(c->adapter,
cd4665c5 1467 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
6b8fe025 1468 return -EIO;
cd4665c5 1469
09aa2609
JMC
1470 res = tvp5150_init(c);
1471 if (res)
1472 return res;
1473
c02b211d
LP
1474 core = devm_kzalloc(&c->dev, sizeof(*core), GFP_KERNEL);
1475 if (!core)
cd4665c5 1476 return -ENOMEM;
a2e5f1b3 1477
6b8fe025 1478 sd = &core->sd;
a2e5f1b3
JMC
1479
1480 if (IS_ENABLED(CONFIG_OF) && np) {
1481 res = tvp5150_parse_dt(core, np);
1482 if (res) {
257e29f8 1483 dev_err(sd->dev, "DT parsing error: %d\n", res);
a2e5f1b3
JMC
1484 return res;
1485 }
1486 } else {
1487 /* Default to BT.656 embedded sync */
1488 core->mbus_type = V4L2_MBUS_BT656;
1489 }
1490
6b8fe025 1491 v4l2_i2c_subdev_init(sd, c, &tvp5150_ops);
5a08bc00 1492 sd->internal_ops = &tvp5150_internal_ops;
e545ac87
LP
1493 sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1494
1495#if defined(CONFIG_MEDIA_CONTROLLER)
55606310
MCC
1496 core->pads[DEMOD_PAD_IF_INPUT].flags = MEDIA_PAD_FL_SINK;
1497 core->pads[DEMOD_PAD_VID_OUT].flags = MEDIA_PAD_FL_SOURCE;
1498 core->pads[DEMOD_PAD_VBI_OUT].flags = MEDIA_PAD_FL_SOURCE;
f92c70ad
MCC
1499
1500 sd->entity.function = MEDIA_ENT_F_ATV_DECODER;
1501
55606310 1502 res = media_entity_pads_init(&sd->entity, DEMOD_NUM_PADS, core->pads);
e545ac87
LP
1503 if (res < 0)
1504 return res;
f7b4b54e
JMC
1505
1506 sd->entity.ops = &tvp5150_sd_media_ops;
e545ac87 1507#endif
8cd0d4ca 1508
7871597a
LP
1509 res = tvp5150_detect_version(core);
1510 if (res < 0)
1511 return res;
0e09a3c9 1512
3ad96835 1513 core->norm = V4L2_STD_ALL; /* Default is autodetect */
5325b427 1514 core->input = TVP5150_COMPOSITE1;
c43875f6 1515 core->enable = true;
6c45ec71 1516
b1950b8d 1517 v4l2_ctrl_handler_init(&core->hdl, 5);
6c45ec71
HV
1518 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1519 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1520 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1521 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1522 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1523 V4L2_CID_SATURATION, 0, 255, 1, 128);
1524 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1525 V4L2_CID_HUE, -128, 127, 1, 0);
b1950b8d
LP
1526 v4l2_ctrl_new_std(&core->hdl, &tvp5150_ctrl_ops,
1527 V4L2_CID_PIXEL_RATE, 27000000,
1528 27000000, 1, 27000000);
c43875f6
MCC
1529 v4l2_ctrl_new_std_menu_items(&core->hdl, &tvp5150_ctrl_ops,
1530 V4L2_CID_TEST_PATTERN,
1531 ARRAY_SIZE(tvp5150_test_patterns),
1532 0, 0, tvp5150_test_patterns);
6c45ec71
HV
1533 sd->ctrl_handler = &core->hdl;
1534 if (core->hdl.error) {
8cd0d4ca 1535 res = core->hdl.error;
c7d97499 1536 goto err;
6c45ec71 1537 }
4c86f973 1538
963ddc63
JM
1539 /* Default is no cropping */
1540 core->rect.top = 0;
1541 if (tvp5150_read_std(sd) & V4L2_STD_525_60)
1542 core->rect.height = TVP5150_V_MAX_525_60;
1543 else
1544 core->rect.height = TVP5150_V_MAX_OTHERS;
1545 core->rect.left = 0;
1546 core->rect.width = TVP5150_H_MAX;
1547
aff808e8
LP
1548 tvp5150_reset(sd, 0); /* Calls v4l2_ctrl_handler_setup() */
1549
c7d97499
JMC
1550 res = v4l2_async_register_subdev(sd);
1551 if (res < 0)
1552 goto err;
1553
f1e5ee45 1554 if (debug > 1)
6b8fe025 1555 tvp5150_log_status(sd);
cd4665c5 1556 return 0;
c7d97499
JMC
1557
1558err:
1559 v4l2_ctrl_handler_free(&core->hdl);
1560 return res;
cd4665c5
MCC
1561}
1562
6b8fe025 1563static int tvp5150_remove(struct i2c_client *c)
cd4665c5 1564{
6b8fe025 1565 struct v4l2_subdev *sd = i2c_get_clientdata(c);
6c45ec71 1566 struct tvp5150 *decoder = to_tvp5150(sd);
cd4665c5 1567
257e29f8 1568 dev_dbg_lvl(sd->dev, 1, debug,
e1bc80ad
MCC
1569 "tvp5150.c: removing tvp5150 adapter on address 0x%x\n",
1570 c->addr << 1);
1571
c7d97499 1572 v4l2_async_unregister_subdev(sd);
6c45ec71 1573 v4l2_ctrl_handler_free(&decoder->hdl);
cd4665c5
MCC
1574 return 0;
1575}
1576
1577/* ----------------------------------------------------------------------- */
1578
6b8fe025
HV
1579static const struct i2c_device_id tvp5150_id[] = {
1580 { "tvp5150", 0 },
1581 { }
1582};
1583MODULE_DEVICE_TABLE(i2c, tvp5150_id);
84486d53 1584
7ef930a7
EG
1585#if IS_ENABLED(CONFIG_OF)
1586static const struct of_device_id tvp5150_of_match[] = {
1587 { .compatible = "ti,tvp5150", },
1588 { /* sentinel */ },
1589};
1590MODULE_DEVICE_TABLE(of, tvp5150_of_match);
1591#endif
1592
c771145b
HV
1593static struct i2c_driver tvp5150_driver = {
1594 .driver = {
7ef930a7 1595 .of_match_table = of_match_ptr(tvp5150_of_match),
c771145b
HV
1596 .name = "tvp5150",
1597 },
1598 .probe = tvp5150_probe,
1599 .remove = tvp5150_remove,
1600 .id_table = tvp5150_id,
cd4665c5 1601};
c771145b 1602
c6e8d86f 1603module_i2c_driver(tvp5150_driver);