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CommitLineData
1da177e4 1/*
50b215a0
JS
2 Frontend/Card driver for TwinHan DST Frontend
3 Copyright (C) 2003 Jamie Honan
4 Copyright (C) 2004, 2005 Manu Abraham (manu@kromtek.com)
1da177e4 5
50b215a0
JS
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
1da177e4 10
50b215a0
JS
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
1da177e4 15
50b215a0
JS
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
1da177e4
LT
19*/
20
7c646913
MCC
21#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
22
1da177e4
LT
23#include <linux/kernel.h>
24#include <linux/module.h>
25#include <linux/init.h>
26#include <linux/string.h>
27#include <linux/slab.h>
28#include <linux/vmalloc.h>
29#include <linux/delay.h>
30#include <asm/div64.h>
1da177e4
LT
31#include "dvb_frontend.h"
32#include "dst_priv.h"
50b215a0
JS
33#include "dst_common.h"
34
7c646913 35static unsigned int verbose;
50b215a0 36module_param(verbose, int, 0644);
7c646913 37MODULE_PARM_DESC(verbose, "verbosity level (0 to 3)");
50b215a0 38
50b215a0
JS
39static unsigned int dst_addons;
40module_param(dst_addons, int, 0644);
4a2cc126 41MODULE_PARM_DESC(dst_addons, "CA daughterboard, default is 0 (No addons)");
1da177e4 42
8cfba630
MA
43static unsigned int dst_algo;
44module_param(dst_algo, int, 0644);
45MODULE_PARM_DESC(dst_algo, "tuning algo: default is 0=(SW), 1=(HW)");
46
a427de6f
MA
47#define HAS_LOCK 1
48#define ATTEMPT_TUNE 2
49#define HAS_POWER 4
50
7c646913
MCC
51#define dprintk(level, fmt, arg...) do { \
52 if (level >= verbose) \
53 printk(KERN_DEBUG pr_fmt("%s: " fmt), \
54 __func__, ##arg); \
a427de6f
MA
55} while(0)
56
b00ef4b8 57static int dst_command(struct dst_state *state, u8 *data, u8 len);
a427de6f
MA
58
59static void dst_packsize(struct dst_state *state, int psize)
1da177e4
LT
60{
61 union dst_gpio_packet bits;
62
63 bits.psize = psize;
64 bt878_device_control(state->bt, DST_IG_TS, &bits);
65}
66
b00ef4b8
AB
67static int dst_gpio_outb(struct dst_state *state, u32 mask, u32 enbb,
68 u32 outhigh, int delay)
1da177e4
LT
69{
70 union dst_gpio_packet enb;
71 union dst_gpio_packet bits;
72 int err;
73
74 enb.enb.mask = mask;
75 enb.enb.enable = enbb;
50b215a0 76
7c646913
MCC
77 dprintk(2, "mask=[%04x], enbb=[%04x], outhigh=[%04x]\n",
78 mask, enbb, outhigh);
1da177e4 79 if ((err = bt878_device_control(state->bt, DST_IG_ENABLE, &enb)) < 0) {
7c646913
MCC
80 dprintk(2, "dst_gpio_enb error (err == %i, mask == %02x, enb == %02x)\n",
81 err, mask, enbb);
1da177e4
LT
82 return -EREMOTEIO;
83 }
8385e46f 84 udelay(1000);
1da177e4
LT
85 /* because complete disabling means no output, no need to do output packet */
86 if (enbb == 0)
87 return 0;
50b215a0
JS
88 if (delay)
89 msleep(10);
1da177e4
LT
90 bits.outp.mask = enbb;
91 bits.outp.highvals = outhigh;
1da177e4 92 if ((err = bt878_device_control(state->bt, DST_IG_WRITE, &bits)) < 0) {
7c646913
MCC
93 dprintk(2, "dst_gpio_outb error (err == %i, enbb == %02x, outhigh == %02x)\n",
94 err, enbb, outhigh);
1da177e4
LT
95 return -EREMOTEIO;
96 }
a427de6f 97
1da177e4
LT
98 return 0;
99}
100
b00ef4b8 101static int dst_gpio_inb(struct dst_state *state, u8 *result)
1da177e4
LT
102{
103 union dst_gpio_packet rd_packet;
104 int err;
105
106 *result = 0;
1da177e4 107 if ((err = bt878_device_control(state->bt, DST_IG_READ, &rd_packet)) < 0) {
7c646913 108 pr_err("dst_gpio_inb error (err == %i)\n", err);
1da177e4
LT
109 return -EREMOTEIO;
110 }
1da177e4 111 *result = (u8) rd_packet.rd.value;
a427de6f 112
1da177e4
LT
113 return 0;
114}
115
50b215a0 116int rdc_reset_state(struct dst_state *state)
1da177e4 117{
7c646913 118 dprintk(2, "Resetting state machine\n");
50b215a0 119 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, 0, NO_DELAY) < 0) {
7c646913 120 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
121 return -1;
122 }
1da177e4 123 msleep(10);
50b215a0 124 if (dst_gpio_outb(state, RDC_8820_INT, RDC_8820_INT, RDC_8820_INT, NO_DELAY) < 0) {
7c646913 125 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
126 msleep(10);
127 return -1;
128 }
129
1da177e4
LT
130 return 0;
131}
50b215a0 132EXPORT_SYMBOL(rdc_reset_state);
1da177e4 133
b00ef4b8 134static int rdc_8820_reset(struct dst_state *state)
1da177e4 135{
7c646913 136 dprintk(3, "Resetting DST\n");
50b215a0 137 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, 0, NO_DELAY) < 0) {
7c646913 138 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
139 return -1;
140 }
8385e46f 141 udelay(1000);
50b215a0 142 if (dst_gpio_outb(state, RDC_8820_RESET, RDC_8820_RESET, RDC_8820_RESET, DELAY) < 0) {
7c646913 143 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
144 return -1;
145 }
146
1da177e4
LT
147 return 0;
148}
149
b00ef4b8 150static int dst_pio_enable(struct dst_state *state)
1da177e4 151{
50b215a0 152 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_ENABLE, 0, NO_DELAY) < 0) {
7c646913 153 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
154 return -1;
155 }
8385e46f 156 udelay(1000);
a427de6f 157
50b215a0
JS
158 return 0;
159}
50b215a0
JS
160
161int dst_pio_disable(struct dst_state *state)
162{
163 if (dst_gpio_outb(state, ~0, RDC_8820_PIO_0_DISABLE, RDC_8820_PIO_0_DISABLE, NO_DELAY) < 0) {
7c646913 164 pr_err("dst_gpio_outb ERROR !\n");
50b215a0
JS
165 return -1;
166 }
8385e46f
JS
167 if (state->type_flags & DST_TYPE_HAS_FW_1)
168 udelay(1000);
50b215a0 169
1da177e4
LT
170 return 0;
171}
50b215a0 172EXPORT_SYMBOL(dst_pio_disable);
1da177e4 173
50b215a0 174int dst_wait_dst_ready(struct dst_state *state, u8 delay_mode)
1da177e4
LT
175{
176 u8 reply;
1da177e4 177 int i;
50b215a0 178
1da177e4 179 for (i = 0; i < 200; i++) {
50b215a0 180 if (dst_gpio_inb(state, &reply) < 0) {
7c646913 181 pr_err("dst_gpio_inb ERROR !\n");
50b215a0
JS
182 return -1;
183 }
50b215a0 184 if ((reply & RDC_8820_PIO_0_ENABLE) == 0) {
7c646913 185 dprintk(2, "dst wait ready after %d\n", i);
1da177e4
LT
186 return 1;
187 }
b46dd445 188 msleep(10);
50b215a0 189 }
7c646913 190 dprintk(1, "dst wait NOT ready after %d\n", i);
50b215a0
JS
191
192 return 0;
193}
194EXPORT_SYMBOL(dst_wait_dst_ready);
195
196int dst_error_recovery(struct dst_state *state)
197{
7c646913 198 dprintk(1, "Trying to return from previous errors.\n");
50b215a0
JS
199 dst_pio_disable(state);
200 msleep(10);
201 dst_pio_enable(state);
202 msleep(10);
203
204 return 0;
205}
206EXPORT_SYMBOL(dst_error_recovery);
207
208int dst_error_bailout(struct dst_state *state)
209{
7c646913 210 dprintk(2, "Trying to bailout from previous error.\n");
50b215a0
JS
211 rdc_8820_reset(state);
212 dst_pio_disable(state);
213 msleep(10);
214
215 return 0;
216}
217EXPORT_SYMBOL(dst_error_bailout);
218
a427de6f 219int dst_comm_init(struct dst_state *state)
50b215a0 220{
7c646913 221 dprintk(2, "Initializing DST.\n");
50b215a0 222 if ((dst_pio_enable(state)) < 0) {
7c646913 223 pr_err("PIO Enable Failed\n");
50b215a0
JS
224 return -1;
225 }
226 if ((rdc_reset_state(state)) < 0) {
7c646913 227 pr_err("RDC 8820 State RESET Failed.\n");
50b215a0 228 return -1;
1da177e4 229 }
8385e46f
JS
230 if (state->type_flags & DST_TYPE_HAS_FW_1)
231 msleep(100);
232 else
233 msleep(5);
234
1da177e4
LT
235 return 0;
236}
50b215a0 237EXPORT_SYMBOL(dst_comm_init);
1da177e4 238
50b215a0 239int write_dst(struct dst_state *state, u8 *data, u8 len)
1da177e4
LT
240{
241 struct i2c_msg msg = {
a427de6f
MA
242 .addr = state->config->demod_address,
243 .flags = 0,
244 .buf = data,
245 .len = len
1da177e4 246 };
50b215a0 247
1da177e4 248 int err;
7c646913 249 u8 cnt;
a427de6f 250
7c646913 251 dprintk(1, "writing [ %*ph ]\n", len, data);
a427de6f 252
50b215a0 253 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 254 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
7c646913
MCC
255 dprintk(2, "_write_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n",
256 err, len, data[0]);
50b215a0 257 dst_error_recovery(state);
1da177e4
LT
258 continue;
259 } else
260 break;
261 }
50b215a0 262 if (cnt >= 2) {
7c646913 263 dprintk(2, "RDC 8820 RESET\n");
50b215a0
JS
264 dst_error_bailout(state);
265
266 return -1;
267 }
268
1da177e4
LT
269 return 0;
270}
50b215a0 271EXPORT_SYMBOL(write_dst);
1da177e4 272
a427de6f 273int read_dst(struct dst_state *state, u8 *ret, u8 len)
1da177e4 274{
a427de6f
MA
275 struct i2c_msg msg = {
276 .addr = state->config->demod_address,
277 .flags = I2C_M_RD,
278 .buf = ret,
279 .len = len
280 };
281
1da177e4
LT
282 int err;
283 int cnt;
284
50b215a0 285 for (cnt = 0; cnt < 2; cnt++) {
1da177e4 286 if ((err = i2c_transfer(state->i2c, &msg, 1)) < 0) {
7c646913
MCC
287 dprintk(2, "read_dst error (err == %i, len == 0x%02x, b0 == 0x%02x)\n",
288 err, len, ret[0]);
50b215a0 289 dst_error_recovery(state);
1da177e4
LT
290 continue;
291 } else
292 break;
293 }
50b215a0 294 if (cnt >= 2) {
7c646913 295 dprintk(2, "RDC 8820 RESET\n");
50b215a0
JS
296 dst_error_bailout(state);
297
298 return -1;
299 }
7c646913 300 dprintk(3, "reply is %*ph\n", len, ret);
50b215a0 301
1da177e4
LT
302 return 0;
303}
50b215a0 304EXPORT_SYMBOL(read_dst);
1da177e4 305
7d53421c 306static int dst_set_polarization(struct dst_state *state)
1da177e4 307{
7d53421c 308 switch (state->voltage) {
a427de6f 309 case SEC_VOLTAGE_13: /* Vertical */
7c646913 310 dprintk(2, "Polarization=[Vertical]\n");
a427de6f
MA
311 state->tx_tuna[8] &= ~0x40;
312 break;
313 case SEC_VOLTAGE_18: /* Horizontal */
7c646913 314 dprintk(2, "Polarization=[Horizontal]\n");
a427de6f
MA
315 state->tx_tuna[8] |= 0x40;
316 break;
317 case SEC_VOLTAGE_OFF:
318 break;
7d53421c
MA
319 }
320
321 return 0;
322}
323
324static int dst_set_freq(struct dst_state *state, u32 freq)
325{
1da177e4 326 state->frequency = freq;
7c646913 327 dprintk(2, "set Frequency %u\n", freq);
1da177e4 328
1da177e4
LT
329 if (state->dst_type == DST_TYPE_IS_SAT) {
330 freq = freq / 1000;
331 if (freq < 950 || freq > 2150)
332 return -EINVAL;
7d53421c
MA
333 state->tx_tuna[2] = (freq >> 8);
334 state->tx_tuna[3] = (u8) freq;
335 state->tx_tuna[4] = 0x01;
336 state->tx_tuna[8] &= ~0x04;
337 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
338 if (freq < 1531)
339 state->tx_tuna[8] |= 0x04;
340 }
1da177e4
LT
341 } else if (state->dst_type == DST_TYPE_IS_TERR) {
342 freq = freq / 1000;
343 if (freq < 137000 || freq > 858000)
344 return -EINVAL;
7d53421c
MA
345 state->tx_tuna[2] = (freq >> 16) & 0xff;
346 state->tx_tuna[3] = (freq >> 8) & 0xff;
347 state->tx_tuna[4] = (u8) freq;
1da177e4 348 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
62867429 349 freq = freq / 1000;
7d53421c
MA
350 state->tx_tuna[2] = (freq >> 16) & 0xff;
351 state->tx_tuna[3] = (freq >> 8) & 0xff;
352 state->tx_tuna[4] = (u8) freq;
ed3d1065
MA
353 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
354 freq = freq / 1000;
355 if (freq < 51000 || freq > 858000)
356 return -EINVAL;
357 state->tx_tuna[2] = (freq >> 16) & 0xff;
358 state->tx_tuna[3] = (freq >> 8) & 0xff;
359 state->tx_tuna[4] = (u8) freq;
360 state->tx_tuna[5] = 0x00; /* ATSC */
361 state->tx_tuna[6] = 0x00;
362 if (state->dst_hw_cap & DST_TYPE_HAS_ANALOG)
363 state->tx_tuna[7] = 0x00; /* Digital */
1da177e4
LT
364 } else
365 return -EINVAL;
a427de6f 366
1da177e4
LT
367 return 0;
368}
369
5942c679 370static int dst_set_bandwidth(struct dst_state *state, u32 bandwidth)
1da177e4 371{
1da177e4
LT
372 state->bandwidth = bandwidth;
373
374 if (state->dst_type != DST_TYPE_IS_TERR)
0851fb48 375 return -EOPNOTSUPP;
1da177e4 376
1da177e4 377 switch (bandwidth) {
5942c679 378 case 6000000:
a427de6f
MA
379 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
380 state->tx_tuna[7] = 0x06;
381 else {
382 state->tx_tuna[6] = 0x06;
383 state->tx_tuna[7] = 0x00;
384 }
385 break;
5942c679 386 case 7000000:
a427de6f
MA
387 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
388 state->tx_tuna[7] = 0x07;
389 else {
390 state->tx_tuna[6] = 0x07;
391 state->tx_tuna[7] = 0x00;
392 }
393 break;
5942c679 394 case 8000000:
a427de6f
MA
395 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
396 state->tx_tuna[7] = 0x08;
397 else {
398 state->tx_tuna[6] = 0x08;
399 state->tx_tuna[7] = 0x00;
400 }
401 break;
402 default:
403 return -EINVAL;
1da177e4 404 }
a427de6f 405
1da177e4
LT
406 return 0;
407}
408
0df289a2
MCC
409static int dst_set_inversion(struct dst_state *state,
410 enum fe_spectral_inversion inversion)
1da177e4 411{
1da177e4 412 state->inversion = inversion;
1da177e4 413 switch (inversion) {
a427de6f
MA
414 case INVERSION_OFF: /* Inversion = Normal */
415 state->tx_tuna[8] &= ~0x80;
416 break;
417 case INVERSION_ON:
418 state->tx_tuna[8] |= 0x80;
419 break;
420 default:
421 return -EINVAL;
1da177e4 422 }
a427de6f 423
1da177e4
LT
424 return 0;
425}
426
0df289a2 427static int dst_set_fec(struct dst_state *state, enum fe_code_rate fec)
1da177e4
LT
428{
429 state->fec = fec;
430 return 0;
431}
432
0df289a2 433static enum fe_code_rate dst_get_fec(struct dst_state *state)
1da177e4
LT
434{
435 return state->fec;
436}
437
a427de6f 438static int dst_set_symbolrate(struct dst_state *state, u32 srate)
1da177e4 439{
1da177e4
LT
440 u32 symcalc;
441 u64 sval;
442
443 state->symbol_rate = srate;
1da177e4 444 if (state->dst_type == DST_TYPE_IS_TERR) {
0851fb48 445 return -EOPNOTSUPP;
1da177e4 446 }
7c646913 447 dprintk(2, "set symrate %u\n", srate);
1da177e4 448 srate /= 1000;
63ad4e44
MA
449 if (state->dst_type == DST_TYPE_IS_SAT) {
450 if (state->type_flags & DST_TYPE_HAS_SYMDIV) {
451 sval = srate;
452 sval <<= 20;
453 do_div(sval, 88000);
454 symcalc = (u32) sval;
7c646913 455 dprintk(2, "set symcalc %u\n", symcalc);
63ad4e44
MA
456 state->tx_tuna[5] = (u8) (symcalc >> 12);
457 state->tx_tuna[6] = (u8) (symcalc >> 4);
458 state->tx_tuna[7] = (u8) (symcalc << 4);
459 } else {
460 state->tx_tuna[5] = (u8) (srate >> 16) & 0x7f;
461 state->tx_tuna[6] = (u8) (srate >> 8);
462 state->tx_tuna[7] = (u8) srate;
463 }
464 state->tx_tuna[8] &= ~0x20;
465 if (state->type_flags & DST_TYPE_HAS_OBS_REGS) {
466 if (srate > 8000)
467 state->tx_tuna[8] |= 0x20;
468 }
469 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
7c646913 470 dprintk(3, "%s\n", state->fw_name);
63ad4e44
MA
471 if (!strncmp(state->fw_name, "DCTNEW", 6)) {
472 state->tx_tuna[5] = (u8) (srate >> 8);
473 state->tx_tuna[6] = (u8) srate;
474 state->tx_tuna[7] = 0x00;
475 } else if (!strncmp(state->fw_name, "DCT-CI", 6)) {
476 state->tx_tuna[5] = 0x00;
477 state->tx_tuna[6] = (u8) (srate >> 8);
478 state->tx_tuna[7] = (u8) srate;
479 }
1da177e4 480 }
1da177e4
LT
481 return 0;
482}
483
0df289a2
MCC
484static int dst_set_modulation(struct dst_state *state,
485 enum fe_modulation modulation)
7d53421c
MA
486{
487 if (state->dst_type != DST_TYPE_IS_CABLE)
0851fb48 488 return -EOPNOTSUPP;
7d53421c
MA
489
490 state->modulation = modulation;
491 switch (modulation) {
a427de6f
MA
492 case QAM_16:
493 state->tx_tuna[8] = 0x10;
494 break;
495 case QAM_32:
496 state->tx_tuna[8] = 0x20;
497 break;
498 case QAM_64:
499 state->tx_tuna[8] = 0x40;
500 break;
501 case QAM_128:
502 state->tx_tuna[8] = 0x80;
503 break;
504 case QAM_256:
63ad4e44
MA
505 if (!strncmp(state->fw_name, "DCTNEW", 6))
506 state->tx_tuna[8] = 0xff;
507 else if (!strncmp(state->fw_name, "DCT-CI", 6))
508 state->tx_tuna[8] = 0x00;
a427de6f
MA
509 break;
510 case QPSK:
511 case QAM_AUTO:
512 case VSB_8:
513 case VSB_16:
514 default:
515 return -EINVAL;
7d53421c
MA
516
517 }
518
519 return 0;
520}
521
0df289a2 522static enum fe_modulation dst_get_modulation(struct dst_state *state)
7d53421c
MA
523{
524 return state->modulation;
525}
526
527
a427de6f 528u8 dst_check_sum(u8 *buf, u32 len)
1da177e4
LT
529{
530 u32 i;
531 u8 val = 0;
532 if (!len)
533 return 0;
534 for (i = 0; i < len; i++) {
535 val += buf[i];
536 }
537 return ((~val) + 1);
538}
50b215a0 539EXPORT_SYMBOL(dst_check_sum);
1da177e4 540
6cd94745 541static void dst_type_flags_print(struct dst_state *state)
1da177e4 542{
6cd94745
SAH
543 u32 type_flags = state->type_flags;
544
7c646913 545 pr_err("DST type flags :\n");
7ef53b1a 546 if (type_flags & DST_TYPE_HAS_TS188)
7c646913 547 pr_err(" 0x%x newtuner\n", DST_TYPE_HAS_TS188);
1da5e8d3 548 if (type_flags & DST_TYPE_HAS_NEWTUNE_2)
7c646913 549 pr_err(" 0x%x newtuner 2\n", DST_TYPE_HAS_NEWTUNE_2);
1da177e4 550 if (type_flags & DST_TYPE_HAS_TS204)
7c646913 551 pr_err(" 0x%x ts204\n", DST_TYPE_HAS_TS204);
cdd4208c 552 if (type_flags & DST_TYPE_HAS_VLF)
7c646913 553 pr_err(" 0x%x VLF\n", DST_TYPE_HAS_VLF);
1da177e4 554 if (type_flags & DST_TYPE_HAS_SYMDIV)
7c646913 555 pr_err(" 0x%x symdiv\n", DST_TYPE_HAS_SYMDIV);
50b215a0 556 if (type_flags & DST_TYPE_HAS_FW_1)
7c646913 557 pr_err(" 0x%x firmware version = 1\n", DST_TYPE_HAS_FW_1);
50b215a0 558 if (type_flags & DST_TYPE_HAS_FW_2)
7c646913 559 pr_err(" 0x%x firmware version = 2\n", DST_TYPE_HAS_FW_2);
50b215a0 560 if (type_flags & DST_TYPE_HAS_FW_3)
7c646913
MCC
561 pr_err(" 0x%x firmware version = 3\n", DST_TYPE_HAS_FW_3);
562 pr_err("\n");
1da177e4
LT
563}
564
50b215a0 565
6cd94745 566static int dst_type_print(struct dst_state *state, u8 type)
1da177e4
LT
567{
568 char *otype;
569 switch (type) {
570 case DST_TYPE_IS_SAT:
571 otype = "satellite";
572 break;
50b215a0 573
1da177e4
LT
574 case DST_TYPE_IS_TERR:
575 otype = "terrestrial";
576 break;
50b215a0 577
1da177e4
LT
578 case DST_TYPE_IS_CABLE:
579 otype = "cable";
580 break;
50b215a0 581
bc7386ba
MA
582 case DST_TYPE_IS_ATSC:
583 otype = "atsc";
584 break;
585
1da177e4 586 default:
7c646913 587 dprintk(2, "invalid dst type %d\n", type);
1da177e4
LT
588 return -EINVAL;
589 }
7c646913 590 dprintk(2, "DST type: %s\n", otype);
50b215a0 591
1da177e4
LT
592 return 0;
593}
594
b00ef4b8 595static struct tuner_types tuner_list[] = {
b633c6d6 596 {
4e7024bd 597 .tuner_type = TUNER_TYPE_L64724,
364f255a 598 .tuner_name = "L 64724",
4e7024bd
MA
599 .board_name = "UNKNOWN",
600 .fw_name = "UNKNOWN"
b633c6d6
MA
601 },
602
603 {
4e7024bd 604 .tuner_type = TUNER_TYPE_STV0299,
364f255a 605 .tuner_name = "STV 0299",
4e7024bd
MA
606 .board_name = "VP1020",
607 .fw_name = "DST-MOT"
b633c6d6
MA
608 },
609
610 {
4e7024bd
MA
611 .tuner_type = TUNER_TYPE_STV0299,
612 .tuner_name = "STV 0299",
613 .board_name = "VP1020",
614 .fw_name = "DST-03T"
615 },
616
617 {
618 .tuner_type = TUNER_TYPE_MB86A15,
364f255a 619 .tuner_name = "MB 86A15",
4e7024bd
MA
620 .board_name = "VP1022",
621 .fw_name = "DST-03T"
b633c6d6 622 },
364f255a
MA
623
624 {
4e7024bd
MA
625 .tuner_type = TUNER_TYPE_MB86A15,
626 .tuner_name = "MB 86A15",
627 .board_name = "VP1025",
628 .fw_name = "DST-03T"
629 },
630
631 {
632 .tuner_type = TUNER_TYPE_STV0299,
633 .tuner_name = "STV 0299",
634 .board_name = "VP1030",
635 .fw_name = "DST-CI"
636 },
637
638 {
639 .tuner_type = TUNER_TYPE_STV0299,
640 .tuner_name = "STV 0299",
641 .board_name = "VP1030",
642 .fw_name = "DSTMCI"
643 },
644
63ad4e44
MA
645 {
646 .tuner_type = TUNER_TYPE_UNKNOWN,
647 .tuner_name = "UNKNOWN",
648 .board_name = "VP2021",
649 .fw_name = "DCTNEW"
650 },
651
4e7024bd
MA
652 {
653 .tuner_type = TUNER_TYPE_UNKNOWN,
654 .tuner_name = "UNKNOWN",
655 .board_name = "VP2030",
656 .fw_name = "DCT-CI"
657 },
658
659 {
660 .tuner_type = TUNER_TYPE_UNKNOWN,
661 .tuner_name = "UNKNOWN",
662 .board_name = "VP2031",
663 .fw_name = "DCT-CI"
664 },
665
666 {
667 .tuner_type = TUNER_TYPE_UNKNOWN,
668 .tuner_name = "UNKNOWN",
669 .board_name = "VP2040",
670 .fw_name = "DCT-CI"
671 },
672
673 {
674 .tuner_type = TUNER_TYPE_UNKNOWN,
675 .tuner_name = "UNKNOWN",
676 .board_name = "VP3020",
677 .fw_name = "DTTFTA"
678 },
679
680 {
681 .tuner_type = TUNER_TYPE_UNKNOWN,
682 .tuner_name = "UNKNOWN",
683 .board_name = "VP3021",
684 .fw_name = "DTTFTA"
685 },
686
687 {
688 .tuner_type = TUNER_TYPE_TDA10046,
689 .tuner_name = "TDA10046",
690 .board_name = "VP3040",
691 .fw_name = "DTT-CI"
692 },
693
694 {
695 .tuner_type = TUNER_TYPE_UNKNOWN,
696 .tuner_name = "UNKNOWN",
697 .board_name = "VP3051",
698 .fw_name = "DTTNXT"
699 },
700
701 {
702 .tuner_type = TUNER_TYPE_NXT200x,
703 .tuner_name = "NXT200x",
704 .board_name = "VP3220",
705 .fw_name = "ATSCDI"
706 },
707
708 {
709 .tuner_type = TUNER_TYPE_NXT200x,
710 .tuner_name = "NXT200x",
711 .board_name = "VP3250",
712 .fw_name = "ATSCAD"
713 },
b633c6d6
MA
714};
715
50b215a0
JS
716/*
717 Known cards list
718 Satellite
719 -------------------
e6ac699a 720 200103A
50b215a0
JS
721 VP-1020 DST-MOT LG(old), TS=188
722
723 VP-1020 DST-03T LG(new), TS=204
724 VP-1022 DST-03T LG(new), TS=204
725 VP-1025 DST-03T LG(new), TS=204
726
727 VP-1030 DSTMCI, LG(new), TS=188
728 VP-1032 DSTMCI, LG(new), TS=188
729
730 Cable
731 -------------------
732 VP-2030 DCT-CI, Samsung, TS=204
733 VP-2021 DCT-CI, Unknown, TS=204
734 VP-2031 DCT-CI, Philips, TS=188
735 VP-2040 DCT-CI, Philips, TS=188, with CA daughter board
736 VP-2040 DCT-CI, Philips, TS=204, without CA daughter board
737
738 Terrestrial
739 -------------------
740 VP-3050 DTTNXT TS=188
741 VP-3040 DTT-CI, Philips, TS=188
742 VP-3040 DTT-CI, Philips, TS=204
743
744 ATSC
745 -------------------
746 VP-3220 ATSCDI, TS=188
747 VP-3250 ATSCAD, TS=188
748
749*/
750
47a9e50e 751static struct dst_types dst_tlist[] = {
e6ac699a
JS
752 {
753 .device_id = "200103A",
754 .offset = 0,
755 .dst_type = DST_TYPE_IS_SAT,
7d53421c 756 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_OBS_REGS,
396cffd6
MA
757 .dst_feature = 0,
758 .tuner_type = 0
e6ac699a
JS
759 }, /* obsolete */
760
50b215a0
JS
761 {
762 .device_id = "DST-020",
763 .offset = 0,
764 .dst_type = DST_TYPE_IS_SAT,
765 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
766 .dst_feature = 0,
767 .tuner_type = 0
50b215a0
JS
768 }, /* obsolete */
769
770 {
771 .device_id = "DST-030",
772 .offset = 0,
773 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 774 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
775 .dst_feature = 0,
776 .tuner_type = 0
50b215a0
JS
777 }, /* obsolete */
778
779 {
780 .device_id = "DST-03T",
781 .offset = 0,
782 .dst_type = DST_TYPE_IS_SAT,
783 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_2,
784 .dst_feature = DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4 | DST_TYPE_HAS_DISEQC5
396cffd6 785 | DST_TYPE_HAS_MAC | DST_TYPE_HAS_MOTO,
b633c6d6 786 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
787 },
788
789 {
790 .device_id = "DST-MOT",
791 .offset = 0,
792 .dst_type = DST_TYPE_IS_SAT,
793 .type_flags = DST_TYPE_HAS_SYMDIV | DST_TYPE_HAS_FW_1,
396cffd6
MA
794 .dst_feature = 0,
795 .tuner_type = 0
50b215a0
JS
796 }, /* obsolete */
797
798 {
799 .device_id = "DST-CI",
800 .offset = 1,
801 .dst_type = DST_TYPE_IS_SAT,
c65f1c57 802 .type_flags = DST_TYPE_HAS_TS204 | DST_TYPE_HAS_FW_1,
396cffd6
MA
803 .dst_feature = DST_TYPE_HAS_CA,
804 .tuner_type = 0
8385e46f 805 }, /* An OEM board */
50b215a0
JS
806
807 {
808 .device_id = "DSTMCI",
809 .offset = 1,
810 .dst_type = DST_TYPE_IS_SAT,
cdd4208c 811 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_INC_COUNT | DST_TYPE_HAS_VLF,
50b215a0 812 .dst_feature = DST_TYPE_HAS_CA | DST_TYPE_HAS_DISEQC3 | DST_TYPE_HAS_DISEQC4
396cffd6
MA
813 | DST_TYPE_HAS_MOTO | DST_TYPE_HAS_MAC,
814 .tuner_type = TUNER_TYPE_MULTI
50b215a0
JS
815 },
816
817 {
818 .device_id = "DSTFCI",
819 .offset = 1,
820 .dst_type = DST_TYPE_IS_SAT,
7ef53b1a 821 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_1,
396cffd6
MA
822 .dst_feature = 0,
823 .tuner_type = 0
50b215a0
JS
824 }, /* unknown to vendor */
825
826 {
827 .device_id = "DCT-CI",
828 .offset = 1,
829 .dst_type = DST_TYPE_IS_CABLE,
cdd4208c 830 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_1 | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_VLF,
396cffd6
MA
831 .dst_feature = DST_TYPE_HAS_CA,
832 .tuner_type = 0
50b215a0
JS
833 },
834
835 {
836 .device_id = "DCTNEW",
837 .offset = 1,
838 .dst_type = DST_TYPE_IS_CABLE,
7ef53b1a 839 .type_flags = DST_TYPE_HAS_TS188 | DST_TYPE_HAS_FW_3 | DST_TYPE_HAS_FW_BUILD | DST_TYPE_HAS_MULTI_FE,
396cffd6
MA
840 .dst_feature = 0,
841 .tuner_type = 0
50b215a0
JS
842 },
843
844 {
845 .device_id = "DTT-CI",
846 .offset = 1,
847 .dst_type = DST_TYPE_IS_TERR,
cdd4208c 848 .type_flags = DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_VLF,
396cffd6
MA
849 .dst_feature = DST_TYPE_HAS_CA,
850 .tuner_type = 0
50b215a0
JS
851 },
852
853 {
854 .device_id = "DTTDIG",
855 .offset = 1,
856 .dst_type = DST_TYPE_IS_TERR,
857 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
858 .dst_feature = 0,
859 .tuner_type = 0
50b215a0
JS
860 },
861
862 {
863 .device_id = "DTTNXT",
864 .offset = 1,
865 .dst_type = DST_TYPE_IS_TERR,
866 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
867 .dst_feature = DST_TYPE_HAS_ANALOG,
868 .tuner_type = 0
50b215a0
JS
869 },
870
871 {
872 .device_id = "ATSCDI",
873 .offset = 1,
874 .dst_type = DST_TYPE_IS_ATSC,
875 .type_flags = DST_TYPE_HAS_FW_2,
396cffd6
MA
876 .dst_feature = 0,
877 .tuner_type = 0
50b215a0
JS
878 },
879
880 {
881 .device_id = "ATSCAD",
882 .offset = 1,
883 .dst_type = DST_TYPE_IS_ATSC,
c65f1c57 884 .type_flags = DST_TYPE_HAS_MULTI_FE | DST_TYPE_HAS_FW_2 | DST_TYPE_HAS_FW_BUILD,
396cffd6
MA
885 .dst_feature = DST_TYPE_HAS_MAC | DST_TYPE_HAS_ANALOG,
886 .tuner_type = 0
50b215a0
JS
887 },
888
889 { }
890
891};
892
62121b1f
MA
893static int dst_get_mac(struct dst_state *state)
894{
895 u8 get_mac[] = { 0x00, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
896 get_mac[7] = dst_check_sum(get_mac, 7);
897 if (dst_command(state, get_mac, 8) < 0) {
7c646913 898 dprintk(2, "Unsupported Command\n");
62121b1f
MA
899 return -1;
900 }
901 memset(&state->mac_address, '\0', 8);
902 memcpy(&state->mac_address, &state->rxbuffer, 6);
7c646913 903 pr_err("MAC Address=[%pM]\n", state->mac_address);
62121b1f
MA
904
905 return 0;
906}
907
908static int dst_fw_ver(struct dst_state *state)
909{
910 u8 get_ver[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
911 get_ver[7] = dst_check_sum(get_ver, 7);
912 if (dst_command(state, get_ver, 8) < 0) {
7c646913 913 dprintk(2, "Unsupported Command\n");
62121b1f
MA
914 return -1;
915 }
62121b1f 916 memcpy(&state->fw_version, &state->rxbuffer, 8);
7c646913 917 pr_err("Firmware Ver = %x.%x Build = %02x, on %x:%x, %x-%x-20%02x\n",
62121b1f
MA
918 state->fw_version[0] >> 4, state->fw_version[0] & 0x0f,
919 state->fw_version[1],
920 state->fw_version[5], state->fw_version[6],
921 state->fw_version[4], state->fw_version[3], state->fw_version[2]);
922
923 return 0;
924}
925
926static int dst_card_type(struct dst_state *state)
927{
364f255a
MA
928 int j;
929 struct tuner_types *p_tuner_list = NULL;
930
62121b1f
MA
931 u8 get_type[] = { 0x00, 0x11, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
932 get_type[7] = dst_check_sum(get_type, 7);
933 if (dst_command(state, get_type, 8) < 0) {
7c646913 934 dprintk(2, "Unsupported Command\n");
62121b1f
MA
935 return -1;
936 }
937 memset(&state->card_info, '\0', 8);
351634d2 938 memcpy(&state->card_info, &state->rxbuffer, 7);
7c646913 939 pr_err("Device Model=[%s]\n", &state->card_info[0]);
62121b1f 940
364f255a
MA
941 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
942 if (!strcmp(&state->card_info[0], p_tuner_list->board_name)) {
943 state->tuner_type = p_tuner_list->tuner_type;
7c646913 944 pr_err("DST has [%s] tuner, tuner type=[%d]\n",
364f255a
MA
945 p_tuner_list->tuner_name, p_tuner_list->tuner_type);
946 }
947 }
948
62121b1f
MA
949 return 0;
950}
951
952static int dst_get_vendor(struct dst_state *state)
953{
954 u8 get_vendor[] = { 0x00, 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
955 get_vendor[7] = dst_check_sum(get_vendor, 7);
956 if (dst_command(state, get_vendor, 8) < 0) {
7c646913 957 dprintk(2, "Unsupported Command\n");
62121b1f
MA
958 return -1;
959 }
960 memset(&state->vendor, '\0', 8);
351634d2 961 memcpy(&state->vendor, &state->rxbuffer, 7);
7c646913 962 pr_err("Vendor=[%s]\n", &state->vendor[0]);
62121b1f
MA
963
964 return 0;
965}
50b215a0 966
de1e6ec9
MA
967static void debug_dst_buffer(struct dst_state *state)
968{
7c646913 969 dprintk(3, "%s: [ %*ph ]\n", __func__, 8, state->rxbuffer);
de1e6ec9
MA
970}
971
972static int dst_check_stv0299(struct dst_state *state)
973{
974 u8 check_stv0299[] = { 0x00, 0x04, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
975
976 check_stv0299[7] = dst_check_sum(check_stv0299, 7);
977 if (dst_command(state, check_stv0299, 8) < 0) {
7c646913 978 pr_err("Cmd=[0x04] failed\n");
de1e6ec9
MA
979 return -1;
980 }
981 debug_dst_buffer(state);
982
983 if (memcmp(&check_stv0299, &state->rxbuffer, 8)) {
7c646913 984 pr_err("Found a STV0299 NIM\n");
de1e6ec9
MA
985 state->tuner_type = TUNER_TYPE_STV0299;
986 return 0;
987 }
988
989 return -1;
990}
991
992static int dst_check_mb86a15(struct dst_state *state)
993{
994 u8 check_mb86a15[] = { 0x00, 0x10, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
995
996 check_mb86a15[7] = dst_check_sum(check_mb86a15, 7);
997 if (dst_command(state, check_mb86a15, 8) < 0) {
7c646913 998 pr_err("Cmd=[0x10], failed\n");
de1e6ec9
MA
999 return -1;
1000 }
1001 debug_dst_buffer(state);
1002
1003 if (memcmp(&check_mb86a15, &state->rxbuffer, 8) < 0) {
7c646913 1004 pr_err("Found a MB86A15 NIM\n");
de1e6ec9
MA
1005 state->tuner_type = TUNER_TYPE_MB86A15;
1006 return 0;
1007 }
1008
1009 return -1;
1010}
1011
29b2f784
MA
1012static int dst_get_tuner_info(struct dst_state *state)
1013{
1014 u8 get_tuner_1[] = { 0x00, 0x13, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1015 u8 get_tuner_2[] = { 0x00, 0x0b, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 };
1016
1017 get_tuner_1[7] = dst_check_sum(get_tuner_1, 7);
1018 get_tuner_2[7] = dst_check_sum(get_tuner_2, 7);
7c646913 1019 pr_err("DST TYpe = MULTI FE\n");
29b2f784 1020 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
c65f1c57 1021 if (dst_command(state, get_tuner_1, 8) < 0) {
7c646913 1022 dprintk(2, "Cmd=[0x13], Unsupported\n");
cdd4208c 1023 goto force;
29b2f784
MA
1024 }
1025 } else {
c65f1c57 1026 if (dst_command(state, get_tuner_2, 8) < 0) {
7c646913 1027 dprintk(2, "Cmd=[0xb], Unsupported\n");
cdd4208c 1028 goto force;
29b2f784
MA
1029 }
1030 }
29b2f784
MA
1031 memcpy(&state->board_info, &state->rxbuffer, 8);
1032 if (state->type_flags & DST_TYPE_HAS_MULTI_FE) {
7c646913 1033 pr_err("DST type has TS=188\n");
c65f1c57
MA
1034 }
1035 if (state->board_info[0] == 0xbc) {
3227c860 1036 if (state->dst_type != DST_TYPE_IS_ATSC)
7ef53b1a 1037 state->type_flags |= DST_TYPE_HAS_TS188;
3da2f4c0 1038 else
1da5e8d3 1039 state->type_flags |= DST_TYPE_HAS_NEWTUNE_2;
3da2f4c0 1040
5aef20ae
MA
1041 if (state->board_info[1] == 0x01) {
1042 state->dst_hw_cap |= DST_TYPE_HAS_DBOARD;
7c646913 1043 pr_err("DST has Daughterboard\n");
5aef20ae 1044 }
29b2f784
MA
1045 }
1046
1047 return 0;
cdd4208c
MA
1048force:
1049 if (!strncmp(state->fw_name, "DCT-CI", 6)) {
1050 state->type_flags |= DST_TYPE_HAS_TS204;
7c646913 1051 pr_err("Forcing [%s] to TS188\n", state->fw_name);
cdd4208c
MA
1052 }
1053
1054 return -1;
29b2f784
MA
1055}
1056
50b215a0 1057static int dst_get_device_id(struct dst_state *state)
1da177e4 1058{
50b215a0
JS
1059 u8 reply;
1060
b633c6d6 1061 int i, j;
de1e6ec9
MA
1062 struct dst_types *p_dst_type = NULL;
1063 struct tuner_types *p_tuner_list = NULL;
b633c6d6 1064
50b215a0
JS
1065 u8 use_dst_type = 0;
1066 u32 use_type_flags = 0;
1da177e4 1067
50b215a0 1068 static u8 device_type[8] = {0x00, 0x06, 0x00, 0x00, 0x00, 0x00, 0x00, 0xff};
1da177e4 1069
de1e6ec9 1070 state->tuner_type = 0;
50b215a0
JS
1071 device_type[7] = dst_check_sum(device_type, 7);
1072
1073 if (write_dst(state, device_type, FIXED_COMM))
1074 return -1; /* Write failed */
50b215a0
JS
1075 if ((dst_pio_disable(state)) < 0)
1076 return -1;
50b215a0
JS
1077 if (read_dst(state, &reply, GET_ACK))
1078 return -1; /* Read failure */
50b215a0 1079 if (reply != ACK) {
7c646913 1080 dprintk(2, "Write not Acknowledged! [Reply=0x%02x]\n", reply);
50b215a0 1081 return -1; /* Unack'd write */
1da177e4 1082 }
50b215a0
JS
1083 if (!dst_wait_dst_ready(state, DEVICE_INIT))
1084 return -1; /* DST not ready yet */
50b215a0
JS
1085 if (read_dst(state, state->rxbuffer, FIXED_COMM))
1086 return -1;
1087
1088 dst_pio_disable(state);
50b215a0 1089 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
7c646913 1090 dprintk(2, "Checksum failure!\n");
50b215a0 1091 return -1; /* Checksum failure */
1da177e4 1092 }
50b215a0
JS
1093 state->rxbuffer[7] = '\0';
1094
a427de6f 1095 for (i = 0, p_dst_type = dst_tlist; i < ARRAY_SIZE(dst_tlist); i++, p_dst_type++) {
50b215a0
JS
1096 if (!strncmp (&state->rxbuffer[p_dst_type->offset], p_dst_type->device_id, strlen (p_dst_type->device_id))) {
1097 use_type_flags = p_dst_type->type_flags;
1098 use_dst_type = p_dst_type->dst_type;
1099
1100 /* Card capabilities */
1101 state->dst_hw_cap = p_dst_type->dst_feature;
7c646913 1102 pr_err("Recognise [%s]\n", p_dst_type->device_id);
63ad4e44 1103 strncpy(&state->fw_name[0], p_dst_type->device_id, 6);
de1e6ec9
MA
1104 /* Multiple tuners */
1105 if (p_dst_type->tuner_type & TUNER_TYPE_MULTI) {
b32474cb
MA
1106 switch (use_dst_type) {
1107 case DST_TYPE_IS_SAT:
1108 /* STV0299 check */
1109 if (dst_check_stv0299(state) < 0) {
7c646913 1110 pr_err("Unsupported\n");
b32474cb
MA
1111 state->tuner_type = TUNER_TYPE_MB86A15;
1112 }
1113 break;
1114 default:
1115 break;
1116 }
de1e6ec9 1117 if (dst_check_mb86a15(state) < 0)
7c646913 1118 pr_err("Unsupported\n");
de1e6ec9
MA
1119 /* Single tuner */
1120 } else {
b633c6d6 1121 state->tuner_type = p_dst_type->tuner_type;
de1e6ec9
MA
1122 }
1123 for (j = 0, p_tuner_list = tuner_list; j < ARRAY_SIZE(tuner_list); j++, p_tuner_list++) {
1124 if (!(strncmp(p_dst_type->device_id, p_tuner_list->fw_name, 7)) &&
1125 p_tuner_list->tuner_type == state->tuner_type) {
7c646913 1126 pr_err("[%s] has a [%s]\n",
de1e6ec9 1127 p_dst_type->device_id, p_tuner_list->tuner_name);
b633c6d6
MA
1128 }
1129 }
1da177e4
LT
1130 break;
1131 }
1132 }
50b215a0 1133
0496daa7 1134 if (i >= ARRAY_SIZE(dst_tlist)) {
7c646913
MCC
1135 pr_err("Unable to recognize %s or %s\n", &state->rxbuffer[0], &state->rxbuffer[1]);
1136 pr_err("please email linux-dvb@linuxtv.org with this type in");
1da177e4
LT
1137 use_dst_type = DST_TYPE_IS_SAT;
1138 use_type_flags = DST_TYPE_HAS_SYMDIV;
1139 }
6cd94745 1140 dst_type_print(state, use_dst_type);
1da177e4
LT
1141 state->type_flags = use_type_flags;
1142 state->dst_type = use_dst_type;
6cd94745 1143 dst_type_flags_print(state);
1da177e4 1144
1da177e4
LT
1145 return 0;
1146}
1147
50b215a0
JS
1148static int dst_probe(struct dst_state *state)
1149{
3593cab5 1150 mutex_init(&state->dst_mutex);
2e506a0f
MA
1151 if (dst_addons & DST_TYPE_HAS_CA) {
1152 if ((rdc_8820_reset(state)) < 0) {
7c646913 1153 pr_err("RDC 8820 RESET Failed.\n");
2e506a0f
MA
1154 return -1;
1155 }
4a2cc126 1156 msleep(4000);
2e506a0f 1157 } else {
4a2cc126 1158 msleep(100);
2e506a0f 1159 }
50b215a0 1160 if ((dst_comm_init(state)) < 0) {
7c646913 1161 pr_err("DST Initialization Failed.\n");
50b215a0
JS
1162 return -1;
1163 }
8385e46f 1164 msleep(100);
50b215a0 1165 if (dst_get_device_id(state) < 0) {
7c646913 1166 pr_err("unknown device.\n");
50b215a0
JS
1167 return -1;
1168 }
62121b1f 1169 if (dst_get_mac(state) < 0) {
7c646913 1170 dprintk(2, "MAC: Unsupported command\n");
62121b1f 1171 }
29b2f784
MA
1172 if ((state->type_flags & DST_TYPE_HAS_MULTI_FE) || (state->type_flags & DST_TYPE_HAS_FW_BUILD)) {
1173 if (dst_get_tuner_info(state) < 0)
7c646913 1174 dprintk(2, "Tuner: Unsupported command\n");
29b2f784 1175 }
4c09aa72
MA
1176 if (state->type_flags & DST_TYPE_HAS_TS204) {
1177 dst_packsize(state, 204);
1178 }
62121b1f
MA
1179 if (state->type_flags & DST_TYPE_HAS_FW_BUILD) {
1180 if (dst_fw_ver(state) < 0) {
7c646913 1181 dprintk(2, "FW: Unsupported command\n");
62121b1f
MA
1182 return 0;
1183 }
1184 if (dst_card_type(state) < 0) {
7c646913 1185 dprintk(2, "Card: Unsupported command\n");
62121b1f
MA
1186 return 0;
1187 }
1188 if (dst_get_vendor(state) < 0) {
7c646913 1189 dprintk(2, "Vendor: Unsupported command\n");
62121b1f
MA
1190 return 0;
1191 }
1192 }
50b215a0
JS
1193
1194 return 0;
1195}
1196
b00ef4b8 1197static int dst_command(struct dst_state *state, u8 *data, u8 len)
1da177e4 1198{
1da177e4 1199 u8 reply;
d28d5762 1200
3593cab5 1201 mutex_lock(&state->dst_mutex);
50b215a0 1202 if ((dst_comm_init(state)) < 0) {
7c646913 1203 dprintk(1, "DST Communication Initialization Failed.\n");
d28d5762 1204 goto error;
50b215a0 1205 }
50b215a0 1206 if (write_dst(state, data, len)) {
7c646913 1207 dprintk(2, "Trying to recover..\n");
50b215a0 1208 if ((dst_error_recovery(state)) < 0) {
7c646913 1209 pr_err("Recovery Failed.\n");
d28d5762 1210 goto error;
50b215a0 1211 }
d28d5762 1212 goto error;
1da177e4 1213 }
50b215a0 1214 if ((dst_pio_disable(state)) < 0) {
7c646913 1215 pr_err("PIO Disable Failed.\n");
d28d5762 1216 goto error;
1da177e4 1217 }
8385e46f 1218 if (state->type_flags & DST_TYPE_HAS_FW_1)
c4e3fd94 1219 mdelay(3);
50b215a0 1220 if (read_dst(state, &reply, GET_ACK)) {
7c646913 1221 dprintk(3, "Trying to recover..\n");
50b215a0 1222 if ((dst_error_recovery(state)) < 0) {
7c646913 1223 dprintk(2, "Recovery Failed.\n");
d28d5762 1224 goto error;
50b215a0 1225 }
d28d5762 1226 goto error;
50b215a0 1227 }
50b215a0 1228 if (reply != ACK) {
7c646913 1229 dprintk(2, "write not acknowledged 0x%02x\n", reply);
d28d5762 1230 goto error;
1da177e4
LT
1231 }
1232 if (len >= 2 && data[0] == 0 && (data[1] == 1 || data[1] == 3))
d28d5762 1233 goto error;
8385e46f 1234 if (state->type_flags & DST_TYPE_HAS_FW_1)
c4e3fd94 1235 mdelay(3);
8385e46f
JS
1236 else
1237 udelay(2000);
50b215a0 1238 if (!dst_wait_dst_ready(state, NO_DELAY))
d28d5762 1239 goto error;
50b215a0 1240 if (read_dst(state, state->rxbuffer, FIXED_COMM)) {
7c646913 1241 dprintk(3, "Trying to recover..\n");
50b215a0 1242 if ((dst_error_recovery(state)) < 0) {
7c646913 1243 dprintk(2, "Recovery failed.\n");
d28d5762 1244 goto error;
50b215a0 1245 }
d28d5762 1246 goto error;
1da177e4
LT
1247 }
1248 if (state->rxbuffer[7] != dst_check_sum(state->rxbuffer, 7)) {
7c646913 1249 dprintk(2, "checksum failure\n");
d28d5762 1250 goto error;
1da177e4 1251 }
3593cab5 1252 mutex_unlock(&state->dst_mutex);
1da177e4 1253 return 0;
d28d5762
MA
1254
1255error:
3593cab5 1256 mutex_unlock(&state->dst_mutex);
d28d5762
MA
1257 return -EIO;
1258
1da177e4
LT
1259}
1260
a427de6f 1261static int dst_get_signal(struct dst_state *state)
1da177e4
LT
1262{
1263 int retval;
1264 u8 get_signal[] = { 0x00, 0x05, 0x00, 0x00, 0x00, 0x00, 0x00, 0xfb };
b2e62e7c 1265 //dprintk("%s: Getting Signal strength and other parameters\n", __func__);
1da177e4
LT
1266 if ((state->diseq_flags & ATTEMPT_TUNE) == 0) {
1267 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1268 return 0;
1269 }
1270 if (0 == (state->diseq_flags & HAS_LOCK)) {
1271 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1272 return 0;
1273 }
1274 if (time_after_eq(jiffies, state->cur_jiff + (HZ / 5))) {
1275 retval = dst_command(state, get_signal, 8);
1276 if (retval < 0)
1277 return retval;
1278 if (state->dst_type == DST_TYPE_IS_SAT) {
1279 state->decode_lock = ((state->rxbuffer[6] & 0x10) == 0) ? 1 : 0;
1280 state->decode_strength = state->rxbuffer[5] << 8;
1281 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1282 } else if ((state->dst_type == DST_TYPE_IS_TERR) || (state->dst_type == DST_TYPE_IS_CABLE)) {
1283 state->decode_lock = (state->rxbuffer[1]) ? 1 : 0;
1284 state->decode_strength = state->rxbuffer[4] << 8;
1285 state->decode_snr = state->rxbuffer[3] << 8;
ed3d1065
MA
1286 } else if (state->dst_type == DST_TYPE_IS_ATSC) {
1287 state->decode_lock = (state->rxbuffer[6] == 0x00) ? 1 : 0;
1288 state->decode_strength = state->rxbuffer[4] << 8;
1289 state->decode_snr = state->rxbuffer[2] << 8 | state->rxbuffer[3];
1da177e4
LT
1290 }
1291 state->cur_jiff = jiffies;
1292 }
1293 return 0;
1294}
1295
a427de6f 1296static int dst_tone_power_cmd(struct dst_state *state)
1da177e4
LT
1297{
1298 u8 paket[8] = { 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00 };
1299
0851fb48
YP
1300 if (state->dst_type != DST_TYPE_IS_SAT)
1301 return -EOPNOTSUPP;
8f6da8f1 1302 paket[4] = state->tx_tuna[4];
86360a3e 1303 paket[2] = state->tx_tuna[2];
203fe8b3 1304 paket[3] = state->tx_tuna[3];
50b215a0 1305 paket[7] = dst_check_sum (paket, 7);
0851fb48 1306 return dst_command(state, paket, 8);
1da177e4
LT
1307}
1308
a427de6f 1309static int dst_get_tuna(struct dst_state *state)
1da177e4
LT
1310{
1311 int retval;
50b215a0 1312
1da177e4
LT
1313 if ((state->diseq_flags & ATTEMPT_TUNE) == 0)
1314 return 0;
1315 state->diseq_flags &= ~(HAS_LOCK);
50b215a0 1316 if (!dst_wait_dst_ready(state, NO_DELAY))
f1016dec 1317 return -EIO;
cdd4208c 1318 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1319 !(state->dst_type == DST_TYPE_IS_ATSC))
1320
1da177e4 1321 retval = read_dst(state, state->rx_tuna, 10);
a427de6f 1322 else
50b215a0 1323 retval = read_dst(state, &state->rx_tuna[2], FIXED_COMM);
1da177e4 1324 if (retval < 0) {
7c646913 1325 dprintk(3, "read not successful\n");
f1016dec 1326 return retval;
1da177e4 1327 }
cdd4208c 1328 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
f0289efa 1329 !(state->dst_type == DST_TYPE_IS_ATSC)) {
63ad4e44 1330
1da177e4 1331 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[0], 9)) {
7c646913 1332 dprintk(2, "checksum failure ?\n");
f1016dec 1333 return -EIO;
1da177e4
LT
1334 }
1335 } else {
1336 if (state->rx_tuna[9] != dst_check_sum(&state->rx_tuna[2], 7)) {
7c646913 1337 dprintk(2, "checksum failure?\n");
f1016dec 1338 return -EIO;
1da177e4
LT
1339 }
1340 }
1341 if (state->rx_tuna[2] == 0 && state->rx_tuna[3] == 0)
1342 return 0;
f5648e8a
TH
1343 if (state->dst_type == DST_TYPE_IS_SAT) {
1344 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 8) + state->rx_tuna[3];
1345 } else {
1346 state->decode_freq = ((state->rx_tuna[2] & 0x7f) << 16) + (state->rx_tuna[3] << 8) + state->rx_tuna[4];
1347 }
1348 state->decode_freq = state->decode_freq * 1000;
1da177e4 1349 state->decode_lock = 1;
1da177e4 1350 state->diseq_flags |= HAS_LOCK;
7d53421c 1351
1da177e4
LT
1352 return 1;
1353}
1354
0df289a2
MCC
1355static int dst_set_voltage(struct dvb_frontend *fe,
1356 enum fe_sec_voltage voltage);
1da177e4 1357
a427de6f 1358static int dst_write_tuna(struct dvb_frontend *fe)
1da177e4 1359{
a427de6f 1360 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1361 int retval;
1362 u8 reply;
1363
7c646913 1364 dprintk(2, "type_flags 0x%x\n", state->type_flags);
1da177e4
LT
1365 state->decode_freq = 0;
1366 state->decode_lock = state->decode_strength = state->decode_snr = 0;
1367 if (state->dst_type == DST_TYPE_IS_SAT) {
1368 if (!(state->diseq_flags & HAS_POWER))
1369 dst_set_voltage(fe, SEC_VOLTAGE_13);
1370 }
1371 state->diseq_flags &= ~(HAS_LOCK | ATTEMPT_TUNE);
3593cab5 1372 mutex_lock(&state->dst_mutex);
50b215a0 1373 if ((dst_comm_init(state)) < 0) {
7c646913 1374 dprintk(3, "DST Communication initialization failed.\n");
f1016dec 1375 goto error;
50b215a0 1376 }
63ad4e44 1377// if (state->type_flags & DST_TYPE_HAS_NEWTUNE) {
cdd4208c 1378 if ((state->type_flags & DST_TYPE_HAS_VLF) &&
63ad4e44
MA
1379 (!(state->dst_type == DST_TYPE_IS_ATSC))) {
1380
1da177e4
LT
1381 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[0], 9);
1382 retval = write_dst(state, &state->tx_tuna[0], 10);
1383 } else {
1384 state->tx_tuna[9] = dst_check_sum(&state->tx_tuna[2], 7);
50b215a0 1385 retval = write_dst(state, &state->tx_tuna[2], FIXED_COMM);
1da177e4
LT
1386 }
1387 if (retval < 0) {
50b215a0 1388 dst_pio_disable(state);
7c646913 1389 dprintk(3, "write not successful\n");
f1016dec 1390 goto werr;
1da177e4 1391 }
50b215a0 1392 if ((dst_pio_disable(state)) < 0) {
7c646913 1393 dprintk(3, "DST PIO disable failed !\n");
f1016dec 1394 goto error;
50b215a0 1395 }
50b215a0 1396 if ((read_dst(state, &reply, GET_ACK) < 0)) {
7c646913 1397 dprintk(3, "read verify not successful.\n");
f1016dec 1398 goto error;
1da177e4 1399 }
50b215a0 1400 if (reply != ACK) {
7c646913 1401 dprintk(3, "write not acknowledged 0x%02x\n", reply);
f1016dec 1402 goto error;
1da177e4
LT
1403 }
1404 state->diseq_flags |= ATTEMPT_TUNE;
f1016dec
HS
1405 retval = dst_get_tuna(state);
1406werr:
3593cab5 1407 mutex_unlock(&state->dst_mutex);
f1016dec 1408 return retval;
50b215a0 1409
f1016dec 1410error:
3593cab5 1411 mutex_unlock(&state->dst_mutex);
f1016dec 1412 return -EIO;
1da177e4
LT
1413}
1414
1415/*
1416 * line22k0 0x00, 0x09, 0x00, 0xff, 0x01, 0x00, 0x00, 0x00
1417 * line22k1 0x00, 0x09, 0x01, 0xff, 0x01, 0x00, 0x00, 0x00
1418 * line22k2 0x00, 0x09, 0x02, 0xff, 0x01, 0x00, 0x00, 0x00
1419 * tone 0x00, 0x09, 0xff, 0x00, 0x01, 0x00, 0x00, 0x00
1420 * data 0x00, 0x09, 0xff, 0x01, 0x01, 0x00, 0x00, 0x00
1421 * power_off 0x00, 0x09, 0xff, 0xff, 0x00, 0x00, 0x00, 0x00
1422 * power_on 0x00, 0x09, 0xff, 0xff, 0x01, 0x00, 0x00, 0x00
1423 * Diseqc 1 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec
1424 * Diseqc 2 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf4, 0xe8
1425 * Diseqc 3 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf8, 0xe4
1426 * Diseqc 4 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xfc, 0xe0
1427 */
1428
a427de6f 1429static int dst_set_diseqc(struct dvb_frontend *fe, struct dvb_diseqc_master_cmd *cmd)
1da177e4 1430{
a427de6f 1431 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1432 u8 paket[8] = { 0x00, 0x08, 0x04, 0xe0, 0x10, 0x38, 0xf0, 0xec };
1433
226d97ec 1434 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1435 return -EOPNOTSUPP;
ceee5266
YP
1436 if (cmd->msg_len > 0 && cmd->msg_len < 5)
1437 memcpy(&paket[3], cmd->msg, cmd->msg_len);
1438 else if (cmd->msg_len == 5 && state->dst_hw_cap & DST_TYPE_HAS_DISEQC5)
1439 memcpy(&paket[2], cmd->msg, cmd->msg_len);
1440 else
1da177e4 1441 return -EINVAL;
1da177e4 1442 paket[7] = dst_check_sum(&paket[0], 7);
0851fb48 1443 return dst_command(state, paket, 8);
1da177e4
LT
1444}
1445
0df289a2 1446static int dst_set_voltage(struct dvb_frontend *fe, enum fe_sec_voltage voltage)
1da177e4 1447{
0851fb48 1448 int need_cmd, retval = 0;
a427de6f 1449 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1450
1451 state->voltage = voltage;
226d97ec 1452 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1453 return -EOPNOTSUPP;
1da177e4
LT
1454
1455 need_cmd = 0;
50b215a0 1456
a427de6f
MA
1457 switch (voltage) {
1458 case SEC_VOLTAGE_13:
1459 case SEC_VOLTAGE_18:
1460 if ((state->diseq_flags & HAS_POWER) == 0)
1da177e4 1461 need_cmd = 1;
a427de6f
MA
1462 state->diseq_flags |= HAS_POWER;
1463 state->tx_tuna[4] = 0x01;
1464 break;
1465 case SEC_VOLTAGE_OFF:
1466 need_cmd = 1;
1467 state->diseq_flags &= ~(HAS_POWER | HAS_LOCK | ATTEMPT_TUNE);
1468 state->tx_tuna[4] = 0x00;
1469 break;
1470 default:
1471 return -EINVAL;
1da177e4 1472 }
a427de6f 1473
50b215a0 1474 if (need_cmd)
0851fb48 1475 retval = dst_tone_power_cmd(state);
50b215a0 1476
0851fb48 1477 return retval;
1da177e4
LT
1478}
1479
0df289a2 1480static int dst_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1da177e4 1481{
a427de6f 1482 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1483
1484 state->tone = tone;
226d97ec 1485 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1486 return -EOPNOTSUPP;
1da177e4 1487
1da177e4 1488 switch (tone) {
a427de6f
MA
1489 case SEC_TONE_OFF:
1490 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1491 state->tx_tuna[2] = 0x00;
1492 else
1493 state->tx_tuna[2] = 0xff;
1494 break;
50b215a0 1495
a427de6f
MA
1496 case SEC_TONE_ON:
1497 state->tx_tuna[2] = 0x02;
1498 break;
1499 default:
1500 return -EINVAL;
1da177e4 1501 }
0851fb48 1502 return dst_tone_power_cmd(state);
1da177e4
LT
1503}
1504
0df289a2 1505static int dst_send_burst(struct dvb_frontend *fe, enum fe_sec_mini_cmd minicmd)
203fe8b3
MA
1506{
1507 struct dst_state *state = fe->demodulator_priv;
1508
226d97ec 1509 if (state->dst_type != DST_TYPE_IS_SAT)
0851fb48 1510 return -EOPNOTSUPP;
203fe8b3 1511 state->minicmd = minicmd;
203fe8b3 1512 switch (minicmd) {
a427de6f
MA
1513 case SEC_MINI_A:
1514 state->tx_tuna[3] = 0x02;
1515 break;
1516 case SEC_MINI_B:
1517 state->tx_tuna[3] = 0xff;
1518 break;
203fe8b3 1519 }
0851fb48 1520 return dst_tone_power_cmd(state);
203fe8b3
MA
1521}
1522
1523
68592773 1524static int bt8xx_dst_init(struct dvb_frontend *fe)
1da177e4 1525{
a427de6f
MA
1526 struct dst_state *state = fe->demodulator_priv;
1527
1528 static u8 sat_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x00, 0x73, 0x21, 0x00, 0x00 };
1529 static u8 sat_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x55, 0xbd, 0x50, 0x00, 0x00 };
1530 static u8 ter_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1531 static u8 ter_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
cdd4208c
MA
1532 static u8 cab_tuna_188[] = { 0x09, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1533 static u8 cab_tuna_204[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
1da5e8d3 1534 static u8 atsc_tuner[] = { 0x00, 0x00, 0x03, 0xb6, 0x01, 0x07, 0x00, 0x00, 0x00, 0x00 };
a427de6f 1535
7d53421c 1536 state->inversion = INVERSION_OFF;
1da177e4
LT
1537 state->voltage = SEC_VOLTAGE_13;
1538 state->tone = SEC_TONE_OFF;
1da177e4
LT
1539 state->diseq_flags = 0;
1540 state->k22 = 0x02;
5942c679 1541 state->bandwidth = 7000000;
1da177e4 1542 state->cur_jiff = jiffies;
a427de6f 1543 if (state->dst_type == DST_TYPE_IS_SAT)
cdd4208c 1544 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? sat_tuna_188 : sat_tuna_204), sizeof (sat_tuna_204));
a427de6f 1545 else if (state->dst_type == DST_TYPE_IS_TERR)
cdd4208c 1546 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? ter_tuna_188 : ter_tuna_204), sizeof (ter_tuna_204));
a427de6f 1547 else if (state->dst_type == DST_TYPE_IS_CABLE)
cdd4208c 1548 memcpy(state->tx_tuna, ((state->type_flags & DST_TYPE_HAS_VLF) ? cab_tuna_188 : cab_tuna_204), sizeof (cab_tuna_204));
1c4e7339 1549 else if (state->dst_type == DST_TYPE_IS_ATSC)
1da5e8d3 1550 memcpy(state->tx_tuna, atsc_tuner, sizeof (atsc_tuner));
1da177e4
LT
1551
1552 return 0;
1553}
1554
0df289a2 1555static int dst_read_status(struct dvb_frontend *fe, enum fe_status *status)
1da177e4 1556{
a427de6f 1557 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1558
1559 *status = 0;
1560 if (state->diseq_flags & HAS_LOCK) {
7d53421c 1561// dst_get_signal(state); // don't require(?) to ask MCU
1da177e4
LT
1562 if (state->decode_lock)
1563 *status |= FE_HAS_LOCK | FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_SYNC | FE_HAS_VITERBI;
1564 }
1565
1566 return 0;
1567}
1568
a427de6f 1569static int dst_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1da177e4 1570{
a427de6f 1571 struct dst_state *state = fe->demodulator_priv;
1da177e4 1572
0851fb48 1573 int retval = dst_get_signal(state);
1da177e4
LT
1574 *strength = state->decode_strength;
1575
0851fb48 1576 return retval;
1da177e4
LT
1577}
1578
a427de6f 1579static int dst_read_snr(struct dvb_frontend *fe, u16 *snr)
1da177e4 1580{
a427de6f 1581 struct dst_state *state = fe->demodulator_priv;
1da177e4 1582
0851fb48 1583 int retval = dst_get_signal(state);
1da177e4
LT
1584 *snr = state->decode_snr;
1585
0851fb48 1586 return retval;
1da177e4
LT
1587}
1588
5942c679 1589static int dst_set_frontend(struct dvb_frontend *fe)
8cfba630 1590{
5942c679 1591 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
0851fb48 1592 int retval = -EINVAL;
8cfba630
MA
1593 struct dst_state *state = fe->demodulator_priv;
1594
1595 if (p != NULL) {
0851fb48
YP
1596 retval = dst_set_freq(state, p->frequency);
1597 if(retval != 0)
1598 return retval;
7c646913 1599 dprintk(3, "Set Frequency=[%d]\n", p->frequency);
8cfba630
MA
1600
1601 if (state->dst_type == DST_TYPE_IS_SAT) {
1602 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1603 dst_set_inversion(state, p->inversion);
5942c679
MCC
1604 dst_set_fec(state, p->fec_inner);
1605 dst_set_symbolrate(state, p->symbol_rate);
8cfba630 1606 dst_set_polarization(state);
7c646913 1607 dprintk(3, "Set Symbolrate=[%d]\n", p->symbol_rate);
8cfba630
MA
1608
1609 } else if (state->dst_type == DST_TYPE_IS_TERR)
5942c679 1610 dst_set_bandwidth(state, p->bandwidth_hz);
8cfba630 1611 else if (state->dst_type == DST_TYPE_IS_CABLE) {
5942c679
MCC
1612 dst_set_fec(state, p->fec_inner);
1613 dst_set_symbolrate(state, p->symbol_rate);
1614 dst_set_modulation(state, p->modulation);
8cfba630 1615 }
0851fb48 1616 retval = dst_write_tuna(fe);
8cfba630
MA
1617 }
1618
0851fb48 1619 return retval;
8cfba630
MA
1620}
1621
1622static int dst_tune_frontend(struct dvb_frontend* fe,
7e072221 1623 bool re_tune,
36cb557a 1624 unsigned int mode_flags,
3ea96615 1625 unsigned int *delay,
0df289a2 1626 enum fe_status *status)
1da177e4 1627{
a427de6f 1628 struct dst_state *state = fe->demodulator_priv;
7e072221 1629 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4 1630
7e072221 1631 if (re_tune) {
36cb557a 1632 dst_set_freq(state, p->frequency);
7c646913 1633 dprintk(3, "Set Frequency=[%d]\n", p->frequency);
50b215a0 1634
36cb557a
AQ
1635 if (state->dst_type == DST_TYPE_IS_SAT) {
1636 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1637 dst_set_inversion(state, p->inversion);
7e072221
MCC
1638 dst_set_fec(state, p->fec_inner);
1639 dst_set_symbolrate(state, p->symbol_rate);
36cb557a 1640 dst_set_polarization(state);
7c646913 1641 dprintk(3, "Set Symbolrate=[%d]\n", p->symbol_rate);
36cb557a
AQ
1642
1643 } else if (state->dst_type == DST_TYPE_IS_TERR)
7e072221 1644 dst_set_bandwidth(state, p->bandwidth_hz);
36cb557a 1645 else if (state->dst_type == DST_TYPE_IS_CABLE) {
7e072221
MCC
1646 dst_set_fec(state, p->fec_inner);
1647 dst_set_symbolrate(state, p->symbol_rate);
1648 dst_set_modulation(state, p->modulation);
36cb557a
AQ
1649 }
1650 dst_write_tuna(fe);
1da177e4 1651 }
1da177e4 1652
36cb557a
AQ
1653 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
1654 dst_read_status(fe, status);
1655
1656 *delay = HZ/10;
1da177e4
LT
1657 return 0;
1658}
1659
8cfba630
MA
1660static int dst_get_tuning_algo(struct dvb_frontend *fe)
1661{
a00d0bb8 1662 return dst_algo ? DVBFE_ALGO_HW : DVBFE_ALGO_SW;
8cfba630
MA
1663}
1664
7e3e68bc
MCC
1665static int dst_get_frontend(struct dvb_frontend *fe,
1666 struct dtv_frontend_properties *p)
1da177e4 1667{
a427de6f 1668 struct dst_state *state = fe->demodulator_priv;
1da177e4
LT
1669
1670 p->frequency = state->decode_freq;
1da177e4 1671 if (state->dst_type == DST_TYPE_IS_SAT) {
7d53421c
MA
1672 if (state->type_flags & DST_TYPE_HAS_OBS_REGS)
1673 p->inversion = state->inversion;
5942c679
MCC
1674 p->symbol_rate = state->symbol_rate;
1675 p->fec_inner = dst_get_fec(state);
1da177e4 1676 } else if (state->dst_type == DST_TYPE_IS_TERR) {
5942c679 1677 p->bandwidth_hz = state->bandwidth;
1da177e4 1678 } else if (state->dst_type == DST_TYPE_IS_CABLE) {
5942c679
MCC
1679 p->symbol_rate = state->symbol_rate;
1680 p->fec_inner = dst_get_fec(state);
1681 p->modulation = dst_get_modulation(state);
1da177e4
LT
1682 }
1683
1684 return 0;
1685}
1686
68592773 1687static void bt8xx_dst_release(struct dvb_frontend *fe)
1da177e4 1688{
a427de6f 1689 struct dst_state *state = fe->demodulator_priv;
bbdd11fa
MA
1690 if (state->dst_ca) {
1691 dvb_unregister_device(state->dst_ca);
149ef72d 1692#ifdef CONFIG_MEDIA_ATTACH
bbdd11fa
MA
1693 symbol_put(dst_ca_attach);
1694#endif
1695 }
1da177e4
LT
1696 kfree(state);
1697}
1698
bd336e63
MK
1699static const struct dvb_frontend_ops dst_dvbt_ops;
1700static const struct dvb_frontend_ops dst_dvbs_ops;
1701static const struct dvb_frontend_ops dst_dvbc_ops;
1702static const struct dvb_frontend_ops dst_atsc_ops;
1da177e4 1703
a427de6f 1704struct dst_state *dst_attach(struct dst_state *state, struct dvb_adapter *dvb_adapter)
1da177e4 1705{
50b215a0
JS
1706 /* check if the ASIC is there */
1707 if (dst_probe(state) < 0) {
2ea75330 1708 kfree(state);
50b215a0
JS
1709 return NULL;
1710 }
1da177e4 1711 /* determine settings based on type */
dea74869 1712 /* create dvb_frontend */
1da177e4
LT
1713 switch (state->dst_type) {
1714 case DST_TYPE_IS_TERR:
dea74869 1715 memcpy(&state->frontend.ops, &dst_dvbt_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1716 break;
1717 case DST_TYPE_IS_CABLE:
dea74869 1718 memcpy(&state->frontend.ops, &dst_dvbc_ops, sizeof(struct dvb_frontend_ops));
1da177e4
LT
1719 break;
1720 case DST_TYPE_IS_SAT:
dea74869 1721 memcpy(&state->frontend.ops, &dst_dvbs_ops, sizeof(struct dvb_frontend_ops));
1da177e4 1722 break;
bc7386ba
MA
1723 case DST_TYPE_IS_ATSC:
1724 memcpy(&state->frontend.ops, &dst_atsc_ops, sizeof(struct dvb_frontend_ops));
1725 break;
1da177e4 1726 default:
7c646913 1727 pr_err("unknown DST type. please report to the LinuxTV.org DVB mailinglist.\n");
2ea75330 1728 kfree(state);
50b215a0 1729 return NULL;
1da177e4 1730 }
1da177e4 1731 state->frontend.demodulator_priv = state;
1da177e4 1732
50b215a0 1733 return state; /* Manu (DST is a card not a frontend) */
1da177e4
LT
1734}
1735
50b215a0
JS
1736EXPORT_SYMBOL(dst_attach);
1737
bd336e63 1738static const struct dvb_frontend_ops dst_dvbt_ops = {
5942c679 1739 .delsys = { SYS_DVBT },
1da177e4
LT
1740 .info = {
1741 .name = "DST DVB-T",
1da177e4
LT
1742 .frequency_min = 137000000,
1743 .frequency_max = 858000000,
1744 .frequency_stepsize = 166667,
c75079cc
A
1745 .caps = FE_CAN_FEC_AUTO |
1746 FE_CAN_QAM_AUTO |
1747 FE_CAN_QAM_16 |
1748 FE_CAN_QAM_32 |
1749 FE_CAN_QAM_64 |
1750 FE_CAN_QAM_128 |
1751 FE_CAN_QAM_256 |
1752 FE_CAN_TRANSMISSION_MODE_AUTO |
1753 FE_CAN_GUARD_INTERVAL_AUTO
1da177e4
LT
1754 },
1755
68592773
LR
1756 .release = bt8xx_dst_release,
1757 .init = bt8xx_dst_init,
8cfba630 1758 .tune = dst_tune_frontend,
5942c679
MCC
1759 .set_frontend = dst_set_frontend,
1760 .get_frontend = dst_get_frontend,
cdd393cc 1761 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1762 .read_status = dst_read_status,
1763 .read_signal_strength = dst_read_signal_strength,
1764 .read_snr = dst_read_snr,
1765};
1766
bd336e63 1767static const struct dvb_frontend_ops dst_dvbs_ops = {
5942c679 1768 .delsys = { SYS_DVBS },
1da177e4
LT
1769 .info = {
1770 .name = "DST DVB-S",
1da177e4
LT
1771 .frequency_min = 950000,
1772 .frequency_max = 2150000,
1773 .frequency_stepsize = 1000, /* kHz for QPSK frontends */
1774 .frequency_tolerance = 29500,
1775 .symbol_rate_min = 1000000,
1776 .symbol_rate_max = 45000000,
1777 /* . symbol_rate_tolerance = ???,*/
1778 .caps = FE_CAN_FEC_AUTO | FE_CAN_QPSK
1779 },
1780
68592773
LR
1781 .release = bt8xx_dst_release,
1782 .init = bt8xx_dst_init,
8cfba630 1783 .tune = dst_tune_frontend,
5942c679
MCC
1784 .set_frontend = dst_set_frontend,
1785 .get_frontend = dst_get_frontend,
cdd393cc 1786 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1787 .read_status = dst_read_status,
1788 .read_signal_strength = dst_read_signal_strength,
1789 .read_snr = dst_read_snr,
203fe8b3 1790 .diseqc_send_burst = dst_send_burst,
1da177e4
LT
1791 .diseqc_send_master_cmd = dst_set_diseqc,
1792 .set_voltage = dst_set_voltage,
1793 .set_tone = dst_set_tone,
1794};
1795
bd336e63 1796static const struct dvb_frontend_ops dst_dvbc_ops = {
5942c679 1797 .delsys = { SYS_DVBC_ANNEX_A },
1da177e4
LT
1798 .info = {
1799 .name = "DST DVB-C",
1da177e4
LT
1800 .frequency_stepsize = 62500,
1801 .frequency_min = 51000000,
1802 .frequency_max = 858000000,
1803 .symbol_rate_min = 1000000,
1804 .symbol_rate_max = 45000000,
f0289efa
KW
1805 .caps = FE_CAN_FEC_AUTO |
1806 FE_CAN_QAM_AUTO |
1807 FE_CAN_QAM_16 |
1808 FE_CAN_QAM_32 |
1809 FE_CAN_QAM_64 |
1810 FE_CAN_QAM_128 |
1811 FE_CAN_QAM_256
1da177e4
LT
1812 },
1813
68592773
LR
1814 .release = bt8xx_dst_release,
1815 .init = bt8xx_dst_init,
8cfba630 1816 .tune = dst_tune_frontend,
5942c679
MCC
1817 .set_frontend = dst_set_frontend,
1818 .get_frontend = dst_get_frontend,
cdd393cc 1819 .get_frontend_algo = dst_get_tuning_algo,
1da177e4
LT
1820 .read_status = dst_read_status,
1821 .read_signal_strength = dst_read_signal_strength,
1822 .read_snr = dst_read_snr,
1823};
1824
bd336e63 1825static const struct dvb_frontend_ops dst_atsc_ops = {
7581e61d 1826 .delsys = { SYS_ATSC },
bc7386ba
MA
1827 .info = {
1828 .name = "DST ATSC",
bc7386ba
MA
1829 .frequency_stepsize = 62500,
1830 .frequency_min = 510000000,
1831 .frequency_max = 858000000,
1832 .symbol_rate_min = 1000000,
1833 .symbol_rate_max = 45000000,
1834 .caps = FE_CAN_FEC_AUTO | FE_CAN_QAM_AUTO | FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
1835 },
1836
68592773
LR
1837 .release = bt8xx_dst_release,
1838 .init = bt8xx_dst_init,
8cfba630 1839 .tune = dst_tune_frontend,
5942c679
MCC
1840 .set_frontend = dst_set_frontend,
1841 .get_frontend = dst_get_frontend,
cdd393cc 1842 .get_frontend_algo = dst_get_tuning_algo,
bc7386ba
MA
1843 .read_status = dst_read_status,
1844 .read_signal_strength = dst_read_signal_strength,
1845 .read_snr = dst_read_snr,
1846};
1847
1848MODULE_DESCRIPTION("DST DVB-S/T/C/ATSC Combo Frontend driver");
50b215a0 1849MODULE_AUTHOR("Jamie Honan, Manu Abraham");
1da177e4 1850MODULE_LICENSE("GPL");