]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/pci/bt8xx/dvb-bt8xx.c
Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / bt8xx / dvb-bt8xx.c
CommitLineData
1da177e4
LT
1/*
2 * Bt8xx based DVB adapter driver
3 *
4 * Copyright (C) 2002,2003 Florian Schirmer <jolt@tuxbox.org>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 *
1da177e4
LT
16 */
17
fa132a64 18#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
6c59eefd 19
1da177e4
LT
20#include <linux/bitops.h>
21#include <linux/module.h>
1da177e4 22#include <linux/init.h>
0496daa7 23#include <linux/kernel.h>
1da177e4
LT
24#include <linux/device.h>
25#include <linux/delay.h>
26#include <linux/slab.h>
27#include <linux/i2c.h>
28
29#include "dmxdev.h"
30#include "dvbdev.h"
31#include "dvb_demux.h"
32#include "dvb_frontend.h"
1da177e4 33#include "dvb-bt8xx.h"
1da177e4
LT
34#include "bt878.h"
35
36static int debug;
37
38module_param(debug, int, 0644);
39MODULE_PARM_DESC(debug, "Turn on/off debugging (default:off).");
40
78e92006
JG
41DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
42
fa132a64
MCC
43#define dprintk(fmt, arg...) do { \
44 if (debug) \
45 printk(KERN_DEBUG pr_fmt("%s: " fmt), \
46 __func__, ##arg); \
47} while (0)
48
1da177e4 49
05ade5a5
DJ
50#define IF_FREQUENCYx6 217 /* 6 * 36.16666666667MHz */
51
1da177e4
LT
52static void dvb_bt8xx_task(unsigned long data)
53{
54 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *)data;
55
fa132a64 56 dprintk("%d\n", card->bt->finished_block);
1da177e4
LT
57
58 while (card->bt->last_block != card->bt->finished_block) {
59 (card->bt->TS_Size ? dvb_dmx_swfilter_204 : dvb_dmx_swfilter)
60 (&card->demux,
61 &card->bt->buf_cpu[card->bt->last_block *
62 card->bt->block_bytes],
63 card->bt->block_bytes);
64 card->bt->last_block = (card->bt->last_block + 1) %
65 card->bt->block_count;
66 }
67}
68
69static int dvb_bt8xx_start_feed(struct dvb_demux_feed *dvbdmxfeed)
70{
2bfe031d 71 struct dvb_demux*dvbdmx = dvbdmxfeed->demux;
1da177e4
LT
72 struct dvb_bt8xx_card *card = dvbdmx->priv;
73 int rc;
74
75 dprintk("dvb_bt8xx: start_feed\n");
76
77 if (!dvbdmx->dmx.frontend)
78 return -EINVAL;
79
3593cab5 80 mutex_lock(&card->lock);
1da177e4
LT
81 card->nfeeds++;
82 rc = card->nfeeds;
83 if (card->nfeeds == 1)
84 bt878_start(card->bt, card->gpio_mode,
85 card->op_sync_orin, card->irq_err_ignore);
3593cab5 86 mutex_unlock(&card->lock);
1da177e4
LT
87 return rc;
88}
89
90static int dvb_bt8xx_stop_feed(struct dvb_demux_feed *dvbdmxfeed)
91{
92 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
93 struct dvb_bt8xx_card *card = dvbdmx->priv;
94
95 dprintk("dvb_bt8xx: stop_feed\n");
96
97 if (!dvbdmx->dmx.frontend)
98 return -EINVAL;
99
3593cab5 100 mutex_lock(&card->lock);
1da177e4
LT
101 card->nfeeds--;
102 if (card->nfeeds == 0)
103 bt878_stop(card->bt);
3593cab5 104 mutex_unlock(&card->lock);
1da177e4
LT
105
106 return 0;
107}
108
109static int is_pci_slot_eq(struct pci_dev* adev, struct pci_dev* bdev)
110{
111 if ((adev->subsystem_vendor == bdev->subsystem_vendor) &&
112 (adev->subsystem_device == bdev->subsystem_device) &&
113 (adev->bus->number == bdev->bus->number) &&
114 (PCI_SLOT(adev->devfn) == PCI_SLOT(bdev->devfn)))
115 return 1;
116 return 0;
117}
118
4c62e976
GKH
119static struct bt878 *dvb_bt8xx_878_match(unsigned int bttv_nr,
120 struct pci_dev* bttv_pci_dev)
1da177e4
LT
121{
122 unsigned int card_nr;
123
124 /* Hmm, n squared. Hope n is small */
1f15ddd0 125 for (card_nr = 0; card_nr < bt878_num; card_nr++)
1da177e4
LT
126 if (is_pci_slot_eq(bt878[card_nr].dev, bttv_pci_dev))
127 return &bt878[card_nr];
1da177e4
LT
128 return NULL;
129}
130
1da177e4
LT
131static int thomson_dtt7579_demod_init(struct dvb_frontend* fe)
132{
133 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x38 };
134 static u8 mt352_reset [] = { 0x50, 0x80 };
135 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
136 static u8 mt352_agc_cfg [] = { 0x67, 0x28, 0x20 };
137 static u8 mt352_gpp_ctl_cfg [] = { 0x8C, 0x33 };
138 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
139
140 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
141 udelay(2000);
142 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
143 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
144
145 mt352_write(fe, mt352_agc_cfg, sizeof(mt352_agc_cfg));
50b215a0 146 mt352_write(fe, mt352_gpp_ctl_cfg, sizeof(mt352_gpp_ctl_cfg));
1da177e4
LT
147 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
148
149 return 0;
150}
151
249fa0b0 152static int thomson_dtt7579_tuner_calc_regs(struct dvb_frontend *fe, u8* pllbuf, int buf_len)
1da177e4 153{
249fa0b0 154 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
155 u32 div;
156 unsigned char bs = 0;
157 unsigned char cp = 0;
158
74aa7a29
AQ
159 if (buf_len < 5)
160 return -EINVAL;
161
249fa0b0 162 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
1da177e4 163
249fa0b0 164 if (c->frequency < 542000000)
1f15ddd0 165 cp = 0xb4;
249fa0b0 166 else if (c->frequency < 771000000)
1f15ddd0
DJ
167 cp = 0xbc;
168 else
169 cp = 0xf4;
1da177e4 170
249fa0b0 171 if (c->frequency == 0)
1f15ddd0 172 bs = 0x03;
249fa0b0 173 else if (c->frequency < 443250000)
1f15ddd0
DJ
174 bs = 0x02;
175 else
176 bs = 0x08;
1da177e4 177
74aa7a29 178 pllbuf[0] = 0x60;
1da177e4
LT
179 pllbuf[1] = div >> 8;
180 pllbuf[2] = div & 0xff;
181 pllbuf[3] = cp;
182 pllbuf[4] = bs;
183
74aa7a29 184 return 5;
1da177e4
LT
185}
186
187static struct mt352_config thomson_dtt7579_config = {
1da177e4
LT
188 .demod_address = 0x0f,
189 .demod_init = thomson_dtt7579_demod_init,
1da177e4
LT
190};
191
8c99024b
MK
192static struct zl10353_config thomson_dtt7579_zl10353_config = {
193 .demod_address = 0x0f,
8c99024b
MK
194};
195
14d24d14 196static int cx24108_tuner_set_params(struct dvb_frontend *fe)
1da177e4 197{
cba3f88a
MCC
198 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
199 u32 freq = c->frequency;
1f15ddd0
DJ
200 int i, a, n, pump;
201 u32 band, pll;
1f15ddd0
DJ
202 u32 osci[]={950000,1019000,1075000,1178000,1296000,1432000,
203 1576000,1718000,1856000,2036000,2150000};
204 u32 bandsel[]={0,0x00020000,0x00040000,0x00100800,0x00101000,
205 0x00102000,0x00104000,0x00108000,0x00110000,
206 0x00120000,0x00140000};
1da177e4 207
1f15ddd0 208 #define XTAL 1011100 /* Hz, really 1.0111 MHz and a /10 prescaler */
37965546 209 dprintk("cx24108 debug: entering SetTunerFreq, freq=%d\n", freq);
50b215a0
JS
210
211 /* This is really the bit driving the tuner chip cx24108 */
212
1f15ddd0
DJ
213 if (freq<950000)
214 freq = 950000; /* kHz */
215 else if (freq>2150000)
216 freq = 2150000; /* satellite IF is 950..2150MHz */
50b215a0
JS
217
218 /* decide which VCO to use for the input frequency */
491aa96a 219 for(i = 1; (i < ARRAY_SIZE(osci) - 1) && (osci[i] < freq); i++);
37965546 220 dprintk("cx24108 debug: select vco #%d (f=%d)\n", i, freq);
50b215a0
JS
221 band=bandsel[i];
222 /* the gain values must be set by SetSymbolrate */
223 /* compute the pll divider needed, from Conexant data sheet,
224 resolved for (n*32+a), remember f(vco) is f(receive) *2 or *4,
225 depending on the divider bit. It is set to /4 on the 2 lowest
226 bands */
227 n=((i<=2?2:1)*freq*10L)/(XTAL/100);
228 a=n%32; n/=32; if(a==0) n--;
229 pump=(freq<(osci[i-1]+osci[i])/2);
230 pll=0xf8000000|
231 ((pump?1:2)<<(14+11))|
232 ((n&0x1ff)<<(5+11))|
233 ((a&0x1f)<<11);
234 /* everything is shifted left 11 bits to left-align the bits in the
235 32bit word. Output to the tuner goes MSB-aligned, after all */
37965546 236 dprintk("cx24108 debug: pump=%d, n=%d, a=%d\n", pump, n, a);
50b215a0
JS
237 cx24110_pll_write(fe,band);
238 /* set vga and vca to their widest-band settings, as a precaution.
239 SetSymbolrate might not be called to set this up */
240 cx24110_pll_write(fe,0x500c0000);
241 cx24110_pll_write(fe,0x83f1f800);
242 cx24110_pll_write(fe,pll);
1f15ddd0 243 //writereg(client,0x56,0x7f);
1da177e4
LT
244
245 return 0;
246}
247
74aa7a29 248static int pinnsat_tuner_init(struct dvb_frontend* fe)
1da177e4 249{
e7ac4646
MA
250 struct dvb_bt8xx_card *card = fe->dvb->priv;
251
252 bttv_gpio_enable(card->bttv_nr, 1, 1); /* output */
253 bttv_write_gpio(card->bttv_nr, 1, 1); /* relay on */
6457af5f 254
e7ac4646
MA
255 return 0;
256}
257
74aa7a29 258static int pinnsat_tuner_sleep(struct dvb_frontend* fe)
e7ac4646
MA
259{
260 struct dvb_bt8xx_card *card = fe->dvb->priv;
261
262 bttv_write_gpio(card->bttv_nr, 1, 0); /* relay off */
263
1f15ddd0 264 return 0;
1da177e4
LT
265}
266
1da177e4 267static struct cx24110_config pctvsat_config = {
1da177e4 268 .demod_address = 0x55,
1da177e4
LT
269};
270
14d24d14 271static int microtune_mt7202dtf_tuner_set_params(struct dvb_frontend *fe)
1da177e4 272{
cba3f88a 273 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
274 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
275 u8 cfg, cpump, band_select;
276 u8 data[4];
277 u32 div;
278 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
279
cba3f88a 280 div = (36000000 + c->frequency + 83333) / 166666;
1da177e4
LT
281 cfg = 0x88;
282
cba3f88a 283 if (c->frequency < 175000000)
1f15ddd0 284 cpump = 2;
cba3f88a 285 else if (c->frequency < 390000000)
1f15ddd0 286 cpump = 1;
cba3f88a 287 else if (c->frequency < 470000000)
1f15ddd0 288 cpump = 2;
cba3f88a 289 else if (c->frequency < 750000000)
1f15ddd0
DJ
290 cpump = 2;
291 else
292 cpump = 3;
1da177e4 293
cba3f88a 294 if (c->frequency < 175000000)
1f15ddd0 295 band_select = 0x0e;
cba3f88a 296 else if (c->frequency < 470000000)
1f15ddd0
DJ
297 band_select = 0x05;
298 else
299 band_select = 0x03;
1da177e4
LT
300
301 data[0] = (div >> 8) & 0x7f;
302 data[1] = div & 0xff;
303 data[2] = ((div >> 10) & 0x60) | cfg;
2b70a2f5 304 data[3] = (cpump << 6) | band_select;
1da177e4 305
dea74869
PB
306 if (fe->ops.i2c_gate_ctrl)
307 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT
308 i2c_transfer(card->i2c_adapter, &msg, 1);
309 return (div * 166666 - 36000000);
310}
311
312static int microtune_mt7202dtf_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
313{
314 struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
315
316 return request_firmware(fw, name, &bt->bt->dev->dev);
317}
318
64e423d4 319static const struct sp887x_config microtune_mt7202dtf_config = {
1da177e4 320 .demod_address = 0x70,
1da177e4
LT
321 .request_firmware = microtune_mt7202dtf_request_firmware,
322};
323
1da177e4
LT
324static int advbt771_samsung_tdtc9251dh0_demod_init(struct dvb_frontend* fe)
325{
326 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
327 static u8 mt352_reset [] = { 0x50, 0x80 };
328 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
329 static u8 mt352_agc_cfg [] = { 0x67, 0x10, 0x23, 0x00, 0xFF, 0xFF,
50b215a0 330 0x00, 0xFF, 0x00, 0x40, 0x40 };
1da177e4
LT
331 static u8 mt352_av771_extra[] = { 0xB5, 0x7A };
332 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
333
1da177e4
LT
334 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
335 udelay(2000);
336 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
337 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
338
339 mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
340 udelay(2000);
341 mt352_write(fe, mt352_av771_extra,sizeof(mt352_av771_extra));
342 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
343
344 return 0;
345}
346
249fa0b0 347static int advbt771_samsung_tdtc9251dh0_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
1da177e4 348{
249fa0b0 349 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
350 u32 div;
351 unsigned char bs = 0;
352 unsigned char cp = 0;
353
74aa7a29
AQ
354 if (buf_len < 5) return -EINVAL;
355
249fa0b0 356 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
1da177e4 357
249fa0b0 358 if (c->frequency < 150000000)
1f15ddd0 359 cp = 0xB4;
249fa0b0 360 else if (c->frequency < 173000000)
1f15ddd0 361 cp = 0xBC;
249fa0b0 362 else if (c->frequency < 250000000)
1f15ddd0 363 cp = 0xB4;
249fa0b0 364 else if (c->frequency < 400000000)
1f15ddd0 365 cp = 0xBC;
249fa0b0 366 else if (c->frequency < 420000000)
1f15ddd0 367 cp = 0xF4;
249fa0b0 368 else if (c->frequency < 470000000)
1f15ddd0 369 cp = 0xFC;
249fa0b0 370 else if (c->frequency < 600000000)
1f15ddd0 371 cp = 0xBC;
249fa0b0 372 else if (c->frequency < 730000000)
1f15ddd0
DJ
373 cp = 0xF4;
374 else
375 cp = 0xFC;
376
249fa0b0 377 if (c->frequency < 150000000)
1f15ddd0 378 bs = 0x01;
249fa0b0 379 else if (c->frequency < 173000000)
1f15ddd0 380 bs = 0x01;
249fa0b0 381 else if (c->frequency < 250000000)
1f15ddd0 382 bs = 0x02;
249fa0b0 383 else if (c->frequency < 400000000)
1f15ddd0 384 bs = 0x02;
249fa0b0 385 else if (c->frequency < 420000000)
1f15ddd0 386 bs = 0x02;
249fa0b0 387 else if (c->frequency < 470000000)
1f15ddd0 388 bs = 0x02;
249fa0b0 389 else if (c->frequency < 600000000)
1f15ddd0 390 bs = 0x08;
249fa0b0 391 else if (c->frequency < 730000000)
1f15ddd0
DJ
392 bs = 0x08;
393 else
394 bs = 0x08;
1da177e4 395
74aa7a29 396 pllbuf[0] = 0x61;
1da177e4
LT
397 pllbuf[1] = div >> 8;
398 pllbuf[2] = div & 0xff;
399 pllbuf[3] = cp;
400 pllbuf[4] = bs;
401
74aa7a29 402 return 5;
1da177e4
LT
403}
404
405static struct mt352_config advbt771_samsung_tdtc9251dh0_config = {
1da177e4
LT
406 .demod_address = 0x0f,
407 .demod_init = advbt771_samsung_tdtc9251dh0_demod_init,
1da177e4
LT
408};
409
1da177e4 410static struct dst_config dst_config = {
1da177e4
LT
411 .demod_address = 0x55,
412};
413
1da177e4
LT
414static int or51211_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
415{
416 struct dvb_bt8xx_card* bt = (struct dvb_bt8xx_card*) fe->dvb->priv;
417
418 return request_firmware(fw, name, &bt->bt->dev->dev);
419}
420
421static void or51211_setmode(struct dvb_frontend * fe, int mode)
422{
423 struct dvb_bt8xx_card *bt = fe->dvb->priv;
424 bttv_write_gpio(bt->bttv_nr, 0x0002, mode); /* Reset */
425 msleep(20);
426}
427
428static void or51211_reset(struct dvb_frontend * fe)
429{
430 struct dvb_bt8xx_card *bt = fe->dvb->priv;
431
432 /* RESET DEVICE
25985edc 433 * reset is controlled by GPIO-0
1da177e4
LT
434 * when set to 0 causes reset and when to 1 for normal op
435 * must remain reset for 128 clock cycles on a 50Mhz clock
25985edc 436 * also PRM1 PRM2 & PRM4 are controlled by GPIO-1,GPIO-2 & GPIO-4
1da177e4
LT
437 * We assume that the reset has be held low long enough or we
438 * have been reset by a power on. When the driver is unloaded
439 * reset set to 0 so if reloaded we have been reset.
440 */
441 /* reset & PRM1,2&4 are outputs */
442 int ret = bttv_gpio_enable(bt->bttv_nr, 0x001F, 0x001F);
1f15ddd0 443 if (ret != 0)
fa132a64 444 pr_warn("or51211: Init Error - Can't Reset DVR (%i)\n", ret);
1da177e4
LT
445 bttv_write_gpio(bt->bttv_nr, 0x001F, 0x0000); /* Reset */
446 msleep(20);
447 /* Now set for normal operation */
448 bttv_write_gpio(bt->bttv_nr, 0x0001F, 0x0001);
449 /* wait for operation to begin */
450 msleep(500);
451}
452
453static void or51211_sleep(struct dvb_frontend * fe)
454{
455 struct dvb_bt8xx_card *bt = fe->dvb->priv;
456 bttv_write_gpio(bt->bttv_nr, 0x0001, 0x0000);
457}
458
4a40c73e 459static const struct or51211_config or51211_config = {
1da177e4
LT
460 .demod_address = 0x15,
461 .request_firmware = or51211_request_firmware,
462 .setmode = or51211_setmode,
463 .reset = or51211_reset,
464 .sleep = or51211_sleep,
465};
466
14d24d14 467static int vp3021_alps_tded4_tuner_set_params(struct dvb_frontend *fe)
1da177e4 468{
cba3f88a 469 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1da177e4
LT
470 struct dvb_bt8xx_card *card = (struct dvb_bt8xx_card *) fe->dvb->priv;
471 u8 buf[4];
472 u32 div;
473 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = buf, .len = sizeof(buf) };
474
cba3f88a 475 div = (c->frequency + 36166667) / 166667;
1da177e4
LT
476
477 buf[0] = (div >> 8) & 0x7F;
478 buf[1] = div & 0xFF;
479 buf[2] = 0x85;
cba3f88a 480 if ((c->frequency >= 47000000) && (c->frequency < 153000000))
1da177e4 481 buf[3] = 0x01;
cba3f88a 482 else if ((c->frequency >= 153000000) && (c->frequency < 430000000))
1da177e4 483 buf[3] = 0x02;
cba3f88a 484 else if ((c->frequency >= 430000000) && (c->frequency < 824000000))
1da177e4 485 buf[3] = 0x0C;
cba3f88a 486 else if ((c->frequency >= 824000000) && (c->frequency < 863000000))
1da177e4
LT
487 buf[3] = 0x8C;
488 else
489 return -EINVAL;
490
dea74869
PB
491 if (fe->ops.i2c_gate_ctrl)
492 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT
493 i2c_transfer(card->i2c_adapter, &msg, 1);
494 return 0;
495}
496
497static struct nxt6000_config vp3021_alps_tded4_config = {
1da177e4
LT
498 .demod_address = 0x0a,
499 .clock_inversion = 1,
1da177e4
LT
500};
501
05ade5a5
DJ
502static int digitv_alps_tded4_demod_init(struct dvb_frontend* fe)
503{
504 static u8 mt352_clock_config [] = { 0x89, 0x38, 0x2d };
505 static u8 mt352_reset [] = { 0x50, 0x80 };
506 static u8 mt352_adc_ctl_1_cfg [] = { 0x8E, 0x40 };
507 static u8 mt352_agc_cfg [] = { 0x67, 0x20, 0xa0 };
508 static u8 mt352_capt_range_cfg[] = { 0x75, 0x32 };
509
510 mt352_write(fe, mt352_clock_config, sizeof(mt352_clock_config));
511 udelay(2000);
512 mt352_write(fe, mt352_reset, sizeof(mt352_reset));
513 mt352_write(fe, mt352_adc_ctl_1_cfg, sizeof(mt352_adc_ctl_1_cfg));
514 mt352_write(fe, mt352_agc_cfg,sizeof(mt352_agc_cfg));
515 mt352_write(fe, mt352_capt_range_cfg, sizeof(mt352_capt_range_cfg));
516
517 return 0;
518}
519
249fa0b0 520static int digitv_alps_tded4_tuner_calc_regs(struct dvb_frontend *fe, u8 *pllbuf, int buf_len)
05ade5a5
DJ
521{
522 u32 div;
249fa0b0 523 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
05ade5a5 524
74aa7a29
AQ
525 if (buf_len < 5)
526 return -EINVAL;
527
249fa0b0 528 div = (((c->frequency + 83333) * 3) / 500000) + IF_FREQUENCYx6;
05ade5a5 529
74aa7a29 530 pllbuf[0] = 0x61;
05ade5a5
DJ
531 pllbuf[1] = (div >> 8) & 0x7F;
532 pllbuf[2] = div & 0xFF;
533 pllbuf[3] = 0x85;
534
249fa0b0 535 dprintk("frequency %u, div %u\n", c->frequency, div);
05ade5a5 536
249fa0b0 537 if (c->frequency < 470000000)
05ade5a5 538 pllbuf[4] = 0x02;
249fa0b0 539 else if (c->frequency > 823000000)
05ade5a5
DJ
540 pllbuf[4] = 0x88;
541 else
542 pllbuf[4] = 0x08;
543
249fa0b0 544 if (c->bandwidth_hz == 8000000)
05ade5a5
DJ
545 pllbuf[4] |= 0x04;
546
74aa7a29 547 return 5;
05ade5a5
DJ
548}
549
550static void digitv_alps_tded4_reset(struct dvb_bt8xx_card *bt)
551{
552 /*
553 * Reset the frontend, must be called before trying
554 * to initialise the MT352 or mt352_attach
163d8fed 555 * will fail. Same goes for the nxt6000 frontend.
05ade5a5
DJ
556 *
557 */
558
559 int ret = bttv_gpio_enable(bt->bttv_nr, 0x08, 0x08);
560 if (ret != 0)
fa132a64
MCC
561 pr_warn("digitv_alps_tded4: Init Error - Can't Reset DVR (%i)\n",
562 ret);
05ade5a5
DJ
563
564 /* Pulse the reset line */
565 bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
566 bttv_write_gpio(bt->bttv_nr, 0x08, 0x00); /* Low */
567 msleep(100);
568
569 bttv_write_gpio(bt->bttv_nr, 0x08, 0x08); /* High */
570}
571
572static struct mt352_config digitv_alps_tded4_config = {
573 .demod_address = 0x0a,
574 .demod_init = digitv_alps_tded4_demod_init,
05ade5a5
DJ
575};
576
3cff00d9
MK
577static struct lgdt330x_config tdvs_tua6034_config = {
578 .demod_address = 0x0e,
579 .demod_chip = LGDT3303,
580 .serial_mpeg = 0x40, /* TPSERIAL for 3303 in TOP_CONTROL */
3cff00d9
MK
581};
582
583static void lgdt330x_reset(struct dvb_bt8xx_card *bt)
584{
585 /* Set pin 27 of the lgdt3303 chip high to reset the frontend */
586
587 /* Pulse the reset line */
588 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
589 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000000); /* Low */
590 msleep(100);
591
592 bttv_write_gpio(bt->bttv_nr, 0x00e00007, 0x00000001); /* High */
593 msleep(100);
594}
595
1da177e4
LT
596static void frontend_init(struct dvb_bt8xx_card *card, u32 type)
597{
50b215a0
JS
598 struct dst_state* state = NULL;
599
1da177e4 600 switch(type) {
6cffcc23 601 case BTTV_BOARD_DVICO_DVBT_LITE:
2bfe031d 602 card->fe = dvb_attach(mt352_attach, &thomson_dtt7579_config, card->i2c_adapter);
8c99024b
MK
603
604 if (card->fe == NULL)
2bfe031d 605 card->fe = dvb_attach(zl10353_attach, &thomson_dtt7579_zl10353_config,
8c99024b
MK
606 card->i2c_adapter);
607
1da177e4 608 if (card->fe != NULL) {
dea74869
PB
609 card->fe->ops.tuner_ops.calc_regs = thomson_dtt7579_tuner_calc_regs;
610 card->fe->ops.info.frequency_min = 174000000;
611 card->fe->ops.info.frequency_max = 862000000;
1da177e4
LT
612 }
613 break;
1da177e4 614
6cffcc23 615 case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
3cff00d9 616 lgdt330x_reset(card);
2bfe031d 617 card->fe = dvb_attach(lgdt330x_attach, &tdvs_tua6034_config, card->i2c_adapter);
74aa7a29 618 if (card->fe != NULL) {
827855d3
MK
619 dvb_attach(simple_tuner_attach, card->fe,
620 card->i2c_adapter, 0x61,
621 TUNER_LG_TDVS_H06XF);
fa132a64 622 dprintk("dvb_bt8xx: lgdt330x detected\n");
74aa7a29 623 }
3cff00d9 624 break;
3cff00d9 625
6cffcc23 626 case BTTV_BOARD_NEBULA_DIGITV:
05ade5a5
DJ
627 /*
628 * It is possible to determine the correct frontend using the I2C bus (see the Nebula SDK);
629 * this would be a cleaner solution than trying each frontend in turn.
630 */
631
632 /* Old Nebula (marked (c)2003 on high profile pci card) has nxt6000 demod */
163d8fed 633 digitv_alps_tded4_reset(card);
2bfe031d 634 card->fe = dvb_attach(nxt6000_attach, &vp3021_alps_tded4_config, card->i2c_adapter);
f30db067 635 if (card->fe != NULL) {
dea74869 636 card->fe->ops.tuner_ops.set_params = vp3021_alps_tded4_tuner_set_params;
fa132a64 637 dprintk("dvb_bt8xx: an nxt6000 was detected on your digitv card\n");
f30db067
SA
638 break;
639 }
05ade5a5
DJ
640
641 /* New Nebula (marked (c)2005 on low profile pci card) has mt352 demod */
642 digitv_alps_tded4_reset(card);
2bfe031d 643 card->fe = dvb_attach(mt352_attach, &digitv_alps_tded4_config, card->i2c_adapter);
05ade5a5 644
74aa7a29 645 if (card->fe != NULL) {
dea74869 646 card->fe->ops.tuner_ops.calc_regs = digitv_alps_tded4_tuner_calc_regs;
fa132a64 647 dprintk("dvb_bt8xx: an mt352 was detected on your digitv card\n");
74aa7a29 648 }
1da177e4
LT
649 break;
650
6cffcc23 651 case BTTV_BOARD_AVDVBT_761:
2bfe031d 652 card->fe = dvb_attach(sp887x_attach, &microtune_mt7202dtf_config, card->i2c_adapter);
74aa7a29 653 if (card->fe) {
dea74869 654 card->fe->ops.tuner_ops.set_params = microtune_mt7202dtf_tuner_set_params;
74aa7a29 655 }
1da177e4
LT
656 break;
657
6cffcc23 658 case BTTV_BOARD_AVDVBT_771:
2bfe031d 659 card->fe = dvb_attach(mt352_attach, &advbt771_samsung_tdtc9251dh0_config, card->i2c_adapter);
1da177e4 660 if (card->fe != NULL) {
dea74869
PB
661 card->fe->ops.tuner_ops.calc_regs = advbt771_samsung_tdtc9251dh0_tuner_calc_regs;
662 card->fe->ops.info.frequency_min = 174000000;
663 card->fe->ops.info.frequency_max = 862000000;
1da177e4
LT
664 }
665 break;
666
6cffcc23 667 case BTTV_BOARD_TWINHAN_DST:
50b215a0 668 /* DST is not a frontend driver !!! */
5cbded58 669 state = kmalloc(sizeof (struct dst_state), GFP_KERNEL);
626ae83b 670 if (!state) {
6c59eefd 671 pr_err("No memory\n");
626ae83b
AC
672 break;
673 }
50b215a0
JS
674 /* Setup the Card */
675 state->config = &dst_config;
676 state->i2c = card->i2c_adapter;
677 state->bt = card->bt;
bbdd11fa 678 state->dst_ca = NULL;
50b215a0 679 /* DST is not a frontend, attaching the ASIC */
2bfe031d 680 if (dvb_attach(dst_attach, state, &card->dvb_adapter) == NULL) {
6c59eefd 681 pr_err("%s: Could not find a Twinhan DST\n", __func__);
6792eb0c 682 kfree(state);
50b215a0
JS
683 break;
684 }
bbdd11fa
MA
685 /* Attach other DST peripherals if any */
686 /* Conditional Access device */
50b215a0 687 card->fe = &state->frontend;
bbdd11fa
MA
688 if (state->dst_hw_cap & DST_TYPE_HAS_CA)
689 dvb_attach(dst_ca_attach, state, &card->dvb_adapter);
1da177e4
LT
690 break;
691
6cffcc23 692 case BTTV_BOARD_PINNACLESAT:
2bfe031d 693 card->fe = dvb_attach(cx24110_attach, &pctvsat_config, card->i2c_adapter);
74aa7a29 694 if (card->fe) {
dea74869
PB
695 card->fe->ops.tuner_ops.init = pinnsat_tuner_init;
696 card->fe->ops.tuner_ops.sleep = pinnsat_tuner_sleep;
697 card->fe->ops.tuner_ops.set_params = cx24108_tuner_set_params;
74aa7a29 698 }
1da177e4
LT
699 break;
700
6cffcc23 701 case BTTV_BOARD_PC_HDTV:
2bfe031d 702 card->fe = dvb_attach(or51211_attach, &or51211_config, card->i2c_adapter);
cd2cd0aa 703 if (card->fe != NULL)
967be9a9
MK
704 dvb_attach(simple_tuner_attach, card->fe,
705 card->i2c_adapter, 0x61,
706 TUNER_PHILIPS_FCV1236D);
1da177e4
LT
707 break;
708 }
709
1f15ddd0 710 if (card->fe == NULL)
6c59eefd 711 pr_err("A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
1da177e4
LT
712 card->bt->dev->vendor,
713 card->bt->dev->device,
714 card->bt->dev->subsystem_vendor,
715 card->bt->dev->subsystem_device);
1f15ddd0 716 else
fdc53a6d 717 if (dvb_register_frontend(&card->dvb_adapter, card->fe)) {
6c59eefd 718 pr_err("Frontend registration failed!\n");
f52a838b 719 dvb_frontend_detach(card->fe);
1da177e4
LT
720 card->fe = NULL;
721 }
1da177e4
LT
722}
723
4c62e976 724static int dvb_bt8xx_load_card(struct dvb_bt8xx_card *card, u32 type)
1da177e4
LT
725{
726 int result;
727
78e92006
JG
728 result = dvb_register_adapter(&card->dvb_adapter, card->card_name,
729 THIS_MODULE, &card->bt->dev->dev,
730 adapter_nr);
731 if (result < 0) {
6c59eefd 732 pr_err("dvb_register_adapter failed (errno = %d)\n", result);
1da177e4 733 return result;
1da177e4 734 }
fdc53a6d 735 card->dvb_adapter.priv = card;
1da177e4
LT
736
737 card->bt->adapter = card->i2c_adapter;
738
739 memset(&card->demux, 0, sizeof(struct dvb_demux));
740
741 card->demux.dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING | DMX_MEMORY_BASED_FILTERING;
742
743 card->demux.priv = card;
744 card->demux.filternum = 256;
745 card->demux.feednum = 256;
746 card->demux.start_feed = dvb_bt8xx_start_feed;
747 card->demux.stop_feed = dvb_bt8xx_stop_feed;
748 card->demux.write_to_decoder = NULL;
749
e4b8537c
JN
750 result = dvb_dmx_init(&card->demux);
751 if (result < 0) {
6c59eefd 752 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 753 goto err_unregister_adaptor;
1da177e4
LT
754 }
755
756 card->dmxdev.filternum = 256;
757 card->dmxdev.demux = &card->demux.dmx;
758 card->dmxdev.capabilities = 0;
759
e4b8537c
JN
760 result = dvb_dmxdev_init(&card->dmxdev, &card->dvb_adapter);
761 if (result < 0) {
6c59eefd 762 pr_err("dvb_dmxdev_init failed (errno = %d)\n", result);
e4b8537c 763 goto err_dmx_release;
1da177e4
LT
764 }
765
766 card->fe_hw.source = DMX_FRONTEND_0;
767
e4b8537c
JN
768 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_hw);
769 if (result < 0) {
6c59eefd 770 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 771 goto err_dmxdev_release;
1da177e4
LT
772 }
773
774 card->fe_mem.source = DMX_MEMORY_FE;
775
e4b8537c
JN
776 result = card->demux.dmx.add_frontend(&card->demux.dmx, &card->fe_mem);
777 if (result < 0) {
6c59eefd 778 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 779 goto err_remove_hw_frontend;
1da177e4
LT
780 }
781
e4b8537c
JN
782 result = card->demux.dmx.connect_frontend(&card->demux.dmx, &card->fe_hw);
783 if (result < 0) {
6c59eefd 784 pr_err("dvb_dmx_init failed (errno = %d)\n", result);
e4b8537c 785 goto err_remove_mem_frontend;
1da177e4
LT
786 }
787
2dbbac33
JN
788 result = dvb_net_init(&card->dvb_adapter, &card->dvbnet, &card->demux.dmx);
789 if (result < 0) {
6c59eefd 790 pr_err("dvb_net_init failed (errno = %d)\n", result);
2dbbac33
JN
791 goto err_disconnect_frontend;
792 }
1da177e4
LT
793
794 tasklet_init(&card->bt->tasklet, dvb_bt8xx_task, (unsigned long) card);
795
796 frontend_init(card, type);
797
798 return 0;
e4b8537c 799
2dbbac33
JN
800err_disconnect_frontend:
801 card->demux.dmx.disconnect_frontend(&card->demux.dmx);
e4b8537c
JN
802err_remove_mem_frontend:
803 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
804err_remove_hw_frontend:
805 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
806err_dmxdev_release:
807 dvb_dmxdev_release(&card->dmxdev);
808err_dmx_release:
809 dvb_dmx_release(&card->demux);
810err_unregister_adaptor:
811 dvb_unregister_adapter(&card->dvb_adapter);
812 return result;
1da177e4
LT
813}
814
4c62e976 815static int dvb_bt8xx_probe(struct bttv_sub_device *sub)
1da177e4 816{
1da177e4
LT
817 struct dvb_bt8xx_card *card;
818 struct pci_dev* bttv_pci_dev;
819 int ret;
820
7408187d 821 if (!(card = kzalloc(sizeof(struct dvb_bt8xx_card), GFP_KERNEL)))
1da177e4
LT
822 return -ENOMEM;
823
3593cab5 824 mutex_init(&card->lock);
1da177e4 825 card->bttv_nr = sub->core->nr;
74fc7bd9 826 strlcpy(card->card_name, sub->core->v4l2_dev.name, sizeof(card->card_name));
1da177e4
LT
827 card->i2c_adapter = &sub->core->i2c_adap;
828
1f15ddd0 829 switch(sub->core->type) {
6cffcc23 830 case BTTV_BOARD_PINNACLESAT:
1da177e4
LT
831 card->gpio_mode = 0x0400c060;
832 /* should be: BT878_A_GAIN=0,BT878_A_PWRDN,BT878_DA_DPM,BT878_DA_SBR,
50b215a0 833 BT878_DA_IOM=1,BT878_DA_APP to enable serial highspeed mode. */
df5a4f4f
MA
834 card->op_sync_orin = BT878_RISC_SYNC_MASK;
835 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
836 break;
837
6cffcc23 838 case BTTV_BOARD_DVICO_DVBT_LITE:
1da177e4 839 card->gpio_mode = 0x0400C060;
df5a4f4f
MA
840 card->op_sync_orin = BT878_RISC_SYNC_MASK;
841 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
842 /* 26, 15, 14, 6, 5
843 * A_PWRDN DA_DPM DA_SBR DA_IOM_DA
844 * DA_APP(parallel) */
845 break;
846
6cffcc23 847 case BTTV_BOARD_DVICO_FUSIONHDTV_5_LITE:
3cff00d9
MK
848 card->gpio_mode = 0x0400c060;
849 card->op_sync_orin = BT878_RISC_SYNC_MASK;
850 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
851 break;
852
6cffcc23 853 case BTTV_BOARD_NEBULA_DIGITV:
6cffcc23 854 case BTTV_BOARD_AVDVBT_761:
1da177e4 855 card->gpio_mode = (1 << 26) | (1 << 14) | (1 << 5);
df5a4f4f
MA
856 card->op_sync_orin = BT878_RISC_SYNC_MASK;
857 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
858 /* A_PWRDN DA_SBR DA_APP (high speed serial) */
859 break;
860
6cffcc23 861 case BTTV_BOARD_AVDVBT_771: //case 0x07711461:
1da177e4
LT
862 card->gpio_mode = 0x0400402B;
863 card->op_sync_orin = BT878_RISC_SYNC_MASK;
df5a4f4f 864 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
865 /* A_PWRDN DA_SBR DA_APP[0] PKTP=10 RISC_ENABLE FIFO_ENABLE*/
866 break;
867
6cffcc23 868 case BTTV_BOARD_TWINHAN_DST:
1da177e4
LT
869 card->gpio_mode = 0x2204f2c;
870 card->op_sync_orin = BT878_RISC_SYNC_MASK;
871 card->irq_err_ignore = BT878_APABORT | BT878_ARIPERR |
872 BT878_APPERR | BT878_AFBUS;
873 /* 25,21,14,11,10,9,8,3,2 then
874 * 0x33 = 5,4,1,0
875 * A_SEL=SML, DA_MLB, DA_SBR,
876 * DA_SDR=f, fifo trigger = 32 DWORDS
877 * IOM = 0 == audio A/D
878 * DPM = 0 == digital audio mode
879 * == async data parallel port
880 * then 0x33 (13 is set by start_capture)
881 * DA_APP = async data parallel port,
882 * ACAP_EN = 1,
883 * RISC+FIFO ENABLE */
884 break;
885
6cffcc23 886 case BTTV_BOARD_PC_HDTV:
1da177e4 887 card->gpio_mode = 0x0100EC7B;
df5a4f4f
MA
888 card->op_sync_orin = BT878_RISC_SYNC_MASK;
889 card->irq_err_ignore = BT878_AFBUS | BT878_AFDSR;
1da177e4
LT
890 break;
891
05ade5a5 892 default:
6c59eefd 893 pr_err("Unknown bttv card type: %d\n", sub->core->type);
1da177e4
LT
894 kfree(card);
895 return -ENODEV;
896 }
897
898 dprintk("dvb_bt8xx: identified card%d as %s\n", card->bttv_nr, card->card_name);
899
900 if (!(bttv_pci_dev = bttv_get_pcidev(card->bttv_nr))) {
6c59eefd 901 pr_err("no pci device for card %d\n", card->bttv_nr);
1da177e4 902 kfree(card);
16d6c0b0 903 return -ENODEV;
1da177e4
LT
904 }
905
906 if (!(card->bt = dvb_bt8xx_878_match(card->bttv_nr, bttv_pci_dev))) {
6c59eefd
JN
907 pr_err("unable to determine DMA core of card %d,\n", card->bttv_nr);
908 pr_err("if you have the ALSA bt87x audio driver installed, try removing it.\n");
1da177e4
LT
909
910 kfree(card);
16d6c0b0 911 return -ENODEV;
1da177e4
LT
912 }
913
3593cab5 914 mutex_init(&card->bt->gpio_lock);
1da177e4
LT
915 card->bt->bttv_nr = sub->core->nr;
916
917 if ( (ret = dvb_bt8xx_load_card(card, sub->core->type)) ) {
918 kfree(card);
919 return ret;
920 }
921
348290a4 922 dev_set_drvdata(&sub->dev, card);
1da177e4
LT
923 return 0;
924}
925
a462e9ff 926static void dvb_bt8xx_remove(struct bttv_sub_device *sub)
1da177e4 927{
348290a4 928 struct dvb_bt8xx_card *card = dev_get_drvdata(&sub->dev);
1da177e4
LT
929
930 dprintk("dvb_bt8xx: unloading card%d\n", card->bttv_nr);
931
932 bt878_stop(card->bt);
933 tasklet_kill(&card->bt->tasklet);
934 dvb_net_release(&card->dvbnet);
935 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_mem);
936 card->demux.dmx.remove_frontend(&card->demux.dmx, &card->fe_hw);
937 dvb_dmxdev_release(&card->dmxdev);
938 dvb_dmx_release(&card->demux);
2bfe031d 939 if (card->fe) {
1f15ddd0 940 dvb_unregister_frontend(card->fe);
f52a838b 941 dvb_frontend_detach(card->fe);
2bfe031d 942 }
fdc53a6d 943 dvb_unregister_adapter(&card->dvb_adapter);
1da177e4
LT
944
945 kfree(card);
1da177e4
LT
946}
947
948static struct bttv_sub_driver driver = {
949 .drv = {
950 .name = "dvb-bt8xx",
1da177e4 951 },
348290a4
RK
952 .probe = dvb_bt8xx_probe,
953 .remove = dvb_bt8xx_remove,
954 /* FIXME:
955 * .shutdown = dvb_bt8xx_shutdown,
956 * .suspend = dvb_bt8xx_suspend,
957 * .resume = dvb_bt8xx_resume,
958 */
1da177e4
LT
959};
960
961static int __init dvb_bt8xx_init(void)
962{
963 return bttv_sub_register(&driver, "dvb");
964}
965
966static void __exit dvb_bt8xx_exit(void)
967{
968 bttv_sub_unregister(&driver);
969}
970
971module_init(dvb_bt8xx_init);
972module_exit(dvb_bt8xx_exit);
973
974MODULE_DESCRIPTION("Bt8xx based DVB adapter driver");
975MODULE_AUTHOR("Florian Schirmer <jolt@tuxbox.org>");
976MODULE_LICENSE("GPL");