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[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / cx18 / cx18-driver.h
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1/*
2 * cx18 driver internal defines and structures
3 *
4 * Derived from ivtv-driver.h
5 *
6 * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
6afdeaf8 7 * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
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8 *
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
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18 */
19
20#ifndef CX18_DRIVER_H
21#define CX18_DRIVER_H
22
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23#include <linux/module.h>
24#include <linux/moduleparam.h>
25#include <linux/init.h>
26#include <linux/delay.h>
27#include <linux/sched.h>
28#include <linux/fs.h>
29#include <linux/pci.h>
30#include <linux/interrupt.h>
31#include <linux/spinlock.h>
32#include <linux/i2c.h>
33#include <linux/i2c-algo-bit.h>
34#include <linux/list.h>
35#include <linux/unistd.h>
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36#include <linux/pagemap.h>
37#include <linux/workqueue.h>
38#include <linux/mutex.h>
5a0e3ad6 39#include <linux/slab.h>
1a651a00 40#include <asm/byteorder.h>
1c1e45d1 41
1c1e45d1 42#include <media/v4l2-common.h>
35ea11ff 43#include <media/v4l2-ioctl.h>
888cdb07 44#include <media/v4l2-device.h>
0b5f265a 45#include <media/v4l2-fh.h>
1c1e45d1 46#include <media/tuner.h>
b5dcee22 47#include <media/i2c/ir-kbd-i2c.h>
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48#include "cx18-mailbox.h"
49#include "cx18-av-core.h"
50#include "cx23418.h"
51
52/* DVB */
53#include "demux.h"
54#include "dmxdev.h"
55#include "dvb_demux.h"
56#include "dvb_frontend.h"
57#include "dvb_net.h"
58#include "dvbdev.h"
59
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60/* Videobuf / YUV support */
61#include <media/videobuf-core.h>
62#include <media/videobuf-vmalloc.h>
63
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64#ifndef CONFIG_PCI
65# error "This driver requires kernel PCI support."
66#endif
67
68#define CX18_MEM_OFFSET 0x00000000
69#define CX18_MEM_SIZE 0x04000000
70#define CX18_REG_OFFSET 0x02000000
71
72/* Maximum cx18 driver instances. */
73#define CX18_MAX_CARDS 32
74
75/* Supported cards */
76#define CX18_CARD_HVR_1600_ESMT 0 /* Hauppauge HVR 1600 (ESMT memory) */
77#define CX18_CARD_HVR_1600_SAMSUNG 1 /* Hauppauge HVR 1600 (Samsung memory) */
78#define CX18_CARD_COMPRO_H900 2 /* Compro VideoMate H900 */
79#define CX18_CARD_YUAN_MPC718 3 /* Yuan MPC718 */
03c28085 80#define CX18_CARD_CNXT_RAPTOR_PAL 4 /* Conexant Raptor PAL */
9eee4fb6 81#define CX18_CARD_TOSHIBA_QOSMIO_DVBT 5 /* Toshiba Qosmio Interal DVB-T/Analog*/
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82#define CX18_CARD_LEADTEK_PVR2100 6 /* Leadtek WinFast PVR2100 */
83#define CX18_CARD_LEADTEK_DVR3100H 7 /* Leadtek WinFast DVR3100 H */
a3634363 84#define CX18_CARD_GOTVIEW_PCI_DVD3 8 /* GoTView PCI DVD3 Hybrid */
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85#define CX18_CARD_HVR_1600_S5H1411 9 /* Hauppauge HVR 1600 s5h1411/tda18271*/
86#define CX18_CARD_LAST 9
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87
88#define CX18_ENC_STREAM_TYPE_MPG 0
89#define CX18_ENC_STREAM_TYPE_TS 1
90#define CX18_ENC_STREAM_TYPE_YUV 2
91#define CX18_ENC_STREAM_TYPE_VBI 3
92#define CX18_ENC_STREAM_TYPE_PCM 4
93#define CX18_ENC_STREAM_TYPE_IDX 5
94#define CX18_ENC_STREAM_TYPE_RAD 6
95#define CX18_MAX_STREAMS 7
96
97/* system vendor and device IDs */
98#define PCI_VENDOR_ID_CX 0x14f1
99#define PCI_DEVICE_ID_CX23418 0x5b7a
100
101/* subsystem vendor ID */
102#define CX18_PCI_ID_HAUPPAUGE 0x0070
103#define CX18_PCI_ID_COMPRO 0x185b
104#define CX18_PCI_ID_YUAN 0x12ab
03c28085 105#define CX18_PCI_ID_CONEXANT 0x14f1
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106#define CX18_PCI_ID_TOSHIBA 0x1179
107#define CX18_PCI_ID_LEADTEK 0x107D
a3634363 108#define CX18_PCI_ID_GOTVIEW 0x5854
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109
110/* ======================================================================== */
111/* ========================== START USER SETTABLE DMA VARIABLES =========== */
112/* ======================================================================== */
113
114/* DMA Buffers, Default size in MB allocated */
115#define CX18_DEFAULT_ENC_TS_BUFFERS 1
116#define CX18_DEFAULT_ENC_MPG_BUFFERS 2
117#define CX18_DEFAULT_ENC_IDX_BUFFERS 1
118#define CX18_DEFAULT_ENC_YUV_BUFFERS 2
119#define CX18_DEFAULT_ENC_VBI_BUFFERS 1
120#define CX18_DEFAULT_ENC_PCM_BUFFERS 1
121
6ecd86dc 122/* Maximum firmware DMA buffers per stream */
0ef02892 123#define CX18_MAX_FW_MDLS_PER_STREAM 63
6ecd86dc 124
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125/* YUV buffer sizes in bytes to ensure integer # of frames per buffer */
126#define CX18_UNIT_ENC_YUV_BUFSIZE (720 * 32 * 3 / 2) /* bytes */
127#define CX18_625_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 576/32)
128#define CX18_525_LINE_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 480/32)
129
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130/* IDX buffer size should be a multiple of the index entry size from the chip */
131struct cx18_enc_idx_entry {
132 __le32 length;
133 __le32 offset_low;
134 __le32 offset_high;
135 __le32 flags;
136 __le32 pts_low;
137 __le32 pts_high;
138} __attribute__ ((packed));
139#define CX18_UNIT_ENC_IDX_BUFSIZE \
140 (sizeof(struct cx18_enc_idx_entry) * V4L2_ENC_IDX_ENTRIES)
141
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142/* DMA buffer, default size in kB allocated */
143#define CX18_DEFAULT_ENC_TS_BUFSIZE 32
144#define CX18_DEFAULT_ENC_MPG_BUFSIZE 32
efc0b127 145#define CX18_DEFAULT_ENC_IDX_BUFSIZE (CX18_UNIT_ENC_IDX_BUFSIZE * 1 / 1024 + 1)
22dce188 146#define CX18_DEFAULT_ENC_YUV_BUFSIZE (CX18_UNIT_ENC_YUV_BUFSIZE * 3 / 1024 + 1)
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147#define CX18_DEFAULT_ENC_PCM_BUFSIZE 4
148
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149/* i2c stuff */
150#define I2C_CLIENTS_MAX 16
151
152/* debugging */
153
154/* Flag to turn on high volume debugging */
155#define CX18_DBGFLG_WARN (1 << 0)
156#define CX18_DBGFLG_INFO (1 << 1)
157#define CX18_DBGFLG_API (1 << 2)
158#define CX18_DBGFLG_DMA (1 << 3)
159#define CX18_DBGFLG_IOCTL (1 << 4)
160#define CX18_DBGFLG_FILE (1 << 5)
161#define CX18_DBGFLG_I2C (1 << 6)
162#define CX18_DBGFLG_IRQ (1 << 7)
163/* Flag to turn on high volume debugging */
164#define CX18_DBGFLG_HIGHVOL (1 << 8)
165
5811cf99 166/* NOTE: extra space before comma in 'fmt , ## args' is required for
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167 gcc-2.95, otherwise it won't compile. */
168#define CX18_DEBUG(x, type, fmt, args...) \
169 do { \
170 if ((x) & cx18_debug) \
5811cf99 171 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
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172 } while (0)
173#define CX18_DEBUG_WARN(fmt, args...) CX18_DEBUG(CX18_DBGFLG_WARN, "warning", fmt , ## args)
174#define CX18_DEBUG_INFO(fmt, args...) CX18_DEBUG(CX18_DBGFLG_INFO, "info", fmt , ## args)
175#define CX18_DEBUG_API(fmt, args...) CX18_DEBUG(CX18_DBGFLG_API, "api", fmt , ## args)
176#define CX18_DEBUG_DMA(fmt, args...) CX18_DEBUG(CX18_DBGFLG_DMA, "dma", fmt , ## args)
177#define CX18_DEBUG_IOCTL(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
178#define CX18_DEBUG_FILE(fmt, args...) CX18_DEBUG(CX18_DBGFLG_FILE, "file", fmt , ## args)
179#define CX18_DEBUG_I2C(fmt, args...) CX18_DEBUG(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
180#define CX18_DEBUG_IRQ(fmt, args...) CX18_DEBUG(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
181
182#define CX18_DEBUG_HIGH_VOL(x, type, fmt, args...) \
183 do { \
184 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
5811cf99 185 v4l2_info(&cx->v4l2_dev, " " type ": " fmt , ## args); \
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186 } while (0)
187#define CX18_DEBUG_HI_WARN(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_WARN, "warning", fmt , ## args)
188#define CX18_DEBUG_HI_INFO(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_INFO, "info", fmt , ## args)
189#define CX18_DEBUG_HI_API(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_API, "api", fmt , ## args)
190#define CX18_DEBUG_HI_DMA(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_DMA, "dma", fmt , ## args)
191#define CX18_DEBUG_HI_IOCTL(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IOCTL, "ioctl", fmt , ## args)
192#define CX18_DEBUG_HI_FILE(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_FILE, "file", fmt , ## args)
193#define CX18_DEBUG_HI_I2C(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_I2C, "i2c", fmt , ## args)
194#define CX18_DEBUG_HI_IRQ(fmt, args...) CX18_DEBUG_HIGH_VOL(CX18_DBGFLG_IRQ, "irq", fmt , ## args)
195
196/* Standard kernel messages */
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197#define CX18_ERR(fmt, args...) v4l2_err(&cx->v4l2_dev, fmt , ## args)
198#define CX18_WARN(fmt, args...) v4l2_warn(&cx->v4l2_dev, fmt , ## args)
199#define CX18_INFO(fmt, args...) v4l2_info(&cx->v4l2_dev, fmt , ## args)
1c1e45d1 200
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201/* Messages for internal subdevs to use */
202#define CX18_DEBUG_DEV(x, dev, type, fmt, args...) \
203 do { \
204 if ((x) & cx18_debug) \
205 v4l2_info(dev, " " type ": " fmt , ## args); \
206 } while (0)
207#define CX18_DEBUG_WARN_DEV(dev, fmt, args...) \
208 CX18_DEBUG_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
209#define CX18_DEBUG_INFO_DEV(dev, fmt, args...) \
210 CX18_DEBUG_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
211#define CX18_DEBUG_API_DEV(dev, fmt, args...) \
212 CX18_DEBUG_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
213#define CX18_DEBUG_DMA_DEV(dev, fmt, args...) \
214 CX18_DEBUG_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
215#define CX18_DEBUG_IOCTL_DEV(dev, fmt, args...) \
216 CX18_DEBUG_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
217#define CX18_DEBUG_FILE_DEV(dev, fmt, args...) \
218 CX18_DEBUG_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
219#define CX18_DEBUG_I2C_DEV(dev, fmt, args...) \
220 CX18_DEBUG_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
221#define CX18_DEBUG_IRQ_DEV(dev, fmt, args...) \
222 CX18_DEBUG_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
223
224#define CX18_DEBUG_HIGH_VOL_DEV(x, dev, type, fmt, args...) \
225 do { \
226 if (((x) & cx18_debug) && (cx18_debug & CX18_DBGFLG_HIGHVOL)) \
227 v4l2_info(dev, " " type ": " fmt , ## args); \
228 } while (0)
229#define CX18_DEBUG_HI_WARN_DEV(dev, fmt, args...) \
230 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_WARN, dev, "warning", fmt , ## args)
231#define CX18_DEBUG_HI_INFO_DEV(dev, fmt, args...) \
232 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_INFO, dev, "info", fmt , ## args)
233#define CX18_DEBUG_HI_API_DEV(dev, fmt, args...) \
234 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_API, dev, "api", fmt , ## args)
235#define CX18_DEBUG_HI_DMA_DEV(dev, fmt, args...) \
236 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_DMA, dev, "dma", fmt , ## args)
237#define CX18_DEBUG_HI_IOCTL_DEV(dev, fmt, args...) \
238 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IOCTL, dev, "ioctl", fmt , ## args)
239#define CX18_DEBUG_HI_FILE_DEV(dev, fmt, args...) \
240 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_FILE, dev, "file", fmt , ## args)
241#define CX18_DEBUG_HI_I2C_DEV(dev, fmt, args...) \
242 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_I2C, dev, "i2c", fmt , ## args)
243#define CX18_DEBUG_HI_IRQ_DEV(dev, fmt, args...) \
244 CX18_DEBUG_HIGH_VOL_DEV(CX18_DBGFLG_IRQ, dev, "irq", fmt , ## args)
245
246#define CX18_ERR_DEV(dev, fmt, args...) v4l2_err(dev, fmt , ## args)
247#define CX18_WARN_DEV(dev, fmt, args...) v4l2_warn(dev, fmt , ## args)
248#define CX18_INFO_DEV(dev, fmt, args...) v4l2_info(dev, fmt , ## args)
249
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250extern int cx18_debug;
251
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252struct cx18_options {
253 int megabytes[CX18_MAX_STREAMS]; /* Size in megabytes of each stream */
254 int cardtype; /* force card type on load */
255 int tuner; /* set tuner on load */
256 int radio; /* enable/disable radio */
257};
258
52fcb3ec 259/* per-mdl bit flags */
39c1cb2b 260#define CX18_F_M_NEED_SWAP 0 /* mdl buffer data must be endianness swapped */
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261
262/* per-stream, s_flags */
263#define CX18_F_S_CLAIMED 3 /* this stream is claimed */
264#define CX18_F_S_STREAMING 4 /* the fw is decoding/encoding this stream */
265#define CX18_F_S_INTERNAL_USE 5 /* this stream is used internally (sliced VBI processing) */
266#define CX18_F_S_STREAMOFF 7 /* signal end of stream EOS */
267#define CX18_F_S_APPL_IO 8 /* this stream is used read/written by an application */
87116159 268#define CX18_F_S_STOPPING 9 /* telling the fw to stop capturing */
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269
270/* per-cx18, i_flags */
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271#define CX18_F_I_LOADED_FW 0 /* Loaded firmware 1st time */
272#define CX18_F_I_EOS 4 /* End of encoder stream */
273#define CX18_F_I_RADIO_USER 5 /* radio tuner is selected */
274#define CX18_F_I_ENC_PAUSED 13 /* the encoder is paused */
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275#define CX18_F_I_INITED 21 /* set after first open */
276#define CX18_F_I_FAILED 22 /* set if first open failed */
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277
278/* These are the VBI types as they appear in the embedded VBI private packets. */
279#define CX18_SLICED_TYPE_TELETEXT_B (1)
280#define CX18_SLICED_TYPE_CAPTION_525 (4)
281#define CX18_SLICED_TYPE_WSS_625 (5)
282#define CX18_SLICED_TYPE_VPS (7)
283
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284/**
285 * list_entry_is_past_end - check if a previous loop cursor is off list end
286 * @pos: the type * previously used as a loop cursor.
287 * @head: the head for your list.
3943f42c 288 * @member: the name of the list_head within the struct.
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289 *
290 * Check if the entry's list_head is the head of the list, thus it's not a
291 * real entry but was the loop cursor that walked past the end
292 */
293#define list_entry_is_past_end(pos, head, member) \
294 (&pos->member == (head))
295
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296struct cx18_buffer {
297 struct list_head list;
298 dma_addr_t dma_handle;
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299 char *buf;
300
301 u32 bytesused;
302 u32 readpos;
303};
304
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305struct cx18_mdl {
306 struct list_head list;
307 u32 id; /* index into cx->scb->cpu_mdl[] of 1st cx18_mdl_ent */
308
309 unsigned int skipped;
310 unsigned long m_flags;
311
312 struct list_head buf_list;
313 struct cx18_buffer *curr_buf; /* current buffer in list for reading */
314
315 u32 bytesused;
316 u32 readpos;
317};
318
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319struct cx18_queue {
320 struct list_head list;
c37b11bf 321 atomic_t depth;
1c1e45d1 322 u32 bytesused;
40c5520f 323 spinlock_t lock;
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324};
325
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326struct cx18_stream; /* forward reference */
327
1c1e45d1 328struct cx18_dvb {
754f9969 329 struct cx18_stream *stream;
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330 struct dmx_frontend hw_frontend;
331 struct dmx_frontend mem_frontend;
332 struct dmxdev dmxdev;
333 struct dvb_adapter dvb_adapter;
334 struct dvb_demux demux;
335 struct dvb_frontend *fe;
336 struct dvb_net dvbnet;
337 int enabled;
338 int feeding;
1c1e45d1 339 struct mutex feedlock;
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340};
341
342struct cx18; /* forward reference */
343struct cx18_scb; /* forward reference */
344
72a4f808 345
ee2d64f5 346#define CX18_MAX_MDL_ACKS 2
deed75ed 347#define CX18_MAX_IN_WORK_ORDERS (CX18_MAX_FW_MDLS_PER_STREAM + 7)
0ef02892 348/* CPU_DE_RELEASE_MDL can burst CX18_MAX_FW_MDLS_PER_STREAM orders in a group */
ee2d64f5 349
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350#define CX18_F_EWO_MB_STALE_UPON_RECEIPT 0x1
351#define CX18_F_EWO_MB_STALE_WHILE_PROC 0x2
352#define CX18_F_EWO_MB_STALE \
353 (CX18_F_EWO_MB_STALE_UPON_RECEIPT | CX18_F_EWO_MB_STALE_WHILE_PROC)
354
deed75ed 355struct cx18_in_work_order {
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356 struct work_struct work;
357 atomic_t pending;
358 struct cx18 *cx;
72a4f808 359 unsigned long flags;
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360 int rpu;
361 struct cx18_mailbox mb;
362 struct cx18_mdl_ack mdl_ack[CX18_MAX_MDL_ACKS];
363 char *str;
364};
365
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366#define CX18_INVALID_TASK_HANDLE 0xffffffff
367
1c1e45d1 368struct cx18_stream {
754f9969 369 /* These first five fields are always set, even if the stream
1c1e45d1 370 is not actually created. */
08569d64 371 struct video_device video_dev; /* v4l2_dev is NULL when stream not created */
754f9969 372 struct cx18_dvb *dvb; /* DVB / Digital Transport */
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373 struct cx18 *cx; /* for ease of use */
374 const char *name; /* name of the stream */
375 int type; /* stream type */
376 u32 handle; /* task handle */
dfdf780b 377 u32 v4l2_dev_caps; /* device capabilities */
fa655dda 378 unsigned int mdl_base_idx;
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379
380 u32 id;
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381 unsigned long s_flags; /* status flags, see above */
382 int dma; /* can be PCI_DMA_TODEVICE,
383 PCI_DMA_FROMDEVICE or
384 PCI_DMA_NONE */
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385 wait_queue_head_t waitq;
386
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387 /* Buffers */
388 struct list_head buf_pool; /* buffers not attached to an MDL */
389 u32 buffers; /* total buffers owned by this stream */
390 u32 buf_size; /* size in bytes of a single buffer */
391
392 /* MDL sizes - all stream MDLs are the same size */
393 u32 bufs_per_mdl;
394 u32 mdl_size; /* total bytes in all buffers in a mdl */
1c1e45d1 395
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396 /* MDL Queues */
397 struct cx18_queue q_free; /* free - in rotation, not committed */
398 struct cx18_queue q_busy; /* busy - in use by firmware */
399 struct cx18_queue q_full; /* full - data for user apps */
400 struct cx18_queue q_idle; /* idle - not in rotation */
1c1e45d1 401
21a278b8 402 struct work_struct out_work_order;
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403
404 /* Videobuf for YUV video */
405 u32 pixelformat;
09fc9802 406 u32 vb_bytes_per_frame;
48ab45ad 407 u32 vb_bytes_per_line;
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408 struct list_head vb_capture; /* video capture queue */
409 spinlock_t vb_lock;
b7101de3 410 struct timer_list vb_timeout;
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411
412 struct videobuf_queue vbuf_q;
413 spinlock_t vbuf_q_lock; /* Protect vbuf_q */
414 enum v4l2_buf_type vb_type;
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415};
416
417struct cx18_videobuf_buffer {
418 /* Common video buffer sub-system struct */
419 struct videobuf_buffer vb;
420 v4l2_std_id tvnorm; /* selected tv norm */
421 u32 bytes_used;
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422};
423
424struct cx18_open_id {
0b5f265a 425 struct v4l2_fh fh;
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426 u32 open_id;
427 int type;
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428 struct cx18 *cx;
429};
430
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431static inline struct cx18_open_id *fh2id(struct v4l2_fh *fh)
432{
433 return container_of(fh, struct cx18_open_id, fh);
434}
435
436static inline struct cx18_open_id *file2id(struct file *file)
437{
438 return fh2id(file->private_data);
439}
440
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441/* forward declaration of struct defined in cx18-cards.h */
442struct cx18_card;
443
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444/*
445 * A note about "sliced" VBI data as implemented in this driver:
446 *
447 * Currently we collect the sliced VBI in the form of Ancillary Data
448 * packets, inserted by the AV core decoder/digitizer/slicer in the
449 * horizontal blanking region of the VBI lines, in "raw" mode as far as
450 * the Encoder is concerned. We don't ever tell the Encoder itself
451 * to provide sliced VBI. (AV Core: sliced mode - Encoder: raw mode)
452 *
453 * We then process the ancillary data ourselves to send the sliced data
454 * to the user application directly or build up MPEG-2 private stream 1
455 * packets to splice into (only!) MPEG-2 PS streams for the user app.
456 *
457 * (That's how ivtv essentially does it.)
458 *
459 * The Encoder should be able to extract certain sliced VBI data for
460 * us and provide it in a separate stream or splice it into any type of
461 * MPEG PS or TS stream, but this isn't implemented yet.
462 */
463
464/*
465 * Number of "raw" VBI samples per horizontal line we tell the Encoder to
466 * grab from the decoder/digitizer/slicer output for raw or sliced VBI.
467 * It depends on the pixel clock and the horiz rate:
468 *
469 * (1/Fh)*(2*Fp) = Samples/line
470 * = 4 bytes EAV + Anc data in hblank + 4 bytes SAV + active samples
471 *
472 * Sliced VBI data is sent as ancillary data during horizontal blanking
473 * Raw VBI is sent as active video samples during vertcal blanking
474 *
475 * We use a BT.656 pxiel clock of 13.5 MHz and a BT.656 active line
476 * length of 720 pixels @ 4:2:2 sampling. Thus...
477 *
478 * For systems that use a 15.734 kHz horizontal rate, such as
479 * NTSC-M, PAL-M, PAL-60, and other 60 Hz/525 line systems, we have:
480 *
481 * (1/15.734 kHz) * 2 * 13.5 MHz = 1716 samples/line =
482 * 4 bytes SAV + 268 bytes anc data + 4 bytes SAV + 1440 active samples
483 *
484 * For systems that use a 15.625 kHz horizontal rate, such as
485 * PAL-B/G/H, PAL-I, SECAM-L and other 50 Hz/625 line systems, we have:
486 *
487 * (1/15.625 kHz) * 2 * 13.5 MHz = 1728 samples/line =
488 * 4 bytes SAV + 280 bytes anc data + 4 bytes SAV + 1440 active samples
489 */
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490#define VBI_ACTIVE_SAMPLES 1444 /* 4 byte SAV + 720 Y + 720 U/V */
491#define VBI_HBLANK_SAMPLES_60HZ 272 /* 4 byte EAV + 268 anc/fill */
492#define VBI_HBLANK_SAMPLES_50HZ 284 /* 4 byte EAV + 280 anc/fill */
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493
494#define CX18_VBI_FRAMES 32
495
1c1e45d1 496struct vbi_info {
302df970 497 /* Current state of v4l2 VBI settings for this device */
1c1e45d1 498 struct v4l2_format in;
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499 struct v4l2_sliced_vbi_format *sliced_in; /* pointer to in.fmt.sliced */
500 u32 count; /* Count of VBI data lines: 60 Hz: 12 or 50 Hz: 18 */
501 u32 start[2]; /* First VBI data line per field: 10 & 273 or 6 & 318 */
1c1e45d1 502
302df970 503 u32 frame; /* Count of VBI buffers/frames received from Encoder */
1c1e45d1 504
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505 /*
506 * Vars for creation and insertion of MPEG Private Stream 1 packets
507 * of sliced VBI data into an MPEG PS
508 */
1c1e45d1 509
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510 /* Boolean: create and insert Private Stream 1 packets into the PS */
511 int insert_mpeg;
512
513 /*
514 * Buffer for the maximum of 2 * 18 * packet_size sliced VBI lines.
515 * Used in cx18-vbi.c only for collecting sliced data, and as a source
516 * during conversion of sliced VBI data into MPEG Priv Stream 1 packets.
517 * We don't need to save state here, but the array may have been a bit
518 * too big (2304 bytes) to alloc from the stack.
519 */
520 struct v4l2_sliced_vbi_data sliced_data[36];
1c1e45d1 521
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522 /*
523 * A ring buffer of driver-generated MPEG-2 PS
524 * Program Pack/Private Stream 1 packets for sliced VBI data insertion
525 * into the MPEG PS stream.
526 *
527 * In each sliced_mpeg_data[] buffer is:
528 * 16 byte MPEG-2 PS Program Pack Header
529 * 16 byte MPEG-2 Private Stream 1 PES Header
530 * 4 byte magic number: "itv0" or "ITV0"
531 * 4 byte first field line mask, if "itv0"
532 * 4 byte second field line mask, if "itv0"
533 * 36 lines, if "ITV0"; or <36 lines, if "itv0"; of sliced VBI data
534 *
535 * Each line in the payload is
536 * 1 byte line header derived from the SDID (WSS, CC, VPS, etc.)
537 * 42 bytes of line data
538 *
539 * That's a maximum 1552 bytes of payload in the Private Stream 1 packet
540 * which is the payload size a PVR-350 (CX23415) MPEG decoder will
541 * accept for VBI data. So, including the headers, it's a maximum 1584
542 * bytes total.
543 */
544#define CX18_SLICED_MPEG_DATA_MAXSZ 1584
545 /* copy_vbi_buf() needs 8 temp bytes on the end for the worst case */
546#define CX18_SLICED_MPEG_DATA_BUFSZ (CX18_SLICED_MPEG_DATA_MAXSZ+8)
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547 u8 *sliced_mpeg_data[CX18_VBI_FRAMES];
548 u32 sliced_mpeg_size[CX18_VBI_FRAMES];
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549
550 /* Count of Program Pack/Program Stream 1 packets inserted into PS */
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551 u32 inserted_frame;
552
302df970 553 /*
52fcb3ec 554 * A dummy driver stream transfer mdl & buffer with a copy of the next
302df970
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555 * sliced_mpeg_data[] buffer for output to userland apps.
556 * Only used in cx18-fileops.c, but its state needs to persist at times.
557 */
52fcb3ec 558 struct cx18_mdl sliced_mpeg_mdl;
302df970 559 struct cx18_buffer sliced_mpeg_buf;
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560};
561
562/* Per cx23418, per I2C bus private algo callback data */
563struct cx18_i2c_algo_callback_data {
564 struct cx18 *cx;
565 int bus_index; /* 0 or 1 for the cx23418's 1st or 2nd I2C bus */
566};
567
f7823f8f 568#define CX18_MAX_MMIO_WR_RETRIES 10
330c6ec8 569
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570/* Struct to hold info about cx18 cards */
571struct cx18 {
5811cf99 572 int instance;
3d05913d 573 struct pci_dev *pci_dev;
888cdb07 574 struct v4l2_device v4l2_dev;
ff2a2001 575 struct v4l2_subdev *sd_av; /* A/V decoder/digitizer sub-device */
eefe1010 576 struct v4l2_subdev *sd_extmux; /* External multiplexer sub-dev */
888cdb07 577
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578 const struct cx18_card *card; /* card information */
579 const char *card_name; /* full name of the card */
580 const struct cx18_card_tuner_i2c *card_i2c; /* i2c addresses to probe for tuner */
581 u8 is_50hz;
582 u8 is_60hz;
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583 u8 nof_inputs; /* number of video inputs */
584 u8 nof_audio_inputs; /* number of audio inputs */
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585 u32 v4l2_cap; /* V4L2 capabilities of card */
586 u32 hw_flags; /* Hardware description of the board */
fa655dda 587 unsigned int free_mdl_idx;
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588 struct cx18_scb __iomem *scb; /* pointer to SCB */
589 struct mutex epu2apu_mb_lock; /* protect driver to chip mailbox in SCB*/
590 struct mutex epu2cpu_mb_lock; /* protect driver to chip mailbox in SCB*/
591
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592 struct cx18_av_state av_state;
593
594 /* codec settings */
a75b9be1 595 struct cx2341x_handler cxhdl;
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596 u32 filter_mode;
597 u32 temporal_strength;
598 u32 spatial_strength;
599
600 /* dualwatch */
601 unsigned long dualwatch_jiffies;
0d82fe80 602 u32 dualwatch_stereo_mode;
1c1e45d1 603
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604 struct mutex serialize_lock; /* mutex used to serialize open/close/start/stop/ioctl operations */
605 struct cx18_options options; /* User options */
6ecd86dc 606 int stream_buffers[CX18_MAX_STREAMS]; /* # of buffers for each stream */
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607 int stream_buf_size[CX18_MAX_STREAMS]; /* Stream buffer size */
608 struct cx18_stream streams[CX18_MAX_STREAMS]; /* Stream data */
9722c8f9 609 struct snd_cx18_card *alsa; /* ALSA interface for PCM capture stream */
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610 void (*pcm_announce_callback)(struct snd_cx18_card *card, u8 *pcm_data,
611 size_t num_bytes);
612
1c1e45d1 613 unsigned long i_flags; /* global cx18 flags */
31554ae5
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614 atomic_t ana_capturing; /* count number of active analog capture streams */
615 atomic_t tot_capturing; /* total count number of active capture streams */
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616 int search_pack_header;
617
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618 int open_id; /* incremented each time an open occurs, used as
619 unique ID. Starts at 1, so 0 can be used as
620 uninitialized value in the stream->id. */
621
42d0c3ad 622 resource_size_t base_addr;
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623
624 u8 card_rev;
625 void __iomem *enc_mem, *reg_mem;
626
627 struct vbi_info vbi;
628
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629 u64 mpg_data_received;
630 u64 vbi_data_inserted;
631
632 wait_queue_head_t mb_apu_waitq;
633 wait_queue_head_t mb_cpu_waitq;
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634 wait_queue_head_t cap_w;
635 /* when the current DMA is finished this queue is woken up */
636 wait_queue_head_t dma_waitq;
637
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638 u32 sw1_irq_mask;
639 u32 sw2_irq_mask;
640 u32 hw2_irq_mask;
641
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642 struct workqueue_struct *in_work_queue;
643 char in_workq_name[11]; /* "cx18-NN-in" */
644 struct cx18_in_work_order in_work_order[CX18_MAX_IN_WORK_ORDERS];
ee2d64f5 645 char epu_debug_str[256]; /* CX18_EPU_DEBUG is rare: use shared space */
1d6782bd 646
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647 /* i2c */
648 struct i2c_adapter i2c_adap[2];
649 struct i2c_algo_bit_data i2c_algo[2];
650 struct cx18_i2c_algo_callback_data i2c_algo_cb_data[2];
1c1e45d1 651
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652 struct IR_i2c_init_data ir_i2c_init_data;
653
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654 /* gpio */
655 u32 gpio_dir;
656 u32 gpio_val;
8abdd00d 657 struct mutex gpio_lock;
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658 struct v4l2_subdev sd_gpiomux;
659 struct v4l2_subdev sd_resetctrl;
ba60bc67 660
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661 /* v4l2 and User settings */
662
663 /* codec settings */
664 u32 audio_input;
665 u32 active_input;
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666 v4l2_std_id std;
667 v4l2_std_id tuner_std; /* The norm of the tuner (fixed) */
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668
669 /* Used for cx18-alsa module loading */
670 struct work_struct request_module_wk;
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671};
672
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673static inline struct cx18 *to_cx18(struct v4l2_device *v4l2_dev)
674{
675 return container_of(v4l2_dev, struct cx18, v4l2_dev);
676}
677
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678/* cx18 extensions to be loaded */
679extern int (*cx18_ext_init)(struct cx18 *);
680
1c1e45d1 681/* Globals */
1c1e45d1 682extern int cx18_first_minor;
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683
684/*==============Prototypes==================*/
685
686/* Return non-zero if a signal is pending */
687int cx18_msleep_timeout(unsigned int msecs, int intr);
688
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689/* Read Hauppauge eeprom */
690struct tveeprom; /* forward reference */
691void cx18_read_eeprom(struct cx18 *cx, struct tveeprom *tv);
692
693/* First-open initialization: load firmware, etc. */
694int cx18_init_on_first_open(struct cx18 *cx);
695
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696/* Test if the current VBI mode is raw (1) or sliced (0) */
697static inline int cx18_raw_vbi(const struct cx18 *cx)
698{
699 return cx->vbi.in.type == V4L2_BUF_TYPE_VBI_CAPTURE;
700}
701
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702/* Call the specified callback for all subdevs with a grp_id bit matching the
703 * mask in hw (if 0, then match them all). Ignore any errors. */
6c2d4dd1 704#define cx18_call_hw(cx, hw, o, f, args...) \
fe293011 705 v4l2_device_mask_call_all(&(cx)->v4l2_dev, hw, o, f, ##args)
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706
707#define cx18_call_all(cx, o, f, args...) cx18_call_hw(cx, 0, o, f , ##args)
708
709/* Call the specified callback for all subdevs with a grp_id bit matching the
710 * mask in hw (if 0, then match them all). If the callback returns an error
711 * other than 0 or -ENOIOCTLCMD, then return with that error code. */
6c2d4dd1 712#define cx18_call_hw_err(cx, hw, o, f, args...) \
fe293011 713 v4l2_device_mask_call_until_err(&(cx)->v4l2_dev, hw, o, f, ##args)
ff2a2001
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714
715#define cx18_call_all_err(cx, o, f, args...) \
716 cx18_call_hw_err(cx, 0, o, f , ##args)
717
1c1e45d1 718#endif /* CX18_DRIVER_H */