]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Device driver for GPIO attached remote control interfaces | |
4 | * on Conexant 2388x based TV/DVB cards. | |
5 | * | |
6 | * Copyright (c) 2003 Pavel Machek | |
7 | * Copyright (c) 2004 Gerd Knorr | |
fc40b261 | 8 | * Copyright (c) 2004, 2005 Chris Pascoe |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
19 | * | |
20 | * You should have received a copy of the GNU General Public License | |
21 | * along with this program; if not, write to the Free Software | |
22 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
23 | */ | |
24 | ||
25 | #include <linux/init.h> | |
3c1c48bb | 26 | #include <linux/hrtimer.h> |
1da177e4 | 27 | #include <linux/pci.h> |
5a0e3ad6 | 28 | #include <linux/slab.h> |
1da177e4 | 29 | #include <linux/module.h> |
1da177e4 | 30 | |
1da177e4 | 31 | #include "cx88.h" |
6bda9644 | 32 | #include <media/rc-core.h> |
1da177e4 | 33 | |
727e625c MCC |
34 | #define MODULE_NAME "cx88xx" |
35 | ||
1da177e4 LT |
36 | /* ---------------------------------------------------------------------- */ |
37 | ||
1da177e4 | 38 | struct cx88_IR { |
41ef7c1e | 39 | struct cx88_core *core; |
d8b4b582 | 40 | struct rc_dev *dev; |
92f4fc10 MCC |
41 | |
42 | int users; | |
43 | ||
41ef7c1e MCC |
44 | char name[32]; |
45 | char phys[32]; | |
1da177e4 LT |
46 | |
47 | /* sample from gpio pin 16 */ | |
fc40b261 | 48 | u32 sampling; |
1da177e4 LT |
49 | |
50 | /* poll external decoder */ | |
41ef7c1e | 51 | int polling; |
3c1c48bb | 52 | struct hrtimer timer; |
41ef7c1e MCC |
53 | u32 gpio_addr; |
54 | u32 last_gpio; | |
55 | u32 mask_keycode; | |
56 | u32 mask_keydown; | |
57 | u32 mask_keyup; | |
1da177e4 LT |
58 | }; |
59 | ||
2997137b DH |
60 | static unsigned ir_samplerate = 4; |
61 | module_param(ir_samplerate, uint, 0444); | |
62 | MODULE_PARM_DESC(ir_samplerate, "IR samplerate in kHz, 1 - 20, default 4"); | |
63 | ||
ff699e6b | 64 | static int ir_debug; |
41ef7c1e | 65 | module_param(ir_debug, int, 0644); /* debug level [IR] */ |
1da177e4 LT |
66 | MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]"); |
67 | ||
68 | #define ir_dprintk(fmt, arg...) if (ir_debug) \ | |
e52e98a7 | 69 | printk(KERN_DEBUG "%s IR: " fmt , ir->core->name , ##arg) |
1da177e4 | 70 | |
1c0eb0ff MCC |
71 | #define dprintk(fmt, arg...) if (ir_debug) \ |
72 | printk(KERN_DEBUG "cx88 IR: " fmt , ##arg) | |
73 | ||
1da177e4 LT |
74 | /* ---------------------------------------------------------------------- */ |
75 | ||
76 | static void cx88_ir_handle_key(struct cx88_IR *ir) | |
77 | { | |
78 | struct cx88_core *core = ir->core; | |
680543c5 | 79 | u32 gpio, data, auxgpio; |
1da177e4 LT |
80 | |
81 | /* read gpio value */ | |
82 | gpio = cx_read(ir->gpio_addr); | |
6a59d64c | 83 | switch (core->boardnr) { |
829ea964 | 84 | case CX88_BOARD_NPGTECH_REALTV_TOP10FM: |
680543c5 RC |
85 | /* This board apparently uses a combination of 2 GPIO |
86 | to represent the keys. Additionally, the second GPIO | |
87 | can be used for parity. | |
88 | ||
89 | Example: | |
90 | ||
91 | for key "5" | |
92 | gpio = 0x758, auxgpio = 0xe5 or 0xf5 | |
93 | for key "Power" | |
94 | gpio = 0x758, auxgpio = 0xed or 0xfd | |
95 | */ | |
96 | ||
97 | auxgpio = cx_read(MO_GP1_IO); | |
98 | /* Take out the parity part */ | |
a62c61d3 | 99 | gpio=(gpio & 0x7fd) + (auxgpio & 0xef); |
829ea964 MK |
100 | break; |
101 | case CX88_BOARD_WINFAST_DTV1000: | |
3047a176 | 102 | case CX88_BOARD_WINFAST_DTV1800H: |
8eb79c0b | 103 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
f271a3af | 104 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: |
3e9a4897 | 105 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
84463d5f IV |
106 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36: |
107 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43: | |
e7d11ecb EP |
108 | gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900); |
109 | auxgpio = gpio; | |
829ea964 MK |
110 | break; |
111 | default: | |
680543c5 | 112 | auxgpio = gpio; |
829ea964 | 113 | } |
1da177e4 | 114 | if (ir->polling) { |
680543c5 | 115 | if (ir->last_gpio == auxgpio) |
1da177e4 | 116 | return; |
680543c5 | 117 | ir->last_gpio = auxgpio; |
1da177e4 LT |
118 | } |
119 | ||
120 | /* extract data */ | |
121 | data = ir_extract_bits(gpio, ir->mask_keycode); | |
122 | ir_dprintk("irq gpio=0x%x code=%d | %s%s%s\n", | |
41ef7c1e MCC |
123 | gpio, data, |
124 | ir->polling ? "poll" : "irq", | |
125 | (gpio & ir->mask_keydown) ? " down" : "", | |
126 | (gpio & ir->mask_keyup) ? " up" : ""); | |
1da177e4 | 127 | |
6a59d64c | 128 | if (ir->core->boardnr == CX88_BOARD_NORWOOD_MICRO) { |
d1009bd7 PN |
129 | u32 gpio_key = cx_read(MO_GP0_IO); |
130 | ||
131 | data = (data << 4) | ((gpio_key & 0xf0) >> 4); | |
132 | ||
ca86674b | 133 | rc_keydown(ir->dev, data, 0); |
d1009bd7 PN |
134 | |
135 | } else if (ir->mask_keydown) { | |
1da177e4 | 136 | /* bit set on keydown */ |
3bbd3f2d | 137 | if (gpio & ir->mask_keydown) |
ca86674b | 138 | rc_keydown_notimeout(ir->dev, data, 0); |
62c65031 | 139 | else |
ca86674b | 140 | rc_keyup(ir->dev); |
1da177e4 LT |
141 | |
142 | } else if (ir->mask_keyup) { | |
143 | /* bit cleared on keydown */ | |
3bbd3f2d | 144 | if (0 == (gpio & ir->mask_keyup)) |
ca86674b | 145 | rc_keydown_notimeout(ir->dev, data, 0); |
62c65031 | 146 | else |
ca86674b | 147 | rc_keyup(ir->dev); |
1da177e4 LT |
148 | |
149 | } else { | |
150 | /* can't distinguish keydown/up :-/ */ | |
ca86674b MCC |
151 | rc_keydown_notimeout(ir->dev, data, 0); |
152 | rc_keyup(ir->dev); | |
1da177e4 LT |
153 | } |
154 | } | |
155 | ||
3c1c48bb | 156 | static enum hrtimer_restart cx88_ir_work(struct hrtimer *timer) |
1da177e4 | 157 | { |
3c1c48bb AH |
158 | unsigned long missed; |
159 | struct cx88_IR *ir = container_of(timer, struct cx88_IR, timer); | |
1da177e4 LT |
160 | |
161 | cx88_ir_handle_key(ir); | |
3c1c48bb AH |
162 | missed = hrtimer_forward_now(&ir->timer, |
163 | ktime_set(0, ir->polling * 1000000)); | |
164 | if (missed > 1) | |
165 | ir_dprintk("Missed ticks %ld\n", missed - 1); | |
166 | ||
167 | return HRTIMER_RESTART; | |
1da177e4 LT |
168 | } |
169 | ||
92f4fc10 | 170 | static int __cx88_ir_start(void *priv) |
b07b4783 | 171 | { |
92f4fc10 MCC |
172 | struct cx88_core *core = priv; |
173 | struct cx88_IR *ir; | |
174 | ||
175 | if (!core || !core->ir) | |
176 | return -EINVAL; | |
177 | ||
178 | ir = core->ir; | |
179 | ||
b07b4783 | 180 | if (ir->polling) { |
3c1c48bb AH |
181 | hrtimer_init(&ir->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
182 | ir->timer.function = cx88_ir_work; | |
183 | hrtimer_start(&ir->timer, | |
184 | ktime_set(0, ir->polling * 1000000), | |
185 | HRTIMER_MODE_REL); | |
b07b4783 DT |
186 | } |
187 | if (ir->sampling) { | |
8ddac9ee | 188 | core->pci_irqmask |= PCI_INT_IR_SMPINT; |
2997137b DH |
189 | cx_write(MO_DDS_IO, 0x33F286 * ir_samplerate); /* samplerate */ |
190 | cx_write(MO_DDSCFG_IO, 0x5); /* enable */ | |
b07b4783 | 191 | } |
92f4fc10 | 192 | return 0; |
b07b4783 DT |
193 | } |
194 | ||
92f4fc10 | 195 | static void __cx88_ir_stop(void *priv) |
b07b4783 | 196 | { |
92f4fc10 MCC |
197 | struct cx88_core *core = priv; |
198 | struct cx88_IR *ir; | |
199 | ||
200 | if (!core || !core->ir) | |
201 | return; | |
202 | ||
203 | ir = core->ir; | |
b07b4783 DT |
204 | if (ir->sampling) { |
205 | cx_write(MO_DDSCFG_IO, 0x0); | |
8ddac9ee | 206 | core->pci_irqmask &= ~PCI_INT_IR_SMPINT; |
b07b4783 DT |
207 | } |
208 | ||
569b7ec7 | 209 | if (ir->polling) |
3c1c48bb | 210 | hrtimer_cancel(&ir->timer); |
b07b4783 DT |
211 | } |
212 | ||
92f4fc10 MCC |
213 | int cx88_ir_start(struct cx88_core *core) |
214 | { | |
215 | if (core->ir->users) | |
216 | return __cx88_ir_start(core); | |
217 | ||
218 | return 0; | |
219 | } | |
220 | ||
221 | void cx88_ir_stop(struct cx88_core *core) | |
222 | { | |
223 | if (core->ir->users) | |
224 | __cx88_ir_stop(core); | |
225 | } | |
226 | ||
d8b4b582 | 227 | static int cx88_ir_open(struct rc_dev *rc) |
92f4fc10 | 228 | { |
d8b4b582 | 229 | struct cx88_core *core = rc->priv; |
92f4fc10 MCC |
230 | |
231 | core->ir->users++; | |
232 | return __cx88_ir_start(core); | |
233 | } | |
234 | ||
d8b4b582 | 235 | static void cx88_ir_close(struct rc_dev *rc) |
92f4fc10 | 236 | { |
d8b4b582 | 237 | struct cx88_core *core = rc->priv; |
92f4fc10 MCC |
238 | |
239 | core->ir->users--; | |
240 | if (!core->ir->users) | |
241 | __cx88_ir_stop(core); | |
242 | } | |
243 | ||
1da177e4 LT |
244 | /* ---------------------------------------------------------------------- */ |
245 | ||
246 | int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) | |
247 | { | |
248 | struct cx88_IR *ir; | |
d8b4b582 | 249 | struct rc_dev *dev; |
02858eed | 250 | char *ir_codes = NULL; |
c003ab1b | 251 | u64 rc_type = RC_BIT_OTHER; |
b07b4783 | 252 | int err = -ENOMEM; |
9dfe4e83 MCC |
253 | u32 hardware_mask = 0; /* For devices with a hardware mask, when |
254 | * used with a full-code IR table | |
255 | */ | |
1da177e4 | 256 | |
b7df3910 | 257 | ir = kzalloc(sizeof(*ir), GFP_KERNEL); |
d8b4b582 DH |
258 | dev = rc_allocate_device(); |
259 | if (!ir || !dev) | |
b07b4783 | 260 | goto err_out_free; |
b7df3910 | 261 | |
d8b4b582 | 262 | ir->dev = dev; |
1da177e4 LT |
263 | |
264 | /* detect & configure */ | |
6a59d64c | 265 | switch (core->boardnr) { |
1da177e4 | 266 | case CX88_BOARD_DNTV_LIVE_DVB_T: |
b45009b0 | 267 | case CX88_BOARD_KWORLD_DVB_T: |
28ecc449 | 268 | case CX88_BOARD_KWORLD_DVB_T_CX22702: |
02858eed | 269 | ir_codes = RC_MAP_DNTV_LIVE_DVB_T; |
41ef7c1e | 270 | ir->gpio_addr = MO_GP1_IO; |
1da177e4 | 271 | ir->mask_keycode = 0x1f; |
41ef7c1e MCC |
272 | ir->mask_keyup = 0x60; |
273 | ir->polling = 50; /* ms */ | |
1da177e4 | 274 | break; |
e52e98a7 | 275 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: |
02858eed | 276 | ir_codes = RC_MAP_CINERGY_1400; |
fc40b261 | 277 | ir->sampling = 0xeb04; /* address */ |
e52e98a7 | 278 | break; |
1da177e4 LT |
279 | case CX88_BOARD_HAUPPAUGE: |
280 | case CX88_BOARD_HAUPPAUGE_DVB_T1: | |
fb56cb65 ST |
281 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
282 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: | |
611900c1 | 283 | case CX88_BOARD_HAUPPAUGE_HVR1100: |
76dc82ab | 284 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
5bd1b663 ST |
285 | case CX88_BOARD_HAUPPAUGE_HVR4000: |
286 | case CX88_BOARD_HAUPPAUGE_HVR4000LITE: | |
f1735bb2 EB |
287 | case CX88_BOARD_PCHDTV_HD3000: |
288 | case CX88_BOARD_PCHDTV_HD5500: | |
501d8cd4 | 289 | case CX88_BOARD_HAUPPAUGE_IRONLY: |
af86ce79 | 290 | ir_codes = RC_MAP_HAUPPAUGE; |
41ef7c1e | 291 | ir->sampling = 1; |
1da177e4 | 292 | break; |
2de873e6 | 293 | case CX88_BOARD_WINFAST_DTV2000H: |
4d14c833 | 294 | case CX88_BOARD_WINFAST_DTV2000H_J: |
3047a176 | 295 | case CX88_BOARD_WINFAST_DTV1800H: |
8eb79c0b | 296 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
f271a3af | 297 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: |
02858eed | 298 | ir_codes = RC_MAP_WINFAST; |
41ef7c1e | 299 | ir->gpio_addr = MO_GP0_IO; |
1da177e4 | 300 | ir->mask_keycode = 0x8f8; |
41ef7c1e | 301 | ir->mask_keyup = 0x100; |
2de873e6 | 302 | ir->polling = 50; /* ms */ |
1da177e4 | 303 | break; |
ff97d93d | 304 | case CX88_BOARD_WINFAST2000XP_EXPERT: |
e7d11ecb | 305 | case CX88_BOARD_WINFAST_DTV1000: |
3e9a4897 | 306 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
84463d5f IV |
307 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36: |
308 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43: | |
02858eed | 309 | ir_codes = RC_MAP_WINFAST; |
ff97d93d HP |
310 | ir->gpio_addr = MO_GP0_IO; |
311 | ir->mask_keycode = 0x8f8; | |
312 | ir->mask_keyup = 0x100; | |
313 | ir->polling = 1; /* ms */ | |
314 | break; | |
1da177e4 | 315 | case CX88_BOARD_IODATA_GVBCTV7E: |
02858eed | 316 | ir_codes = RC_MAP_IODATA_BCTV7E; |
41ef7c1e | 317 | ir->gpio_addr = MO_GP0_IO; |
1da177e4 LT |
318 | ir->mask_keycode = 0xfd; |
319 | ir->mask_keydown = 0x02; | |
41ef7c1e | 320 | ir->polling = 5; /* ms */ |
1da177e4 | 321 | break; |
ff97d93d | 322 | case CX88_BOARD_PROLINK_PLAYTVPVR: |
239df2e2 | 323 | case CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO: |
9dfe4e83 MCC |
324 | /* |
325 | * It seems that this hardware is paired with NEC extended | |
326 | * address 0x866b. So, unfortunately, its usage with other | |
327 | * IR's with different address won't work. Still, there are | |
328 | * other IR's from the same manufacturer that works, like the | |
329 | * 002-T mini RC, provided with newer PV hardware | |
330 | */ | |
331 | ir_codes = RC_MAP_PIXELVIEW_MK12; | |
41ef7c1e | 332 | ir->gpio_addr = MO_GP1_IO; |
41ef7c1e | 333 | ir->mask_keyup = 0x80; |
26d5683d | 334 | ir->polling = 10; /* ms */ |
9dfe4e83 | 335 | hardware_mask = 0x3f; /* Hardware returns only 6 bits from command part */ |
239df2e2 | 336 | break; |
7f0dd179 | 337 | case CX88_BOARD_PROLINK_PV_8000GT: |
a31d2bb7 | 338 | case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME: |
02858eed | 339 | ir_codes = RC_MAP_PIXELVIEW_NEW; |
7f0dd179 MCC |
340 | ir->gpio_addr = MO_GP1_IO; |
341 | ir->mask_keycode = 0x3f; | |
342 | ir->mask_keyup = 0x80; | |
343 | ir->polling = 1; /* ms */ | |
344 | break; | |
b639f9d2 | 345 | case CX88_BOARD_KWORLD_LTV883: |
02858eed | 346 | ir_codes = RC_MAP_PIXELVIEW; |
b639f9d2 NS |
347 | ir->gpio_addr = MO_GP1_IO; |
348 | ir->mask_keycode = 0x1f; | |
349 | ir->mask_keyup = 0x60; | |
350 | ir->polling = 1; /* ms */ | |
351 | break; | |
a82decf6 | 352 | case CX88_BOARD_ADSTECH_DVB_T_PCI: |
02858eed | 353 | ir_codes = RC_MAP_ADSTECH_DVB_T_PCI; |
41ef7c1e | 354 | ir->gpio_addr = MO_GP1_IO; |
a82decf6 | 355 | ir->mask_keycode = 0xbf; |
41ef7c1e MCC |
356 | ir->mask_keyup = 0x40; |
357 | ir->polling = 50; /* ms */ | |
358 | break; | |
359 | case CX88_BOARD_MSI_TVANYWHERE_MASTER: | |
02858eed | 360 | ir_codes = RC_MAP_MSI_TVANYWHERE; |
41ef7c1e MCC |
361 | ir->gpio_addr = MO_GP1_IO; |
362 | ir->mask_keycode = 0x1f; | |
363 | ir->mask_keyup = 0x40; | |
364 | ir->polling = 1; /* ms */ | |
a82decf6 | 365 | break; |
899ad11b | 366 | case CX88_BOARD_AVERTV_303: |
565f4949 | 367 | case CX88_BOARD_AVERTV_STUDIO_303: |
02858eed | 368 | ir_codes = RC_MAP_AVERTV_303; |
899ad11b GG |
369 | ir->gpio_addr = MO_GP2_IO; |
370 | ir->mask_keycode = 0xfb; | |
371 | ir->mask_keydown = 0x02; | |
372 | ir->polling = 50; /* ms */ | |
373 | break; | |
d8d86225 IL |
374 | case CX88_BOARD_OMICOM_SS4_PCI: |
375 | case CX88_BOARD_SATTRADE_ST4200: | |
376 | case CX88_BOARD_TBS_8920: | |
377 | case CX88_BOARD_TBS_8910: | |
378 | case CX88_BOARD_PROF_7300: | |
b699c271 | 379 | case CX88_BOARD_PROF_7301: |
d8d86225 | 380 | case CX88_BOARD_PROF_6200: |
02858eed | 381 | ir_codes = RC_MAP_TBS_NEC; |
d8d86225 IL |
382 | ir->sampling = 0xff00; /* address */ |
383 | break; | |
0cb73639 | 384 | case CX88_BOARD_TEVII_S464: |
d8d86225 IL |
385 | case CX88_BOARD_TEVII_S460: |
386 | case CX88_BOARD_TEVII_S420: | |
02858eed | 387 | ir_codes = RC_MAP_TEVII_NEC; |
d8d86225 IL |
388 | ir->sampling = 0xff00; /* address */ |
389 | break; | |
fc40b261 | 390 | case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: |
02858eed | 391 | ir_codes = RC_MAP_DNTV_LIVE_DVBT_PRO; |
715a2233 | 392 | ir->sampling = 0xff00; /* address */ |
fc40b261 | 393 | break; |
d1009bd7 | 394 | case CX88_BOARD_NORWOOD_MICRO: |
02858eed | 395 | ir_codes = RC_MAP_NORWOOD; |
d1009bd7 PN |
396 | ir->gpio_addr = MO_GP1_IO; |
397 | ir->mask_keycode = 0x0e; | |
398 | ir->mask_keyup = 0x80; | |
399 | ir->polling = 50; /* ms */ | |
400 | break; | |
be4f4519 | 401 | case CX88_BOARD_NPGTECH_REALTV_TOP10FM: |
02858eed | 402 | ir_codes = RC_MAP_NPGTECH; |
715a2233 | 403 | ir->gpio_addr = MO_GP0_IO; |
680543c5 | 404 | ir->mask_keycode = 0xfa; |
715a2233 | 405 | ir->polling = 50; /* ms */ |
680543c5 | 406 | break; |
9121106a | 407 | case CX88_BOARD_PINNACLE_PCTV_HD_800i: |
02858eed | 408 | ir_codes = RC_MAP_PINNACLE_PCTV_HD; |
715a2233 | 409 | ir->sampling = 1; |
9121106a | 410 | break; |
ba928034 | 411 | case CX88_BOARD_POWERCOLOR_REAL_ANGEL: |
02858eed | 412 | ir_codes = RC_MAP_POWERCOLOR_REAL_ANGEL; |
715a2233 | 413 | ir->gpio_addr = MO_GP2_IO; |
ba928034 | 414 | ir->mask_keycode = 0x7e; |
715a2233 | 415 | ir->polling = 100; /* ms */ |
ba928034 | 416 | break; |
111ac84a SI |
417 | case CX88_BOARD_TWINHAN_VP1027_DVBS: |
418 | ir_codes = RC_MAP_TWINHAN_VP1027_DVBS; | |
c003ab1b | 419 | rc_type = RC_BIT_NEC; |
111ac84a SI |
420 | ir->sampling = 0xff00; /* address */ |
421 | break; | |
1da177e4 | 422 | } |
b45009b0 | 423 | |
2997137b | 424 | if (!ir_codes) { |
b07b4783 DT |
425 | err = -ENODEV; |
426 | goto err_out_free; | |
1da177e4 LT |
427 | } |
428 | ||
9dfe4e83 MCC |
429 | /* |
430 | * The usage of mask_keycode were very convenient, due to several | |
431 | * reasons. Among others, the scancode tables were using the scancode | |
432 | * as the index elements. So, the less bits it was used, the smaller | |
433 | * the table were stored. After the input changes, the better is to use | |
434 | * the full scancodes, since it allows replacing the IR remote by | |
435 | * another one. Unfortunately, there are still some hardware, like | |
436 | * Pixelview Ultra Pro, where only part of the scancode is sent via | |
437 | * GPIO. So, there's no way to get the full scancode. Due to that, | |
438 | * hardware_mask were introduced here: it represents those hardware | |
439 | * that has such limits. | |
440 | */ | |
441 | if (hardware_mask && !ir->mask_keycode) | |
442 | ir->mask_keycode = hardware_mask; | |
443 | ||
1da177e4 | 444 | /* init input device */ |
6a59d64c | 445 | snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name); |
41ef7c1e | 446 | snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci)); |
1da177e4 | 447 | |
d8b4b582 DH |
448 | dev->input_name = ir->name; |
449 | dev->input_phys = ir->phys; | |
450 | dev->input_id.bustype = BUS_PCI; | |
451 | dev->input_id.version = 1; | |
1da177e4 | 452 | if (pci->subsystem_vendor) { |
d8b4b582 DH |
453 | dev->input_id.vendor = pci->subsystem_vendor; |
454 | dev->input_id.product = pci->subsystem_device; | |
1da177e4 | 455 | } else { |
d8b4b582 DH |
456 | dev->input_id.vendor = pci->vendor; |
457 | dev->input_id.product = pci->device; | |
1da177e4 | 458 | } |
d8b4b582 DH |
459 | dev->dev.parent = &pci->dev; |
460 | dev->map_name = ir_codes; | |
461 | dev->driver_name = MODULE_NAME; | |
462 | dev->priv = core; | |
463 | dev->open = cx88_ir_open; | |
464 | dev->close = cx88_ir_close; | |
465 | dev->scanmask = hardware_mask; | |
1da177e4 | 466 | |
2997137b | 467 | if (ir->sampling) { |
d8b4b582 DH |
468 | dev->driver_type = RC_DRIVER_IR_RAW; |
469 | dev->timeout = 10 * 1000 * 1000; /* 10 ms */ | |
470 | } else { | |
471 | dev->driver_type = RC_DRIVER_SCANCODE; | |
1a1934fa | 472 | rc_set_allowed_protocols(dev, rc_type); |
d8b4b582 DH |
473 | } |
474 | ||
475 | ir->core = core; | |
476 | core->ir = ir; | |
1da177e4 LT |
477 | |
478 | /* all done */ | |
d8b4b582 | 479 | err = rc_register_device(dev); |
b07b4783 | 480 | if (err) |
92f4fc10 | 481 | goto err_out_free; |
1da177e4 LT |
482 | |
483 | return 0; | |
b07b4783 | 484 | |
d8b4b582 DH |
485 | err_out_free: |
486 | rc_free_device(dev); | |
92f4fc10 | 487 | core->ir = NULL; |
b07b4783 DT |
488 | kfree(ir); |
489 | return err; | |
1da177e4 LT |
490 | } |
491 | ||
492 | int cx88_ir_fini(struct cx88_core *core) | |
493 | { | |
494 | struct cx88_IR *ir = core->ir; | |
495 | ||
496 | /* skip detach on non attached boards */ | |
497 | if (NULL == ir) | |
498 | return 0; | |
499 | ||
92f4fc10 | 500 | cx88_ir_stop(core); |
d8b4b582 | 501 | rc_unregister_device(ir->dev); |
1da177e4 LT |
502 | kfree(ir); |
503 | ||
504 | /* done */ | |
505 | core->ir = NULL; | |
506 | return 0; | |
507 | } | |
508 | ||
509 | /* ---------------------------------------------------------------------- */ | |
510 | ||
511 | void cx88_ir_irq(struct cx88_core *core) | |
512 | { | |
513 | struct cx88_IR *ir = core->ir; | |
2997137b DH |
514 | u32 samples; |
515 | unsigned todo, bits; | |
516 | struct ir_raw_event ev; | |
1da177e4 | 517 | |
2997137b | 518 | if (!ir || !ir->sampling) |
1da177e4 LT |
519 | return; |
520 | ||
2997137b DH |
521 | /* |
522 | * Samples are stored in a 32 bit register, oldest sample in | |
523 | * the msb. A set bit represents space and an unset bit | |
524 | * represents a pulse. | |
525 | */ | |
1da177e4 | 526 | samples = cx_read(MO_SAMPLE_IO); |
e52e98a7 | 527 | |
d8b4b582 | 528 | if (samples == 0xff && ir->dev->idle) |
2997137b | 529 | return; |
e52e98a7 | 530 | |
2997137b DH |
531 | init_ir_raw_event(&ev); |
532 | for (todo = 32; todo > 0; todo -= bits) { | |
533 | ev.pulse = samples & 0x80000000 ? false : true; | |
534 | bits = min(todo, 32U - fls(ev.pulse ? samples : ~samples)); | |
2a164d02 | 535 | ev.duration = (bits * (NSEC_PER_SEC / 1000)) / ir_samplerate; |
d8b4b582 | 536 | ir_raw_event_store_with_filter(ir->dev, &ev); |
2997137b | 537 | samples <<= bits; |
1da177e4 | 538 | } |
d8b4b582 | 539 | ir_raw_event_handle(ir->dev); |
1da177e4 LT |
540 | } |
541 | ||
1c0eb0ff MCC |
542 | static int get_key_pvr2000(struct IR_i2c *ir, u32 *ir_key, u32 *ir_raw) |
543 | { | |
544 | int flags, code; | |
545 | ||
546 | /* poll IR chip */ | |
547 | flags = i2c_smbus_read_byte_data(ir->c, 0x10); | |
548 | if (flags < 0) { | |
549 | dprintk("read error\n"); | |
550 | return 0; | |
551 | } | |
552 | /* key pressed ? */ | |
553 | if (0 == (flags & 0x80)) | |
554 | return 0; | |
555 | ||
556 | /* read actual key code */ | |
557 | code = i2c_smbus_read_byte_data(ir->c, 0x00); | |
558 | if (code < 0) { | |
559 | dprintk("read error\n"); | |
560 | return 0; | |
561 | } | |
562 | ||
563 | dprintk("IR Key/Flags: (0x%02x/0x%02x)\n", | |
564 | code & 0xff, flags & 0xff); | |
565 | ||
566 | *ir_key = code & 0xff; | |
567 | *ir_raw = code; | |
568 | return 1; | |
569 | } | |
570 | ||
44243fc2 MCC |
571 | void cx88_i2c_init_ir(struct cx88_core *core) |
572 | { | |
573 | struct i2c_board_info info; | |
1c0eb0ff | 574 | const unsigned short default_addr_list[] = { |
44243fc2 MCC |
575 | 0x18, 0x6b, 0x71, |
576 | I2C_CLIENT_END | |
577 | }; | |
1c0eb0ff MCC |
578 | const unsigned short pvr2000_addr_list[] = { |
579 | 0x18, 0x1a, | |
580 | I2C_CLIENT_END | |
581 | }; | |
582 | const unsigned short *addr_list = default_addr_list; | |
44243fc2 MCC |
583 | const unsigned short *addrp; |
584 | /* Instantiate the IR receiver device, if present */ | |
585 | if (0 != core->i2c_rc) | |
586 | return; | |
587 | ||
588 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
589 | strlcpy(info.type, "ir_video", I2C_NAME_SIZE); | |
590 | ||
1c0eb0ff MCC |
591 | switch (core->boardnr) { |
592 | case CX88_BOARD_LEADTEK_PVR2000: | |
593 | addr_list = pvr2000_addr_list; | |
594 | core->init_data.name = "cx88 Leadtek PVR 2000 remote"; | |
c003ab1b | 595 | core->init_data.type = RC_BIT_UNKNOWN; |
1c0eb0ff MCC |
596 | core->init_data.get_key = get_key_pvr2000; |
597 | core->init_data.ir_codes = RC_MAP_EMPTY; | |
598 | break; | |
599 | } | |
600 | ||
44243fc2 MCC |
601 | /* |
602 | * We can't call i2c_new_probed_device() because it uses | |
603 | * quick writes for probing and at least some RC receiver | |
604 | * devices only reply to reads. | |
605 | * Also, Hauppauge XVR needs to be specified, as address 0x71 | |
606 | * conflicts with another remote type used with saa7134 | |
607 | */ | |
608 | for (addrp = addr_list; *addrp != I2C_CLIENT_END; addrp++) { | |
609 | info.platform_data = NULL; | |
610 | memset(&core->init_data, 0, sizeof(core->init_data)); | |
611 | ||
612 | if (*addrp == 0x71) { | |
613 | /* Hauppauge XVR */ | |
614 | core->init_data.name = "cx88 Hauppauge XVR remote"; | |
af86ce79 | 615 | core->init_data.ir_codes = RC_MAP_HAUPPAUGE; |
c003ab1b | 616 | core->init_data.type = RC_BIT_RC5; |
44243fc2 MCC |
617 | core->init_data.internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR; |
618 | ||
619 | info.platform_data = &core->init_data; | |
620 | } | |
621 | if (i2c_smbus_xfer(&core->i2c_adap, *addrp, 0, | |
622 | I2C_SMBUS_READ, 0, | |
623 | I2C_SMBUS_QUICK, NULL) >= 0) { | |
624 | info.addr = *addrp; | |
625 | i2c_new_device(&core->i2c_adap, &info); | |
626 | break; | |
627 | } | |
628 | } | |
629 | } | |
630 | ||
1da177e4 LT |
631 | /* ---------------------------------------------------------------------- */ |
632 | ||
633 | MODULE_AUTHOR("Gerd Knorr, Pavel Machek, Chris Pascoe"); | |
634 | MODULE_DESCRIPTION("input driver for cx88 GPIO-based IR remote controls"); | |
635 | MODULE_LICENSE("GPL"); |