]>
Commit | Line | Data |
---|---|---|
1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * Device driver for GPIO attached remote control interfaces | |
4 | * on Conexant 2388x based TV/DVB cards. | |
5 | * | |
6 | * Copyright (c) 2003 Pavel Machek | |
7 | * Copyright (c) 2004 Gerd Knorr | |
fc40b261 | 8 | * Copyright (c) 2004, 2005 Chris Pascoe |
1da177e4 LT |
9 | * |
10 | * This program is free software; you can redistribute it and/or modify | |
11 | * it under the terms of the GNU General Public License as published by | |
12 | * the Free Software Foundation; either version 2 of the License, or | |
13 | * (at your option) any later version. | |
14 | * | |
15 | * This program is distributed in the hope that it will be useful, | |
16 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
17 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
18 | * GNU General Public License for more details. | |
1da177e4 LT |
19 | */ |
20 | ||
65bc2fe8 MCC |
21 | #include "cx88.h" |
22 | ||
1da177e4 | 23 | #include <linux/init.h> |
3c1c48bb | 24 | #include <linux/hrtimer.h> |
1da177e4 | 25 | #include <linux/pci.h> |
5a0e3ad6 | 26 | #include <linux/slab.h> |
1da177e4 | 27 | #include <linux/module.h> |
1da177e4 | 28 | |
6bda9644 | 29 | #include <media/rc-core.h> |
1da177e4 | 30 | |
727e625c MCC |
31 | #define MODULE_NAME "cx88xx" |
32 | ||
1da177e4 LT |
33 | /* ---------------------------------------------------------------------- */ |
34 | ||
1da177e4 | 35 | struct cx88_IR { |
41ef7c1e | 36 | struct cx88_core *core; |
d8b4b582 | 37 | struct rc_dev *dev; |
92f4fc10 MCC |
38 | |
39 | int users; | |
40 | ||
41ef7c1e MCC |
41 | char name[32]; |
42 | char phys[32]; | |
1da177e4 LT |
43 | |
44 | /* sample from gpio pin 16 */ | |
fc40b261 | 45 | u32 sampling; |
1da177e4 LT |
46 | |
47 | /* poll external decoder */ | |
41ef7c1e | 48 | int polling; |
3c1c48bb | 49 | struct hrtimer timer; |
41ef7c1e MCC |
50 | u32 gpio_addr; |
51 | u32 last_gpio; | |
52 | u32 mask_keycode; | |
53 | u32 mask_keydown; | |
54 | u32 mask_keyup; | |
1da177e4 LT |
55 | }; |
56 | ||
7b61ba8f | 57 | static unsigned int ir_samplerate = 4; |
2997137b DH |
58 | module_param(ir_samplerate, uint, 0444); |
59 | MODULE_PARM_DESC(ir_samplerate, "IR samplerate in kHz, 1 - 20, default 4"); | |
60 | ||
ff699e6b | 61 | static int ir_debug; |
41ef7c1e | 62 | module_param(ir_debug, int, 0644); /* debug level [IR] */ |
1da177e4 LT |
63 | MODULE_PARM_DESC(ir_debug, "enable debug messages [IR]"); |
64 | ||
399426ca MCC |
65 | #define ir_dprintk(fmt, arg...) do { \ |
66 | if (ir_debug) \ | |
67 | printk(KERN_DEBUG "%s IR: " fmt, ir->core->name, ##arg);\ | |
68 | } while (0) | |
1da177e4 | 69 | |
399426ca MCC |
70 | #define dprintk(fmt, arg...) do { \ |
71 | if (ir_debug) \ | |
72 | printk(KERN_DEBUG "cx88 IR: " fmt, ##arg); \ | |
73 | } while (0) | |
1c0eb0ff | 74 | |
1da177e4 LT |
75 | /* ---------------------------------------------------------------------- */ |
76 | ||
77 | static void cx88_ir_handle_key(struct cx88_IR *ir) | |
78 | { | |
79 | struct cx88_core *core = ir->core; | |
680543c5 | 80 | u32 gpio, data, auxgpio; |
1da177e4 LT |
81 | |
82 | /* read gpio value */ | |
83 | gpio = cx_read(ir->gpio_addr); | |
6a59d64c | 84 | switch (core->boardnr) { |
829ea964 | 85 | case CX88_BOARD_NPGTECH_REALTV_TOP10FM: |
399426ca MCC |
86 | /* |
87 | * This board apparently uses a combination of 2 GPIO | |
88 | * to represent the keys. Additionally, the second GPIO | |
89 | * can be used for parity. | |
90 | * | |
91 | * Example: | |
92 | * | |
93 | * for key "5" | |
94 | * gpio = 0x758, auxgpio = 0xe5 or 0xf5 | |
95 | * for key "Power" | |
96 | * gpio = 0x758, auxgpio = 0xed or 0xfd | |
680543c5 RC |
97 | */ |
98 | ||
99 | auxgpio = cx_read(MO_GP1_IO); | |
100 | /* Take out the parity part */ | |
7b61ba8f | 101 | gpio = (gpio & 0x7fd) + (auxgpio & 0xef); |
829ea964 MK |
102 | break; |
103 | case CX88_BOARD_WINFAST_DTV1000: | |
3047a176 | 104 | case CX88_BOARD_WINFAST_DTV1800H: |
8eb79c0b | 105 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
f271a3af | 106 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: |
3e9a4897 | 107 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
84463d5f IV |
108 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36: |
109 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43: | |
e7d11ecb EP |
110 | gpio = (gpio & 0x6ff) | ((cx_read(MO_GP1_IO) << 8) & 0x900); |
111 | auxgpio = gpio; | |
829ea964 MK |
112 | break; |
113 | default: | |
680543c5 | 114 | auxgpio = gpio; |
829ea964 | 115 | } |
1da177e4 | 116 | if (ir->polling) { |
680543c5 | 117 | if (ir->last_gpio == auxgpio) |
1da177e4 | 118 | return; |
680543c5 | 119 | ir->last_gpio = auxgpio; |
1da177e4 LT |
120 | } |
121 | ||
122 | /* extract data */ | |
123 | data = ir_extract_bits(gpio, ir->mask_keycode); | |
124 | ir_dprintk("irq gpio=0x%x code=%d | %s%s%s\n", | |
41ef7c1e MCC |
125 | gpio, data, |
126 | ir->polling ? "poll" : "irq", | |
127 | (gpio & ir->mask_keydown) ? " down" : "", | |
128 | (gpio & ir->mask_keyup) ? " up" : ""); | |
1da177e4 | 129 | |
6a59d64c | 130 | if (ir->core->boardnr == CX88_BOARD_NORWOOD_MICRO) { |
d1009bd7 PN |
131 | u32 gpio_key = cx_read(MO_GP0_IO); |
132 | ||
133 | data = (data << 4) | ((gpio_key & 0xf0) >> 4); | |
134 | ||
120703f9 DH |
135 | rc_keydown(ir->dev, RC_TYPE_UNKNOWN, data, 0); |
136 | ||
137 | } else if (ir->core->boardnr == CX88_BOARD_PROLINK_PLAYTVPVR || | |
138 | ir->core->boardnr == CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO) { | |
139 | /* bit cleared on keydown, NEC scancode, 0xAAAACC, A = 0x866b */ | |
140 | u16 addr; | |
141 | u8 cmd; | |
142 | u32 scancode; | |
143 | ||
144 | addr = (data >> 8) & 0xffff; | |
145 | cmd = (data >> 0) & 0x00ff; | |
146 | scancode = RC_SCANCODE_NECX(addr, cmd); | |
147 | ||
148 | if (0 == (gpio & ir->mask_keyup)) | |
2ceeca04 | 149 | rc_keydown_notimeout(ir->dev, RC_TYPE_NECX, scancode, |
399426ca | 150 | 0); |
120703f9 DH |
151 | else |
152 | rc_keyup(ir->dev); | |
d1009bd7 PN |
153 | |
154 | } else if (ir->mask_keydown) { | |
1da177e4 | 155 | /* bit set on keydown */ |
3bbd3f2d | 156 | if (gpio & ir->mask_keydown) |
120703f9 | 157 | rc_keydown_notimeout(ir->dev, RC_TYPE_UNKNOWN, data, 0); |
62c65031 | 158 | else |
ca86674b | 159 | rc_keyup(ir->dev); |
1da177e4 LT |
160 | |
161 | } else if (ir->mask_keyup) { | |
162 | /* bit cleared on keydown */ | |
3bbd3f2d | 163 | if (0 == (gpio & ir->mask_keyup)) |
120703f9 | 164 | rc_keydown_notimeout(ir->dev, RC_TYPE_UNKNOWN, data, 0); |
62c65031 | 165 | else |
ca86674b | 166 | rc_keyup(ir->dev); |
1da177e4 LT |
167 | |
168 | } else { | |
169 | /* can't distinguish keydown/up :-/ */ | |
120703f9 | 170 | rc_keydown_notimeout(ir->dev, RC_TYPE_UNKNOWN, data, 0); |
ca86674b | 171 | rc_keyup(ir->dev); |
1da177e4 LT |
172 | } |
173 | } | |
174 | ||
3c1c48bb | 175 | static enum hrtimer_restart cx88_ir_work(struct hrtimer *timer) |
1da177e4 | 176 | { |
3c1c48bb AH |
177 | unsigned long missed; |
178 | struct cx88_IR *ir = container_of(timer, struct cx88_IR, timer); | |
1da177e4 LT |
179 | |
180 | cx88_ir_handle_key(ir); | |
8b0e1953 | 181 | missed = hrtimer_forward_now(&ir->timer, ir->polling * 1000000); |
3c1c48bb AH |
182 | if (missed > 1) |
183 | ir_dprintk("Missed ticks %ld\n", missed - 1); | |
184 | ||
185 | return HRTIMER_RESTART; | |
1da177e4 LT |
186 | } |
187 | ||
92f4fc10 | 188 | static int __cx88_ir_start(void *priv) |
b07b4783 | 189 | { |
92f4fc10 MCC |
190 | struct cx88_core *core = priv; |
191 | struct cx88_IR *ir; | |
192 | ||
193 | if (!core || !core->ir) | |
194 | return -EINVAL; | |
195 | ||
196 | ir = core->ir; | |
197 | ||
b07b4783 | 198 | if (ir->polling) { |
3c1c48bb AH |
199 | hrtimer_init(&ir->timer, CLOCK_MONOTONIC, HRTIMER_MODE_REL); |
200 | ir->timer.function = cx88_ir_work; | |
8b0e1953 | 201 | hrtimer_start(&ir->timer, ir->polling * 1000000, |
3c1c48bb | 202 | HRTIMER_MODE_REL); |
b07b4783 DT |
203 | } |
204 | if (ir->sampling) { | |
8ddac9ee | 205 | core->pci_irqmask |= PCI_INT_IR_SMPINT; |
2997137b DH |
206 | cx_write(MO_DDS_IO, 0x33F286 * ir_samplerate); /* samplerate */ |
207 | cx_write(MO_DDSCFG_IO, 0x5); /* enable */ | |
b07b4783 | 208 | } |
92f4fc10 | 209 | return 0; |
b07b4783 DT |
210 | } |
211 | ||
92f4fc10 | 212 | static void __cx88_ir_stop(void *priv) |
b07b4783 | 213 | { |
92f4fc10 MCC |
214 | struct cx88_core *core = priv; |
215 | struct cx88_IR *ir; | |
216 | ||
217 | if (!core || !core->ir) | |
218 | return; | |
219 | ||
220 | ir = core->ir; | |
b07b4783 DT |
221 | if (ir->sampling) { |
222 | cx_write(MO_DDSCFG_IO, 0x0); | |
8ddac9ee | 223 | core->pci_irqmask &= ~PCI_INT_IR_SMPINT; |
b07b4783 DT |
224 | } |
225 | ||
569b7ec7 | 226 | if (ir->polling) |
3c1c48bb | 227 | hrtimer_cancel(&ir->timer); |
b07b4783 DT |
228 | } |
229 | ||
92f4fc10 MCC |
230 | int cx88_ir_start(struct cx88_core *core) |
231 | { | |
232 | if (core->ir->users) | |
233 | return __cx88_ir_start(core); | |
234 | ||
235 | return 0; | |
236 | } | |
399426ca | 237 | EXPORT_SYMBOL(cx88_ir_start); |
92f4fc10 MCC |
238 | |
239 | void cx88_ir_stop(struct cx88_core *core) | |
240 | { | |
241 | if (core->ir->users) | |
242 | __cx88_ir_stop(core); | |
243 | } | |
399426ca | 244 | EXPORT_SYMBOL(cx88_ir_stop); |
92f4fc10 | 245 | |
d8b4b582 | 246 | static int cx88_ir_open(struct rc_dev *rc) |
92f4fc10 | 247 | { |
d8b4b582 | 248 | struct cx88_core *core = rc->priv; |
92f4fc10 MCC |
249 | |
250 | core->ir->users++; | |
251 | return __cx88_ir_start(core); | |
252 | } | |
253 | ||
d8b4b582 | 254 | static void cx88_ir_close(struct rc_dev *rc) |
92f4fc10 | 255 | { |
d8b4b582 | 256 | struct cx88_core *core = rc->priv; |
92f4fc10 MCC |
257 | |
258 | core->ir->users--; | |
259 | if (!core->ir->users) | |
260 | __cx88_ir_stop(core); | |
261 | } | |
262 | ||
1da177e4 LT |
263 | /* ---------------------------------------------------------------------- */ |
264 | ||
265 | int cx88_ir_init(struct cx88_core *core, struct pci_dev *pci) | |
266 | { | |
267 | struct cx88_IR *ir; | |
d8b4b582 | 268 | struct rc_dev *dev; |
02858eed | 269 | char *ir_codes = NULL; |
c003ab1b | 270 | u64 rc_type = RC_BIT_OTHER; |
b07b4783 | 271 | int err = -ENOMEM; |
9dfe4e83 MCC |
272 | u32 hardware_mask = 0; /* For devices with a hardware mask, when |
273 | * used with a full-code IR table | |
274 | */ | |
1da177e4 | 275 | |
b7df3910 | 276 | ir = kzalloc(sizeof(*ir), GFP_KERNEL); |
d8b4b582 DH |
277 | dev = rc_allocate_device(); |
278 | if (!ir || !dev) | |
b07b4783 | 279 | goto err_out_free; |
b7df3910 | 280 | |
d8b4b582 | 281 | ir->dev = dev; |
1da177e4 LT |
282 | |
283 | /* detect & configure */ | |
6a59d64c | 284 | switch (core->boardnr) { |
1da177e4 | 285 | case CX88_BOARD_DNTV_LIVE_DVB_T: |
b45009b0 | 286 | case CX88_BOARD_KWORLD_DVB_T: |
28ecc449 | 287 | case CX88_BOARD_KWORLD_DVB_T_CX22702: |
02858eed | 288 | ir_codes = RC_MAP_DNTV_LIVE_DVB_T; |
41ef7c1e | 289 | ir->gpio_addr = MO_GP1_IO; |
1da177e4 | 290 | ir->mask_keycode = 0x1f; |
41ef7c1e MCC |
291 | ir->mask_keyup = 0x60; |
292 | ir->polling = 50; /* ms */ | |
1da177e4 | 293 | break; |
e52e98a7 | 294 | case CX88_BOARD_TERRATEC_CINERGY_1400_DVB_T1: |
02858eed | 295 | ir_codes = RC_MAP_CINERGY_1400; |
fc40b261 | 296 | ir->sampling = 0xeb04; /* address */ |
e52e98a7 | 297 | break; |
1da177e4 LT |
298 | case CX88_BOARD_HAUPPAUGE: |
299 | case CX88_BOARD_HAUPPAUGE_DVB_T1: | |
fb56cb65 ST |
300 | case CX88_BOARD_HAUPPAUGE_NOVASE2_S1: |
301 | case CX88_BOARD_HAUPPAUGE_NOVASPLUS_S1: | |
611900c1 | 302 | case CX88_BOARD_HAUPPAUGE_HVR1100: |
76dc82ab | 303 | case CX88_BOARD_HAUPPAUGE_HVR3000: |
5bd1b663 ST |
304 | case CX88_BOARD_HAUPPAUGE_HVR4000: |
305 | case CX88_BOARD_HAUPPAUGE_HVR4000LITE: | |
f1735bb2 EB |
306 | case CX88_BOARD_PCHDTV_HD3000: |
307 | case CX88_BOARD_PCHDTV_HD5500: | |
501d8cd4 | 308 | case CX88_BOARD_HAUPPAUGE_IRONLY: |
af86ce79 | 309 | ir_codes = RC_MAP_HAUPPAUGE; |
41ef7c1e | 310 | ir->sampling = 1; |
1da177e4 | 311 | break; |
2de873e6 | 312 | case CX88_BOARD_WINFAST_DTV2000H: |
4d14c833 | 313 | case CX88_BOARD_WINFAST_DTV2000H_J: |
3047a176 | 314 | case CX88_BOARD_WINFAST_DTV1800H: |
8eb79c0b | 315 | case CX88_BOARD_WINFAST_DTV1800H_XC4000: |
f271a3af | 316 | case CX88_BOARD_WINFAST_DTV2000H_PLUS: |
02858eed | 317 | ir_codes = RC_MAP_WINFAST; |
41ef7c1e | 318 | ir->gpio_addr = MO_GP0_IO; |
1da177e4 | 319 | ir->mask_keycode = 0x8f8; |
41ef7c1e | 320 | ir->mask_keyup = 0x100; |
2de873e6 | 321 | ir->polling = 50; /* ms */ |
1da177e4 | 322 | break; |
ff97d93d | 323 | case CX88_BOARD_WINFAST2000XP_EXPERT: |
e7d11ecb | 324 | case CX88_BOARD_WINFAST_DTV1000: |
3e9a4897 | 325 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL: |
84463d5f IV |
326 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F36: |
327 | case CX88_BOARD_WINFAST_TV2000_XP_GLOBAL_6F43: | |
02858eed | 328 | ir_codes = RC_MAP_WINFAST; |
ff97d93d HP |
329 | ir->gpio_addr = MO_GP0_IO; |
330 | ir->mask_keycode = 0x8f8; | |
331 | ir->mask_keyup = 0x100; | |
332 | ir->polling = 1; /* ms */ | |
333 | break; | |
1da177e4 | 334 | case CX88_BOARD_IODATA_GVBCTV7E: |
02858eed | 335 | ir_codes = RC_MAP_IODATA_BCTV7E; |
41ef7c1e | 336 | ir->gpio_addr = MO_GP0_IO; |
1da177e4 LT |
337 | ir->mask_keycode = 0xfd; |
338 | ir->mask_keydown = 0x02; | |
41ef7c1e | 339 | ir->polling = 5; /* ms */ |
1da177e4 | 340 | break; |
ff97d93d | 341 | case CX88_BOARD_PROLINK_PLAYTVPVR: |
239df2e2 | 342 | case CX88_BOARD_PIXELVIEW_PLAYTV_ULTRA_PRO: |
9dfe4e83 MCC |
343 | /* |
344 | * It seems that this hardware is paired with NEC extended | |
345 | * address 0x866b. So, unfortunately, its usage with other | |
346 | * IR's with different address won't work. Still, there are | |
347 | * other IR's from the same manufacturer that works, like the | |
348 | * 002-T mini RC, provided with newer PV hardware | |
349 | */ | |
350 | ir_codes = RC_MAP_PIXELVIEW_MK12; | |
2ceeca04 | 351 | rc_type = RC_BIT_NECX; |
41ef7c1e | 352 | ir->gpio_addr = MO_GP1_IO; |
41ef7c1e | 353 | ir->mask_keyup = 0x80; |
26d5683d | 354 | ir->polling = 10; /* ms */ |
9dfe4e83 | 355 | hardware_mask = 0x3f; /* Hardware returns only 6 bits from command part */ |
239df2e2 | 356 | break; |
7f0dd179 | 357 | case CX88_BOARD_PROLINK_PV_8000GT: |
a31d2bb7 | 358 | case CX88_BOARD_PROLINK_PV_GLOBAL_XTREME: |
02858eed | 359 | ir_codes = RC_MAP_PIXELVIEW_NEW; |
7f0dd179 MCC |
360 | ir->gpio_addr = MO_GP1_IO; |
361 | ir->mask_keycode = 0x3f; | |
362 | ir->mask_keyup = 0x80; | |
363 | ir->polling = 1; /* ms */ | |
364 | break; | |
b639f9d2 | 365 | case CX88_BOARD_KWORLD_LTV883: |
02858eed | 366 | ir_codes = RC_MAP_PIXELVIEW; |
b639f9d2 NS |
367 | ir->gpio_addr = MO_GP1_IO; |
368 | ir->mask_keycode = 0x1f; | |
369 | ir->mask_keyup = 0x60; | |
370 | ir->polling = 1; /* ms */ | |
371 | break; | |
a82decf6 | 372 | case CX88_BOARD_ADSTECH_DVB_T_PCI: |
02858eed | 373 | ir_codes = RC_MAP_ADSTECH_DVB_T_PCI; |
41ef7c1e | 374 | ir->gpio_addr = MO_GP1_IO; |
a82decf6 | 375 | ir->mask_keycode = 0xbf; |
41ef7c1e MCC |
376 | ir->mask_keyup = 0x40; |
377 | ir->polling = 50; /* ms */ | |
378 | break; | |
379 | case CX88_BOARD_MSI_TVANYWHERE_MASTER: | |
02858eed | 380 | ir_codes = RC_MAP_MSI_TVANYWHERE; |
41ef7c1e MCC |
381 | ir->gpio_addr = MO_GP1_IO; |
382 | ir->mask_keycode = 0x1f; | |
383 | ir->mask_keyup = 0x40; | |
384 | ir->polling = 1; /* ms */ | |
a82decf6 | 385 | break; |
899ad11b | 386 | case CX88_BOARD_AVERTV_303: |
565f4949 | 387 | case CX88_BOARD_AVERTV_STUDIO_303: |
02858eed | 388 | ir_codes = RC_MAP_AVERTV_303; |
899ad11b GG |
389 | ir->gpio_addr = MO_GP2_IO; |
390 | ir->mask_keycode = 0xfb; | |
391 | ir->mask_keydown = 0x02; | |
392 | ir->polling = 50; /* ms */ | |
393 | break; | |
d8d86225 IL |
394 | case CX88_BOARD_OMICOM_SS4_PCI: |
395 | case CX88_BOARD_SATTRADE_ST4200: | |
396 | case CX88_BOARD_TBS_8920: | |
397 | case CX88_BOARD_TBS_8910: | |
398 | case CX88_BOARD_PROF_7300: | |
b699c271 | 399 | case CX88_BOARD_PROF_7301: |
d8d86225 | 400 | case CX88_BOARD_PROF_6200: |
02858eed | 401 | ir_codes = RC_MAP_TBS_NEC; |
d8d86225 IL |
402 | ir->sampling = 0xff00; /* address */ |
403 | break; | |
0cb73639 | 404 | case CX88_BOARD_TEVII_S464: |
d8d86225 IL |
405 | case CX88_BOARD_TEVII_S460: |
406 | case CX88_BOARD_TEVII_S420: | |
02858eed | 407 | ir_codes = RC_MAP_TEVII_NEC; |
d8d86225 IL |
408 | ir->sampling = 0xff00; /* address */ |
409 | break; | |
fc40b261 | 410 | case CX88_BOARD_DNTV_LIVE_DVB_T_PRO: |
02858eed | 411 | ir_codes = RC_MAP_DNTV_LIVE_DVBT_PRO; |
715a2233 | 412 | ir->sampling = 0xff00; /* address */ |
fc40b261 | 413 | break; |
d1009bd7 | 414 | case CX88_BOARD_NORWOOD_MICRO: |
02858eed | 415 | ir_codes = RC_MAP_NORWOOD; |
d1009bd7 PN |
416 | ir->gpio_addr = MO_GP1_IO; |
417 | ir->mask_keycode = 0x0e; | |
418 | ir->mask_keyup = 0x80; | |
419 | ir->polling = 50; /* ms */ | |
420 | break; | |
be4f4519 | 421 | case CX88_BOARD_NPGTECH_REALTV_TOP10FM: |
02858eed | 422 | ir_codes = RC_MAP_NPGTECH; |
715a2233 | 423 | ir->gpio_addr = MO_GP0_IO; |
680543c5 | 424 | ir->mask_keycode = 0xfa; |
715a2233 | 425 | ir->polling = 50; /* ms */ |
680543c5 | 426 | break; |
9121106a | 427 | case CX88_BOARD_PINNACLE_PCTV_HD_800i: |
02858eed | 428 | ir_codes = RC_MAP_PINNACLE_PCTV_HD; |
715a2233 | 429 | ir->sampling = 1; |
9121106a | 430 | break; |
ba928034 | 431 | case CX88_BOARD_POWERCOLOR_REAL_ANGEL: |
02858eed | 432 | ir_codes = RC_MAP_POWERCOLOR_REAL_ANGEL; |
715a2233 | 433 | ir->gpio_addr = MO_GP2_IO; |
ba928034 | 434 | ir->mask_keycode = 0x7e; |
715a2233 | 435 | ir->polling = 100; /* ms */ |
ba928034 | 436 | break; |
111ac84a SI |
437 | case CX88_BOARD_TWINHAN_VP1027_DVBS: |
438 | ir_codes = RC_MAP_TWINHAN_VP1027_DVBS; | |
111ac84a SI |
439 | ir->sampling = 0xff00; /* address */ |
440 | break; | |
1da177e4 | 441 | } |
b45009b0 | 442 | |
2997137b | 443 | if (!ir_codes) { |
b07b4783 DT |
444 | err = -ENODEV; |
445 | goto err_out_free; | |
1da177e4 LT |
446 | } |
447 | ||
9dfe4e83 MCC |
448 | /* |
449 | * The usage of mask_keycode were very convenient, due to several | |
450 | * reasons. Among others, the scancode tables were using the scancode | |
451 | * as the index elements. So, the less bits it was used, the smaller | |
452 | * the table were stored. After the input changes, the better is to use | |
453 | * the full scancodes, since it allows replacing the IR remote by | |
454 | * another one. Unfortunately, there are still some hardware, like | |
455 | * Pixelview Ultra Pro, where only part of the scancode is sent via | |
456 | * GPIO. So, there's no way to get the full scancode. Due to that, | |
457 | * hardware_mask were introduced here: it represents those hardware | |
458 | * that has such limits. | |
459 | */ | |
460 | if (hardware_mask && !ir->mask_keycode) | |
461 | ir->mask_keycode = hardware_mask; | |
462 | ||
1da177e4 | 463 | /* init input device */ |
6a59d64c | 464 | snprintf(ir->name, sizeof(ir->name), "cx88 IR (%s)", core->board.name); |
41ef7c1e | 465 | snprintf(ir->phys, sizeof(ir->phys), "pci-%s/ir0", pci_name(pci)); |
1da177e4 | 466 | |
d8b4b582 DH |
467 | dev->input_name = ir->name; |
468 | dev->input_phys = ir->phys; | |
469 | dev->input_id.bustype = BUS_PCI; | |
470 | dev->input_id.version = 1; | |
1da177e4 | 471 | if (pci->subsystem_vendor) { |
d8b4b582 DH |
472 | dev->input_id.vendor = pci->subsystem_vendor; |
473 | dev->input_id.product = pci->subsystem_device; | |
1da177e4 | 474 | } else { |
d8b4b582 DH |
475 | dev->input_id.vendor = pci->vendor; |
476 | dev->input_id.product = pci->device; | |
1da177e4 | 477 | } |
d8b4b582 DH |
478 | dev->dev.parent = &pci->dev; |
479 | dev->map_name = ir_codes; | |
480 | dev->driver_name = MODULE_NAME; | |
481 | dev->priv = core; | |
482 | dev->open = cx88_ir_open; | |
483 | dev->close = cx88_ir_close; | |
9d2f1d3c | 484 | dev->scancode_mask = hardware_mask; |
1da177e4 | 485 | |
2997137b | 486 | if (ir->sampling) { |
d8b4b582 DH |
487 | dev->driver_type = RC_DRIVER_IR_RAW; |
488 | dev->timeout = 10 * 1000 * 1000; /* 10 ms */ | |
489 | } else { | |
490 | dev->driver_type = RC_DRIVER_SCANCODE; | |
c5540fbb | 491 | dev->allowed_protocols = rc_type; |
d8b4b582 DH |
492 | } |
493 | ||
494 | ir->core = core; | |
495 | core->ir = ir; | |
1da177e4 LT |
496 | |
497 | /* all done */ | |
d8b4b582 | 498 | err = rc_register_device(dev); |
b07b4783 | 499 | if (err) |
92f4fc10 | 500 | goto err_out_free; |
1da177e4 LT |
501 | |
502 | return 0; | |
b07b4783 | 503 | |
d8b4b582 DH |
504 | err_out_free: |
505 | rc_free_device(dev); | |
92f4fc10 | 506 | core->ir = NULL; |
b07b4783 DT |
507 | kfree(ir); |
508 | return err; | |
1da177e4 LT |
509 | } |
510 | ||
511 | int cx88_ir_fini(struct cx88_core *core) | |
512 | { | |
513 | struct cx88_IR *ir = core->ir; | |
514 | ||
515 | /* skip detach on non attached boards */ | |
399426ca | 516 | if (!ir) |
1da177e4 LT |
517 | return 0; |
518 | ||
92f4fc10 | 519 | cx88_ir_stop(core); |
d8b4b582 | 520 | rc_unregister_device(ir->dev); |
1da177e4 LT |
521 | kfree(ir); |
522 | ||
523 | /* done */ | |
524 | core->ir = NULL; | |
525 | return 0; | |
526 | } | |
527 | ||
528 | /* ---------------------------------------------------------------------- */ | |
529 | ||
530 | void cx88_ir_irq(struct cx88_core *core) | |
531 | { | |
532 | struct cx88_IR *ir = core->ir; | |
2997137b | 533 | u32 samples; |
7b61ba8f | 534 | unsigned int todo, bits; |
2997137b | 535 | struct ir_raw_event ev; |
1da177e4 | 536 | |
2997137b | 537 | if (!ir || !ir->sampling) |
1da177e4 LT |
538 | return; |
539 | ||
2997137b DH |
540 | /* |
541 | * Samples are stored in a 32 bit register, oldest sample in | |
542 | * the msb. A set bit represents space and an unset bit | |
543 | * represents a pulse. | |
544 | */ | |
1da177e4 | 545 | samples = cx_read(MO_SAMPLE_IO); |
e52e98a7 | 546 | |
d8b4b582 | 547 | if (samples == 0xff && ir->dev->idle) |
2997137b | 548 | return; |
e52e98a7 | 549 | |
2997137b DH |
550 | init_ir_raw_event(&ev); |
551 | for (todo = 32; todo > 0; todo -= bits) { | |
552 | ev.pulse = samples & 0x80000000 ? false : true; | |
553 | bits = min(todo, 32U - fls(ev.pulse ? samples : ~samples)); | |
2a164d02 | 554 | ev.duration = (bits * (NSEC_PER_SEC / 1000)) / ir_samplerate; |
d8b4b582 | 555 | ir_raw_event_store_with_filter(ir->dev, &ev); |
2997137b | 556 | samples <<= bits; |
1da177e4 | 557 | } |
d8b4b582 | 558 | ir_raw_event_handle(ir->dev); |
1da177e4 LT |
559 | } |
560 | ||
4dd9bb91 DH |
561 | static int get_key_pvr2000(struct IR_i2c *ir, enum rc_type *protocol, |
562 | u32 *scancode, u8 *toggle) | |
1c0eb0ff MCC |
563 | { |
564 | int flags, code; | |
565 | ||
566 | /* poll IR chip */ | |
567 | flags = i2c_smbus_read_byte_data(ir->c, 0x10); | |
568 | if (flags < 0) { | |
569 | dprintk("read error\n"); | |
570 | return 0; | |
571 | } | |
572 | /* key pressed ? */ | |
573 | if (0 == (flags & 0x80)) | |
574 | return 0; | |
575 | ||
576 | /* read actual key code */ | |
577 | code = i2c_smbus_read_byte_data(ir->c, 0x00); | |
578 | if (code < 0) { | |
579 | dprintk("read error\n"); | |
580 | return 0; | |
581 | } | |
582 | ||
583 | dprintk("IR Key/Flags: (0x%02x/0x%02x)\n", | |
399426ca | 584 | code & 0xff, flags & 0xff); |
1c0eb0ff | 585 | |
4dd9bb91 DH |
586 | *protocol = RC_TYPE_UNKNOWN; |
587 | *scancode = code & 0xff; | |
588 | *toggle = 0; | |
1c0eb0ff MCC |
589 | return 1; |
590 | } | |
591 | ||
44243fc2 MCC |
592 | void cx88_i2c_init_ir(struct cx88_core *core) |
593 | { | |
594 | struct i2c_board_info info; | |
1c0eb0ff | 595 | const unsigned short default_addr_list[] = { |
44243fc2 MCC |
596 | 0x18, 0x6b, 0x71, |
597 | I2C_CLIENT_END | |
598 | }; | |
1c0eb0ff MCC |
599 | const unsigned short pvr2000_addr_list[] = { |
600 | 0x18, 0x1a, | |
601 | I2C_CLIENT_END | |
602 | }; | |
603 | const unsigned short *addr_list = default_addr_list; | |
44243fc2 MCC |
604 | const unsigned short *addrp; |
605 | /* Instantiate the IR receiver device, if present */ | |
7b61ba8f | 606 | if (core->i2c_rc != 0) |
44243fc2 MCC |
607 | return; |
608 | ||
609 | memset(&info, 0, sizeof(struct i2c_board_info)); | |
610 | strlcpy(info.type, "ir_video", I2C_NAME_SIZE); | |
611 | ||
1c0eb0ff MCC |
612 | switch (core->boardnr) { |
613 | case CX88_BOARD_LEADTEK_PVR2000: | |
614 | addr_list = pvr2000_addr_list; | |
615 | core->init_data.name = "cx88 Leadtek PVR 2000 remote"; | |
c003ab1b | 616 | core->init_data.type = RC_BIT_UNKNOWN; |
1c0eb0ff MCC |
617 | core->init_data.get_key = get_key_pvr2000; |
618 | core->init_data.ir_codes = RC_MAP_EMPTY; | |
619 | break; | |
620 | } | |
621 | ||
44243fc2 MCC |
622 | /* |
623 | * We can't call i2c_new_probed_device() because it uses | |
624 | * quick writes for probing and at least some RC receiver | |
625 | * devices only reply to reads. | |
626 | * Also, Hauppauge XVR needs to be specified, as address 0x71 | |
627 | * conflicts with another remote type used with saa7134 | |
628 | */ | |
629 | for (addrp = addr_list; *addrp != I2C_CLIENT_END; addrp++) { | |
630 | info.platform_data = NULL; | |
631 | memset(&core->init_data, 0, sizeof(core->init_data)); | |
632 | ||
633 | if (*addrp == 0x71) { | |
634 | /* Hauppauge XVR */ | |
635 | core->init_data.name = "cx88 Hauppauge XVR remote"; | |
af86ce79 | 636 | core->init_data.ir_codes = RC_MAP_HAUPPAUGE; |
00bb8207 SY |
637 | core->init_data.type = RC_BIT_RC5 | RC_BIT_RC6_MCE | |
638 | RC_BIT_RC6_6A_32; | |
44243fc2 MCC |
639 | core->init_data.internal_get_key_func = IR_KBD_GET_KEY_HAUP_XVR; |
640 | ||
641 | info.platform_data = &core->init_data; | |
642 | } | |
643 | if (i2c_smbus_xfer(&core->i2c_adap, *addrp, 0, | |
399426ca MCC |
644 | I2C_SMBUS_READ, 0, |
645 | I2C_SMBUS_QUICK, NULL) >= 0) { | |
44243fc2 MCC |
646 | info.addr = *addrp; |
647 | i2c_new_device(&core->i2c_adap, &info); | |
648 | break; | |
649 | } | |
650 | } | |
651 | } | |
652 | ||
1da177e4 LT |
653 | /* ---------------------------------------------------------------------- */ |
654 | ||
655 | MODULE_AUTHOR("Gerd Knorr, Pavel Machek, Chris Pascoe"); | |
656 | MODULE_DESCRIPTION("input driver for cx88 GPIO-based IR remote controls"); | |
657 | MODULE_LICENSE("GPL"); |