[mirror_ubuntu-jammy-kernel.git] / drivers / media / pci / intel / ipu-mmu.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Copyright (C) 2013 - 2020 Intel Corporation */

#ifndef IPU_MMU_H
#define IPU_MMU_H

#include <linux/dma-mapping.h>

#include "ipu.h"
#include "ipu-pdata.h"

#define ISYS_MMID 1
#define PSYS_MMID 0

/*
 * @pgtbl: virtual address of the l1 page table (one page)
 */
struct ipu_mmu_info {
	u32 __iomem *pgtbl;
	dma_addr_t aperture_start;
	dma_addr_t aperture_end;
	unsigned long pgsize_bitmap;

	spinlock_t lock;	/* Serialize access to users */
	struct ipu_dma_mapping *dmap;
	u32 dummy_l2_tbl;
	u32 dummy_page;
};

/*
 * @pgtbl: physical address of the l1 page table
 */
struct ipu_mmu {
	struct list_head node;

	struct ipu_mmu_hw *mmu_hw;
	unsigned int nr_mmus;
	int mmid;

	phys_addr_t pgtbl;
	struct device *dev;

	struct ipu_dma_mapping *dmap;
	struct list_head vma_list;

	struct page *trash_page;
	dma_addr_t iova_addr_trash;

	bool ready;
	spinlock_t ready_lock;	/* Serialize access to bool ready */

	void (*tlb_invalidate)(struct ipu_mmu *mmu);
};

struct ipu_mmu *ipu_mmu_init(struct device *dev,
			     void __iomem *base, int mmid,
			     const struct ipu_hw_variants *hw);
void ipu_mmu_cleanup(struct ipu_mmu *mmu);
int ipu_mmu_hw_init(struct ipu_mmu *mmu);
int ipu_mmu_hw_cleanup(struct ipu_mmu *mmu);
int ipu_mmu_map(struct ipu_mmu_info *mmu_info, unsigned long iova,
		phys_addr_t paddr, size_t size);
size_t ipu_mmu_unmap(struct ipu_mmu_info *mmu_info, unsigned long iova,
		     size_t size);
phys_addr_t ipu_mmu_iova_to_phys(struct ipu_mmu_info *mmu_info,
				 dma_addr_t iova);
#endif
Commit	Line	Data
f2efa4ee WY	1	/* SPDX-License-Identifier: GPL-2.0 */
	2	/* Copyright (C) 2013 - 2020 Intel Corporation */
	3
	4	#ifndef IPU_MMU_H
	5	#define IPU_MMU_H
	6
	7	#include <linux/dma-mapping.h>
	8
	9	#include "ipu.h"
	10	#include "ipu-pdata.h"
	11
	12	#define ISYS_MMID 1
	13	#define PSYS_MMID 0
	14
	15	/*
	16	* @pgtbl: virtual address of the l1 page table (one page)
	17	*/
	18	struct ipu_mmu_info {
	19	u32 __iomem *pgtbl;
	20	dma_addr_t aperture_start;
	21	dma_addr_t aperture_end;
	22	unsigned long pgsize_bitmap;
	23
	24	spinlock_t lock; /* Serialize access to users */
	25	struct ipu_dma_mapping *dmap;
	26	u32 dummy_l2_tbl;
	27	u32 dummy_page;
	28	};
	29
	30	/*
	31	* @pgtbl: physical address of the l1 page table
	32	*/
	33	struct ipu_mmu {
	34	struct list_head node;
	35
	36	struct ipu_mmu_hw *mmu_hw;
	37	unsigned int nr_mmus;
	38	int mmid;
	39
	40	phys_addr_t pgtbl;
	41	struct device *dev;
	42
	43	struct ipu_dma_mapping *dmap;
	44	struct list_head vma_list;
	45
	46	struct page *trash_page;
	47	dma_addr_t iova_addr_trash;
	48
	49	bool ready;
	50	spinlock_t ready_lock; /* Serialize access to bool ready */
	51
	52	void (tlb_invalidate)(struct ipu_mmu mmu);
	53	};
	54
	55	struct ipu_mmu ipu_mmu_init(struct device dev,
	56	void __iomem *base, int mmid,
	57	const struct ipu_hw_variants *hw);
	58	void ipu_mmu_cleanup(struct ipu_mmu *mmu);
	59	int ipu_mmu_hw_init(struct ipu_mmu *mmu);
	60	int ipu_mmu_hw_cleanup(struct ipu_mmu *mmu);
	61	int ipu_mmu_map(struct ipu_mmu_info *mmu_info, unsigned long iova,
	62	phys_addr_t paddr, size_t size);
	63	size_t ipu_mmu_unmap(struct ipu_mmu_info *mmu_info, unsigned long iova,
	64	size_t size);
65	phys_addr_t ipu_mmu_iova_to_phys(struct ipu_mmu_info *mmu_info,
66	dma_addr_t iova);
67	#endif