[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / pt1 / va1j5jf8007s.c

/*
 * ISDB-S driver for VA1J5JF8007/VA1J5JF8011
 *
 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
 *
 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
 * 	by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
 * the Free Software Foundation; either version 2 of the License, or
 * (at your option) any later version.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 */

#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/slab.h>
#include <linux/i2c.h>
#include "dvb_frontend.h"
#include "va1j5jf8007s.h"

enum va1j5jf8007s_tune_state {
	VA1J5JF8007S_IDLE,
	VA1J5JF8007S_SET_FREQUENCY_1,
	VA1J5JF8007S_SET_FREQUENCY_2,
	VA1J5JF8007S_SET_FREQUENCY_3,
	VA1J5JF8007S_CHECK_FREQUENCY,
	VA1J5JF8007S_SET_MODULATION,
	VA1J5JF8007S_CHECK_MODULATION,
	VA1J5JF8007S_SET_TS_ID,
	VA1J5JF8007S_CHECK_TS_ID,
	VA1J5JF8007S_TRACK,
};

struct va1j5jf8007s_state {
	const struct va1j5jf8007s_config *config;
	struct i2c_adapter *adap;
	struct dvb_frontend fe;
	enum va1j5jf8007s_tune_state tune_state;
};

static int va1j5jf8007s_read_snr(struct dvb_frontend *fe, u16 *snr)
{
	struct va1j5jf8007s_state *state;
	u8 addr;
	int i;
	u8 write_buf[1], read_buf[1];
	struct i2c_msg msgs[2];
	s32 word, x1, x2, x3, x4, x5, y;

	state = fe->demodulator_priv;
	addr = state->config->demod_address;

	word = 0;
	for (i = 0; i < 2; i++) {
		write_buf[0] = 0xbc + i;

		msgs[0].addr = addr;
		msgs[0].flags = 0;
		msgs[0].len = sizeof(write_buf);
		msgs[0].buf = write_buf;

		msgs[1].addr = addr;
		msgs[1].flags = I2C_M_RD;
		msgs[1].len = sizeof(read_buf);
		msgs[1].buf = read_buf;

		if (i2c_transfer(state->adap, msgs, 2) != 2)
			return -EREMOTEIO;

		word <<= 8;
		word |= read_buf[0];
	}

	word -= 3000;
	if (word < 0)
		word = 0;

	x1 = int_sqrt(word << 16) * ((15625ll << 21) / 1000000);
	x2 = (s64)x1 * x1 >> 31;
	x3 = (s64)x2 * x1 >> 31;
	x4 = (s64)x2 * x2 >> 31;
	x5 = (s64)x4 * x1 >> 31;

	y = (58857ll << 23) / 1000;
	y -= (s64)x1 * ((89565ll << 24) / 1000) >> 30;
	y += (s64)x2 * ((88977ll << 24) / 1000) >> 28;
	y -= (s64)x3 * ((50259ll << 25) / 1000) >> 27;
	y += (s64)x4 * ((14341ll << 27) / 1000) >> 27;
	y -= (s64)x5 * ((16346ll << 30) / 10000) >> 28;

	*snr = y < 0 ? 0 : y >> 15;
	return 0;
}

static int va1j5jf8007s_get_frontend_algo(struct dvb_frontend *fe)
{
	return DVBFE_ALGO_HW;
}

static int
va1j5jf8007s_read_status(struct dvb_frontend *fe, enum fe_status *status)
{
	struct va1j5jf8007s_state *state;

	state = fe->demodulator_priv;

	switch (state->tune_state) {
	case VA1J5JF8007S_IDLE:
	case VA1J5JF8007S_SET_FREQUENCY_1:
	case VA1J5JF8007S_SET_FREQUENCY_2:
	case VA1J5JF8007S_SET_FREQUENCY_3:
	case VA1J5JF8007S_CHECK_FREQUENCY:
		*status = 0;
		return 0;


	case VA1J5JF8007S_SET_MODULATION:
	case VA1J5JF8007S_CHECK_MODULATION:
		*status |= FE_HAS_SIGNAL;
		return 0;

	case VA1J5JF8007S_SET_TS_ID:
	case VA1J5JF8007S_CHECK_TS_ID:
		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER;
		return 0;

	case VA1J5JF8007S_TRACK:
		*status |= FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
		return 0;
	}

	BUG();
}

struct va1j5jf8007s_cb_map {
	u32 frequency;
	u8 cb;
};

static const struct va1j5jf8007s_cb_map va1j5jf8007s_cb_maps[] = {
	{  986000, 0xb2 },
	{ 1072000, 0xd2 },
	{ 1154000, 0xe2 },
	{ 1291000, 0x20 },
	{ 1447000, 0x40 },
	{ 1615000, 0x60 },
	{ 1791000, 0x80 },
	{ 1972000, 0xa0 },
};

static u8 va1j5jf8007s_lookup_cb(u32 frequency)
{
	int i;
	const struct va1j5jf8007s_cb_map *map;

	for (i = 0; i < ARRAY_SIZE(va1j5jf8007s_cb_maps); i++) {
		map = &va1j5jf8007s_cb_maps[i];
		if (frequency < map->frequency)
			return map->cb;
	}
	return 0xc0;
}

static int va1j5jf8007s_set_frequency_1(struct va1j5jf8007s_state *state)
{
	u32 frequency;
	u16 word;
	u8 buf[6];
	struct i2c_msg msg;

	frequency = state->fe.dtv_property_cache.frequency;

	word = (frequency + 500) / 1000;
	if (frequency < 1072000)
		word = (word << 1 & ~0x1f) | (word & 0x0f);

	buf[0] = 0xfe;
	buf[1] = 0xc0;
	buf[2] = 0x40 | word >> 8;
	buf[3] = word;
	buf[4] = 0xe0;
	buf[5] = va1j5jf8007s_lookup_cb(frequency);

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int va1j5jf8007s_set_frequency_2(struct va1j5jf8007s_state *state)
{
	u8 buf[3];
	struct i2c_msg msg;

	buf[0] = 0xfe;
	buf[1] = 0xc0;
	buf[2] = 0xe4;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int va1j5jf8007s_set_frequency_3(struct va1j5jf8007s_state *state)
{
	u32 frequency;
	u8 buf[4];
	struct i2c_msg msg;

	frequency = state->fe.dtv_property_cache.frequency;

	buf[0] = 0xfe;
	buf[1] = 0xc0;
	buf[2] = 0xf4;
	buf[3] = va1j5jf8007s_lookup_cb(frequency) | 0x4;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int
va1j5jf8007s_check_frequency(struct va1j5jf8007s_state *state, int *lock)
{
	u8 addr;
	u8 write_buf[2], read_buf[1];
	struct i2c_msg msgs[2];

	addr = state->config->demod_address;

	write_buf[0] = 0xfe;
	write_buf[1] = 0xc1;

	msgs[0].addr = addr;
	msgs[0].flags = 0;
	msgs[0].len = sizeof(write_buf);
	msgs[0].buf = write_buf;

	msgs[1].addr = addr;
	msgs[1].flags = I2C_M_RD;
	msgs[1].len = sizeof(read_buf);
	msgs[1].buf = read_buf;

	if (i2c_transfer(state->adap, msgs, 2) != 2)
		return -EREMOTEIO;

	*lock = read_buf[0] & 0x40;
	return 0;
}

static int va1j5jf8007s_set_modulation(struct va1j5jf8007s_state *state)
{
	u8 buf[2];
	struct i2c_msg msg;

	buf[0] = 0x03;
	buf[1] = 0x01;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int
va1j5jf8007s_check_modulation(struct va1j5jf8007s_state *state, int *lock)
{
	u8 addr;
	u8 write_buf[1], read_buf[1];
	struct i2c_msg msgs[2];

	addr = state->config->demod_address;

	write_buf[0] = 0xc3;

	msgs[0].addr = addr;
	msgs[0].flags = 0;
	msgs[0].len = sizeof(write_buf);
	msgs[0].buf = write_buf;

	msgs[1].addr = addr;
	msgs[1].flags = I2C_M_RD;
	msgs[1].len = sizeof(read_buf);
	msgs[1].buf = read_buf;

	if (i2c_transfer(state->adap, msgs, 2) != 2)
		return -EREMOTEIO;

	*lock = !(read_buf[0] & 0x10);
	return 0;
}

static int
va1j5jf8007s_set_ts_id(struct va1j5jf8007s_state *state)
{
	u32 ts_id;
	u8 buf[3];
	struct i2c_msg msg;

	ts_id = state->fe.dtv_property_cache.stream_id;
	if (!ts_id || ts_id == NO_STREAM_ID_FILTER)
		return 0;

	buf[0] = 0x8f;
	buf[1] = ts_id >> 8;
	buf[2] = ts_id;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int
va1j5jf8007s_check_ts_id(struct va1j5jf8007s_state *state, int *lock)
{
	u8 addr;
	u8 write_buf[1], read_buf[2];
	struct i2c_msg msgs[2];
	u32 ts_id;

	ts_id = state->fe.dtv_property_cache.stream_id;
	if (!ts_id || ts_id == NO_STREAM_ID_FILTER) {
		*lock = 1;
		return 0;
	}

	addr = state->config->demod_address;

	write_buf[0] = 0xe6;

	msgs[0].addr = addr;
	msgs[0].flags = 0;
	msgs[0].len = sizeof(write_buf);
	msgs[0].buf = write_buf;

	msgs[1].addr = addr;
	msgs[1].flags = I2C_M_RD;
	msgs[1].len = sizeof(read_buf);
	msgs[1].buf = read_buf;

	if (i2c_transfer(state->adap, msgs, 2) != 2)
		return -EREMOTEIO;

	*lock = (read_buf[0] << 8 | read_buf[1]) == ts_id;
	return 0;
}

static int
va1j5jf8007s_tune(struct dvb_frontend *fe,
		  bool re_tune,
		  unsigned int mode_flags,  unsigned int *delay,
		  enum fe_status *status)
{
	struct va1j5jf8007s_state *state;
	int ret;
	int lock = 0;

	state = fe->demodulator_priv;

	if (re_tune)
		state->tune_state = VA1J5JF8007S_SET_FREQUENCY_1;

	switch (state->tune_state) {
	case VA1J5JF8007S_IDLE:
		*delay = 3 * HZ;
		*status = 0;
		return 0;

	case VA1J5JF8007S_SET_FREQUENCY_1:
		ret = va1j5jf8007s_set_frequency_1(state);
		if (ret < 0)
			return ret;

		state->tune_state = VA1J5JF8007S_SET_FREQUENCY_2;
		*delay = 0;
		*status = 0;
		return 0;

	case VA1J5JF8007S_SET_FREQUENCY_2:
		ret = va1j5jf8007s_set_frequency_2(state);
		if (ret < 0)
			return ret;

		state->tune_state = VA1J5JF8007S_SET_FREQUENCY_3;
		*delay = (HZ + 99) / 100;
		*status = 0;
		return 0;

	case VA1J5JF8007S_SET_FREQUENCY_3:
		ret = va1j5jf8007s_set_frequency_3(state);
		if (ret < 0)
			return ret;

		state->tune_state = VA1J5JF8007S_CHECK_FREQUENCY;
		*delay = 0;
		*status = 0;
		return 0;

	case VA1J5JF8007S_CHECK_FREQUENCY:
		ret = va1j5jf8007s_check_frequency(state, &lock);
		if (ret < 0)
			return ret;

		if (!lock)  {
			*delay = (HZ + 999) / 1000;
			*status = 0;
			return 0;
		}

		state->tune_state = VA1J5JF8007S_SET_MODULATION;
		*delay = 0;
		*status = FE_HAS_SIGNAL;
		return 0;

	case VA1J5JF8007S_SET_MODULATION:
		ret = va1j5jf8007s_set_modulation(state);
		if (ret < 0)
			return ret;

		state->tune_state = VA1J5JF8007S_CHECK_MODULATION;
		*delay = 0;
		*status = FE_HAS_SIGNAL;
		return 0;

	case VA1J5JF8007S_CHECK_MODULATION:
		ret = va1j5jf8007s_check_modulation(state, &lock);
		if (ret < 0)
			return ret;

		if (!lock)  {
			*delay = (HZ + 49) / 50;
			*status = FE_HAS_SIGNAL;
			return 0;
		}

		state->tune_state = VA1J5JF8007S_SET_TS_ID;
		*delay = 0;
		*status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
		return 0;

	case VA1J5JF8007S_SET_TS_ID:
		ret = va1j5jf8007s_set_ts_id(state);
		if (ret < 0)
			return ret;

		state->tune_state = VA1J5JF8007S_CHECK_TS_ID;
		return 0;

	case VA1J5JF8007S_CHECK_TS_ID:
		ret = va1j5jf8007s_check_ts_id(state, &lock);
		if (ret < 0)
			return ret;

		if (!lock)  {
			*delay = (HZ + 99) / 100;
			*status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
			return 0;
		}

		state->tune_state = VA1J5JF8007S_TRACK;
		/* fall through */

	case VA1J5JF8007S_TRACK:
		*delay = 3 * HZ;
		*status = FE_HAS_SIGNAL | FE_HAS_CARRIER | FE_HAS_LOCK;
		return 0;
	}

	BUG();
}

static int va1j5jf8007s_init_frequency(struct va1j5jf8007s_state *state)
{
	u8 buf[4];
	struct i2c_msg msg;

	buf[0] = 0xfe;
	buf[1] = 0xc0;
	buf[2] = 0xf0;
	buf[3] = 0x04;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int va1j5jf8007s_set_sleep(struct va1j5jf8007s_state *state, int sleep)
{
	u8 buf[2];
	struct i2c_msg msg;

	buf[0] = 0x17;
	buf[1] = sleep ? 0x01 : 0x00;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1)
		return -EREMOTEIO;

	return 0;
}

static int va1j5jf8007s_sleep(struct dvb_frontend *fe)
{
	struct va1j5jf8007s_state *state;
	int ret;

	state = fe->demodulator_priv;

	ret = va1j5jf8007s_init_frequency(state);
	if (ret < 0)
		return ret;

	return va1j5jf8007s_set_sleep(state, 1);
}

static int va1j5jf8007s_init(struct dvb_frontend *fe)
{
	struct va1j5jf8007s_state *state;

	state = fe->demodulator_priv;
	state->tune_state = VA1J5JF8007S_IDLE;

	return va1j5jf8007s_set_sleep(state, 0);
}

static void va1j5jf8007s_release(struct dvb_frontend *fe)
{
	struct va1j5jf8007s_state *state;
	state = fe->demodulator_priv;
	kfree(state);
}

static const struct dvb_frontend_ops va1j5jf8007s_ops = {
	.delsys = { SYS_ISDBS },
	.info = {
		.name = "VA1J5JF8007/VA1J5JF8011 ISDB-S",
		.frequency_min = 950000,
		.frequency_max = 2150000,
		.frequency_stepsize = 1000,
		.caps = FE_CAN_INVERSION_AUTO | FE_CAN_FEC_AUTO |
			FE_CAN_QAM_AUTO | FE_CAN_TRANSMISSION_MODE_AUTO |
			FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO |
			FE_CAN_MULTISTREAM,
	},

	.read_snr = va1j5jf8007s_read_snr,
	.get_frontend_algo = va1j5jf8007s_get_frontend_algo,
	.read_status = va1j5jf8007s_read_status,
	.tune = va1j5jf8007s_tune,
	.sleep = va1j5jf8007s_sleep,
	.init = va1j5jf8007s_init,
	.release = va1j5jf8007s_release,
};

static int va1j5jf8007s_prepare_1(struct va1j5jf8007s_state *state)
{
	u8 addr;
	u8 write_buf[1], read_buf[1];
	struct i2c_msg msgs[2];

	addr = state->config->demod_address;

	write_buf[0] = 0x07;

	msgs[0].addr = addr;
	msgs[0].flags = 0;
	msgs[0].len = sizeof(write_buf);
	msgs[0].buf = write_buf;

	msgs[1].addr = addr;
	msgs[1].flags = I2C_M_RD;
	msgs[1].len = sizeof(read_buf);
	msgs[1].buf = read_buf;

	if (i2c_transfer(state->adap, msgs, 2) != 2)
		return -EREMOTEIO;

	if (read_buf[0] != 0x41)
		return -EIO;

	return 0;
}

static const u8 va1j5jf8007s_20mhz_prepare_bufs[][2] = {
	{0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
	{0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
	{0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
	{0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
};

static const u8 va1j5jf8007s_25mhz_prepare_bufs[][2] = {
	{0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
	{0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
	{0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
	{0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
};

static int va1j5jf8007s_prepare_2(struct va1j5jf8007s_state *state)
{
	const u8 (*bufs)[2];
	int size;
	u8 addr;
	u8 buf[2];
	struct i2c_msg msg;
	int i;

	switch (state->config->frequency) {
	case VA1J5JF8007S_20MHZ:
		bufs = va1j5jf8007s_20mhz_prepare_bufs;
		size = ARRAY_SIZE(va1j5jf8007s_20mhz_prepare_bufs);
		break;
	case VA1J5JF8007S_25MHZ:
		bufs = va1j5jf8007s_25mhz_prepare_bufs;
		size = ARRAY_SIZE(va1j5jf8007s_25mhz_prepare_bufs);
		break;
	default:
		return -EINVAL;
	}

	addr = state->config->demod_address;

	msg.addr = addr;
	msg.flags = 0;
	msg.len = 2;
	msg.buf = buf;
	for (i = 0; i < size; i++) {
		memcpy(buf, bufs[i], sizeof(buf));
		if (i2c_transfer(state->adap, &msg, 1) != 1)
			return -EREMOTEIO;
	}

	return 0;
}

/* must be called after va1j5jf8007t_attach */
int va1j5jf8007s_prepare(struct dvb_frontend *fe)
{
	struct va1j5jf8007s_state *state;
	int ret;

	state = fe->demodulator_priv;

	ret = va1j5jf8007s_prepare_1(state);
	if (ret < 0)
		return ret;

	ret = va1j5jf8007s_prepare_2(state);
	if (ret < 0)
		return ret;

	return va1j5jf8007s_init_frequency(state);
}

struct dvb_frontend *
va1j5jf8007s_attach(const struct va1j5jf8007s_config *config,
		    struct i2c_adapter *adap)
{
	struct va1j5jf8007s_state *state;
	struct dvb_frontend *fe;
	u8 buf[2];
	struct i2c_msg msg;

	state = kzalloc(sizeof(struct va1j5jf8007s_state), GFP_KERNEL);
	if (!state)
		return NULL;

	state->config = config;
	state->adap = adap;

	fe = &state->fe;
	memcpy(&fe->ops, &va1j5jf8007s_ops, sizeof(struct dvb_frontend_ops));
	fe->demodulator_priv = state;

	buf[0] = 0x01;
	buf[1] = 0x80;

	msg.addr = state->config->demod_address;
	msg.flags = 0;
	msg.len = sizeof(buf);
	msg.buf = buf;

	if (i2c_transfer(state->adap, &msg, 1) != 1) {
		kfree(state);
		return NULL;
	}

	return fe;
}
Commit	Line	Data
3d17fb1b	1	/*
4d1f413e	2	* ISDB-S driver for VA1J5JF8007/VA1J5JF8011
3d17fb1b MCC	3	*
	4	* Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
	5	*
	6	* based on pt1dvr - http://pt1dvr.sourceforge.jp/
	7	* by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License as published by
	11	* the Free Software Foundation; either version 2 of the License, or
	12	* (at your option) any later version.
	13	*
	14	* This program is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
3d17fb1b MCC	18	*/
	19
	20	#include <linux/kernel.h>
	21	#include <linux/module.h>
	22	#include <linux/slab.h>
	23	#include <linux/i2c.h>
	24	#include "dvb_frontend.h"
	25	#include "va1j5jf8007s.h"
	26
	27	enum va1j5jf8007s_tune_state {
	28	VA1J5JF8007S_IDLE,
	29	VA1J5JF8007S_SET_FREQUENCY_1,
	30	VA1J5JF8007S_SET_FREQUENCY_2,
	31	VA1J5JF8007S_SET_FREQUENCY_3,
	32	VA1J5JF8007S_CHECK_FREQUENCY,
	33	VA1J5JF8007S_SET_MODULATION,
	34	VA1J5JF8007S_CHECK_MODULATION,
	35	VA1J5JF8007S_SET_TS_ID,
	36	VA1J5JF8007S_CHECK_TS_ID,
	37	VA1J5JF8007S_TRACK,
	38	};
	39
	40	struct va1j5jf8007s_state {
	41	const struct va1j5jf8007s_config *config;
	42	struct i2c_adapter *adap;
	43	struct dvb_frontend fe;
	44	enum va1j5jf8007s_tune_state tune_state;
	45	};
	46
c4c1e295	47	static int va1j5jf8007s_read_snr(struct dvb_frontend fe, u16 snr)
	48	{
	49	struct va1j5jf8007s_state *state;
	50	u8 addr;
	51	int i;
	52	u8 write_buf[1], read_buf[1];
	53	struct i2c_msg msgs[2];
	54	s32 word, x1, x2, x3, x4, x5, y;
	55
	56	state = fe->demodulator_priv;
	57	addr = state->config->demod_address;
	58
	59	word = 0;
	60	for (i = 0; i < 2; i++) {
	61	write_buf[0] = 0xbc + i;
	62
	63	msgs[0].addr = addr;
	64	msgs[0].flags = 0;
	65	msgs[0].len = sizeof(write_buf);
	66	msgs[0].buf = write_buf;
	67
	68	msgs[1].addr = addr;
	69	msgs[1].flags = I2C_M_RD;
	70	msgs[1].len = sizeof(read_buf);
	71	msgs[1].buf = read_buf;
	72
	73	if (i2c_transfer(state->adap, msgs, 2) != 2)
	74	return -EREMOTEIO;
	75
	76	word <<= 8;
	77	word \|= read_buf[0];
	78	}
	79
	80	word -= 3000;
	81	if (word < 0)
	82	word = 0;
	83
	84	x1 = int_sqrt(word << 16) * ((15625ll << 21) / 1000000);
	85	x2 = (s64)x1 * x1 >> 31;
	86	x3 = (s64)x2 * x1 >> 31;
	87	x4 = (s64)x2 * x2 >> 31;
	88	x5 = (s64)x4 * x1 >> 31;
	89
	90	y = (58857ll << 23) / 1000;
	91	y -= (s64)x1 * ((89565ll << 24) / 1000) >> 30;
	92	y += (s64)x2 * ((88977ll << 24) / 1000) >> 28;
	93	y -= (s64)x3 * ((50259ll << 25) / 1000) >> 27;
	94	y += (s64)x4 * ((14341ll << 27) / 1000) >> 27;
	95	y -= (s64)x5 * ((16346ll << 30) / 10000) >> 28;
	96
	97	*snr = y < 0 ? 0 : y >> 15;
	98	return 0;
	99	}
	100
3d17fb1b MCC	101	static int va1j5jf8007s_get_frontend_algo(struct dvb_frontend *fe)
	102	{
	103	return DVBFE_ALGO_HW;
	104	}
	105
	106	static int
0df289a2	107	va1j5jf8007s_read_status(struct dvb_frontend fe, enum fe_status status)
3d17fb1b MCC	108	{
	109	struct va1j5jf8007s_state *state;
	110
	111	state = fe->demodulator_priv;
	112
	113	switch (state->tune_state) {
	114	case VA1J5JF8007S_IDLE:
	115	case VA1J5JF8007S_SET_FREQUENCY_1:
	116	case VA1J5JF8007S_SET_FREQUENCY_2:
	117	case VA1J5JF8007S_SET_FREQUENCY_3:
	118	case VA1J5JF8007S_CHECK_FREQUENCY:
	119	*status = 0;
	120	return 0;
	121
	122
	123	case VA1J5JF8007S_SET_MODULATION:
	124	case VA1J5JF8007S_CHECK_MODULATION:
	125	*status \|= FE_HAS_SIGNAL;
	126	return 0;
	127
	128	case VA1J5JF8007S_SET_TS_ID:
	129	case VA1J5JF8007S_CHECK_TS_ID:
	130	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER;
	131	return 0;
	132
	133	case VA1J5JF8007S_TRACK:
	134	*status \|= FE_HAS_SIGNAL \| FE_HAS_CARRIER \| FE_HAS_LOCK;
	135	return 0;
	136	}
	137
	138	BUG();
	139	}
	140
	141	struct va1j5jf8007s_cb_map {
	142	u32 frequency;
	143	u8 cb;
	144	};
	145
	146	static const struct va1j5jf8007s_cb_map va1j5jf8007s_cb_maps[] = {
	147	{ 986000, 0xb2 },
	148	{ 1072000, 0xd2 },
	149	{ 1154000, 0xe2 },
	150	{ 1291000, 0x20 },
	151	{ 1447000, 0x40 },
	152	{ 1615000, 0x60 },
	153	{ 1791000, 0x80 },
	154	{ 1972000, 0xa0 },
	155	};
	156
	157	static u8 va1j5jf8007s_lookup_cb(u32 frequency)
	158	{
	159	int i;
	160	const struct va1j5jf8007s_cb_map *map;
	161
	162	for (i = 0; i < ARRAY_SIZE(va1j5jf8007s_cb_maps); i++) {
	163	map = &va1j5jf8007s_cb_maps[i];
	164	if (frequency < map->frequency)
	165	return map->cb;
	166	}
	167	return 0xc0;
	168	}
	169
	170	static int va1j5jf8007s_set_frequency_1(struct va1j5jf8007s_state *state)
	171	{
172	u32 frequency;
173	u16 word;
174	u8 buf[6];
175	struct i2c_msg msg;
176
177	frequency = state->fe.dtv_property_cache.frequency;
178
179	word = (frequency + 500) / 1000;
180	if (frequency < 1072000)
181	word = (word << 1 & ~0x1f) \| (word & 0x0f);
182
183	buf[0] = 0xfe;
184	buf[1] = 0xc0;
185	buf[2] = 0x40 \| word >> 8;
186	buf[3] = word;
187	buf[4] = 0xe0;
188	buf[5] = va1j5jf8007s_lookup_cb(frequency);
189
190	msg.addr = state->config->demod_address;
191	msg.flags = 0;
192	msg.len = sizeof(buf);
193	msg.buf = buf;
194
195	if (i2c_transfer(state->adap, &msg, 1) != 1)
196	return -EREMOTEIO;
197
198	return 0;
199	}
200
201	static int va1j5jf8007s_set_frequency_2(struct va1j5jf8007s_state *state)
202	{
203	u8 buf[3];
204	struct i2c_msg msg;
205
206	buf[0] = 0xfe;
207	buf[1] = 0xc0;
208	buf[2] = 0xe4;
209
210	msg.addr = state->config->demod_address;
211	msg.flags = 0;
212	msg.len = sizeof(buf);
213	msg.buf = buf;
214
215	if (i2c_transfer(state->adap, &msg, 1) != 1)
216	return -EREMOTEIO;
217
218	return 0;
219	}
220
221	static int va1j5jf8007s_set_frequency_3(struct va1j5jf8007s_state *state)
222	{
223	u32 frequency;
224	u8 buf[4];
225	struct i2c_msg msg;
226
227	frequency = state->fe.dtv_property_cache.frequency;
228
229	buf[0] = 0xfe;
230	buf[1] = 0xc0;
231	buf[2] = 0xf4;
232	buf[3] = va1j5jf8007s_lookup_cb(frequency) \| 0x4;
233
234	msg.addr = state->config->demod_address;
235	msg.flags = 0;
236	msg.len = sizeof(buf);
237	msg.buf = buf;
238
239	if (i2c_transfer(state->adap, &msg, 1) != 1)
240	return -EREMOTEIO;
241
242	return 0;
243	}
244
245	static int
246	va1j5jf8007s_check_frequency(struct va1j5jf8007s_state state, int lock)
247	{
248	u8 addr;
249	u8 write_buf[2], read_buf[1];
250	struct i2c_msg msgs[2];
251
252	addr = state->config->demod_address;
253
254	write_buf[0] = 0xfe;
255	write_buf[1] = 0xc1;
256
257	msgs[0].addr = addr;
258	msgs[0].flags = 0;
259	msgs[0].len = sizeof(write_buf);
260	msgs[0].buf = write_buf;
261
262	msgs[1].addr = addr;
263	msgs[1].flags = I2C_M_RD;
264	msgs[1].len = sizeof(read_buf);
265	msgs[1].buf = read_buf;
266
267	if (i2c_transfer(state->adap, msgs, 2) != 2)
268	return -EREMOTEIO;
269
270	*lock = read_buf[0] & 0x40;
271	return 0;
272	}
273
274	static int va1j5jf8007s_set_modulation(struct va1j5jf8007s_state *state)
275	{
276	u8 buf[2];
277	struct i2c_msg msg;
278
279	buf[0] = 0x03;
280	buf[1] = 0x01;
281
282	msg.addr = state->config->demod_address;
283	msg.flags = 0;
284	msg.len = sizeof(buf);
285	msg.buf = buf;
286
287	if (i2c_transfer(state->adap, &msg, 1) != 1)
288	return -EREMOTEIO;
289
290	return 0;
291	}
292
293	static int
294	va1j5jf8007s_check_modulation(struct va1j5jf8007s_state state, int lock)
295	{
296	u8 addr;
297	u8 write_buf[1], read_buf[1];
298	struct i2c_msg msgs[2];
299
300	addr = state->config->demod_address;
301
302	write_buf[0] = 0xc3;
303
304	msgs[0].addr = addr;
305	msgs[0].flags = 0;
306	msgs[0].len = sizeof(write_buf);
307	msgs[0].buf = write_buf;
308
309	msgs[1].addr = addr;
310	msgs[1].flags = I2C_M_RD;
311	msgs[1].len = sizeof(read_buf);
312	msgs[1].buf = read_buf;
313
314	if (i2c_transfer(state->adap, msgs, 2) != 2)
315	return -EREMOTEIO;
316
317	*lock = !(read_buf[0] & 0x10);
318	return 0;
319	}
320
321	static int
322	va1j5jf8007s_set_ts_id(struct va1j5jf8007s_state *state)
323	{
324	u32 ts_id;
325	u8 buf[3];
326	struct i2c_msg msg;
327
287cefd0 EP	328	ts_id = state->fe.dtv_property_cache.stream_id;
287cefd0 EP	329	if (!ts_id \|\| ts_id == NO_STREAM_ID_FILTER)
3d17fb1b MCC	330	return 0;
	331
	332	buf[0] = 0x8f;
	333	buf[1] = ts_id >> 8;
	334	buf[2] = ts_id;
	335
	336	msg.addr = state->config->demod_address;
	337	msg.flags = 0;
	338	msg.len = sizeof(buf);
	339	msg.buf = buf;
	340
	341	if (i2c_transfer(state->adap, &msg, 1) != 1)
	342	return -EREMOTEIO;
	343
	344	return 0;
	345	}
	346
	347	static int
	348	va1j5jf8007s_check_ts_id(struct va1j5jf8007s_state state, int lock)
	349	{
	350	u8 addr;
	351	u8 write_buf[1], read_buf[2];
	352	struct i2c_msg msgs[2];
	353	u32 ts_id;
	354
287cefd0 EP	355	ts_id = state->fe.dtv_property_cache.stream_id;
287cefd0 EP	356	if (!ts_id \|\| ts_id == NO_STREAM_ID_FILTER) {
3d17fb1b MCC	357	*lock = 1;
	358	return 0;
	359	}
	360
	361	addr = state->config->demod_address;
	362
	363	write_buf[0] = 0xe6;
	364
	365	msgs[0].addr = addr;
	366	msgs[0].flags = 0;
	367	msgs[0].len = sizeof(write_buf);
	368	msgs[0].buf = write_buf;
	369
	370	msgs[1].addr = addr;
	371	msgs[1].flags = I2C_M_RD;
	372	msgs[1].len = sizeof(read_buf);
	373	msgs[1].buf = read_buf;
	374
	375	if (i2c_transfer(state->adap, msgs, 2) != 2)
	376	return -EREMOTEIO;
	377
	378	*lock = (read_buf[0] << 8 \| read_buf[1]) == ts_id;
	379	return 0;
	380	}
	381
	382	static int
	383	va1j5jf8007s_tune(struct dvb_frontend *fe,
7e072221	384	bool re_tune,
3d17fb1b	385	unsigned int mode_flags, unsigned int *delay,
0df289a2	386	enum fe_status *status)
3d17fb1b MCC	387	{
	388	struct va1j5jf8007s_state *state;
	389	int ret;
289a774b	390	int lock = 0;
3d17fb1b MCC	391
	392	state = fe->demodulator_priv;
	393
7e072221	394	if (re_tune)
3d17fb1b MCC	395	state->tune_state = VA1J5JF8007S_SET_FREQUENCY_1;
	396
	397	switch (state->tune_state) {
	398	case VA1J5JF8007S_IDLE:
	399	delay = 3 HZ;
	400	*status = 0;
	401	return 0;
	402
	403	case VA1J5JF8007S_SET_FREQUENCY_1:
	404	ret = va1j5jf8007s_set_frequency_1(state);
	405	if (ret < 0)
	406	return ret;
	407
	408	state->tune_state = VA1J5JF8007S_SET_FREQUENCY_2;
	409	*delay = 0;
	410	*status = 0;
	411	return 0;
	412
	413	case VA1J5JF8007S_SET_FREQUENCY_2:
	414	ret = va1j5jf8007s_set_frequency_2(state);
	415	if (ret < 0)
	416	return ret;
	417
	418	state->tune_state = VA1J5JF8007S_SET_FREQUENCY_3;
	419	*delay = (HZ + 99) / 100;
	420	*status = 0;
	421	return 0;
	422
	423	case VA1J5JF8007S_SET_FREQUENCY_3:
	424	ret = va1j5jf8007s_set_frequency_3(state);
	425	if (ret < 0)
	426	return ret;
	427
	428	state->tune_state = VA1J5JF8007S_CHECK_FREQUENCY;
	429	*delay = 0;
	430	*status = 0;
	431	return 0;
	432
	433	case VA1J5JF8007S_CHECK_FREQUENCY:
	434	ret = va1j5jf8007s_check_frequency(state, &lock);
	435	if (ret < 0)
	436	return ret;
	437
	438	if (!lock) {
	439	*delay = (HZ + 999) / 1000;
	440	*status = 0;
	441	return 0;
	442	}
	443
	444	state->tune_state = VA1J5JF8007S_SET_MODULATION;
	445	*delay = 0;
	446	*status = FE_HAS_SIGNAL;
	447	return 0;
	448
	449	case VA1J5JF8007S_SET_MODULATION:
	450	ret = va1j5jf8007s_set_modulation(state);
	451	if (ret < 0)
	452	return ret;
	453
	454	state->tune_state = VA1J5JF8007S_CHECK_MODULATION;
	455	*delay = 0;
	456	*status = FE_HAS_SIGNAL;
	457	return 0;
	458
459	case VA1J5JF8007S_CHECK_MODULATION:
460	ret = va1j5jf8007s_check_modulation(state, &lock);
461	if (ret < 0)
462	return ret;
463
464	if (!lock) {
465	*delay = (HZ + 49) / 50;
466	*status = FE_HAS_SIGNAL;
467	return 0;
468	}
469
470	state->tune_state = VA1J5JF8007S_SET_TS_ID;
471	*delay = 0;
472	*status = FE_HAS_SIGNAL \| FE_HAS_CARRIER;
473	return 0;
474
475	case VA1J5JF8007S_SET_TS_ID:
476	ret = va1j5jf8007s_set_ts_id(state);
477	if (ret < 0)
478	return ret;
479
480	state->tune_state = VA1J5JF8007S_CHECK_TS_ID;
481	return 0;
482
483	case VA1J5JF8007S_CHECK_TS_ID:
484	ret = va1j5jf8007s_check_ts_id(state, &lock);
485	if (ret < 0)
486	return ret;
487
488	if (!lock) {
489	*delay = (HZ + 99) / 100;
490	*status = FE_HAS_SIGNAL \| FE_HAS_CARRIER;
491	return 0;
492	}
493
494	state->tune_state = VA1J5JF8007S_TRACK;
495	/* fall through */
496
497	case VA1J5JF8007S_TRACK:
498	delay = 3 HZ;
499	*status = FE_HAS_SIGNAL \| FE_HAS_CARRIER \| FE_HAS_LOCK;
500	return 0;
501	}
502
503	BUG();
504	}
505
506	static int va1j5jf8007s_init_frequency(struct va1j5jf8007s_state *state)
507	{
508	u8 buf[4];
509	struct i2c_msg msg;
510
511	buf[0] = 0xfe;
512	buf[1] = 0xc0;
513	buf[2] = 0xf0;
514	buf[3] = 0x04;
515
516	msg.addr = state->config->demod_address;
517	msg.flags = 0;
518	msg.len = sizeof(buf);
519	msg.buf = buf;
520
521	if (i2c_transfer(state->adap, &msg, 1) != 1)
522	return -EREMOTEIO;
523
524	return 0;
525	}
526
527	static int va1j5jf8007s_set_sleep(struct va1j5jf8007s_state *state, int sleep)
528	{
529	u8 buf[2];
530	struct i2c_msg msg;
531
532	buf[0] = 0x17;
533	buf[1] = sleep ? 0x01 : 0x00;
534
535	msg.addr = state->config->demod_address;
536	msg.flags = 0;
537	msg.len = sizeof(buf);
538	msg.buf = buf;
539
540	if (i2c_transfer(state->adap, &msg, 1) != 1)
541	return -EREMOTEIO;
542
543	return 0;
544	}
545
546	static int va1j5jf8007s_sleep(struct dvb_frontend *fe)
547	{
548	struct va1j5jf8007s_state *state;
549	int ret;
550
551	state = fe->demodulator_priv;
552
553	ret = va1j5jf8007s_init_frequency(state);
554	if (ret < 0)
555	return ret;
556
557	return va1j5jf8007s_set_sleep(state, 1);
558	}
559
560	static int va1j5jf8007s_init(struct dvb_frontend *fe)
561	{
562	struct va1j5jf8007s_state *state;
563
564	state = fe->demodulator_priv;
565	state->tune_state = VA1J5JF8007S_IDLE;
566
567	return va1j5jf8007s_set_sleep(state, 0);
568	}
569
570	static void va1j5jf8007s_release(struct dvb_frontend *fe)
571	{
572	struct va1j5jf8007s_state *state;
573	state = fe->demodulator_priv;
574	kfree(state);
575	}
576
bd336e63	577	static const struct dvb_frontend_ops va1j5jf8007s_ops = {
533b673b	578	.delsys = { SYS_ISDBS },
3d17fb1b	579	.info = {
4d1f413e	580	.name = "VA1J5JF8007/VA1J5JF8011 ISDB-S",
3d17fb1b MCC	581	.frequency_min = 950000,
	582	.frequency_max = 2150000,
	583	.frequency_stepsize = 1000,
	584	.caps = FE_CAN_INVERSION_AUTO \| FE_CAN_FEC_AUTO \|
	585	FE_CAN_QAM_AUTO \| FE_CAN_TRANSMISSION_MODE_AUTO \|
287cefd0 EP	586	FE_CAN_GUARD_INTERVAL_AUTO \| FE_CAN_HIERARCHY_AUTO \|
287cefd0 EP	587	FE_CAN_MULTISTREAM,
3d17fb1b MCC	588	},
3d17fb1b MCC	589
c4c1e295	590	.read_snr = va1j5jf8007s_read_snr,
3d17fb1b MCC	591	.get_frontend_algo = va1j5jf8007s_get_frontend_algo,
	592	.read_status = va1j5jf8007s_read_status,
	593	.tune = va1j5jf8007s_tune,
	594	.sleep = va1j5jf8007s_sleep,
	595	.init = va1j5jf8007s_init,
	596	.release = va1j5jf8007s_release,
	597	};
	598
	599	static int va1j5jf8007s_prepare_1(struct va1j5jf8007s_state *state)
	600	{
	601	u8 addr;
	602	u8 write_buf[1], read_buf[1];
	603	struct i2c_msg msgs[2];
	604
	605	addr = state->config->demod_address;
	606
	607	write_buf[0] = 0x07;
	608
	609	msgs[0].addr = addr;
	610	msgs[0].flags = 0;
	611	msgs[0].len = sizeof(write_buf);
	612	msgs[0].buf = write_buf;
	613
	614	msgs[1].addr = addr;
	615	msgs[1].flags = I2C_M_RD;
	616	msgs[1].len = sizeof(read_buf);
	617	msgs[1].buf = read_buf;
	618
	619	if (i2c_transfer(state->adap, msgs, 2) != 2)
	620	return -EREMOTEIO;
	621
	622	if (read_buf[0] != 0x41)
	623	return -EIO;
	624
	625	return 0;
	626	}
	627
4d1f413e	628	static const u8 va1j5jf8007s_20mhz_prepare_bufs[][2] = {
3d17fb1b MCC	629	{0x04, 0x02}, {0x0d, 0x55}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01},
	630	{0x1c, 0x0a}, {0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0},
	631	{0x52, 0x89}, {0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69},
	632	{0x87, 0x04}, {0x8e, 0x02}, {0xa3, 0xf7}, {0xa5, 0xc0},
	633	};
	634
4d1f413e HT	635	static const u8 va1j5jf8007s_25mhz_prepare_bufs[][2] = {
	636	{0x04, 0x02}, {0x11, 0x40}, {0x13, 0x80}, {0x17, 0x01}, {0x1c, 0x0a},
	637	{0x1d, 0xaa}, {0x1e, 0x20}, {0x1f, 0x88}, {0x51, 0xb0}, {0x52, 0x89},
	638	{0x53, 0xb3}, {0x5a, 0x2d}, {0x5b, 0xd3}, {0x85, 0x69}, {0x87, 0x04},
	639	{0x8e, 0x26}, {0xa3, 0xf7}, {0xa5, 0xc0},
	640	};
	641
3d17fb1b MCC	642	static int va1j5jf8007s_prepare_2(struct va1j5jf8007s_state *state)
3d17fb1b MCC	643	{
4d1f413e HT	644	const u8 (*bufs)[2];
4d1f413e HT	645	int size;
3d17fb1b MCC	646	u8 addr;
	647	u8 buf[2];
	648	struct i2c_msg msg;
	649	int i;
	650
4d1f413e HT	651	switch (state->config->frequency) {
	652	case VA1J5JF8007S_20MHZ:
	653	bufs = va1j5jf8007s_20mhz_prepare_bufs;
	654	size = ARRAY_SIZE(va1j5jf8007s_20mhz_prepare_bufs);
	655	break;
	656	case VA1J5JF8007S_25MHZ:
	657	bufs = va1j5jf8007s_25mhz_prepare_bufs;
	658	size = ARRAY_SIZE(va1j5jf8007s_25mhz_prepare_bufs);
	659	break;
	660	default:
	661	return -EINVAL;
	662	}
	663
3d17fb1b MCC	664	addr = state->config->demod_address;
	665
	666	msg.addr = addr;
	667	msg.flags = 0;
	668	msg.len = 2;
	669	msg.buf = buf;
4d1f413e HT	670	for (i = 0; i < size; i++) {
4d1f413e HT	671	memcpy(buf, bufs[i], sizeof(buf));
3d17fb1b MCC	672	if (i2c_transfer(state->adap, &msg, 1) != 1)
	673	return -EREMOTEIO;
	674	}
	675
	676	return 0;
	677	}
	678
	679	/* must be called after va1j5jf8007t_attach */
	680	int va1j5jf8007s_prepare(struct dvb_frontend *fe)
	681	{
	682	struct va1j5jf8007s_state *state;
	683	int ret;
	684
	685	state = fe->demodulator_priv;
	686
	687	ret = va1j5jf8007s_prepare_1(state);
	688	if (ret < 0)
	689	return ret;
	690
	691	ret = va1j5jf8007s_prepare_2(state);
	692	if (ret < 0)
	693	return ret;
	694
	695	return va1j5jf8007s_init_frequency(state);
	696	}
	697
	698	struct dvb_frontend *
	699	va1j5jf8007s_attach(const struct va1j5jf8007s_config *config,
	700	struct i2c_adapter *adap)
	701	{
	702	struct va1j5jf8007s_state *state;
	703	struct dvb_frontend *fe;
	704	u8 buf[2];
	705	struct i2c_msg msg;
	706
	707	state = kzalloc(sizeof(struct va1j5jf8007s_state), GFP_KERNEL);
	708	if (!state)
	709	return NULL;
	710
	711	state->config = config;
	712	state->adap = adap;
	713
	714	fe = &state->fe;
	715	memcpy(&fe->ops, &va1j5jf8007s_ops, sizeof(struct dvb_frontend_ops));
	716	fe->demodulator_priv = state;
	717
	718	buf[0] = 0x01;
	719	buf[1] = 0x80;
	720
	721	msg.addr = state->config->demod_address;
	722	msg.flags = 0;
	723	msg.len = sizeof(buf);
	724	msg.buf = buf;
	725
	726	if (i2c_transfer(state->adap, &msg, 1) != 1) {
	727	kfree(state);
	728	return NULL;
	729	}
	730
	731	return fe;
	732	}