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[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / saa7134 / saa7134-dvb.c
CommitLineData
1da177e4 1/*
1da177e4
LT		 2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC		 5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT		 8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
1da177e4
LT		 17 */
18
9a12ccfc
MCC		 19#include "saa7134.h"
20#include "saa7134-reg.h"
21
1da177e4
LT		 22#include <linux/init.h>
23#include <linux/list.h>
24#include <linux/module.h>
25#include <linux/kernel.h>
1da177e4
LT		 26#include <linux/delay.h>
27#include <linux/kthread.h>
28#include <linux/suspend.h>
29
5e453dc7 30#include <media/v4l2-common.h>
a78d0bfa 31#include "dvb-pll.h"
5823b3a6 32#include <dvb_frontend.h>
1da177e4 33
1f10c7af
AQ		 34#include "mt352.h"
35#include "mt352_priv.h" /* FIXME */
36#include "tda1004x.h"
37#include "nxt200x.h"
bc36a686 38#include "tuner-xc2028.h"
2930992c 39#include "xc5000.h"
1da177e4 40
e2ac28fa
IL		 41#include "tda10086.h"
42#include "tda826x.h"
8ce47dad 43#include "tda827x.h"
e2ac28fa 44#include "isl6421.h"
4b1431ca 45#include "isl6405.h"
6ab465a8 46#include "lnbp21.h"
cb89cd33 47#include "tuner-simple.h"
1bc7f51c 48#include "tda10048.h"
3abdedd8
MK		 49#include "tda18271.h"
50#include "lgdt3305.h"
51#include "tda8290.h"
f0551efc 52#include "mb86a20s.h"
ce02704d 53#include "lgs8gxx.h"
8ce47dad 54
47aeba5a 55#include "zl10353.h"
dbe8740d 56#include "qt1010.h"
47aeba5a 57
04574185 58#include "zl10036.h"
ecfcfec8 59#include "zl10039.h"
04574185 60#include "mt312.h"
25fa2071 61#include "s5h1411.h"
04574185 62
1da177e4
LT		 63MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
64MODULE_LICENSE("GPL");
65
ff699e6b 66static unsigned int antenna_pwr;
86ddd96f 67
1da177e4
LT		 68module_param(antenna_pwr, int, 0444);
69MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
70
ff699e6b 71static int use_frontend;
b331daa0
SB		 72module_param(use_frontend, int, 0644);
73MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 74
78e92006
JG		 75DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
76
58ef4f92
HH		 77/* ------------------------------------------------------------------
78 * mt352 based DVB-T cards
79 */
80
1da177e4
LT		 81static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
82{
83 u32 ok;
84
85 if (!on) {
86 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
87 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
88 return 0;
89 }
90
91 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
92 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
93 udelay(10);
94
95 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
96 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
97 udelay(10);
98 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
99 udelay(10);
100 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
7516657a 101 pr_debug("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT		 102
103 if (!ok)
104 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
105 return ok;
106}
107
108static int mt352_pinnacle_init(struct dvb_frontend* fe)
109{
110 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
111 static u8 reset [] = { RESET, 0x80 };
112 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
113 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
114 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
115 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
116 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
117 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
118 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
1da177e4 119
7516657a 120 pr_debug("%s called\n", __func__);
1da177e4
LT		 121
122 mt352_write(fe, clock_config, sizeof(clock_config));
123 udelay(200);
124 mt352_write(fe, reset, sizeof(reset));
125 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
126 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
127 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
128 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
129
130 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
131 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
132 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 133
1da177e4
LT		 134 return 0;
135}
136
a78d0bfa
JAR		 137static int mt352_aver777_init(struct dvb_frontend* fe)
138{
139 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
140 static u8 reset [] = { RESET, 0x80 };
141 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
142 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
143 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
144
145 mt352_write(fe, clock_config, sizeof(clock_config));
146 udelay(200);
147 mt352_write(fe, reset, sizeof(reset));
148 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
149 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
150 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
151
152 return 0;
153}
154
6e501a3f 155static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 156{
6e501a3f
TF		 157 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
158 static u8 reset [] = { RESET, 0x80 };
159 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
160 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC		 161 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
162
163 mt352_write(fe, clock_config, sizeof(clock_config));
164 udelay(200);
165 mt352_write(fe, reset, sizeof(reset));
166 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
167 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
168 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC		 169 return 0;
170}
171
14d24d14 172static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe)
1da177e4 173{
b09cf61d 174 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
df8cf706
HH		 175 u8 off[] = { 0x00, 0xf1};
176 u8 on[] = { 0x00, 0x71};
177 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
178
1da177e4
LT		 179 struct saa7134_dev *dev = fe->dvb->priv;
180 struct v4l2_frequency f;
181
182 /* set frequency (mt2050) */
183 f.tuner = 0;
184 f.type = V4L2_TUNER_DIGITAL_TV;
b09cf61d 185 f.frequency = c->frequency / 1000 * 16 / 1000;
dea74869
PB		 186 if (fe->ops.i2c_gate_ctrl)
187 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 188 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 189 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 190 msg.buf = on;
dea74869
PB		 191 if (fe->ops.i2c_gate_ctrl)
192 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 193 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT		 194
195 pinnacle_antenna_pwr(dev, antenna_pwr);
196
197 /* mt352 setup */
0463f12c 198 return mt352_pinnacle_init(fe);
1da177e4
LT		 199}
200
201static struct mt352_config pinnacle_300i = {
202 .demod_address = 0x3c >> 1,
203 .adc_clock = 20333,
204 .if2 = 36150,
205 .no_tuner = 1,
206 .demod_init = mt352_pinnacle_init,
1da177e4 207};
a78d0bfa
JAR		 208
209static struct mt352_config avermedia_777 = {
210 .demod_address = 0xf,
211 .demod_init = mt352_aver777_init,
a78d0bfa 212};
1da177e4 213
6e501a3f 214static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC		 215 .demod_address = (0x1e >> 1),
216 .no_tuner = 1,
6e501a3f 217 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC		 218};
219
f0551efc
MCC		 220static struct tda18271_std_map mb86a20s_tda18271_std_map = {
221 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
222 .if_lvl = 7, .rfagc_top = 0x37, },
223};
224
225static struct tda18271_config kworld_tda18271_config = {
226 .std_map = &mb86a20s_tda18271_std_map,
6a58bc0f 227 .gate = TDA18271_GATE_DIGITAL,
ecb71d26
MCC		 228 .config = 3, /* Use tuner callback for AGC */
229
f0551efc
MCC		 230};
231
232static const struct mb86a20s_config kworld_mb86a20s_config = {
233 .demod_address = 0x10,
234};
235
6a58bc0f
MCC		 236static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable)
237{
238 struct saa7134_dev *dev = fe->dvb->priv;
239
240 unsigned char initmsg[] = {0x45, 0x97};
241 unsigned char msg_enable[] = {0x45, 0xc1};
242 unsigned char msg_disable[] = {0x45, 0x81};
243 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
244
245 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
ae618919 246 pr_warn("could not access the I2C gate\n");
6a58bc0f
MCC		 247 return -EIO;
248 }
249 if (enable)
250 msg.buf = msg_enable;
251 else
252 msg.buf = msg_disable;
253 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
ae618919 254 pr_warn("could not access the I2C gate\n");
6a58bc0f
MCC		 255 return -EIO;
256 }
257 msleep(20);
258 return 0;
259}
260
58ef4f92
HH		 261/* ==================================================================
262 * tda1004x based DVB-T cards, helper functions
263 */
264
265static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
266 const struct firmware **fw, char *name)
1da177e4
LT		 267{
268 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 269 return request_firmware(fw, name, &dev->pci->dev);
270}
271
58ef4f92
HH		 272/* ------------------------------------------------------------------
273 * these tuners are tu1216, td1316(a)
274 */
275
14d24d14 276static int philips_tda6651_pll_set(struct dvb_frontend *fe)
58ef4f92 277{
b09cf61d 278 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
58ef4f92
HH		 279 struct saa7134_dev *dev = fe->dvb->priv;
280 struct tda1004x_state *state = fe->demodulator_priv;
281 u8 addr = state->config->tuner_address;
86ddd96f 282 u8 tuner_buf[4];
2cf36ac4 283 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC		 284 sizeof(tuner_buf) };
285 int tuner_frequency = 0;
286 u8 band, cp, filter;
287
288 /* determine charge pump */
b09cf61d 289 tuner_frequency = c->frequency + 36166000;
86ddd96f
MCC		 290 if (tuner_frequency < 87000000)
291 return -EINVAL;
292 else if (tuner_frequency < 130000000)
293 cp = 3;
294 else if (tuner_frequency < 160000000)
295 cp = 5;
296 else if (tuner_frequency < 200000000)
297 cp = 6;
298 else if (tuner_frequency < 290000000)
299 cp = 3;
300 else if (tuner_frequency < 420000000)
301 cp = 5;
302 else if (tuner_frequency < 480000000)
303 cp = 6;
304 else if (tuner_frequency < 620000000)
305 cp = 3;
306 else if (tuner_frequency < 830000000)
307 cp = 5;
308 else if (tuner_frequency < 895000000)
309 cp = 7;
310 else
311 return -EINVAL;
312
313 /* determine band */
b09cf61d 314 if (c->frequency < 49000000)
86ddd96f 315 return -EINVAL;
b09cf61d 316 else if (c->frequency < 161000000)
86ddd96f 317 band = 1;
b09cf61d 318 else if (c->frequency < 444000000)
86ddd96f 319 band = 2;
b09cf61d 320 else if (c->frequency < 861000000)
86ddd96f
MCC		 321 band = 4;
322 else
323 return -EINVAL;
324
325 /* setup PLL filter */
b09cf61d
MCC		 326 switch (c->bandwidth_hz) {
327 case 6000000:
86ddd96f
MCC		 328 filter = 0;
329 break;
330
b09cf61d 331 case 7000000:
86ddd96f
MCC		 332 filter = 0;
333 break;
334
b09cf61d 335 case 8000000:
86ddd96f
MCC		 336 filter = 1;
337 break;
1da177e4 338
86ddd96f
MCC		 339 default:
340 return -EINVAL;
341 }
342
343 /* calculate divisor
344 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 345 */
b09cf61d 346 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
86ddd96f
MCC		 347
348 /* setup tuner buffer */
349 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
350 tuner_buf[1] = tuner_frequency & 0xff;
351 tuner_buf[2] = 0xca;
352 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
353
dea74869
PB		 354 if (fe->ops.i2c_gate_ctrl)
355 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 356 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
ae618919 357 pr_warn("could not write to tuner at addr: 0x%02x\n",
cf3c34c8 358 addr << 1);
86ddd96f 359 return -EIO;
58ef4f92 360 }
2cf36ac4
HH		 361 msleep(1);
362 return 0;
363}
364
58ef4f92 365static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH		 366{
367 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 368 struct tda1004x_state *state = fe->demodulator_priv;
369 u8 addr = state->config->tuner_address;
2cf36ac4
HH		 370 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
371 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 372
2cf36ac4 373 /* setup PLL configuration */
dea74869
PB		 374 if (fe->ops.i2c_gate_ctrl)
375 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 376 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
377 return -EIO;
86ddd96f 378 msleep(1);
2cf36ac4 379
1da177e4
LT		 380 return 0;
381}
382
2cf36ac4
HH		 383/* ------------------------------------------------------------------ */
384
2cf36ac4 385static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC		 386 .demod_address = 0x8,
387 .invert = 1,
2cf36ac4 388 .invert_oclk = 0,
86ddd96f
MCC		 389 .xtal_freq = TDA10046_XTAL_4M,
390 .agc_config = TDA10046_AGC_DEFAULT,
391 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 392 .tuner_address = 0x60,
393 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 394};
395
2cf36ac4
HH		 396static struct tda1004x_config philips_tu1216_61_config = {
397
398 .demod_address = 0x8,
399 .invert = 1,
400 .invert_oclk = 0,
401 .xtal_freq = TDA10046_XTAL_4M,
402 .agc_config = TDA10046_AGC_DEFAULT,
403 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH		 404 .tuner_address = 0x61,
405 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 406};
407
408/* ------------------------------------------------------------------ */
409
cbb94521 410static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH		 411{
412 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 413 struct tda1004x_state *state = fe->demodulator_priv;
414 u8 addr = state->config->tuner_address;
2cf36ac4 415 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 416 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH		 417
418 /* setup PLL configuration */
dea74869
PB		 419 if (fe->ops.i2c_gate_ctrl)
420 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH		 421 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
422 return -EIO;
2cf36ac4
HH		 423 return 0;
424}
425
14d24d14 426static int philips_td1316_tuner_set_params(struct dvb_frontend *fe)
2cf36ac4 427{
14d24d14 428 return philips_tda6651_pll_set(fe);
58ef4f92
HH		 429}
430
431static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
432{
433 struct saa7134_dev *dev = fe->dvb->priv;
434 struct tda1004x_state *state = fe->demodulator_priv;
435 u8 addr = state->config->tuner_address;
436 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
437 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
438
439 /* switch the tuner to analog mode */
440 if (fe->ops.i2c_gate_ctrl)
441 fe->ops.i2c_gate_ctrl(fe, 1);
442 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
443 return -EIO;
444 return 0;
2cf36ac4
HH		 445}
446
58ef4f92
HH		 447/* ------------------------------------------------------------------ */
448
cbb94521
HH		 449static int philips_europa_tuner_init(struct dvb_frontend *fe)
450{
451 struct saa7134_dev *dev = fe->dvb->priv;
452 static u8 msg[] = { 0x00, 0x40};
453 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
454
455
456 if (philips_td1316_tuner_init(fe))
457 return -EIO;
458 msleep(1);
459 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
460 return -EIO;
461
462 return 0;
463}
464
a79ddae9 465static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH		 466{
467 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 468
58ef4f92
HH		 469 static u8 msg[] = { 0x00, 0x14 };
470 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
471
472 if (philips_td1316_tuner_sleep(fe))
473 return -EIO;
2cf36ac4
HH		 474
475 /* switch the board to analog mode */
dea74869
PB		 476 if (fe->ops.i2c_gate_ctrl)
477 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 478 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ		 479 return 0;
480}
481
482static int philips_europa_demod_sleep(struct dvb_frontend *fe)
483{
484 struct saa7134_dev *dev = fe->dvb->priv;
485
486 if (dev->original_demod_sleep)
487 dev->original_demod_sleep(fe);
dea74869 488 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 489 return 0;
2cf36ac4
HH		 490}
491
492static struct tda1004x_config philips_europa_config = {
493
494 .demod_address = 0x8,
495 .invert = 0,
496 .invert_oclk = 0,
497 .xtal_freq = TDA10046_XTAL_4M,
498 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
499 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH		 500 .tuner_address = 0x61,
501 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH		 502};
503
408b664a 504static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC		 505 .demod_address = 0x08,
506 .invert = 1,
507 .invert_oclk = 0,
508 .xtal_freq = TDA10046_XTAL_16M,
509 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
510 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH		 511 .tuner_address = 0x61,
512 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC		 513};
514
128fe95d
VC		 515static struct tda1004x_config technotrend_budget_t3000_config = {
516 .demod_address = 0x8,
517 .invert = 1,
518 .invert_oclk = 0,
519 .xtal_freq = TDA10046_XTAL_4M,
520 .agc_config = TDA10046_AGC_DEFAULT,
521 .if_freq = TDA10046_FREQ_3617,
522 .tuner_address = 0x63,
523 .request_firmware = philips_tda1004x_request_firmware
524};
525
58ef4f92
HH		 526/* ------------------------------------------------------------------
527 * tda 1004x based cards with philips silicon tuner
528 */
529
58ef4f92
HH		 530static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
531{
58ef4f92
HH		 532 struct tda1004x_state *state = fe->demodulator_priv;
533
534 u8 addr = state->config->i2c_gate;
535 static u8 tda8290_close[] = { 0x21, 0xc0};
536 static u8 tda8290_open[] = { 0x21, 0x80};
537 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
538 if (enable) {
539 tda8290_msg.buf = tda8290_close;
540 } else {
541 tda8290_msg.buf = tda8290_open;
542 }
06be3035 543 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
ae618919 544 pr_warn("could not access tda8290 I2C gate\n");
58ef4f92
HH		 545 return -EIO;
546 }
547 msleep(20);
548 return 0;
549}
550
58ef4f92 551static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 552{
90e9df7f 553 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 554 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 555
58ef4f92 556 switch (state->config->antenna_switch) {
6139ebc6
MCC		 557 case 0:
558 break;
559 case 1:
560 pr_debug("setting GPIO21 to 0 (TV antenna?)\n");
58ef4f92
HH		 561 saa7134_set_gpio(dev, 21, 0);
562 break;
6139ebc6
MCC		 563 case 2:
564 pr_debug("setting GPIO21 to 1 (Radio antenna?)\n");
58ef4f92
HH		 565 saa7134_set_gpio(dev, 21, 1);
566 break;
587d2fd7 567 }
587d2fd7
HH		 568 return 0;
569}
570
58ef4f92 571static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 572{
58ef4f92
HH		 573 struct saa7134_dev *dev = fe->dvb->priv;
574 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 575
58ef4f92 576 switch (state->config->antenna_switch) {
6139ebc6
MCC		 577 case 0:
578 break;
579 case 1:
580 pr_debug("setting GPIO21 to 1 (Radio antenna?)\n");
58ef4f92
HH		 581 saa7134_set_gpio(dev, 21, 1);
582 break;
6139ebc6
MCC		 583 case 2:
584 pr_debug("setting GPIO21 to 0 (TV antenna?)\n");
58ef4f92
HH		 585 saa7134_set_gpio(dev, 21, 0);
586 break;
587 }
587d2fd7 588 return 0;
2d6b5f62 589}
90e9df7f 590
d557dab5
MCC		 591static int configure_tda827x_fe(struct saa7134_dev *dev,
592 struct tda1004x_config *cdec_conf,
593 struct tda827x_config *tuner_conf)
90e9df7f 594{
2ada815f 595 struct vb2_dvb_frontend *fe0;
363c35fc 596
92abe9ee 597 /* Get the first frontend */
2ada815f 598 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc 599
37e310ed
PST		 600 if (!fe0)
601 return -EINVAL;
602
363c35fc
ST		 603 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
604 if (fe0->dvb.frontend) {
7bff4b4d 605 if (cdec_conf->i2c_gate)
363c35fc
ST		 606 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
607 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC		 608 cdec_conf->tuner_address,
609 &dev->i2c_adap, tuner_conf))
610 return 0;
611
ae618919 612 pr_warn("no tda827x tuner found at addr: %02x\n",
7bff4b4d 613 cdec_conf->tuner_address);
58ef4f92 614 }
d557dab5 615 return -EINVAL;
90e9df7f
HH		 616}
617
58ef4f92 618/* ------------------------------------------------------------------ */
261f5081 619
7bff4b4d 620static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH		 621 .init = philips_tda827x_tuner_init,
622 .sleep = philips_tda827x_tuner_sleep,
623 .config = 0,
624 .switch_addr = 0
625};
626
627static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH		 628 .init = philips_tda827x_tuner_init,
629 .sleep = philips_tda827x_tuner_sleep,
630 .config = 1,
631 .switch_addr = 0x4b
632};
633
634static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH		 635 .init = philips_tda827x_tuner_init,
636 .sleep = philips_tda827x_tuner_sleep,
637 .config = 2,
638 .switch_addr = 0x4b
639};
640
641static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH		 642 .init = philips_tda827x_tuner_init,
643 .sleep = philips_tda827x_tuner_sleep,
644 .config = 2,
645 .switch_addr = 0x42
646};
647
648/* ------------------------------------------------------------------ */
649
58ef4f92 650static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH		 651 .demod_address = 0x08,
652 .invert = 1,
653 .invert_oclk = 0,
654 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 655 .agc_config = TDA10046_AGC_TDA827X,
656 .gpio_config = TDA10046_GP11_I,
550a9a5e 657 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 658 .tuner_address = 0x60,
659 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 660};
550a9a5e 661
58ef4f92
HH		 662static struct tda1004x_config philips_tiger_config = {
663 .demod_address = 0x08,
664 .invert = 1,
665 .invert_oclk = 0,
666 .xtal_freq = TDA10046_XTAL_16M,
667 .agc_config = TDA10046_AGC_TDA827X,
668 .gpio_config = TDA10046_GP11_I,
669 .if_freq = TDA10046_FREQ_045,
670 .i2c_gate = 0x4b,
671 .tuner_address = 0x61,
58ef4f92
HH		 672 .antenna_switch= 1,
673 .request_firmware = philips_tda1004x_request_firmware
674};
550a9a5e
HH		 675
676static struct tda1004x_config cinergy_ht_config = {
677 .demod_address = 0x08,
678 .invert = 1,
679 .invert_oclk = 0,
680 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 681 .agc_config = TDA10046_AGC_TDA827X,
682 .gpio_config = TDA10046_GP01_I,
90e9df7f 683 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 684 .i2c_gate = 0x4b,
685 .tuner_address = 0x61,
58ef4f92 686 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH		 687};
688
58ef4f92
HH		 689static struct tda1004x_config cinergy_ht_pci_config = {
690 .demod_address = 0x08,
691 .invert = 1,
692 .invert_oclk = 0,
693 .xtal_freq = TDA10046_XTAL_16M,
694 .agc_config = TDA10046_AGC_TDA827X,
695 .gpio_config = TDA10046_GP01_I,
696 .if_freq = TDA10046_FREQ_045,
697 .i2c_gate = 0x4b,
698 .tuner_address = 0x60,
58ef4f92
HH		 699 .request_firmware = philips_tda1004x_request_firmware
700};
701
702static struct tda1004x_config philips_tiger_s_config = {
703 .demod_address = 0x08,
704 .invert = 1,
705 .invert_oclk = 0,
706 .xtal_freq = TDA10046_XTAL_16M,
707 .agc_config = TDA10046_AGC_TDA827X,
708 .gpio_config = TDA10046_GP01_I,
709 .if_freq = TDA10046_FREQ_045,
710 .i2c_gate = 0x4b,
711 .tuner_address = 0x61,
58ef4f92
HH		 712 .antenna_switch= 1,
713 .request_firmware = philips_tda1004x_request_firmware
714};
df42eaf2 715
587d2fd7
HH		 716static struct tda1004x_config pinnacle_pctv_310i_config = {
717 .demod_address = 0x08,
718 .invert = 1,
719 .invert_oclk = 0,
720 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 721 .agc_config = TDA10046_AGC_TDA827X,
722 .gpio_config = TDA10046_GP11_I,
587d2fd7 723 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 724 .i2c_gate = 0x4b,
725 .tuner_address = 0x61,
58ef4f92 726 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH		 727};
728
c6e53daf
TG		 729static struct tda1004x_config hauppauge_hvr_1110_config = {
730 .demod_address = 0x08,
731 .invert = 1,
732 .invert_oclk = 0,
733 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 734 .agc_config = TDA10046_AGC_TDA827X,
735 .gpio_config = TDA10046_GP11_I,
c6e53daf 736 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 737 .i2c_gate = 0x4b,
738 .tuner_address = 0x61,
739 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG		 740};
741
83646817
HH		 742static struct tda1004x_config asus_p7131_dual_config = {
743 .demod_address = 0x08,
744 .invert = 1,
745 .invert_oclk = 0,
746 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 747 .agc_config = TDA10046_AGC_TDA827X,
748 .gpio_config = TDA10046_GP11_I,
83646817 749 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 750 .i2c_gate = 0x4b,
751 .tuner_address = 0x61,
58ef4f92
HH		 752 .antenna_switch= 2,
753 .request_firmware = philips_tda1004x_request_firmware
83646817
HH		 754};
755
420f32fe
NS		 756static struct tda1004x_config lifeview_trio_config = {
757 .demod_address = 0x09,
758 .invert = 1,
759 .invert_oclk = 0,
760 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH		 761 .agc_config = TDA10046_AGC_TDA827X,
762 .gpio_config = TDA10046_GP00_I,
420f32fe 763 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 764 .tuner_address = 0x60,
765 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS		 766};
767
58ef4f92 768static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH		 769 .demod_address = 0x08,
770 .invert = 1,
771 .invert_oclk = 0,
772 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 773 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 774 .gpio_config = TDA10046_GP11_I,
df42eaf2 775 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 776 .tuner_address = 0x60,
777 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH		 778};
779
58ef4f92 780static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH		 781 .demod_address = 0x08,
782 .invert = 1,
783 .invert_oclk = 0,
784 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 785 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 786 .gpio_config = TDA10046_GP01_I,
3dfb729f 787 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 788 .i2c_gate = 0x4b,
789 .tuner_address = 0x60,
58ef4f92 790 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH		 791};
792
e06cea4c
HH		 793static struct tda1004x_config asus_p7131_4871_config = {
794 .demod_address = 0x08,
795 .invert = 1,
796 .invert_oclk = 0,
797 .xtal_freq = TDA10046_XTAL_16M,
798 .agc_config = TDA10046_AGC_TDA827X,
799 .gpio_config = TDA10046_GP01_I,
800 .if_freq = TDA10046_FREQ_045,
801 .i2c_gate = 0x4b,
802 .tuner_address = 0x61,
e06cea4c
HH		 803 .antenna_switch= 2,
804 .request_firmware = philips_tda1004x_request_firmware
805};
806
f3eec0c0 807static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH		 808 .demod_address = 0x08,
809 .invert = 1,
810 .invert_oclk = 0,
811 .xtal_freq = TDA10046_XTAL_16M,
812 .agc_config = TDA10046_AGC_TDA827X,
813 .gpio_config = TDA10046_GP11_I,
814 .if_freq = TDA10046_FREQ_045,
815 .i2c_gate = 0x4b,
816 .tuner_address = 0x61,
e06cea4c
HH		 817 .antenna_switch= 2,
818 .request_firmware = philips_tda1004x_request_firmware
819};
261f5081 820
b39423a9
SF		 821static struct tda1004x_config kworld_dvb_t_210_config = {
822 .demod_address = 0x08,
823 .invert = 1,
824 .invert_oclk = 0,
825 .xtal_freq = TDA10046_XTAL_16M,
826 .agc_config = TDA10046_AGC_TDA827X,
827 .gpio_config = TDA10046_GP11_I,
828 .if_freq = TDA10046_FREQ_045,
829 .i2c_gate = 0x4b,
830 .tuner_address = 0x61,
b39423a9
SF		 831 .antenna_switch= 1,
832 .request_firmware = philips_tda1004x_request_firmware
833};
261f5081 834
d90d9f5a
ES		 835static struct tda1004x_config avermedia_super_007_config = {
836 .demod_address = 0x08,
837 .invert = 1,
838 .invert_oclk = 0,
839 .xtal_freq = TDA10046_XTAL_16M,
840 .agc_config = TDA10046_AGC_TDA827X,
841 .gpio_config = TDA10046_GP01_I,
842 .if_freq = TDA10046_FREQ_045,
843 .i2c_gate = 0x4b,
844 .tuner_address = 0x60,
d90d9f5a
ES		 845 .antenna_switch= 1,
846 .request_firmware = philips_tda1004x_request_firmware
847};
848
4ba24373
HP		 849static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
850 .demod_address = 0x08,
851 .invert = 1,
852 .invert_oclk = 0,
853 .xtal_freq = TDA10046_XTAL_16M,
854 .agc_config = TDA10046_AGC_TDA827X,
855 .gpio_config = TDA10046_GP01_I,
856 .if_freq = TDA10046_FREQ_045,
857 .i2c_gate = 0x42,
858 .tuner_address = 0x61,
4ba24373
HP		 859 .antenna_switch = 1,
860 .request_firmware = philips_tda1004x_request_firmware
861};
862
301e9d64 863static struct tda1004x_config asus_tiger_3in1_config = {
864 .demod_address = 0x0b,
865 .invert = 1,
866 .invert_oclk = 0,
867 .xtal_freq = TDA10046_XTAL_16M,
868 .agc_config = TDA10046_AGC_TDA827X,
869 .gpio_config = TDA10046_GP11_I,
870 .if_freq = TDA10046_FREQ_045,
871 .i2c_gate = 0x4b,
872 .tuner_address = 0x61,
873 .antenna_switch = 1,
874 .request_firmware = philips_tda1004x_request_firmware
875};
876
75c7dbca 877static struct tda1004x_config asus_ps3_100_config = {
878 .demod_address = 0x0b,
879 .invert = 1,
880 .invert_oclk = 0,
881 .xtal_freq = TDA10046_XTAL_16M,
882 .agc_config = TDA10046_AGC_TDA827X,
883 .gpio_config = TDA10046_GP11_I,
884 .if_freq = TDA10046_FREQ_045,
885 .i2c_gate = 0x4b,
886 .tuner_address = 0x61,
887 .antenna_switch = 1,
888 .request_firmware = philips_tda1004x_request_firmware
889};
890
58ef4f92
HH		 891/* ------------------------------------------------------------------
892 * special case: this card uses saa713x GPIO22 for the mode switch
893 */
5eda227f 894
58ef4f92 895static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH		 896{
897 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH		 898 philips_tda827x_tuner_init(fe);
899 /* route TDA8275a AGC input to the channel decoder */
06be3035 900 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH		 901 return 0;
902}
903
58ef4f92 904static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 905{
5eda227f 906 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 907 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 908 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH		 909 philips_tda827x_tuner_sleep(fe);
910 return 0;
5eda227f
HH		 911}
912
8ce47dad 913static struct tda827x_config ads_duo_cfg = {
8ce47dad 914 .init = ads_duo_tuner_init,
7bff4b4d
HH		 915 .sleep = ads_duo_tuner_sleep,
916 .config = 0
8ce47dad
MK		 917};
918
58ef4f92 919static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH		 920 .demod_address = 0x08,
921 .invert = 1,
922 .invert_oclk = 0,
923 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 924 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 925 .gpio_config = TDA10046_GP00_I,
5eda227f 926 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH		 927 .tuner_address = 0x61,
928 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH		 929};
930
47aeba5a
DB		 931static struct zl10353_config behold_h6_config = {
932 .demod_address = 0x1e>>1,
933 .no_tuner = 1,
934 .parallel_ts = 1,
5f77af93 935 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB		 936};
937
2930992c
BILDB		 938static struct xc5000_config behold_x7_tunerconfig = {
939 .i2c_address = 0xc2>>1,
940 .if_khz = 4560,
2a0d0560 941 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB		 942};
943
944static struct zl10353_config behold_x7_config = {
945 .demod_address = 0x1e>>1,
946 .if2 = 45600,
947 .no_tuner = 1,
948 .parallel_ts = 1,
949 .disable_i2c_gate_ctrl = 1,
950};
951
dbe8740d
CC		 952static struct zl10353_config videomate_t750_zl10353_config = {
953 .demod_address = 0x0f,
954 .no_tuner = 1,
955 .parallel_ts = 1,
956 .disable_i2c_gate_ctrl = 1,
957};
958
959static struct qt1010_config videomate_t750_qt1010_config = {
960 .i2c_address = 0x62
961};
962
963
58ef4f92
HH		 964/* ==================================================================
965 * tda10086 based DVB-S cards, helper functions
966 */
967
e2ac28fa
IL		 968static struct tda10086_config flydvbs = {
969 .demod_address = 0x0e,
970 .invert = 0,
ea75baf4 971 .diseqc_tone = 0,
9a1b04e4
HH		 972 .xtal_freq = TDA10086_XTAL_16M,
973};
974
975static struct tda10086_config sd1878_4m = {
976 .demod_address = 0x0e,
977 .invert = 0,
978 .diseqc_tone = 0,
979 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL		 980};
981
1b1cee35
HH		 982/* ------------------------------------------------------------------
983 * special case: lnb supply is connected to the gated i2c
984 */
985
0df289a2
MCC		 986static int md8800_set_voltage(struct dvb_frontend *fe,
987 enum fe_sec_voltage voltage)
1b1cee35
HH		 988{
989 int res = -EIO;
990 struct saa7134_dev *dev = fe->dvb->priv;
991 if (fe->ops.i2c_gate_ctrl) {
992 fe->ops.i2c_gate_ctrl(fe, 1);
993 if (dev->original_set_voltage)
994 res = dev->original_set_voltage(fe, voltage);
995 fe->ops.i2c_gate_ctrl(fe, 0);
996 }
997 return res;
998};
999
1000static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
1001{
1002 int res = -EIO;
1003 struct saa7134_dev *dev = fe->dvb->priv;
1004 if (fe->ops.i2c_gate_ctrl) {
1005 fe->ops.i2c_gate_ctrl(fe, 1);
1006 if (dev->original_set_high_voltage)
1007 res = dev->original_set_high_voltage(fe, arg);
1008 fe->ops.i2c_gate_ctrl(fe, 0);
1009 }
1010 return res;
1011};
1012
0df289a2
MCC		 1013static int md8800_set_voltage2(struct dvb_frontend *fe,
1014 enum fe_sec_voltage voltage)
5823b3a6
HH		 1015{
1016 struct saa7134_dev *dev = fe->dvb->priv;
1017 u8 wbuf[2] = { 0x1f, 00 };
1018 u8 rbuf;
1019 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
1020 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
1021
1022 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
1023 return -EIO;
1024 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
1025 if (voltage == SEC_VOLTAGE_18)
1026 wbuf[1] = rbuf | 0x10;
1027 else
1028 wbuf[1] = rbuf & 0xef;
1029 msg[0].len = 2;
1030 i2c_transfer(&dev->i2c_adap, msg, 1);
1031 return 0;
1032}
1033
1034static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
1035{
6139ebc6
MCC		 1036 pr_warn("%s: sorry can't set high LNB supply voltage from here\n",
1037 __func__);
5823b3a6
HH		 1038 return -EIO;
1039}
1040
58ef4f92
HH		 1041/* ==================================================================
1042 * nxt200x based ATSC cards, helper functions
1043 */
90e9df7f 1044
3b64e8e2
MK		 1045static struct nxt200x_config avertvhda180 = {
1046 .demod_address = 0x0a,
3b64e8e2 1047};
3e1410ad
AB		 1048
1049static struct nxt200x_config kworldatsc110 = {
1050 .demod_address = 0x0a,
3e1410ad 1051};
3b64e8e2 1052
04574185
MS		 1053/* ------------------------------------------------------------------ */
1054
1055static struct mt312_config avertv_a700_mt312 = {
1056 .demod_address = 0x0e,
1057 .voltage_inverted = 1,
1058};
1059
1060static struct zl10036_config avertv_a700_tuner = {
1061 .tuner_address = 0x60,
1062};
1063
ecfcfec8
IL		 1064static struct mt312_config zl10313_compro_s350_config = {
1065 .demod_address = 0x0e,
1066};
1067
34fe2784
OZ		 1068static struct mt312_config zl10313_avermedia_a706_config = {
1069 .demod_address = 0x0e,
1070};
1071
3abdedd8
MK		 1072static struct lgdt3305_config hcw_lgdt3305_config = {
1073 .i2c_addr = 0x0e,
1074 .mpeg_mode = LGDT3305_MPEG_SERIAL,
1075 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
1076 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
1077 .deny_i2c_rptr = 1,
1078 .spectral_inversion = 1,
1079 .qam_if_khz = 4000,
1080 .vsb_if_khz = 3250,
1081};
1082
1bc7f51c
MK		 1083static struct tda10048_config hcw_tda10048_config = {
1084 .demod_address = 0x10 >> 1,
1085 .output_mode = TDA10048_SERIAL_OUTPUT,
1086 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1087 .inversion = TDA10048_INVERSION_ON,
1088 .dtv6_if_freq_khz = TDA10048_IF_3300,
1089 .dtv7_if_freq_khz = TDA10048_IF_3500,
1090 .dtv8_if_freq_khz = TDA10048_IF_4000,
1091 .clk_freq_khz = TDA10048_CLK_16000,
1092 .disable_gate_access = 1,
1093};
1094
3abdedd8
MK		 1095static struct tda18271_std_map hauppauge_tda18271_std_map = {
1096 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1097 .if_lvl = 1, .rfagc_top = 0x58, },
1098 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1099 .if_lvl = 1, .rfagc_top = 0x58, },
1100};
1101
1102static struct tda18271_config hcw_tda18271_config = {
1103 .std_map = &hauppauge_tda18271_std_map,
1104 .gate = TDA18271_GATE_ANALOG,
1105 .config = 3,
542cb057 1106 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK		 1107};
1108
1109static struct tda829x_config tda829x_no_probe = {
1110 .probe_tuner = TDA829X_DONT_PROBE,
1111};
1112
6c119ff4
HV		 1113static struct tda10048_config zolid_tda10048_config = {
1114 .demod_address = 0x10 >> 1,
1115 .output_mode = TDA10048_PARALLEL_OUTPUT,
1116 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1117 .inversion = TDA10048_INVERSION_ON,
1118 .dtv6_if_freq_khz = TDA10048_IF_3300,
1119 .dtv7_if_freq_khz = TDA10048_IF_3500,
1120 .dtv8_if_freq_khz = TDA10048_IF_4000,
1121 .clk_freq_khz = TDA10048_CLK_16000,
1122 .disable_gate_access = 1,
1123};
1124
1125static struct tda18271_config zolid_tda18271_config = {
1126 .gate = TDA18271_GATE_ANALOG,
1127};
1128
184e769f
MK		 1129static struct tda10048_config dtv1000s_tda10048_config = {
1130 .demod_address = 0x10 >> 1,
1131 .output_mode = TDA10048_PARALLEL_OUTPUT,
1132 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1133 .inversion = TDA10048_INVERSION_ON,
1134 .dtv6_if_freq_khz = TDA10048_IF_3300,
1135 .dtv7_if_freq_khz = TDA10048_IF_3800,
1136 .dtv8_if_freq_khz = TDA10048_IF_4300,
1137 .clk_freq_khz = TDA10048_CLK_16000,
1138 .disable_gate_access = 1,
1139};
1140
1141static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1142 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1143 .if_lvl = 1, .rfagc_top = 0x37, },
1144 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1145 .if_lvl = 1, .rfagc_top = 0x37, },
1146 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1147 .if_lvl = 1, .rfagc_top = 0x37, },
1148};
1149
1150static struct tda18271_config dtv1000s_tda18271_config = {
1151 .std_map = &dtv1000s_tda18271_std_map,
1152 .gate = TDA18271_GATE_ANALOG,
1153};
1154
ce02704d
TL		 1155static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = {
1156 .prod = LGS8GXX_PROD_LGS8G75,
1157 .demod_address = 0x1d,
1158 .serial_ts = 0,
1159 .ts_clk_pol = 1,
1160 .ts_clk_gated = 0,
1161 .if_clk_freq = 30400, /* 30.4 MHz */
1162 .if_freq = 4000, /* 4.00 MHz */
1163 .if_neg_center = 0,
1164 .ext_adc = 0,
1165 .adc_signed = 1,
1166 .adc_vpp = 3, /* 2.0 Vpp */
1167 .if_neg_edge = 1,
1168};
1169
1170static struct tda18271_config prohdtv_pro2_tda18271_config = {
1171 .gate = TDA18271_GATE_ANALOG,
1172 .output_opt = TDA18271_OUTPUT_LT_OFF,
1173};
1174
25fa2071
KS		 1175static struct tda18271_std_map kworld_tda18271_std_map = {
1176 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 3,
1177 .if_lvl = 6, .rfagc_top = 0x37 },
1178 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
1179 .if_lvl = 6, .rfagc_top = 0x37 },
1180};
1181
1182static struct tda18271_config kworld_pc150u_tda18271_config = {
1183 .std_map = &kworld_tda18271_std_map,
1184 .gate = TDA18271_GATE_ANALOG,
1185 .output_opt = TDA18271_OUTPUT_LT_OFF,
1186 .config = 3, /* Use tuner callback for AGC */
1187 .rf_cal_on_startup = 1
1188};
1189
1190static struct s5h1411_config kworld_s5h1411_config = {
1191 .output_mode = S5H1411_PARALLEL_OUTPUT,
1192 .gpio = S5H1411_GPIO_OFF,
1193 .qam_if = S5H1411_IF_4000,
1194 .vsb_if = S5H1411_IF_3250,
1195 .inversion = S5H1411_INVERSION_ON,
1196 .status_mode = S5H1411_DEMODLOCKING,
1197 .mpeg_timing =
1198 S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
1199};
1200
1201
58ef4f92
HH		 1202/* ==================================================================
1203 * Core code
1204 */
1da177e4
LT		 1205
1206static int dvb_init(struct saa7134_dev *dev)
1207{
1c4f76ab 1208 int ret;
bc36a686 1209 int attach_xc3028 = 0;
2ada815f
HV		 1210 struct vb2_dvb_frontend *fe0;
1211 struct vb2_queue *q;
363c35fc 1212
f972e0bd
DB		 1213 /* FIXME: add support for multi-frontend */
1214 mutex_init(&dev->frontends.lock);
7bdf84fc 1215 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd 1216
83582009 1217 pr_info("%s() allocating 1 frontend\n", __func__);
2ada815f 1218 fe0 = vb2_dvb_alloc_frontend(&dev->frontends, 1);
f3f741e7 1219 if (!fe0) {
83582009 1220 pr_err("%s() failed to alloc\n", __func__);
f972e0bd
DB		 1221 return -ENOMEM;
1222 }
1223
2ada815f 1224 /* init struct vb2_dvb */
1da177e4
LT		 1225 dev->ts.nr_bufs = 32;
1226 dev->ts.nr_packets = 32*4;
363c35fc 1227 fe0->dvb.name = dev->name;
2ada815f
HV		 1228 q = &fe0->dvb.dvbq;
1229 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1230 q->io_modes = VB2_MMAP | VB2_READ;
1231 q->drv_priv = &dev->ts_q;
1232 q->ops = &saa7134_ts_qops;
1233 q->mem_ops = &vb2_dma_sg_memops;
1234 q->buf_struct_size = sizeof(struct saa7134_buf);
1235 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1236 q->lock = &dev->lock;
d8feef9b 1237 q->dev = &dev->pci->dev;
2ada815f
HV		 1238 ret = vb2_queue_init(q);
1239 if (ret) {
1240 vb2_dvb_dealloc_frontends(&dev->frontends);
1241 return ret;
1242 }
1da177e4
LT		 1243
1244 switch (dev->board) {
1245 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
7516657a 1246 pr_debug("pinnacle 300i dvb setup\n");
363c35fc 1247 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1248 &dev->i2c_adap);
363c35fc
ST		 1249 if (fe0->dvb.frontend) {
1250 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1251 }
1da177e4 1252 break;
a78d0bfa 1253 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1254 case SAA7134_BOARD_AVERMEDIA_A16AR:
7516657a 1255 pr_debug("avertv 777 dvb setup\n");
363c35fc 1256 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1257 &dev->i2c_adap);
363c35fc
ST		 1258 if (fe0->dvb.frontend) {
1259 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK		 1260 &dev->i2c_adap, 0x61,
1261 TUNER_PHILIPS_TD1316);
6b3ccab7 1262 }
a78d0bfa 1263 break;
95a2fdb6 1264 case SAA7134_BOARD_AVERMEDIA_A16D:
7516657a 1265 pr_debug("AverMedia A16D dvb setup\n");
363c35fc 1266 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1267 &avermedia_xc3028_mt352_dev,
1268 &dev->i2c_adap);
95a2fdb6
MCC		 1269 attach_xc3028 = 1;
1270 break;
1da177e4 1271 case SAA7134_BOARD_MD7134:
363c35fc 1272 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1273 &medion_cardbus,
1274 &dev->i2c_adap);
363c35fc
ST		 1275 if (fe0->dvb.frontend) {
1276 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1277 &dev->i2c_adap, medion_cardbus.tuner_address,
1278 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1279 }
1da177e4 1280 break;
86ddd96f 1281 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1282 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1283 &philips_tu1216_60_config,
1284 &dev->i2c_adap);
363c35fc
ST		 1285 if (fe0->dvb.frontend) {
1286 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1287 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1288 }
86ddd96f
MCC		 1289 break;
1290 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1291 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC		 1292 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1293 &tda827x_cfg_0) < 0)
91268a5e 1294 goto detach_frontend;
86ddd96f 1295 break;
2cf36ac4 1296 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1297 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1298 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1299 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1300 &philips_europa_config,
1301 &dev->i2c_adap);
363c35fc
ST		 1302 if (fe0->dvb.frontend) {
1303 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1304 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1305 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1306 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1307 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1308 }
2cf36ac4 1309 break;
128fe95d
VC		 1310 case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000:
1311 fe0->dvb.frontend = dvb_attach(tda10046_attach,
1312 &technotrend_budget_t3000_config,
1313 &dev->i2c_adap);
1314 if (fe0->dvb.frontend) {
1315 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1316 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1317 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1318 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1319 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1320 }
1321 break;
2cf36ac4 1322 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1323 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1324 &philips_tu1216_61_config,
1325 &dev->i2c_adap);
363c35fc
ST		 1326 if (fe0->dvb.frontend) {
1327 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1328 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1329 }
2cf36ac4 1330 break;
b39423a9 1331 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC		 1332 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1333 &tda827x_cfg_2) < 0)
91268a5e 1334 goto detach_frontend;
b39423a9 1335 break;
0e316ecf 1336 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK		 1337 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1338 &hcw_tda10048_config,
1339 &dev->i2c_adap);
1340 if (fe0->dvb.frontend != NULL) {
1341 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1342 &dev->i2c_adap, 0x4b,
1343 &tda829x_no_probe);
1344 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1345 0x60, &dev->i2c_adap,
1346 &hcw_tda18271_config);
1347 }
1348 break;
90e9df7f 1349 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC		 1350 if (configure_tda827x_fe(dev, &philips_tiger_config,
1351 &tda827x_cfg_0) < 0)
91268a5e 1352 goto detach_frontend;
587d2fd7
HH		 1353 break;
1354 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC		 1355 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1356 &tda827x_cfg_1) < 0)
91268a5e 1357 goto detach_frontend;
90e9df7f 1358 break;
c6e53daf 1359 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC		 1360 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1361 &tda827x_cfg_1) < 0)
91268a5e 1362 goto detach_frontend;
c6e53daf 1363 break;
b5f05064 1364 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK		 1365 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1366 &hcw_lgdt3305_config,
1367 &dev->i2c_adap);
1368 if (fe0->dvb.frontend) {
1369 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1370 &dev->i2c_adap, 0x4b,
1371 &tda829x_no_probe);
1372 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1373 0x60, &dev->i2c_adap,
1374 &hcw_tda18271_config);
1375 }
1376 break;
d4b0aba4 1377 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC		 1378 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1379 &tda827x_cfg_0) < 0)
91268a5e 1380 goto detach_frontend;
d4b0aba4 1381 break;
3d8466ec 1382 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC		 1383 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1384 &tda827x_cfg_0) < 0)
91268a5e 1385 goto detach_frontend;
3d8466ec 1386 break;
92abe9ee 1387 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC		 1388 if (!use_frontend) { /* terrestrial */
1389 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1390 &tda827x_cfg_0) < 0)
91268a5e 1391 goto detach_frontend;
7bff4b4d 1392 } else { /* satellite */
363c35fc
ST		 1393 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1394 if (fe0->dvb.frontend) {
1395 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1396 &dev->i2c_adap, 0) == NULL) {
6139ebc6
MCC		 1397 pr_warn("%s: Lifeview Trio, No tda826x found!\n",
1398 __func__);
91268a5e 1399 goto detach_frontend;
1f683cd8 1400 }
48a8a03b
MCC		 1401 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
1402 &dev->i2c_adap,
1403 0x08, 0, 0, false) == NULL) {
6139ebc6
MCC		 1404 pr_warn("%s: Lifeview Trio, No ISL6421 found!\n",
1405 __func__);
91268a5e 1406 goto detach_frontend;
1f683cd8
NS		 1407 }
1408 }
6b3ccab7 1409 }
420f32fe 1410 break;
df42eaf2 1411 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1412 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1413 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK		 1414 &ads_tech_duo_config,
1415 &dev->i2c_adap);
363c35fc
ST		 1416 if (fe0->dvb.frontend) {
1417 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH		 1418 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1419 &ads_duo_cfg) == NULL) {
ae618919 1420 pr_warn("no tda827x tuner found at addr: %02x\n",
ede2200d 1421 ads_tech_duo_config.tuner_address);
91268a5e 1422 goto detach_frontend;
ede2200d 1423 }
bc36ec74 1424 } else
ae618919 1425 pr_warn("failed to attach tda10046\n");
df42eaf2 1426 break;
3dfb729f 1427 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC		 1428 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1429 &tda827x_cfg_0) < 0)
91268a5e 1430 goto detach_frontend;
d95b8942 1431 break;
5eda227f 1432 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1433 if (!use_frontend) { /* terrestrial */
d557dab5
MCC		 1434 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1435 &tda827x_cfg_0) < 0)
91268a5e 1436 goto detach_frontend;
4b1431ca 1437 } else { /* satellite */
363c35fc 1438 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1439 &flydvbs, &dev->i2c_adap);
363c35fc
ST		 1440 if (fe0->dvb.frontend) {
1441 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH		 1442 u8 dev_id = dev->eedata[2];
1443 u8 data = 0xc4;
1444 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1445
363c35fc 1446 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1447 0x60, &dev->i2c_adap, 0) == NULL) {
395eff95
MCC		 1448 pr_warn("%s: Medion Quadro, no tda826x found !\n",
1449 __func__);
91268a5e 1450 goto detach_frontend;
d557dab5 1451 }
5823b3a6
HH		 1452 if (dev_id != 0x08) {
1453 /* we need to open the i2c gate (we know it exists) */
1454 fe->ops.i2c_gate_ctrl(fe, 1);
1455 if (dvb_attach(isl6405_attach, fe,
d557dab5 1456 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
395eff95
MCC		 1457 pr_warn("%s: Medion Quadro, no ISL6405 found !\n",
1458 __func__);
91268a5e 1459 goto detach_frontend;
d557dab5 1460 }
e9c1ac9d
HH		 1461 if (dev_id == 0x07) {
1462 /* fire up the 2nd section of the LNB supply since
1463 we can't do this from the other section */
1464 msg.buf = &data;
1465 i2c_transfer(&dev->i2c_adap, &msg, 1);
1466 }
5823b3a6
HH		 1467 fe->ops.i2c_gate_ctrl(fe, 0);
1468 dev->original_set_voltage = fe->ops.set_voltage;
1469 fe->ops.set_voltage = md8800_set_voltage;
1470 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1471 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1472 } else {
1473 fe->ops.set_voltage = md8800_set_voltage2;
1474 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1475 }
4b1431ca
HH		 1476 }
1477 }
5eda227f 1478 break;
3b64e8e2 1479 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1480 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1481 &dev->i2c_adap);
363c35fc
ST		 1482 if (fe0->dvb.frontend)
1483 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1484 NULL, DVB_PLL_TDHU2);
3b64e8e2 1485 break;
f689d908 1486 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1487 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1488 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1489 &dev->i2c_adap);
363c35fc
ST		 1490 if (fe0->dvb.frontend)
1491 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK		 1492 &dev->i2c_adap, 0x61,
1493 TUNER_PHILIPS_TUV1236D);
3e1410ad 1494 break;
25fa2071
KS		 1495 case SAA7134_BOARD_KWORLD_PC150U:
1496 saa7134_set_gpio(dev, 18, 1); /* Switch to digital mode */
1497 saa7134_tuner_callback(dev, 0,
1498 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
1499 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1500 &kworld_s5h1411_config,
1501 &dev->i2c_adap);
1502 if (fe0->dvb.frontend != NULL) {
1503 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1504 &dev->i2c_adap, 0x4b,
1505 &tda829x_no_probe);
1506 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1507 0x60, &dev->i2c_adap,
1508 &kworld_pc150u_tda18271_config);
1509 }
1510 break;
e2ac28fa 1511 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1512 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1513 &dev->i2c_adap);
363c35fc
ST		 1514 if (fe0->dvb.frontend) {
1515 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1516 &dev->i2c_adap, 0) == NULL) {
ae618919 1517 pr_warn("%s: No tda826x found!\n", __func__);
91268a5e 1518 goto detach_frontend;
e2ac28fa 1519 }
363c35fc 1520 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
48a8a03b
MCC		 1521 &dev->i2c_adap,
1522 0x08, 0, 0, false) == NULL) {
ae618919 1523 pr_warn("%s: No ISL6421 found!\n", __func__);
91268a5e 1524 goto detach_frontend;
e2ac28fa
IL		 1525 }
1526 }
1527 break;
cf146ca4 1528 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1529 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS		 1530 &medion_cardbus,
1531 &dev->i2c_adap);
363c35fc
ST		 1532 if (fe0->dvb.frontend) {
1533 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1534 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1535
363c35fc 1536 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK		 1537 &dev->i2c_adap, medion_cardbus.tuner_address,
1538 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH		 1539 }
1540 break;
cbb94521 1541 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1542 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH		 1543 &philips_europa_config,
1544 &dev->i2c_adap);
363c35fc
ST		 1545 if (fe0->dvb.frontend) {
1546 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1547 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH		 1548 }
1549 break;
550a9a5e 1550 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC		 1551 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1552 &tda827x_cfg_0) < 0)
91268a5e 1553 goto detach_frontend;
9de271e6
MK		 1554 break;
1555 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC		 1556 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1557 &tda827x_cfg_0) < 0)
91268a5e 1558 goto detach_frontend;
58ef4f92
HH		 1559 break;
1560 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC		 1561 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1562 &tda827x_cfg_2) < 0)
91268a5e 1563 goto detach_frontend;
550a9a5e 1564 break;
e06cea4c 1565 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC		 1566 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1567 &tda827x_cfg_2) < 0)
91268a5e 1568 goto detach_frontend;
e06cea4c 1569 break;
f3eec0c0 1570 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC		 1571 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1572 &tda827x_cfg_2) < 0)
91268a5e 1573 goto detach_frontend;
e06cea4c 1574 break;
d90d9f5a 1575 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC		 1576 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1577 &tda827x_cfg_0) < 0)
91268a5e 1578 goto detach_frontend;
d90d9f5a 1579 break;
4ba24373 1580 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC		 1581 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1582 &tda827x_cfg_2_sw42) < 0)
91268a5e 1583 goto detach_frontend;
4ba24373 1584 break;
6ab465a8 1585 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1586 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1587 &dev->i2c_adap);
363c35fc
ST		 1588 if (fe0->dvb.frontend) {
1589 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1590 &dev->i2c_adap, 0) == NULL) {
ae618919 1591 pr_warn("%s: No tda826x found!\n", __func__);
91268a5e 1592 goto detach_frontend;
d557dab5 1593 }
363c35fc 1594 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1595 &dev->i2c_adap, 0, 0) == NULL) {
ae618919 1596 pr_warn("%s: No lnbp21 found!\n", __func__);
91268a5e 1597 goto detach_frontend;
d557dab5 1598 }
6ab465a8
HH		 1599 }
1600 break;
7b5b3f17 1601 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC		 1602 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1603 &tda827x_cfg_0) < 0)
91268a5e 1604 goto detach_frontend;
7b5b3f17 1605 break;
6a6179b6 1606 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC		 1607 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1608 &tda827x_cfg_2) < 0)
91268a5e 1609 goto detach_frontend;
6a6179b6 1610 break;
bc36a686 1611 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
7516657a 1612 pr_debug("AverMedia E506R dvb setup\n");
6e501a3f
TF		 1613 saa7134_set_gpio(dev, 25, 0);
1614 msleep(10);
1615 saa7134_set_gpio(dev, 25, 1);
363c35fc 1616 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF		 1617 &avermedia_xc3028_mt352_dev,
1618 &dev->i2c_adap);
bc36a686 1619 attach_xc3028 = 1;
e2fc00c2 1620 break;
637afdb5 1621 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1622 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1623 &sd1878_4m, &dev->i2c_adap);
363c35fc 1624 if (fe0->dvb.frontend) {
637afdb5 1625 struct dvb_frontend *fe;
363c35fc 1626 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1627 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
395eff95
MCC		 1628 pr_warn("%s: MD7134 DVB-S, no SD1878 found !\n",
1629 __func__);
91268a5e 1630 goto detach_frontend;
d557dab5 1631 }
637afdb5 1632 /* we need to open the i2c gate (we know it exists) */
363c35fc 1633 fe = fe0->dvb.frontend;
637afdb5
HH		 1634 fe->ops.i2c_gate_ctrl(fe, 1);
1635 if (dvb_attach(isl6405_attach, fe,
d557dab5 1636 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
395eff95
MCC		 1637 pr_warn("%s: MD7134 DVB-S, no ISL6405 found !\n",
1638 __func__);
91268a5e 1639 goto detach_frontend;
d557dab5 1640 }
637afdb5
HH		 1641 fe->ops.i2c_gate_ctrl(fe, 0);
1642 dev->original_set_voltage = fe->ops.set_voltage;
1643 fe->ops.set_voltage = md8800_set_voltage;
1644 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1645 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1646 }
1647 break;
e2fc00c2
MP		 1648 case SAA7134_BOARD_AVERMEDIA_M103:
1649 saa7134_set_gpio(dev, 25, 0);
1650 msleep(10);
1651 saa7134_set_gpio(dev, 25, 1);
363c35fc 1652 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP		 1653 &avermedia_xc3028_mt352_dev,
1654 &dev->i2c_adap);
1655 attach_xc3028 = 1;
1656 break;
301e9d64 1657 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1658 if (!use_frontend) { /* terrestrial */
1659 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1660 &tda827x_cfg_2) < 0)
91268a5e 1661 goto detach_frontend;
301e9d64 1662 } else { /* satellite */
363c35fc 1663 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1664 &flydvbs, &dev->i2c_adap);
363c35fc 1665 if (fe0->dvb.frontend) {
301e9d64 1666 if (dvb_attach(tda826x_attach,
363c35fc 1667 fe0->dvb.frontend, 0x60,
301e9d64 1668 &dev->i2c_adap, 0) == NULL) {
395eff95
MCC		 1669 pr_warn("%s: Asus Tiger 3in1, no tda826x found!\n",
1670 __func__);
91268a5e 1671 goto detach_frontend;
301e9d64 1672 }
363c35fc 1673 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1674 &dev->i2c_adap, 0, 0) == NULL) {
395eff95
MCC		 1675 pr_warn("%s: Asus Tiger 3in1, no lnbp21 found!\n",
1676 __func__);
3c2580f9 1677 goto detach_frontend;
75c7dbca 1678 }
1679 }
1680 }
1681 break;
1682 case SAA7134_BOARD_ASUSTeK_PS3_100:
1683 if (!use_frontend) { /* terrestrial */
1684 if (configure_tda827x_fe(dev, &asus_ps3_100_config,
1685 &tda827x_cfg_2) < 0)
91268a5e 1686 goto detach_frontend;
75c7dbca 1687 } else { /* satellite */
1688 fe0->dvb.frontend = dvb_attach(tda10086_attach,
1689 &flydvbs, &dev->i2c_adap);
1690 if (fe0->dvb.frontend) {
1691 if (dvb_attach(tda826x_attach,
1692 fe0->dvb.frontend, 0x60,
1693 &dev->i2c_adap, 0) == NULL) {
395eff95
MCC		 1694 pr_warn("%s: Asus My Cinema PS3-100, no tda826x found!\n",
1695 __func__);
91268a5e 1696 goto detach_frontend;
75c7dbca 1697 }
1698 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
1699 &dev->i2c_adap, 0, 0) == NULL) {
395eff95
MCC		 1700 pr_warn("%s: Asus My Cinema PS3-100, no lnbp21 found!\n",
1701 __func__);
91268a5e 1702 goto detach_frontend;
301e9d64 1703 }
1704 }
1705 }
1706 break;
028165a3
HP		 1707 case SAA7134_BOARD_ASUSTeK_TIGER:
1708 if (configure_tda827x_fe(dev, &philips_tiger_config,
1709 &tda827x_cfg_0) < 0)
91268a5e 1710 goto detach_frontend;
028165a3 1711 break;
47aeba5a 1712 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1713 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB		 1714 &behold_h6_config,
1715 &dev->i2c_adap);
b0c4be8c
MCC		 1716 if (fe0->dvb.frontend) {
1717 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1718 &dev->i2c_adap, 0x61,
4786dd65 1719 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1720 }
04574185 1721 break;
2930992c
BILDB		 1722 case SAA7134_BOARD_BEHOLD_X7:
1723 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1724 &behold_x7_config,
1725 &dev->i2c_adap);
1726 if (fe0->dvb.frontend) {
1727 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1728 &dev->i2c_adap, &behold_x7_tunerconfig);
1729 }
1730 break;
0faa2ed5
DB		 1731 case SAA7134_BOARD_BEHOLD_H7:
1732 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1733 &behold_x7_config,
1734 &dev->i2c_adap);
1735 if (fe0->dvb.frontend) {
1736 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1737 &dev->i2c_adap, &behold_x7_tunerconfig);
1738 }
1739 break;
04574185
MS		 1740 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1741 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1742 /* Zarlink ZL10313 */
1743 fe0->dvb.frontend = dvb_attach(mt312_attach,
1744 &avertv_a700_mt312, &dev->i2c_adap);
1745 if (fe0->dvb.frontend) {
1746 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1747 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
ae618919 1748 pr_warn("%s: No zl10036 found!\n",
04574185
MS		 1749 __func__);
1750 }
1751 }
ecfcfec8
IL		 1752 break;
1753 case SAA7134_BOARD_VIDEOMATE_S350:
1754 fe0->dvb.frontend = dvb_attach(mt312_attach,
1755 &zl10313_compro_s350_config, &dev->i2c_adap);
1756 if (fe0->dvb.frontend)
1757 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1758 0x60, &dev->i2c_adap) == NULL)
ae618919 1759 pr_warn("%s: No zl10039 found!\n",
ecfcfec8
IL		 1760 __func__);
1761
dbe8740d
CC		 1762 break;
1763 case SAA7134_BOARD_VIDEOMATE_T750:
1764 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1765 &videomate_t750_zl10353_config,
1766 &dev->i2c_adap);
1767 if (fe0->dvb.frontend != NULL) {
1768 if (dvb_attach(qt1010_attach,
1769 fe0->dvb.frontend,
1770 &dev->i2c_adap,
1771 &videomate_t750_qt1010_config) == NULL)
ae618919 1772 pr_warn("error attaching QT1010\n");
dbe8740d 1773 }
6c119ff4
HV		 1774 break;
1775 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1776 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1777 &zolid_tda10048_config,
1778 &dev->i2c_adap);
1779 if (fe0->dvb.frontend != NULL) {
1780 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1781 &dev->i2c_adap, 0x4b,
1782 &tda829x_no_probe);
1783 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1784 0x60, &dev->i2c_adap,
1785 &zolid_tda18271_config);
1786 }
47aeba5a 1787 break;
184e769f
MK		 1788 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1789 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1790 &dtv1000s_tda10048_config,
1791 &dev->i2c_adap);
1792 if (fe0->dvb.frontend != NULL) {
1793 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1794 &dev->i2c_adap, 0x4b,
1795 &tda829x_no_probe);
1796 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1797 0x60, &dev->i2c_adap,
1798 &dtv1000s_tda18271_config);
1799 }
1800 break;
f0551efc 1801 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
ecb71d26
MCC		 1802 /* Switch to digital mode */
1803 saa7134_tuner_callback(dev, 0,
1804 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
f0551efc
MCC		 1805 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1806 &kworld_mb86a20s_config,
1807 &dev->i2c_adap);
f0551efc 1808 if (fe0->dvb.frontend != NULL) {
6a58bc0f
MCC		 1809 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1810 &dev->i2c_adap, 0x4b,
1811 &tda829x_no_probe);
b08deebe 1812 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl;
f0551efc
MCC		 1813 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1814 0x60, &dev->i2c_adap,
1815 &kworld_tda18271_config);
f0551efc 1816 }
6a58bc0f
MCC		 1817
1818 /* mb86a20s need to use the I2C gateway */
f0551efc 1819 break;
ce02704d
TL		 1820 case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2:
1821 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1822 &prohdtv_pro2_lgs8g75_config,
1823 &dev->i2c_adap);
1824 if (fe0->dvb.frontend != NULL) {
1825 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1826 &dev->i2c_adap, 0x4b,
1827 &tda829x_no_probe);
1828 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1829 0x60, &dev->i2c_adap,
1830 &prohdtv_pro2_tda18271_config);
1831 }
34fe2784
OZ		 1832 break;
1833 case SAA7134_BOARD_AVERMEDIA_A706:
1834 /* Enable all DVB-S devices now */
1835 /* CE5039 DVB-S tuner SLEEP pin low */
1836 saa7134_set_gpio(dev, 23, 0);
1837 /* CE6313 DVB-S demod SLEEP pin low */
1838 saa7134_set_gpio(dev, 9, 0);
1839 /* CE6313 DVB-S demod RESET# pin high */
1840 saa7134_set_gpio(dev, 25, 1);
1841 msleep(1);
1842 fe0->dvb.frontend = dvb_attach(mt312_attach,
1843 &zl10313_avermedia_a706_config, &dev->i2c_adap);
1844 if (fe0->dvb.frontend) {
1845 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1846 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1847 0x60, &dev->i2c_adap) == NULL)
ae618919 1848 pr_warn("%s: No zl10039 found!\n",
34fe2784
OZ		 1849 __func__);
1850 }
ce02704d 1851 break;
1da177e4 1852 default:
ae618919 1853 pr_warn("Huh? unknown DVB card?\n");
1da177e4
LT		 1854 break;
1855 }
1856
bc36a686
MCC		 1857 if (attach_xc3028) {
1858 struct dvb_frontend *fe;
1859 struct xc2028_config cfg = {
1860 .i2c_adap = &dev->i2c_adap,
1861 .i2c_addr = 0x61,
bc36a686 1862 };
95a2fdb6 1863
363c35fc 1864 if (!fe0->dvb.frontend)
91268a5e 1865 goto detach_frontend;
95a2fdb6 1866
363c35fc 1867 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686 1868 if (!fe) {
83582009 1869 pr_err("%s/2: xc3028 attach failed\n",
bc36a686 1870 dev->name);
91268a5e 1871 goto detach_frontend;
bc36a686
MCC		 1872 }
1873 }
1874
363c35fc 1875 if (NULL == fe0->dvb.frontend) {
83582009 1876 pr_err("%s/dvb: frontend initialization failed\n", dev->name);
91268a5e 1877 goto detach_frontend;
1da177e4 1878 }
d7cba043 1879 /* define general-purpose callback pointer */
363c35fc 1880 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT		 1881
1882 /* register everything else */
ac90aa02 1883#ifndef CONFIG_MEDIA_CONTROLLER_DVB
2ada815f 1884 ret = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
ac90aa02
MCC		 1885 &dev->pci->dev, NULL,
1886 adapter_nr, 0);
1887#else
1888 ret = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
1889 &dev->pci->dev, dev->media_dev,
1890 adapter_nr, 0);
1891#endif
1c4f76ab
HH		 1892
1893 /* this sequence is necessary to make the tda1004x load its firmware
1894 * and to enter analog mode of hybrid boards
1895 */
1896 if (!ret) {
363c35fc
ST		 1897 if (fe0->dvb.frontend->ops.init)
1898 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1899 if (fe0->dvb.frontend->ops.sleep)
1900 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1901 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1902 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH		 1903 }
1904 return ret;
d557dab5 1905
91268a5e 1906detach_frontend:
2ada815f
HV		 1907 vb2_dvb_dealloc_frontends(&dev->frontends);
1908 vb2_queue_release(&fe0->dvb.dvbq);
f3f741e7 1909 return -EINVAL;
1da177e4
LT		 1910}
1911
1912static int dvb_fini(struct saa7134_dev *dev)
1913{
2ada815f 1914 struct vb2_dvb_frontend *fe0;
363c35fc
ST		 1915
1916 /* Get the first frontend */
2ada815f 1917 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST		 1918 if (!fe0)
1919 return -EINVAL;
1920
7f171123
MCC		 1921 /* FIXME: I suspect that this code is bogus, since the entry for
1922 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1923 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1924 */
1925 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1926 struct v4l2_priv_tun_config tda9887_cfg;
1927 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1928
1929 tda9887_cfg.tuner = TUNER_TDA9887;
1930 tda9887_cfg.priv = &on;
1da177e4 1931
1da177e4 1932 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1933 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1934 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1935 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH		 1936 /* turn off the 2nd lnb supply */
1937 u8 data = 0x80;
1938 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1939 struct dvb_frontend *fe;
363c35fc 1940 fe = fe0->dvb.frontend;
5823b3a6
HH		 1941 if (fe->ops.i2c_gate_ctrl) {
1942 fe->ops.i2c_gate_ctrl(fe, 1);
1943 i2c_transfer(&dev->i2c_adap, &msg, 1);
1944 fe->ops.i2c_gate_ctrl(fe, 0);
1945 }
1946 }
7f171123 1947 }
2ada815f
HV		 1948 vb2_dvb_unregister_bus(&dev->frontends);
1949 vb2_queue_release(&fe0->dvb.dvbq);
1da177e4
LT		 1950 return 0;
1951}
1952
1953static struct saa7134_mpeg_ops dvb_ops = {
1954 .type = SAA7134_MPEG_DVB,
1955 .init = dvb_init,
1956 .fini = dvb_fini,
1957};
1958
1959static int __init dvb_register(void)
1960{
1961 return saa7134_ts_register(&dvb_ops);
1962}
1963
1964static void __exit dvb_unregister(void)
1965{
1966 saa7134_ts_unregister(&dvb_ops);
1967}
1968
1969module_init(dvb_register);
1970module_exit(dvb_unregister);
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