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[media] saa7134: prepare to use pr_foo macros
[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / saa7134 / saa7134-dvb.c
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1da177e4 1/*
1da177e4
LT
2 *
3 * (c) 2004 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]
4 *
86ddd96f
MCC
5 * Extended 3 / 2005 by Hartmut Hackmann to support various
6 * cards with the tda10046 DVB-T channel decoder
7 *
1da177e4
LT
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
9a12ccfc
MCC
23#include "saa7134.h"
24#include "saa7134-reg.h"
25
1da177e4
LT
26#include <linux/init.h>
27#include <linux/list.h>
28#include <linux/module.h>
29#include <linux/kernel.h>
1da177e4
LT
30#include <linux/delay.h>
31#include <linux/kthread.h>
32#include <linux/suspend.h>
33
5e453dc7 34#include <media/v4l2-common.h>
a78d0bfa 35#include "dvb-pll.h"
5823b3a6 36#include <dvb_frontend.h>
1da177e4 37
1f10c7af
AQ
38#include "mt352.h"
39#include "mt352_priv.h" /* FIXME */
40#include "tda1004x.h"
41#include "nxt200x.h"
bc36a686 42#include "tuner-xc2028.h"
2930992c 43#include "xc5000.h"
1da177e4 44
e2ac28fa
IL
45#include "tda10086.h"
46#include "tda826x.h"
8ce47dad 47#include "tda827x.h"
e2ac28fa 48#include "isl6421.h"
4b1431ca 49#include "isl6405.h"
6ab465a8 50#include "lnbp21.h"
cb89cd33 51#include "tuner-simple.h"
1bc7f51c 52#include "tda10048.h"
3abdedd8
MK
53#include "tda18271.h"
54#include "lgdt3305.h"
55#include "tda8290.h"
f0551efc 56#include "mb86a20s.h"
ce02704d 57#include "lgs8gxx.h"
8ce47dad 58
47aeba5a 59#include "zl10353.h"
dbe8740d 60#include "qt1010.h"
47aeba5a 61
04574185 62#include "zl10036.h"
ecfcfec8 63#include "zl10039.h"
04574185 64#include "mt312.h"
25fa2071 65#include "s5h1411.h"
04574185 66
1da177e4
LT
67MODULE_AUTHOR("Gerd Knorr <kraxel@bytesex.org> [SuSE Labs]");
68MODULE_LICENSE("GPL");
69
ff699e6b 70static unsigned int antenna_pwr;
86ddd96f 71
1da177e4
LT
72module_param(antenna_pwr, int, 0444);
73MODULE_PARM_DESC(antenna_pwr,"enable antenna power (Pinnacle 300i)");
74
ff699e6b 75static int use_frontend;
b331daa0
SB
76module_param(use_frontend, int, 0644);
77MODULE_PARM_DESC(use_frontend,"for cards with multiple frontends (0: terrestrial, 1: satellite)");
1f683cd8 78
ff699e6b 79static int debug;
58ef4f92
HH
80module_param(debug, int, 0644);
81MODULE_PARM_DESC(debug, "Turn on/off module debugging (default:off).");
82
78e92006
JG
83DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
84
cf3c34c8
TP
85#define dprintk(fmt, arg...) do { if (debug) \
86 printk(KERN_DEBUG "%s/dvb: " fmt, dev->name , ## arg); } while(0)
87
88/* Print a warning */
89#define wprintk(fmt, arg...) \
90 printk(KERN_WARNING "%s/dvb: " fmt, dev->name, ## arg)
58ef4f92
HH
91
92/* ------------------------------------------------------------------
93 * mt352 based DVB-T cards
94 */
95
1da177e4
LT
96static int pinnacle_antenna_pwr(struct saa7134_dev *dev, int on)
97{
98 u32 ok;
99
100 if (!on) {
101 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
102 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
103 return 0;
104 }
105
106 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 26));
107 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
108 udelay(10);
109
110 saa_setl(SAA7134_GPIO_GPMODE0 >> 2, (1 << 28));
111 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
112 udelay(10);
113 saa_setl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 28));
114 udelay(10);
115 ok = saa_readl(SAA7134_GPIO_GPSTATUS0) & (1 << 27);
5823b3a6 116 dprintk("%s %s\n", __func__, ok ? "on" : "off");
1da177e4
LT
117
118 if (!ok)
119 saa_clearl(SAA7134_GPIO_GPSTATUS0 >> 2, (1 << 26));
120 return ok;
121}
122
123static int mt352_pinnacle_init(struct dvb_frontend* fe)
124{
125 static u8 clock_config [] = { CLOCK_CTL, 0x3d, 0x28 };
126 static u8 reset [] = { RESET, 0x80 };
127 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
128 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
129 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x31 };
130 static u8 fsm_ctl_cfg[] = { 0x7b, 0x04 };
131 static u8 gpp_ctl_cfg [] = { GPP_CTL, 0x0f };
132 static u8 scan_ctl_cfg [] = { SCAN_CTL, 0x0d };
133 static u8 irq_cfg [] = { INTERRUPT_EN_0, 0x00, 0x00, 0x00, 0x00 };
134 struct saa7134_dev *dev= fe->dvb->priv;
135
5823b3a6 136 dprintk("%s called\n", __func__);
1da177e4
LT
137
138 mt352_write(fe, clock_config, sizeof(clock_config));
139 udelay(200);
140 mt352_write(fe, reset, sizeof(reset));
141 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
142 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
143 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
144 mt352_write(fe, gpp_ctl_cfg, sizeof(gpp_ctl_cfg));
145
146 mt352_write(fe, fsm_ctl_cfg, sizeof(fsm_ctl_cfg));
147 mt352_write(fe, scan_ctl_cfg, sizeof(scan_ctl_cfg));
148 mt352_write(fe, irq_cfg, sizeof(irq_cfg));
df8cf706 149
1da177e4
LT
150 return 0;
151}
152
a78d0bfa
JAR
153static int mt352_aver777_init(struct dvb_frontend* fe)
154{
155 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
156 static u8 reset [] = { RESET, 0x80 };
157 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
158 static u8 agc_cfg [] = { AGC_TARGET, 0x28, 0xa0 };
159 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
160
161 mt352_write(fe, clock_config, sizeof(clock_config));
162 udelay(200);
163 mt352_write(fe, reset, sizeof(reset));
164 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
165 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
166 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
167
168 return 0;
169}
170
6e501a3f 171static int mt352_avermedia_xc3028_init(struct dvb_frontend *fe)
95a2fdb6 172{
6e501a3f
TF
173 static u8 clock_config [] = { CLOCK_CTL, 0x38, 0x2d };
174 static u8 reset [] = { RESET, 0x80 };
175 static u8 adc_ctl_1_cfg [] = { ADC_CTL_1, 0x40 };
176 static u8 agc_cfg [] = { AGC_TARGET, 0xe };
95a2fdb6
MCC
177 static u8 capt_range_cfg[] = { CAPT_RANGE, 0x33 };
178
179 mt352_write(fe, clock_config, sizeof(clock_config));
180 udelay(200);
181 mt352_write(fe, reset, sizeof(reset));
182 mt352_write(fe, adc_ctl_1_cfg, sizeof(adc_ctl_1_cfg));
183 mt352_write(fe, agc_cfg, sizeof(agc_cfg));
184 mt352_write(fe, capt_range_cfg, sizeof(capt_range_cfg));
95a2fdb6
MCC
185 return 0;
186}
187
14d24d14 188static int mt352_pinnacle_tuner_set_params(struct dvb_frontend *fe)
1da177e4 189{
b09cf61d 190 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
df8cf706
HH
191 u8 off[] = { 0x00, 0xf1};
192 u8 on[] = { 0x00, 0x71};
193 struct i2c_msg msg = {.addr=0x43, .flags=0, .buf=off, .len = sizeof(off)};
194
1da177e4
LT
195 struct saa7134_dev *dev = fe->dvb->priv;
196 struct v4l2_frequency f;
197
198 /* set frequency (mt2050) */
199 f.tuner = 0;
200 f.type = V4L2_TUNER_DIGITAL_TV;
b09cf61d 201 f.frequency = c->frequency / 1000 * 16 / 1000;
dea74869
PB
202 if (fe->ops.i2c_gate_ctrl)
203 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 204 i2c_transfer(&dev->i2c_adap, &msg, 1);
fac6986c 205 saa_call_all(dev, tuner, s_frequency, &f);
df8cf706 206 msg.buf = on;
dea74869
PB
207 if (fe->ops.i2c_gate_ctrl)
208 fe->ops.i2c_gate_ctrl(fe, 1);
df8cf706 209 i2c_transfer(&dev->i2c_adap, &msg, 1);
1da177e4
LT
210
211 pinnacle_antenna_pwr(dev, antenna_pwr);
212
213 /* mt352 setup */
0463f12c 214 return mt352_pinnacle_init(fe);
1da177e4
LT
215}
216
217static struct mt352_config pinnacle_300i = {
218 .demod_address = 0x3c >> 1,
219 .adc_clock = 20333,
220 .if2 = 36150,
221 .no_tuner = 1,
222 .demod_init = mt352_pinnacle_init,
1da177e4 223};
a78d0bfa
JAR
224
225static struct mt352_config avermedia_777 = {
226 .demod_address = 0xf,
227 .demod_init = mt352_aver777_init,
a78d0bfa 228};
1da177e4 229
6e501a3f 230static struct mt352_config avermedia_xc3028_mt352_dev = {
bc36a686
MCC
231 .demod_address = (0x1e >> 1),
232 .no_tuner = 1,
6e501a3f 233 .demod_init = mt352_avermedia_xc3028_init,
bc36a686
MCC
234};
235
f0551efc
MCC
236static struct tda18271_std_map mb86a20s_tda18271_std_map = {
237 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
238 .if_lvl = 7, .rfagc_top = 0x37, },
239};
240
241static struct tda18271_config kworld_tda18271_config = {
242 .std_map = &mb86a20s_tda18271_std_map,
6a58bc0f 243 .gate = TDA18271_GATE_DIGITAL,
ecb71d26
MCC
244 .config = 3, /* Use tuner callback for AGC */
245
f0551efc
MCC
246};
247
248static const struct mb86a20s_config kworld_mb86a20s_config = {
249 .demod_address = 0x10,
250};
251
6a58bc0f
MCC
252static int kworld_sbtvd_gate_ctrl(struct dvb_frontend* fe, int enable)
253{
254 struct saa7134_dev *dev = fe->dvb->priv;
255
256 unsigned char initmsg[] = {0x45, 0x97};
257 unsigned char msg_enable[] = {0x45, 0xc1};
258 unsigned char msg_disable[] = {0x45, 0x81};
259 struct i2c_msg msg = {.addr = 0x4b, .flags = 0, .buf = initmsg, .len = 2};
260
261 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
262 wprintk("could not access the I2C gate\n");
263 return -EIO;
264 }
265 if (enable)
266 msg.buf = msg_enable;
267 else
268 msg.buf = msg_disable;
269 if (i2c_transfer(&dev->i2c_adap, &msg, 1) != 1) {
270 wprintk("could not access the I2C gate\n");
271 return -EIO;
272 }
273 msleep(20);
274 return 0;
275}
276
58ef4f92
HH
277/* ==================================================================
278 * tda1004x based DVB-T cards, helper functions
279 */
280
281static int philips_tda1004x_request_firmware(struct dvb_frontend *fe,
282 const struct firmware **fw, char *name)
1da177e4
LT
283{
284 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
285 return request_firmware(fw, name, &dev->pci->dev);
286}
287
58ef4f92
HH
288/* ------------------------------------------------------------------
289 * these tuners are tu1216, td1316(a)
290 */
291
14d24d14 292static int philips_tda6651_pll_set(struct dvb_frontend *fe)
58ef4f92 293{
b09cf61d 294 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
58ef4f92
HH
295 struct saa7134_dev *dev = fe->dvb->priv;
296 struct tda1004x_state *state = fe->demodulator_priv;
297 u8 addr = state->config->tuner_address;
86ddd96f 298 u8 tuner_buf[4];
2cf36ac4 299 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tuner_buf,.len =
86ddd96f
MCC
300 sizeof(tuner_buf) };
301 int tuner_frequency = 0;
302 u8 band, cp, filter;
303
304 /* determine charge pump */
b09cf61d 305 tuner_frequency = c->frequency + 36166000;
86ddd96f
MCC
306 if (tuner_frequency < 87000000)
307 return -EINVAL;
308 else if (tuner_frequency < 130000000)
309 cp = 3;
310 else if (tuner_frequency < 160000000)
311 cp = 5;
312 else if (tuner_frequency < 200000000)
313 cp = 6;
314 else if (tuner_frequency < 290000000)
315 cp = 3;
316 else if (tuner_frequency < 420000000)
317 cp = 5;
318 else if (tuner_frequency < 480000000)
319 cp = 6;
320 else if (tuner_frequency < 620000000)
321 cp = 3;
322 else if (tuner_frequency < 830000000)
323 cp = 5;
324 else if (tuner_frequency < 895000000)
325 cp = 7;
326 else
327 return -EINVAL;
328
329 /* determine band */
b09cf61d 330 if (c->frequency < 49000000)
86ddd96f 331 return -EINVAL;
b09cf61d 332 else if (c->frequency < 161000000)
86ddd96f 333 band = 1;
b09cf61d 334 else if (c->frequency < 444000000)
86ddd96f 335 band = 2;
b09cf61d 336 else if (c->frequency < 861000000)
86ddd96f
MCC
337 band = 4;
338 else
339 return -EINVAL;
340
341 /* setup PLL filter */
b09cf61d
MCC
342 switch (c->bandwidth_hz) {
343 case 6000000:
86ddd96f
MCC
344 filter = 0;
345 break;
346
b09cf61d 347 case 7000000:
86ddd96f
MCC
348 filter = 0;
349 break;
350
b09cf61d 351 case 8000000:
86ddd96f
MCC
352 filter = 1;
353 break;
1da177e4 354
86ddd96f
MCC
355 default:
356 return -EINVAL;
357 }
358
359 /* calculate divisor
360 * ((36166000+((1000000/6)/2)) + Finput)/(1000000/6)
1da177e4 361 */
b09cf61d 362 tuner_frequency = (((c->frequency / 1000) * 6) + 217496) / 1000;
86ddd96f
MCC
363
364 /* setup tuner buffer */
365 tuner_buf[0] = (tuner_frequency >> 8) & 0x7f;
366 tuner_buf[1] = tuner_frequency & 0xff;
367 tuner_buf[2] = 0xca;
368 tuner_buf[3] = (cp << 5) | (filter << 3) | band;
369
dea74869
PB
370 if (fe->ops.i2c_gate_ctrl)
371 fe->ops.i2c_gate_ctrl(fe, 1);
58ef4f92 372 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1) {
cf3c34c8
TP
373 wprintk("could not write to tuner at addr: 0x%02x\n",
374 addr << 1);
86ddd96f 375 return -EIO;
58ef4f92 376 }
2cf36ac4
HH
377 msleep(1);
378 return 0;
379}
380
58ef4f92 381static int philips_tu1216_init(struct dvb_frontend *fe)
2cf36ac4
HH
382{
383 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
384 struct tda1004x_state *state = fe->demodulator_priv;
385 u8 addr = state->config->tuner_address;
2cf36ac4
HH
386 static u8 tu1216_init[] = { 0x0b, 0xf5, 0x85, 0xab };
387 struct i2c_msg tuner_msg = {.addr = addr,.flags = 0,.buf = tu1216_init,.len = sizeof(tu1216_init) };
86ddd96f 388
2cf36ac4 389 /* setup PLL configuration */
dea74869
PB
390 if (fe->ops.i2c_gate_ctrl)
391 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
392 if (i2c_transfer(&dev->i2c_adap, &tuner_msg, 1) != 1)
393 return -EIO;
86ddd96f 394 msleep(1);
2cf36ac4 395
1da177e4
LT
396 return 0;
397}
398
2cf36ac4
HH
399/* ------------------------------------------------------------------ */
400
2cf36ac4 401static struct tda1004x_config philips_tu1216_60_config = {
86ddd96f
MCC
402 .demod_address = 0x8,
403 .invert = 1,
2cf36ac4 404 .invert_oclk = 0,
86ddd96f
MCC
405 .xtal_freq = TDA10046_XTAL_4M,
406 .agc_config = TDA10046_AGC_DEFAULT,
407 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
408 .tuner_address = 0x60,
409 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
410};
411
2cf36ac4
HH
412static struct tda1004x_config philips_tu1216_61_config = {
413
414 .demod_address = 0x8,
415 .invert = 1,
416 .invert_oclk = 0,
417 .xtal_freq = TDA10046_XTAL_4M,
418 .agc_config = TDA10046_AGC_DEFAULT,
419 .if_freq = TDA10046_FREQ_3617,
58ef4f92
HH
420 .tuner_address = 0x61,
421 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
422};
423
424/* ------------------------------------------------------------------ */
425
cbb94521 426static int philips_td1316_tuner_init(struct dvb_frontend *fe)
2cf36ac4
HH
427{
428 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
429 struct tda1004x_state *state = fe->demodulator_priv;
430 u8 addr = state->config->tuner_address;
2cf36ac4 431 static u8 msg[] = { 0x0b, 0xf5, 0x86, 0xab };
58ef4f92 432 struct i2c_msg init_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
2cf36ac4
HH
433
434 /* setup PLL configuration */
dea74869
PB
435 if (fe->ops.i2c_gate_ctrl)
436 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4
HH
437 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
438 return -EIO;
2cf36ac4
HH
439 return 0;
440}
441
14d24d14 442static int philips_td1316_tuner_set_params(struct dvb_frontend *fe)
2cf36ac4 443{
14d24d14 444 return philips_tda6651_pll_set(fe);
58ef4f92
HH
445}
446
447static int philips_td1316_tuner_sleep(struct dvb_frontend *fe)
448{
449 struct saa7134_dev *dev = fe->dvb->priv;
450 struct tda1004x_state *state = fe->demodulator_priv;
451 u8 addr = state->config->tuner_address;
452 static u8 msg[] = { 0x0b, 0xdc, 0x86, 0xa4 };
453 struct i2c_msg analog_msg = {.addr = addr,.flags = 0,.buf = msg,.len = sizeof(msg) };
454
455 /* switch the tuner to analog mode */
456 if (fe->ops.i2c_gate_ctrl)
457 fe->ops.i2c_gate_ctrl(fe, 1);
458 if (i2c_transfer(&dev->i2c_adap, &analog_msg, 1) != 1)
459 return -EIO;
460 return 0;
2cf36ac4
HH
461}
462
58ef4f92
HH
463/* ------------------------------------------------------------------ */
464
cbb94521
HH
465static int philips_europa_tuner_init(struct dvb_frontend *fe)
466{
467 struct saa7134_dev *dev = fe->dvb->priv;
468 static u8 msg[] = { 0x00, 0x40};
469 struct i2c_msg init_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
470
471
472 if (philips_td1316_tuner_init(fe))
473 return -EIO;
474 msleep(1);
475 if (i2c_transfer(&dev->i2c_adap, &init_msg, 1) != 1)
476 return -EIO;
477
478 return 0;
479}
480
a79ddae9 481static int philips_europa_tuner_sleep(struct dvb_frontend *fe)
2cf36ac4
HH
482{
483 struct saa7134_dev *dev = fe->dvb->priv;
2cf36ac4 484
58ef4f92
HH
485 static u8 msg[] = { 0x00, 0x14 };
486 struct i2c_msg analog_msg = {.addr = 0x43,.flags = 0,.buf = msg,.len = sizeof(msg) };
487
488 if (philips_td1316_tuner_sleep(fe))
489 return -EIO;
2cf36ac4
HH
490
491 /* switch the board to analog mode */
dea74869
PB
492 if (fe->ops.i2c_gate_ctrl)
493 fe->ops.i2c_gate_ctrl(fe, 1);
2cf36ac4 494 i2c_transfer(&dev->i2c_adap, &analog_msg, 1);
a79ddae9
AQ
495 return 0;
496}
497
498static int philips_europa_demod_sleep(struct dvb_frontend *fe)
499{
500 struct saa7134_dev *dev = fe->dvb->priv;
501
502 if (dev->original_demod_sleep)
503 dev->original_demod_sleep(fe);
dea74869 504 fe->ops.i2c_gate_ctrl(fe, 1);
a79ddae9 505 return 0;
2cf36ac4
HH
506}
507
508static struct tda1004x_config philips_europa_config = {
509
510 .demod_address = 0x8,
511 .invert = 0,
512 .invert_oclk = 0,
513 .xtal_freq = TDA10046_XTAL_4M,
514 .agc_config = TDA10046_AGC_IFO_AUTO_POS,
515 .if_freq = TDA10046_FREQ_052,
58ef4f92
HH
516 .tuner_address = 0x61,
517 .request_firmware = philips_tda1004x_request_firmware
2cf36ac4
HH
518};
519
408b664a 520static struct tda1004x_config medion_cardbus = {
86ddd96f
MCC
521 .demod_address = 0x08,
522 .invert = 1,
523 .invert_oclk = 0,
524 .xtal_freq = TDA10046_XTAL_16M,
525 .agc_config = TDA10046_AGC_IFO_AUTO_NEG,
526 .if_freq = TDA10046_FREQ_3613,
58ef4f92
HH
527 .tuner_address = 0x61,
528 .request_firmware = philips_tda1004x_request_firmware
86ddd96f
MCC
529};
530
128fe95d
VC
531static struct tda1004x_config technotrend_budget_t3000_config = {
532 .demod_address = 0x8,
533 .invert = 1,
534 .invert_oclk = 0,
535 .xtal_freq = TDA10046_XTAL_4M,
536 .agc_config = TDA10046_AGC_DEFAULT,
537 .if_freq = TDA10046_FREQ_3617,
538 .tuner_address = 0x63,
539 .request_firmware = philips_tda1004x_request_firmware
540};
541
58ef4f92
HH
542/* ------------------------------------------------------------------
543 * tda 1004x based cards with philips silicon tuner
544 */
545
58ef4f92
HH
546static int tda8290_i2c_gate_ctrl( struct dvb_frontend* fe, int enable)
547{
58ef4f92
HH
548 struct tda1004x_state *state = fe->demodulator_priv;
549
550 u8 addr = state->config->i2c_gate;
551 static u8 tda8290_close[] = { 0x21, 0xc0};
552 static u8 tda8290_open[] = { 0x21, 0x80};
553 struct i2c_msg tda8290_msg = {.addr = addr,.flags = 0, .len = 2};
554 if (enable) {
555 tda8290_msg.buf = tda8290_close;
556 } else {
557 tda8290_msg.buf = tda8290_open;
558 }
06be3035 559 if (i2c_transfer(state->i2c, &tda8290_msg, 1) != 1) {
cf3c34c8
TP
560 struct saa7134_dev *dev = fe->dvb->priv;
561 wprintk("could not access tda8290 I2C gate\n");
58ef4f92
HH
562 return -EIO;
563 }
564 msleep(20);
565 return 0;
566}
567
58ef4f92 568static int philips_tda827x_tuner_init(struct dvb_frontend *fe)
90e9df7f 569{
90e9df7f 570 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 571 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 572
58ef4f92
HH
573 switch (state->config->antenna_switch) {
574 case 0: break;
575 case 1: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
576 saa7134_set_gpio(dev, 21, 0);
577 break;
578 case 2: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
579 saa7134_set_gpio(dev, 21, 1);
580 break;
587d2fd7 581 }
587d2fd7
HH
582 return 0;
583}
584
58ef4f92 585static int philips_tda827x_tuner_sleep(struct dvb_frontend *fe)
587d2fd7 586{
58ef4f92
HH
587 struct saa7134_dev *dev = fe->dvb->priv;
588 struct tda1004x_state *state = fe->demodulator_priv;
8ce47dad 589
58ef4f92
HH
590 switch (state->config->antenna_switch) {
591 case 0: break;
592 case 1: dprintk("setting GPIO21 to 1 (Radio antenna?)\n");
593 saa7134_set_gpio(dev, 21, 1);
594 break;
595 case 2: dprintk("setting GPIO21 to 0 (TV antenna?)\n");
596 saa7134_set_gpio(dev, 21, 0);
597 break;
598 }
587d2fd7 599 return 0;
2d6b5f62 600}
90e9df7f 601
d557dab5
MCC
602static int configure_tda827x_fe(struct saa7134_dev *dev,
603 struct tda1004x_config *cdec_conf,
604 struct tda827x_config *tuner_conf)
90e9df7f 605{
2ada815f 606 struct vb2_dvb_frontend *fe0;
363c35fc 607
92abe9ee 608 /* Get the first frontend */
2ada815f 609 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc 610
37e310ed
PST
611 if (!fe0)
612 return -EINVAL;
613
363c35fc
ST
614 fe0->dvb.frontend = dvb_attach(tda10046_attach, cdec_conf, &dev->i2c_adap);
615 if (fe0->dvb.frontend) {
7bff4b4d 616 if (cdec_conf->i2c_gate)
363c35fc
ST
617 fe0->dvb.frontend->ops.i2c_gate_ctrl = tda8290_i2c_gate_ctrl;
618 if (dvb_attach(tda827x_attach, fe0->dvb.frontend,
d557dab5
MCC
619 cdec_conf->tuner_address,
620 &dev->i2c_adap, tuner_conf))
621 return 0;
622
623 wprintk("no tda827x tuner found at addr: %02x\n",
7bff4b4d 624 cdec_conf->tuner_address);
58ef4f92 625 }
d557dab5 626 return -EINVAL;
90e9df7f
HH
627}
628
58ef4f92 629/* ------------------------------------------------------------------ */
261f5081 630
7bff4b4d 631static struct tda827x_config tda827x_cfg_0 = {
7bff4b4d
HH
632 .init = philips_tda827x_tuner_init,
633 .sleep = philips_tda827x_tuner_sleep,
634 .config = 0,
635 .switch_addr = 0
636};
637
638static struct tda827x_config tda827x_cfg_1 = {
7bff4b4d
HH
639 .init = philips_tda827x_tuner_init,
640 .sleep = philips_tda827x_tuner_sleep,
641 .config = 1,
642 .switch_addr = 0x4b
643};
644
645static struct tda827x_config tda827x_cfg_2 = {
7bff4b4d
HH
646 .init = philips_tda827x_tuner_init,
647 .sleep = philips_tda827x_tuner_sleep,
648 .config = 2,
649 .switch_addr = 0x4b
650};
651
652static struct tda827x_config tda827x_cfg_2_sw42 = {
7bff4b4d
HH
653 .init = philips_tda827x_tuner_init,
654 .sleep = philips_tda827x_tuner_sleep,
655 .config = 2,
656 .switch_addr = 0x42
657};
658
659/* ------------------------------------------------------------------ */
660
58ef4f92 661static struct tda1004x_config tda827x_lifeview_config = {
90e9df7f
HH
662 .demod_address = 0x08,
663 .invert = 1,
664 .invert_oclk = 0,
665 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
666 .agc_config = TDA10046_AGC_TDA827X,
667 .gpio_config = TDA10046_GP11_I,
550a9a5e 668 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
669 .tuner_address = 0x60,
670 .request_firmware = philips_tda1004x_request_firmware
550a9a5e 671};
550a9a5e 672
58ef4f92
HH
673static struct tda1004x_config philips_tiger_config = {
674 .demod_address = 0x08,
675 .invert = 1,
676 .invert_oclk = 0,
677 .xtal_freq = TDA10046_XTAL_16M,
678 .agc_config = TDA10046_AGC_TDA827X,
679 .gpio_config = TDA10046_GP11_I,
680 .if_freq = TDA10046_FREQ_045,
681 .i2c_gate = 0x4b,
682 .tuner_address = 0x61,
58ef4f92
HH
683 .antenna_switch= 1,
684 .request_firmware = philips_tda1004x_request_firmware
685};
550a9a5e
HH
686
687static struct tda1004x_config cinergy_ht_config = {
688 .demod_address = 0x08,
689 .invert = 1,
690 .invert_oclk = 0,
691 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
692 .agc_config = TDA10046_AGC_TDA827X,
693 .gpio_config = TDA10046_GP01_I,
90e9df7f 694 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
695 .i2c_gate = 0x4b,
696 .tuner_address = 0x61,
58ef4f92 697 .request_firmware = philips_tda1004x_request_firmware
90e9df7f
HH
698};
699
58ef4f92
HH
700static struct tda1004x_config cinergy_ht_pci_config = {
701 .demod_address = 0x08,
702 .invert = 1,
703 .invert_oclk = 0,
704 .xtal_freq = TDA10046_XTAL_16M,
705 .agc_config = TDA10046_AGC_TDA827X,
706 .gpio_config = TDA10046_GP01_I,
707 .if_freq = TDA10046_FREQ_045,
708 .i2c_gate = 0x4b,
709 .tuner_address = 0x60,
58ef4f92
HH
710 .request_firmware = philips_tda1004x_request_firmware
711};
712
713static struct tda1004x_config philips_tiger_s_config = {
714 .demod_address = 0x08,
715 .invert = 1,
716 .invert_oclk = 0,
717 .xtal_freq = TDA10046_XTAL_16M,
718 .agc_config = TDA10046_AGC_TDA827X,
719 .gpio_config = TDA10046_GP01_I,
720 .if_freq = TDA10046_FREQ_045,
721 .i2c_gate = 0x4b,
722 .tuner_address = 0x61,
58ef4f92
HH
723 .antenna_switch= 1,
724 .request_firmware = philips_tda1004x_request_firmware
725};
df42eaf2 726
587d2fd7
HH
727static struct tda1004x_config pinnacle_pctv_310i_config = {
728 .demod_address = 0x08,
729 .invert = 1,
730 .invert_oclk = 0,
731 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
732 .agc_config = TDA10046_AGC_TDA827X,
733 .gpio_config = TDA10046_GP11_I,
587d2fd7 734 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
735 .i2c_gate = 0x4b,
736 .tuner_address = 0x61,
58ef4f92 737 .request_firmware = philips_tda1004x_request_firmware
587d2fd7
HH
738};
739
c6e53daf
TG
740static struct tda1004x_config hauppauge_hvr_1110_config = {
741 .demod_address = 0x08,
742 .invert = 1,
743 .invert_oclk = 0,
744 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
745 .agc_config = TDA10046_AGC_TDA827X,
746 .gpio_config = TDA10046_GP11_I,
c6e53daf 747 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
748 .i2c_gate = 0x4b,
749 .tuner_address = 0x61,
750 .request_firmware = philips_tda1004x_request_firmware
c6e53daf
TG
751};
752
83646817
HH
753static struct tda1004x_config asus_p7131_dual_config = {
754 .demod_address = 0x08,
755 .invert = 1,
756 .invert_oclk = 0,
757 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
758 .agc_config = TDA10046_AGC_TDA827X,
759 .gpio_config = TDA10046_GP11_I,
83646817 760 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
761 .i2c_gate = 0x4b,
762 .tuner_address = 0x61,
58ef4f92
HH
763 .antenna_switch= 2,
764 .request_firmware = philips_tda1004x_request_firmware
83646817
HH
765};
766
420f32fe
NS
767static struct tda1004x_config lifeview_trio_config = {
768 .demod_address = 0x09,
769 .invert = 1,
770 .invert_oclk = 0,
771 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866
HH
772 .agc_config = TDA10046_AGC_TDA827X,
773 .gpio_config = TDA10046_GP00_I,
420f32fe 774 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
775 .tuner_address = 0x60,
776 .request_firmware = philips_tda1004x_request_firmware
420f32fe
NS
777};
778
58ef4f92 779static struct tda1004x_config tevion_dvbt220rf_config = {
df42eaf2
HH
780 .demod_address = 0x08,
781 .invert = 1,
782 .invert_oclk = 0,
783 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 784 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 785 .gpio_config = TDA10046_GP11_I,
df42eaf2 786 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
787 .tuner_address = 0x60,
788 .request_firmware = philips_tda1004x_request_firmware
df42eaf2
HH
789};
790
58ef4f92 791static struct tda1004x_config md8800_dvbt_config = {
3dfb729f
PH
792 .demod_address = 0x08,
793 .invert = 1,
794 .invert_oclk = 0,
795 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 796 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 797 .gpio_config = TDA10046_GP01_I,
3dfb729f 798 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
799 .i2c_gate = 0x4b,
800 .tuner_address = 0x60,
58ef4f92 801 .request_firmware = philips_tda1004x_request_firmware
3dfb729f
PH
802};
803
e06cea4c
HH
804static struct tda1004x_config asus_p7131_4871_config = {
805 .demod_address = 0x08,
806 .invert = 1,
807 .invert_oclk = 0,
808 .xtal_freq = TDA10046_XTAL_16M,
809 .agc_config = TDA10046_AGC_TDA827X,
810 .gpio_config = TDA10046_GP01_I,
811 .if_freq = TDA10046_FREQ_045,
812 .i2c_gate = 0x4b,
813 .tuner_address = 0x61,
e06cea4c
HH
814 .antenna_switch= 2,
815 .request_firmware = philips_tda1004x_request_firmware
816};
817
f3eec0c0 818static struct tda1004x_config asus_p7131_hybrid_lna_config = {
e06cea4c
HH
819 .demod_address = 0x08,
820 .invert = 1,
821 .invert_oclk = 0,
822 .xtal_freq = TDA10046_XTAL_16M,
823 .agc_config = TDA10046_AGC_TDA827X,
824 .gpio_config = TDA10046_GP11_I,
825 .if_freq = TDA10046_FREQ_045,
826 .i2c_gate = 0x4b,
827 .tuner_address = 0x61,
e06cea4c
HH
828 .antenna_switch= 2,
829 .request_firmware = philips_tda1004x_request_firmware
830};
261f5081 831
b39423a9
SF
832static struct tda1004x_config kworld_dvb_t_210_config = {
833 .demod_address = 0x08,
834 .invert = 1,
835 .invert_oclk = 0,
836 .xtal_freq = TDA10046_XTAL_16M,
837 .agc_config = TDA10046_AGC_TDA827X,
838 .gpio_config = TDA10046_GP11_I,
839 .if_freq = TDA10046_FREQ_045,
840 .i2c_gate = 0x4b,
841 .tuner_address = 0x61,
b39423a9
SF
842 .antenna_switch= 1,
843 .request_firmware = philips_tda1004x_request_firmware
844};
261f5081 845
d90d9f5a
ES
846static struct tda1004x_config avermedia_super_007_config = {
847 .demod_address = 0x08,
848 .invert = 1,
849 .invert_oclk = 0,
850 .xtal_freq = TDA10046_XTAL_16M,
851 .agc_config = TDA10046_AGC_TDA827X,
852 .gpio_config = TDA10046_GP01_I,
853 .if_freq = TDA10046_FREQ_045,
854 .i2c_gate = 0x4b,
855 .tuner_address = 0x60,
d90d9f5a
ES
856 .antenna_switch= 1,
857 .request_firmware = philips_tda1004x_request_firmware
858};
859
4ba24373
HP
860static struct tda1004x_config twinhan_dtv_dvb_3056_config = {
861 .demod_address = 0x08,
862 .invert = 1,
863 .invert_oclk = 0,
864 .xtal_freq = TDA10046_XTAL_16M,
865 .agc_config = TDA10046_AGC_TDA827X,
866 .gpio_config = TDA10046_GP01_I,
867 .if_freq = TDA10046_FREQ_045,
868 .i2c_gate = 0x42,
869 .tuner_address = 0x61,
4ba24373
HP
870 .antenna_switch = 1,
871 .request_firmware = philips_tda1004x_request_firmware
872};
873
301e9d64 874static struct tda1004x_config asus_tiger_3in1_config = {
875 .demod_address = 0x0b,
876 .invert = 1,
877 .invert_oclk = 0,
878 .xtal_freq = TDA10046_XTAL_16M,
879 .agc_config = TDA10046_AGC_TDA827X,
880 .gpio_config = TDA10046_GP11_I,
881 .if_freq = TDA10046_FREQ_045,
882 .i2c_gate = 0x4b,
883 .tuner_address = 0x61,
884 .antenna_switch = 1,
885 .request_firmware = philips_tda1004x_request_firmware
886};
887
75c7dbca 888static struct tda1004x_config asus_ps3_100_config = {
889 .demod_address = 0x0b,
890 .invert = 1,
891 .invert_oclk = 0,
892 .xtal_freq = TDA10046_XTAL_16M,
893 .agc_config = TDA10046_AGC_TDA827X,
894 .gpio_config = TDA10046_GP11_I,
895 .if_freq = TDA10046_FREQ_045,
896 .i2c_gate = 0x4b,
897 .tuner_address = 0x61,
898 .antenna_switch = 1,
899 .request_firmware = philips_tda1004x_request_firmware
900};
901
58ef4f92
HH
902/* ------------------------------------------------------------------
903 * special case: this card uses saa713x GPIO22 for the mode switch
904 */
5eda227f 905
58ef4f92 906static int ads_duo_tuner_init(struct dvb_frontend *fe)
5eda227f
HH
907{
908 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92
HH
909 philips_tda827x_tuner_init(fe);
910 /* route TDA8275a AGC input to the channel decoder */
06be3035 911 saa7134_set_gpio(dev, 22, 1);
5eda227f
HH
912 return 0;
913}
914
58ef4f92 915static int ads_duo_tuner_sleep(struct dvb_frontend *fe)
5eda227f 916{
5eda227f 917 struct saa7134_dev *dev = fe->dvb->priv;
58ef4f92 918 /* route TDA8275a AGC input to the analog IF chip*/
06be3035 919 saa7134_set_gpio(dev, 22, 0);
58ef4f92
HH
920 philips_tda827x_tuner_sleep(fe);
921 return 0;
5eda227f
HH
922}
923
8ce47dad 924static struct tda827x_config ads_duo_cfg = {
8ce47dad 925 .init = ads_duo_tuner_init,
7bff4b4d
HH
926 .sleep = ads_duo_tuner_sleep,
927 .config = 0
8ce47dad
MK
928};
929
58ef4f92 930static struct tda1004x_config ads_tech_duo_config = {
5eda227f
HH
931 .demod_address = 0x08,
932 .invert = 1,
933 .invert_oclk = 0,
934 .xtal_freq = TDA10046_XTAL_16M,
1bb0e866 935 .agc_config = TDA10046_AGC_TDA827X,
58ef4f92 936 .gpio_config = TDA10046_GP00_I,
5eda227f 937 .if_freq = TDA10046_FREQ_045,
58ef4f92
HH
938 .tuner_address = 0x61,
939 .request_firmware = philips_tda1004x_request_firmware
5eda227f
HH
940};
941
47aeba5a
DB
942static struct zl10353_config behold_h6_config = {
943 .demod_address = 0x1e>>1,
944 .no_tuner = 1,
945 .parallel_ts = 1,
5f77af93 946 .disable_i2c_gate_ctrl = 1,
47aeba5a
DB
947};
948
2930992c
BILDB
949static struct xc5000_config behold_x7_tunerconfig = {
950 .i2c_address = 0xc2>>1,
951 .if_khz = 4560,
2a0d0560 952 .radio_input = XC5000_RADIO_FM1,
2930992c
BILDB
953};
954
955static struct zl10353_config behold_x7_config = {
956 .demod_address = 0x1e>>1,
957 .if2 = 45600,
958 .no_tuner = 1,
959 .parallel_ts = 1,
960 .disable_i2c_gate_ctrl = 1,
961};
962
dbe8740d
CC
963static struct zl10353_config videomate_t750_zl10353_config = {
964 .demod_address = 0x0f,
965 .no_tuner = 1,
966 .parallel_ts = 1,
967 .disable_i2c_gate_ctrl = 1,
968};
969
970static struct qt1010_config videomate_t750_qt1010_config = {
971 .i2c_address = 0x62
972};
973
974
58ef4f92
HH
975/* ==================================================================
976 * tda10086 based DVB-S cards, helper functions
977 */
978
e2ac28fa
IL
979static struct tda10086_config flydvbs = {
980 .demod_address = 0x0e,
981 .invert = 0,
ea75baf4 982 .diseqc_tone = 0,
9a1b04e4
HH
983 .xtal_freq = TDA10086_XTAL_16M,
984};
985
986static struct tda10086_config sd1878_4m = {
987 .demod_address = 0x0e,
988 .invert = 0,
989 .diseqc_tone = 0,
990 .xtal_freq = TDA10086_XTAL_4M,
e2ac28fa
IL
991};
992
1b1cee35
HH
993/* ------------------------------------------------------------------
994 * special case: lnb supply is connected to the gated i2c
995 */
996
997static int md8800_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
998{
999 int res = -EIO;
1000 struct saa7134_dev *dev = fe->dvb->priv;
1001 if (fe->ops.i2c_gate_ctrl) {
1002 fe->ops.i2c_gate_ctrl(fe, 1);
1003 if (dev->original_set_voltage)
1004 res = dev->original_set_voltage(fe, voltage);
1005 fe->ops.i2c_gate_ctrl(fe, 0);
1006 }
1007 return res;
1008};
1009
1010static int md8800_set_high_voltage(struct dvb_frontend *fe, long arg)
1011{
1012 int res = -EIO;
1013 struct saa7134_dev *dev = fe->dvb->priv;
1014 if (fe->ops.i2c_gate_ctrl) {
1015 fe->ops.i2c_gate_ctrl(fe, 1);
1016 if (dev->original_set_high_voltage)
1017 res = dev->original_set_high_voltage(fe, arg);
1018 fe->ops.i2c_gate_ctrl(fe, 0);
1019 }
1020 return res;
1021};
1022
5823b3a6
HH
1023static int md8800_set_voltage2(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
1024{
1025 struct saa7134_dev *dev = fe->dvb->priv;
1026 u8 wbuf[2] = { 0x1f, 00 };
1027 u8 rbuf;
1028 struct i2c_msg msg[] = { { .addr = 0x08, .flags = 0, .buf = wbuf, .len = 1 },
1029 { .addr = 0x08, .flags = I2C_M_RD, .buf = &rbuf, .len = 1 } };
1030
1031 if (i2c_transfer(&dev->i2c_adap, msg, 2) != 2)
1032 return -EIO;
1033 /* NOTE: this assumes that gpo1 is used, it might be bit 5 (gpo2) */
1034 if (voltage == SEC_VOLTAGE_18)
1035 wbuf[1] = rbuf | 0x10;
1036 else
1037 wbuf[1] = rbuf & 0xef;
1038 msg[0].len = 2;
1039 i2c_transfer(&dev->i2c_adap, msg, 1);
1040 return 0;
1041}
1042
1043static int md8800_set_high_voltage2(struct dvb_frontend *fe, long arg)
1044{
1045 struct saa7134_dev *dev = fe->dvb->priv;
1046 wprintk("%s: sorry can't set high LNB supply voltage from here\n", __func__);
1047 return -EIO;
1048}
1049
58ef4f92
HH
1050/* ==================================================================
1051 * nxt200x based ATSC cards, helper functions
1052 */
90e9df7f 1053
3b64e8e2
MK
1054static struct nxt200x_config avertvhda180 = {
1055 .demod_address = 0x0a,
3b64e8e2 1056};
3e1410ad
AB
1057
1058static struct nxt200x_config kworldatsc110 = {
1059 .demod_address = 0x0a,
3e1410ad 1060};
3b64e8e2 1061
04574185
MS
1062/* ------------------------------------------------------------------ */
1063
1064static struct mt312_config avertv_a700_mt312 = {
1065 .demod_address = 0x0e,
1066 .voltage_inverted = 1,
1067};
1068
1069static struct zl10036_config avertv_a700_tuner = {
1070 .tuner_address = 0x60,
1071};
1072
ecfcfec8
IL
1073static struct mt312_config zl10313_compro_s350_config = {
1074 .demod_address = 0x0e,
1075};
1076
34fe2784
OZ
1077static struct mt312_config zl10313_avermedia_a706_config = {
1078 .demod_address = 0x0e,
1079};
1080
3abdedd8
MK
1081static struct lgdt3305_config hcw_lgdt3305_config = {
1082 .i2c_addr = 0x0e,
1083 .mpeg_mode = LGDT3305_MPEG_SERIAL,
1084 .tpclk_edge = LGDT3305_TPCLK_RISING_EDGE,
1085 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
1086 .deny_i2c_rptr = 1,
1087 .spectral_inversion = 1,
1088 .qam_if_khz = 4000,
1089 .vsb_if_khz = 3250,
1090};
1091
1bc7f51c
MK
1092static struct tda10048_config hcw_tda10048_config = {
1093 .demod_address = 0x10 >> 1,
1094 .output_mode = TDA10048_SERIAL_OUTPUT,
1095 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1096 .inversion = TDA10048_INVERSION_ON,
1097 .dtv6_if_freq_khz = TDA10048_IF_3300,
1098 .dtv7_if_freq_khz = TDA10048_IF_3500,
1099 .dtv8_if_freq_khz = TDA10048_IF_4000,
1100 .clk_freq_khz = TDA10048_CLK_16000,
1101 .disable_gate_access = 1,
1102};
1103
3abdedd8
MK
1104static struct tda18271_std_map hauppauge_tda18271_std_map = {
1105 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
1106 .if_lvl = 1, .rfagc_top = 0x58, },
1107 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
1108 .if_lvl = 1, .rfagc_top = 0x58, },
1109};
1110
1111static struct tda18271_config hcw_tda18271_config = {
1112 .std_map = &hauppauge_tda18271_std_map,
1113 .gate = TDA18271_GATE_ANALOG,
1114 .config = 3,
542cb057 1115 .output_opt = TDA18271_OUTPUT_LT_OFF,
3abdedd8
MK
1116};
1117
1118static struct tda829x_config tda829x_no_probe = {
1119 .probe_tuner = TDA829X_DONT_PROBE,
1120};
1121
6c119ff4
HV
1122static struct tda10048_config zolid_tda10048_config = {
1123 .demod_address = 0x10 >> 1,
1124 .output_mode = TDA10048_PARALLEL_OUTPUT,
1125 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1126 .inversion = TDA10048_INVERSION_ON,
1127 .dtv6_if_freq_khz = TDA10048_IF_3300,
1128 .dtv7_if_freq_khz = TDA10048_IF_3500,
1129 .dtv8_if_freq_khz = TDA10048_IF_4000,
1130 .clk_freq_khz = TDA10048_CLK_16000,
1131 .disable_gate_access = 1,
1132};
1133
1134static struct tda18271_config zolid_tda18271_config = {
1135 .gate = TDA18271_GATE_ANALOG,
1136};
1137
184e769f
MK
1138static struct tda10048_config dtv1000s_tda10048_config = {
1139 .demod_address = 0x10 >> 1,
1140 .output_mode = TDA10048_PARALLEL_OUTPUT,
1141 .fwbulkwritelen = TDA10048_BULKWRITE_200,
1142 .inversion = TDA10048_INVERSION_ON,
1143 .dtv6_if_freq_khz = TDA10048_IF_3300,
1144 .dtv7_if_freq_khz = TDA10048_IF_3800,
1145 .dtv8_if_freq_khz = TDA10048_IF_4300,
1146 .clk_freq_khz = TDA10048_CLK_16000,
1147 .disable_gate_access = 1,
1148};
1149
1150static struct tda18271_std_map dtv1000s_tda18271_std_map = {
1151 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
1152 .if_lvl = 1, .rfagc_top = 0x37, },
1153 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
1154 .if_lvl = 1, .rfagc_top = 0x37, },
1155 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
1156 .if_lvl = 1, .rfagc_top = 0x37, },
1157};
1158
1159static struct tda18271_config dtv1000s_tda18271_config = {
1160 .std_map = &dtv1000s_tda18271_std_map,
1161 .gate = TDA18271_GATE_ANALOG,
1162};
1163
ce02704d
TL
1164static struct lgs8gxx_config prohdtv_pro2_lgs8g75_config = {
1165 .prod = LGS8GXX_PROD_LGS8G75,
1166 .demod_address = 0x1d,
1167 .serial_ts = 0,
1168 .ts_clk_pol = 1,
1169 .ts_clk_gated = 0,
1170 .if_clk_freq = 30400, /* 30.4 MHz */
1171 .if_freq = 4000, /* 4.00 MHz */
1172 .if_neg_center = 0,
1173 .ext_adc = 0,
1174 .adc_signed = 1,
1175 .adc_vpp = 3, /* 2.0 Vpp */
1176 .if_neg_edge = 1,
1177};
1178
1179static struct tda18271_config prohdtv_pro2_tda18271_config = {
1180 .gate = TDA18271_GATE_ANALOG,
1181 .output_opt = TDA18271_OUTPUT_LT_OFF,
1182};
1183
25fa2071
KS
1184static struct tda18271_std_map kworld_tda18271_std_map = {
1185 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 3,
1186 .if_lvl = 6, .rfagc_top = 0x37 },
1187 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
1188 .if_lvl = 6, .rfagc_top = 0x37 },
1189};
1190
1191static struct tda18271_config kworld_pc150u_tda18271_config = {
1192 .std_map = &kworld_tda18271_std_map,
1193 .gate = TDA18271_GATE_ANALOG,
1194 .output_opt = TDA18271_OUTPUT_LT_OFF,
1195 .config = 3, /* Use tuner callback for AGC */
1196 .rf_cal_on_startup = 1
1197};
1198
1199static struct s5h1411_config kworld_s5h1411_config = {
1200 .output_mode = S5H1411_PARALLEL_OUTPUT,
1201 .gpio = S5H1411_GPIO_OFF,
1202 .qam_if = S5H1411_IF_4000,
1203 .vsb_if = S5H1411_IF_3250,
1204 .inversion = S5H1411_INVERSION_ON,
1205 .status_mode = S5H1411_DEMODLOCKING,
1206 .mpeg_timing =
1207 S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
1208};
1209
1210
58ef4f92
HH
1211/* ==================================================================
1212 * Core code
1213 */
1da177e4
LT
1214
1215static int dvb_init(struct saa7134_dev *dev)
1216{
1c4f76ab 1217 int ret;
bc36a686 1218 int attach_xc3028 = 0;
2ada815f
HV
1219 struct vb2_dvb_frontend *fe0;
1220 struct vb2_queue *q;
363c35fc 1221
f972e0bd
DB
1222 /* FIXME: add support for multi-frontend */
1223 mutex_init(&dev->frontends.lock);
7bdf84fc 1224 INIT_LIST_HEAD(&dev->frontends.felist);
f972e0bd
DB
1225
1226 printk(KERN_INFO "%s() allocating 1 frontend\n", __func__);
2ada815f 1227 fe0 = vb2_dvb_alloc_frontend(&dev->frontends, 1);
f3f741e7 1228 if (!fe0) {
f972e0bd
DB
1229 printk(KERN_ERR "%s() failed to alloc\n", __func__);
1230 return -ENOMEM;
1231 }
1232
2ada815f 1233 /* init struct vb2_dvb */
1da177e4
LT
1234 dev->ts.nr_bufs = 32;
1235 dev->ts.nr_packets = 32*4;
363c35fc 1236 fe0->dvb.name = dev->name;
2ada815f
HV
1237 q = &fe0->dvb.dvbq;
1238 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1239 q->io_modes = VB2_MMAP | VB2_READ;
1240 q->drv_priv = &dev->ts_q;
1241 q->ops = &saa7134_ts_qops;
1242 q->mem_ops = &vb2_dma_sg_memops;
1243 q->buf_struct_size = sizeof(struct saa7134_buf);
1244 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
1245 q->lock = &dev->lock;
1246 ret = vb2_queue_init(q);
1247 if (ret) {
1248 vb2_dvb_dealloc_frontends(&dev->frontends);
1249 return ret;
1250 }
1da177e4
LT
1251
1252 switch (dev->board) {
1253 case SAA7134_BOARD_PINNACLE_300I_DVBT_PAL:
cf3c34c8 1254 dprintk("pinnacle 300i dvb setup\n");
363c35fc 1255 fe0->dvb.frontend = dvb_attach(mt352_attach, &pinnacle_300i,
f7b54b10 1256 &dev->i2c_adap);
363c35fc
ST
1257 if (fe0->dvb.frontend) {
1258 fe0->dvb.frontend->ops.tuner_ops.set_params = mt352_pinnacle_tuner_set_params;
6b3ccab7 1259 }
1da177e4 1260 break;
a78d0bfa 1261 case SAA7134_BOARD_AVERMEDIA_777:
515c208d 1262 case SAA7134_BOARD_AVERMEDIA_A16AR:
cf3c34c8 1263 dprintk("avertv 777 dvb setup\n");
363c35fc 1264 fe0->dvb.frontend = dvb_attach(mt352_attach, &avermedia_777,
f7b54b10 1265 &dev->i2c_adap);
363c35fc
ST
1266 if (fe0->dvb.frontend) {
1267 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
fb147e97
MK
1268 &dev->i2c_adap, 0x61,
1269 TUNER_PHILIPS_TD1316);
6b3ccab7 1270 }
a78d0bfa 1271 break;
95a2fdb6 1272 case SAA7134_BOARD_AVERMEDIA_A16D:
6e501a3f 1273 dprintk("AverMedia A16D dvb setup\n");
363c35fc 1274 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1275 &avermedia_xc3028_mt352_dev,
1276 &dev->i2c_adap);
95a2fdb6
MCC
1277 attach_xc3028 = 1;
1278 break;
1da177e4 1279 case SAA7134_BOARD_MD7134:
363c35fc 1280 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1281 &medion_cardbus,
1282 &dev->i2c_adap);
363c35fc
ST
1283 if (fe0->dvb.frontend) {
1284 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1285 &dev->i2c_adap, medion_cardbus.tuner_address,
1286 TUNER_PHILIPS_FMD1216ME_MK3);
6b3ccab7 1287 }
1da177e4 1288 break;
86ddd96f 1289 case SAA7134_BOARD_PHILIPS_TOUGH:
363c35fc 1290 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1291 &philips_tu1216_60_config,
1292 &dev->i2c_adap);
363c35fc
ST
1293 if (fe0->dvb.frontend) {
1294 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1295 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1296 }
86ddd96f
MCC
1297 break;
1298 case SAA7134_BOARD_FLYDVBTDUO:
10b7a903 1299 case SAA7134_BOARD_FLYDVBT_DUO_CARDBUS:
d557dab5
MCC
1300 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1301 &tda827x_cfg_0) < 0)
91268a5e 1302 goto detach_frontend;
86ddd96f 1303 break;
2cf36ac4 1304 case SAA7134_BOARD_PHILIPS_EUROPA:
2cf36ac4 1305 case SAA7134_BOARD_VIDEOMATE_DVBT_300:
e3c6e1aa 1306 case SAA7134_BOARD_ASUS_EUROPA_HYBRID:
363c35fc 1307 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1308 &philips_europa_config,
1309 &dev->i2c_adap);
363c35fc
ST
1310 if (fe0->dvb.frontend) {
1311 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1312 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1313 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1314 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1315 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
6b3ccab7 1316 }
2cf36ac4 1317 break;
128fe95d
VC
1318 case SAA7134_BOARD_TECHNOTREND_BUDGET_T3000:
1319 fe0->dvb.frontend = dvb_attach(tda10046_attach,
1320 &technotrend_budget_t3000_config,
1321 &dev->i2c_adap);
1322 if (fe0->dvb.frontend) {
1323 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1324 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
1325 fe0->dvb.frontend->ops.tuner_ops.init = philips_europa_tuner_init;
1326 fe0->dvb.frontend->ops.tuner_ops.sleep = philips_europa_tuner_sleep;
1327 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
1328 }
1329 break;
2cf36ac4 1330 case SAA7134_BOARD_VIDEOMATE_DVBT_200:
363c35fc 1331 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1332 &philips_tu1216_61_config,
1333 &dev->i2c_adap);
363c35fc
ST
1334 if (fe0->dvb.frontend) {
1335 fe0->dvb.frontend->ops.tuner_ops.init = philips_tu1216_init;
1336 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_tda6651_pll_set;
6b3ccab7 1337 }
2cf36ac4 1338 break;
b39423a9 1339 case SAA7134_BOARD_KWORLD_DVBT_210:
d557dab5
MCC
1340 if (configure_tda827x_fe(dev, &kworld_dvb_t_210_config,
1341 &tda827x_cfg_2) < 0)
91268a5e 1342 goto detach_frontend;
b39423a9 1343 break;
0e316ecf 1344 case SAA7134_BOARD_HAUPPAUGE_HVR1120:
1bc7f51c
MK
1345 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1346 &hcw_tda10048_config,
1347 &dev->i2c_adap);
1348 if (fe0->dvb.frontend != NULL) {
1349 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1350 &dev->i2c_adap, 0x4b,
1351 &tda829x_no_probe);
1352 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1353 0x60, &dev->i2c_adap,
1354 &hcw_tda18271_config);
1355 }
1356 break;
90e9df7f 1357 case SAA7134_BOARD_PHILIPS_TIGER:
d557dab5
MCC
1358 if (configure_tda827x_fe(dev, &philips_tiger_config,
1359 &tda827x_cfg_0) < 0)
91268a5e 1360 goto detach_frontend;
587d2fd7
HH
1361 break;
1362 case SAA7134_BOARD_PINNACLE_PCTV_310i:
d557dab5
MCC
1363 if (configure_tda827x_fe(dev, &pinnacle_pctv_310i_config,
1364 &tda827x_cfg_1) < 0)
91268a5e 1365 goto detach_frontend;
90e9df7f 1366 break;
c6e53daf 1367 case SAA7134_BOARD_HAUPPAUGE_HVR1110:
d557dab5
MCC
1368 if (configure_tda827x_fe(dev, &hauppauge_hvr_1110_config,
1369 &tda827x_cfg_1) < 0)
91268a5e 1370 goto detach_frontend;
c6e53daf 1371 break;
b5f05064 1372 case SAA7134_BOARD_HAUPPAUGE_HVR1150:
3abdedd8
MK
1373 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
1374 &hcw_lgdt3305_config,
1375 &dev->i2c_adap);
1376 if (fe0->dvb.frontend) {
1377 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1378 &dev->i2c_adap, 0x4b,
1379 &tda829x_no_probe);
1380 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1381 0x60, &dev->i2c_adap,
1382 &hcw_tda18271_config);
1383 }
1384 break;
d4b0aba4 1385 case SAA7134_BOARD_ASUSTeK_P7131_DUAL:
d557dab5
MCC
1386 if (configure_tda827x_fe(dev, &asus_p7131_dual_config,
1387 &tda827x_cfg_0) < 0)
91268a5e 1388 goto detach_frontend;
d4b0aba4 1389 break;
3d8466ec 1390 case SAA7134_BOARD_FLYDVBT_LR301:
d557dab5
MCC
1391 if (configure_tda827x_fe(dev, &tda827x_lifeview_config,
1392 &tda827x_cfg_0) < 0)
91268a5e 1393 goto detach_frontend;
3d8466ec 1394 break;
92abe9ee 1395 case SAA7134_BOARD_FLYDVB_TRIO:
d557dab5
MCC
1396 if (!use_frontend) { /* terrestrial */
1397 if (configure_tda827x_fe(dev, &lifeview_trio_config,
1398 &tda827x_cfg_0) < 0)
91268a5e 1399 goto detach_frontend;
7bff4b4d 1400 } else { /* satellite */
363c35fc
ST
1401 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs, &dev->i2c_adap);
1402 if (fe0->dvb.frontend) {
1403 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x63,
1f683cd8 1404 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1405 wprintk("%s: Lifeview Trio, No tda826x found!\n", __func__);
91268a5e 1406 goto detach_frontend;
1f683cd8 1407 }
48a8a03b
MCC
1408 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
1409 &dev->i2c_adap,
1410 0x08, 0, 0, false) == NULL) {
5823b3a6 1411 wprintk("%s: Lifeview Trio, No ISL6421 found!\n", __func__);
91268a5e 1412 goto detach_frontend;
1f683cd8
NS
1413 }
1414 }
6b3ccab7 1415 }
420f32fe 1416 break;
df42eaf2 1417 case SAA7134_BOARD_ADS_DUO_CARDBUS_PTV331:
58ef4f92 1418 case SAA7134_BOARD_FLYDVBT_HYBRID_CARDBUS:
363c35fc 1419 fe0->dvb.frontend = dvb_attach(tda10046_attach,
f7b54b10
MK
1420 &ads_tech_duo_config,
1421 &dev->i2c_adap);
363c35fc
ST
1422 if (fe0->dvb.frontend) {
1423 if (dvb_attach(tda827x_attach,fe0->dvb.frontend,
7bff4b4d
HH
1424 ads_tech_duo_config.tuner_address, &dev->i2c_adap,
1425 &ads_duo_cfg) == NULL) {
cf3c34c8 1426 wprintk("no tda827x tuner found at addr: %02x\n",
ede2200d 1427 ads_tech_duo_config.tuner_address);
91268a5e 1428 goto detach_frontend;
ede2200d 1429 }
bc36ec74
MCC
1430 } else
1431 wprintk("failed to attach tda10046\n");
df42eaf2 1432 break;
3dfb729f 1433 case SAA7134_BOARD_TEVION_DVBT_220RF:
d557dab5
MCC
1434 if (configure_tda827x_fe(dev, &tevion_dvbt220rf_config,
1435 &tda827x_cfg_0) < 0)
91268a5e 1436 goto detach_frontend;
d95b8942 1437 break;
5eda227f 1438 case SAA7134_BOARD_MEDION_MD8800_QUADRO:
4b1431ca 1439 if (!use_frontend) { /* terrestrial */
d557dab5
MCC
1440 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1441 &tda827x_cfg_0) < 0)
91268a5e 1442 goto detach_frontend;
4b1431ca 1443 } else { /* satellite */
363c35fc 1444 fe0->dvb.frontend = dvb_attach(tda10086_attach,
4b1431ca 1445 &flydvbs, &dev->i2c_adap);
363c35fc
ST
1446 if (fe0->dvb.frontend) {
1447 struct dvb_frontend *fe = fe0->dvb.frontend;
5823b3a6
HH
1448 u8 dev_id = dev->eedata[2];
1449 u8 data = 0xc4;
1450 struct i2c_msg msg = {.addr = 0x08, .flags = 0, .len = 1};
1451
363c35fc 1452 if (dvb_attach(tda826x_attach, fe0->dvb.frontend,
d557dab5 1453 0x60, &dev->i2c_adap, 0) == NULL) {
4b1431ca 1454 wprintk("%s: Medion Quadro, no tda826x "
5823b3a6 1455 "found !\n", __func__);
91268a5e 1456 goto detach_frontend;
d557dab5 1457 }
5823b3a6
HH
1458 if (dev_id != 0x08) {
1459 /* we need to open the i2c gate (we know it exists) */
1460 fe->ops.i2c_gate_ctrl(fe, 1);
1461 if (dvb_attach(isl6405_attach, fe,
d557dab5 1462 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
5823b3a6
HH
1463 wprintk("%s: Medion Quadro, no ISL6405 "
1464 "found !\n", __func__);
91268a5e 1465 goto detach_frontend;
d557dab5 1466 }
e9c1ac9d
HH
1467 if (dev_id == 0x07) {
1468 /* fire up the 2nd section of the LNB supply since
1469 we can't do this from the other section */
1470 msg.buf = &data;
1471 i2c_transfer(&dev->i2c_adap, &msg, 1);
1472 }
5823b3a6
HH
1473 fe->ops.i2c_gate_ctrl(fe, 0);
1474 dev->original_set_voltage = fe->ops.set_voltage;
1475 fe->ops.set_voltage = md8800_set_voltage;
1476 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1477 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1478 } else {
1479 fe->ops.set_voltage = md8800_set_voltage2;
1480 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage2;
1481 }
4b1431ca
HH
1482 }
1483 }
5eda227f 1484 break;
3b64e8e2 1485 case SAA7134_BOARD_AVERMEDIA_AVERTVHD_A180:
363c35fc 1486 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &avertvhda180,
f7b54b10 1487 &dev->i2c_adap);
363c35fc
ST
1488 if (fe0->dvb.frontend)
1489 dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x61,
47a9991e 1490 NULL, DVB_PLL_TDHU2);
3b64e8e2 1491 break;
f689d908 1492 case SAA7134_BOARD_ADS_INSTANT_HDTV_PCI:
3e1410ad 1493 case SAA7134_BOARD_KWORLD_ATSC110:
363c35fc 1494 fe0->dvb.frontend = dvb_attach(nxt200x_attach, &kworldatsc110,
f7b54b10 1495 &dev->i2c_adap);
363c35fc
ST
1496 if (fe0->dvb.frontend)
1497 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
62ff817a
MK
1498 &dev->i2c_adap, 0x61,
1499 TUNER_PHILIPS_TUV1236D);
3e1410ad 1500 break;
25fa2071
KS
1501 case SAA7134_BOARD_KWORLD_PC150U:
1502 saa7134_set_gpio(dev, 18, 1); /* Switch to digital mode */
1503 saa7134_tuner_callback(dev, 0,
1504 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
1505 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
1506 &kworld_s5h1411_config,
1507 &dev->i2c_adap);
1508 if (fe0->dvb.frontend != NULL) {
1509 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1510 &dev->i2c_adap, 0x4b,
1511 &tda829x_no_probe);
1512 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1513 0x60, &dev->i2c_adap,
1514 &kworld_pc150u_tda18271_config);
1515 }
1516 break;
e2ac28fa 1517 case SAA7134_BOARD_FLYDVBS_LR300:
363c35fc 1518 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
f7b54b10 1519 &dev->i2c_adap);
363c35fc
ST
1520 if (fe0->dvb.frontend) {
1521 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
f7b54b10 1522 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1523 wprintk("%s: No tda826x found!\n", __func__);
91268a5e 1524 goto detach_frontend;
e2ac28fa 1525 }
363c35fc 1526 if (dvb_attach(isl6421_attach, fe0->dvb.frontend,
48a8a03b
MCC
1527 &dev->i2c_adap,
1528 0x08, 0, 0, false) == NULL) {
5823b3a6 1529 wprintk("%s: No ISL6421 found!\n", __func__);
91268a5e 1530 goto detach_frontend;
e2ac28fa
IL
1531 }
1532 }
1533 break;
cf146ca4 1534 case SAA7134_BOARD_ASUS_EUROPA2_HYBRID:
363c35fc 1535 fe0->dvb.frontend = dvb_attach(tda10046_attach,
0e8f4cc5
MS
1536 &medion_cardbus,
1537 &dev->i2c_adap);
363c35fc
ST
1538 if (fe0->dvb.frontend) {
1539 dev->original_demod_sleep = fe0->dvb.frontend->ops.sleep;
1540 fe0->dvb.frontend->ops.sleep = philips_europa_demod_sleep;
b7754d74 1541
363c35fc 1542 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
cb89cd33
MK
1543 &dev->i2c_adap, medion_cardbus.tuner_address,
1544 TUNER_PHILIPS_FMD1216ME_MK3);
cf146ca4
HH
1545 }
1546 break;
cbb94521 1547 case SAA7134_BOARD_VIDEOMATE_DVBT_200A:
363c35fc 1548 fe0->dvb.frontend = dvb_attach(tda10046_attach,
cbb94521
HH
1549 &philips_europa_config,
1550 &dev->i2c_adap);
363c35fc
ST
1551 if (fe0->dvb.frontend) {
1552 fe0->dvb.frontend->ops.tuner_ops.init = philips_td1316_tuner_init;
1553 fe0->dvb.frontend->ops.tuner_ops.set_params = philips_td1316_tuner_set_params;
cbb94521
HH
1554 }
1555 break;
550a9a5e 1556 case SAA7134_BOARD_CINERGY_HT_PCMCIA:
d557dab5
MCC
1557 if (configure_tda827x_fe(dev, &cinergy_ht_config,
1558 &tda827x_cfg_0) < 0)
91268a5e 1559 goto detach_frontend;
9de271e6
MK
1560 break;
1561 case SAA7134_BOARD_CINERGY_HT_PCI:
d557dab5
MCC
1562 if (configure_tda827x_fe(dev, &cinergy_ht_pci_config,
1563 &tda827x_cfg_0) < 0)
91268a5e 1564 goto detach_frontend;
58ef4f92
HH
1565 break;
1566 case SAA7134_BOARD_PHILIPS_TIGER_S:
d557dab5
MCC
1567 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1568 &tda827x_cfg_2) < 0)
91268a5e 1569 goto detach_frontend;
550a9a5e 1570 break;
e06cea4c 1571 case SAA7134_BOARD_ASUS_P7131_4871:
d557dab5
MCC
1572 if (configure_tda827x_fe(dev, &asus_p7131_4871_config,
1573 &tda827x_cfg_2) < 0)
91268a5e 1574 goto detach_frontend;
e06cea4c 1575 break;
f3eec0c0 1576 case SAA7134_BOARD_ASUSTeK_P7131_HYBRID_LNA:
d557dab5
MCC
1577 if (configure_tda827x_fe(dev, &asus_p7131_hybrid_lna_config,
1578 &tda827x_cfg_2) < 0)
91268a5e 1579 goto detach_frontend;
e06cea4c 1580 break;
d90d9f5a 1581 case SAA7134_BOARD_AVERMEDIA_SUPER_007:
d557dab5
MCC
1582 if (configure_tda827x_fe(dev, &avermedia_super_007_config,
1583 &tda827x_cfg_0) < 0)
91268a5e 1584 goto detach_frontend;
d90d9f5a 1585 break;
4ba24373 1586 case SAA7134_BOARD_TWINHAN_DTV_DVB_3056:
d557dab5
MCC
1587 if (configure_tda827x_fe(dev, &twinhan_dtv_dvb_3056_config,
1588 &tda827x_cfg_2_sw42) < 0)
91268a5e 1589 goto detach_frontend;
4ba24373 1590 break;
6ab465a8 1591 case SAA7134_BOARD_PHILIPS_SNAKE:
363c35fc 1592 fe0->dvb.frontend = dvb_attach(tda10086_attach, &flydvbs,
6ab465a8 1593 &dev->i2c_adap);
363c35fc
ST
1594 if (fe0->dvb.frontend) {
1595 if (dvb_attach(tda826x_attach, fe0->dvb.frontend, 0x60,
d557dab5 1596 &dev->i2c_adap, 0) == NULL) {
5823b3a6 1597 wprintk("%s: No tda826x found!\n", __func__);
91268a5e 1598 goto detach_frontend;
d557dab5 1599 }
363c35fc 1600 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
d557dab5 1601 &dev->i2c_adap, 0, 0) == NULL) {
5823b3a6 1602 wprintk("%s: No lnbp21 found!\n", __func__);
91268a5e 1603 goto detach_frontend;
d557dab5 1604 }
6ab465a8
HH
1605 }
1606 break;
7b5b3f17 1607 case SAA7134_BOARD_CREATIX_CTX953:
d557dab5
MCC
1608 if (configure_tda827x_fe(dev, &md8800_dvbt_config,
1609 &tda827x_cfg_0) < 0)
91268a5e 1610 goto detach_frontend;
7b5b3f17 1611 break;
6a6179b6 1612 case SAA7134_BOARD_MSI_TVANYWHERE_AD11:
d557dab5
MCC
1613 if (configure_tda827x_fe(dev, &philips_tiger_s_config,
1614 &tda827x_cfg_2) < 0)
91268a5e 1615 goto detach_frontend;
6a6179b6 1616 break;
bc36a686 1617 case SAA7134_BOARD_AVERMEDIA_CARDBUS_506:
6e501a3f
TF
1618 dprintk("AverMedia E506R dvb setup\n");
1619 saa7134_set_gpio(dev, 25, 0);
1620 msleep(10);
1621 saa7134_set_gpio(dev, 25, 1);
363c35fc 1622 fe0->dvb.frontend = dvb_attach(mt352_attach,
6e501a3f
TF
1623 &avermedia_xc3028_mt352_dev,
1624 &dev->i2c_adap);
bc36a686 1625 attach_xc3028 = 1;
e2fc00c2 1626 break;
637afdb5 1627 case SAA7134_BOARD_MD7134_BRIDGE_2:
363c35fc 1628 fe0->dvb.frontend = dvb_attach(tda10086_attach,
9a1b04e4 1629 &sd1878_4m, &dev->i2c_adap);
363c35fc 1630 if (fe0->dvb.frontend) {
637afdb5 1631 struct dvb_frontend *fe;
363c35fc 1632 if (dvb_attach(dvb_pll_attach, fe0->dvb.frontend, 0x60,
d557dab5 1633 &dev->i2c_adap, DVB_PLL_PHILIPS_SD1878_TDA8261) == NULL) {
637afdb5 1634 wprintk("%s: MD7134 DVB-S, no SD1878 "
5823b3a6 1635 "found !\n", __func__);
91268a5e 1636 goto detach_frontend;
d557dab5 1637 }
637afdb5 1638 /* we need to open the i2c gate (we know it exists) */
363c35fc 1639 fe = fe0->dvb.frontend;
637afdb5
HH
1640 fe->ops.i2c_gate_ctrl(fe, 1);
1641 if (dvb_attach(isl6405_attach, fe,
d557dab5 1642 &dev->i2c_adap, 0x08, 0, 0) == NULL) {
637afdb5 1643 wprintk("%s: MD7134 DVB-S, no ISL6405 "
5823b3a6 1644 "found !\n", __func__);
91268a5e 1645 goto detach_frontend;
d557dab5 1646 }
637afdb5
HH
1647 fe->ops.i2c_gate_ctrl(fe, 0);
1648 dev->original_set_voltage = fe->ops.set_voltage;
1649 fe->ops.set_voltage = md8800_set_voltage;
1650 dev->original_set_high_voltage = fe->ops.enable_high_lnb_voltage;
1651 fe->ops.enable_high_lnb_voltage = md8800_set_high_voltage;
1652 }
1653 break;
e2fc00c2
MP
1654 case SAA7134_BOARD_AVERMEDIA_M103:
1655 saa7134_set_gpio(dev, 25, 0);
1656 msleep(10);
1657 saa7134_set_gpio(dev, 25, 1);
363c35fc 1658 fe0->dvb.frontend = dvb_attach(mt352_attach,
e2fc00c2
MP
1659 &avermedia_xc3028_mt352_dev,
1660 &dev->i2c_adap);
1661 attach_xc3028 = 1;
1662 break;
301e9d64 1663 case SAA7134_BOARD_ASUSTeK_TIGER_3IN1:
1664 if (!use_frontend) { /* terrestrial */
1665 if (configure_tda827x_fe(dev, &asus_tiger_3in1_config,
1666 &tda827x_cfg_2) < 0)
91268a5e 1667 goto detach_frontend;
301e9d64 1668 } else { /* satellite */
363c35fc 1669 fe0->dvb.frontend = dvb_attach(tda10086_attach,
301e9d64 1670 &flydvbs, &dev->i2c_adap);
363c35fc 1671 if (fe0->dvb.frontend) {
301e9d64 1672 if (dvb_attach(tda826x_attach,
363c35fc 1673 fe0->dvb.frontend, 0x60,
301e9d64 1674 &dev->i2c_adap, 0) == NULL) {
1675 wprintk("%s: Asus Tiger 3in1, no "
1676 "tda826x found!\n", __func__);
91268a5e 1677 goto detach_frontend;
301e9d64 1678 }
363c35fc 1679 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
301e9d64 1680 &dev->i2c_adap, 0, 0) == NULL) {
1681 wprintk("%s: Asus Tiger 3in1, no lnbp21"
1682 " found!\n", __func__);
3c2580f9 1683 goto detach_frontend;
75c7dbca 1684 }
1685 }
1686 }
1687 break;
1688 case SAA7134_BOARD_ASUSTeK_PS3_100:
1689 if (!use_frontend) { /* terrestrial */
1690 if (configure_tda827x_fe(dev, &asus_ps3_100_config,
1691 &tda827x_cfg_2) < 0)
91268a5e 1692 goto detach_frontend;
75c7dbca 1693 } else { /* satellite */
1694 fe0->dvb.frontend = dvb_attach(tda10086_attach,
1695 &flydvbs, &dev->i2c_adap);
1696 if (fe0->dvb.frontend) {
1697 if (dvb_attach(tda826x_attach,
1698 fe0->dvb.frontend, 0x60,
1699 &dev->i2c_adap, 0) == NULL) {
1700 wprintk("%s: Asus My Cinema PS3-100, no "
1701 "tda826x found!\n", __func__);
91268a5e 1702 goto detach_frontend;
75c7dbca 1703 }
1704 if (dvb_attach(lnbp21_attach, fe0->dvb.frontend,
1705 &dev->i2c_adap, 0, 0) == NULL) {
1706 wprintk("%s: Asus My Cinema PS3-100, no lnbp21"
1707 " found!\n", __func__);
91268a5e 1708 goto detach_frontend;
301e9d64 1709 }
1710 }
1711 }
1712 break;
028165a3
HP
1713 case SAA7134_BOARD_ASUSTeK_TIGER:
1714 if (configure_tda827x_fe(dev, &philips_tiger_config,
1715 &tda827x_cfg_0) < 0)
91268a5e 1716 goto detach_frontend;
028165a3 1717 break;
47aeba5a 1718 case SAA7134_BOARD_BEHOLD_H6:
b0c4be8c 1719 fe0->dvb.frontend = dvb_attach(zl10353_attach,
47aeba5a
DB
1720 &behold_h6_config,
1721 &dev->i2c_adap);
b0c4be8c
MCC
1722 if (fe0->dvb.frontend) {
1723 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
47aeba5a 1724 &dev->i2c_adap, 0x61,
4786dd65 1725 TUNER_PHILIPS_FMD1216MEX_MK3);
47aeba5a 1726 }
04574185 1727 break;
2930992c
BILDB
1728 case SAA7134_BOARD_BEHOLD_X7:
1729 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1730 &behold_x7_config,
1731 &dev->i2c_adap);
1732 if (fe0->dvb.frontend) {
1733 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1734 &dev->i2c_adap, &behold_x7_tunerconfig);
1735 }
1736 break;
0faa2ed5
DB
1737 case SAA7134_BOARD_BEHOLD_H7:
1738 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1739 &behold_x7_config,
1740 &dev->i2c_adap);
1741 if (fe0->dvb.frontend) {
1742 dvb_attach(xc5000_attach, fe0->dvb.frontend,
1743 &dev->i2c_adap, &behold_x7_tunerconfig);
1744 }
1745 break;
04574185
MS
1746 case SAA7134_BOARD_AVERMEDIA_A700_PRO:
1747 case SAA7134_BOARD_AVERMEDIA_A700_HYBRID:
1748 /* Zarlink ZL10313 */
1749 fe0->dvb.frontend = dvb_attach(mt312_attach,
1750 &avertv_a700_mt312, &dev->i2c_adap);
1751 if (fe0->dvb.frontend) {
1752 if (dvb_attach(zl10036_attach, fe0->dvb.frontend,
1753 &avertv_a700_tuner, &dev->i2c_adap) == NULL) {
1754 wprintk("%s: No zl10036 found!\n",
1755 __func__);
1756 }
1757 }
ecfcfec8
IL
1758 break;
1759 case SAA7134_BOARD_VIDEOMATE_S350:
1760 fe0->dvb.frontend = dvb_attach(mt312_attach,
1761 &zl10313_compro_s350_config, &dev->i2c_adap);
1762 if (fe0->dvb.frontend)
1763 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1764 0x60, &dev->i2c_adap) == NULL)
1765 wprintk("%s: No zl10039 found!\n",
1766 __func__);
1767
dbe8740d
CC
1768 break;
1769 case SAA7134_BOARD_VIDEOMATE_T750:
1770 fe0->dvb.frontend = dvb_attach(zl10353_attach,
1771 &videomate_t750_zl10353_config,
1772 &dev->i2c_adap);
1773 if (fe0->dvb.frontend != NULL) {
1774 if (dvb_attach(qt1010_attach,
1775 fe0->dvb.frontend,
1776 &dev->i2c_adap,
1777 &videomate_t750_qt1010_config) == NULL)
1778 wprintk("error attaching QT1010\n");
1779 }
6c119ff4
HV
1780 break;
1781 case SAA7134_BOARD_ZOLID_HYBRID_PCI:
1782 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1783 &zolid_tda10048_config,
1784 &dev->i2c_adap);
1785 if (fe0->dvb.frontend != NULL) {
1786 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1787 &dev->i2c_adap, 0x4b,
1788 &tda829x_no_probe);
1789 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1790 0x60, &dev->i2c_adap,
1791 &zolid_tda18271_config);
1792 }
47aeba5a 1793 break;
184e769f
MK
1794 case SAA7134_BOARD_LEADTEK_WINFAST_DTV1000S:
1795 fe0->dvb.frontend = dvb_attach(tda10048_attach,
1796 &dtv1000s_tda10048_config,
1797 &dev->i2c_adap);
1798 if (fe0->dvb.frontend != NULL) {
1799 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1800 &dev->i2c_adap, 0x4b,
1801 &tda829x_no_probe);
1802 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1803 0x60, &dev->i2c_adap,
1804 &dtv1000s_tda18271_config);
1805 }
1806 break;
f0551efc 1807 case SAA7134_BOARD_KWORLD_PCI_SBTVD_FULLSEG:
ecb71d26
MCC
1808 /* Switch to digital mode */
1809 saa7134_tuner_callback(dev, 0,
1810 TDA18271_CALLBACK_CMD_AGC_ENABLE, 1);
f0551efc
MCC
1811 fe0->dvb.frontend = dvb_attach(mb86a20s_attach,
1812 &kworld_mb86a20s_config,
1813 &dev->i2c_adap);
f0551efc 1814 if (fe0->dvb.frontend != NULL) {
6a58bc0f
MCC
1815 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1816 &dev->i2c_adap, 0x4b,
1817 &tda829x_no_probe);
b08deebe 1818 fe0->dvb.frontend->ops.i2c_gate_ctrl = kworld_sbtvd_gate_ctrl;
f0551efc
MCC
1819 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1820 0x60, &dev->i2c_adap,
1821 &kworld_tda18271_config);
f0551efc 1822 }
6a58bc0f
MCC
1823
1824 /* mb86a20s need to use the I2C gateway */
f0551efc 1825 break;
ce02704d
TL
1826 case SAA7134_BOARD_MAGICPRO_PROHDTV_PRO2:
1827 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
1828 &prohdtv_pro2_lgs8g75_config,
1829 &dev->i2c_adap);
1830 if (fe0->dvb.frontend != NULL) {
1831 dvb_attach(tda829x_attach, fe0->dvb.frontend,
1832 &dev->i2c_adap, 0x4b,
1833 &tda829x_no_probe);
1834 dvb_attach(tda18271_attach, fe0->dvb.frontend,
1835 0x60, &dev->i2c_adap,
1836 &prohdtv_pro2_tda18271_config);
1837 }
34fe2784
OZ
1838 break;
1839 case SAA7134_BOARD_AVERMEDIA_A706:
1840 /* Enable all DVB-S devices now */
1841 /* CE5039 DVB-S tuner SLEEP pin low */
1842 saa7134_set_gpio(dev, 23, 0);
1843 /* CE6313 DVB-S demod SLEEP pin low */
1844 saa7134_set_gpio(dev, 9, 0);
1845 /* CE6313 DVB-S demod RESET# pin high */
1846 saa7134_set_gpio(dev, 25, 1);
1847 msleep(1);
1848 fe0->dvb.frontend = dvb_attach(mt312_attach,
1849 &zl10313_avermedia_a706_config, &dev->i2c_adap);
1850 if (fe0->dvb.frontend) {
1851 fe0->dvb.frontend->ops.i2c_gate_ctrl = NULL;
1852 if (dvb_attach(zl10039_attach, fe0->dvb.frontend,
1853 0x60, &dev->i2c_adap) == NULL)
1854 wprintk("%s: No zl10039 found!\n",
1855 __func__);
1856 }
ce02704d 1857 break;
1da177e4 1858 default:
cf3c34c8 1859 wprintk("Huh? unknown DVB card?\n");
1da177e4
LT
1860 break;
1861 }
1862
bc36a686
MCC
1863 if (attach_xc3028) {
1864 struct dvb_frontend *fe;
1865 struct xc2028_config cfg = {
1866 .i2c_adap = &dev->i2c_adap,
1867 .i2c_addr = 0x61,
bc36a686 1868 };
95a2fdb6 1869
363c35fc 1870 if (!fe0->dvb.frontend)
91268a5e 1871 goto detach_frontend;
95a2fdb6 1872
363c35fc 1873 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend, &cfg);
bc36a686
MCC
1874 if (!fe) {
1875 printk(KERN_ERR "%s/2: xc3028 attach failed\n",
1876 dev->name);
91268a5e 1877 goto detach_frontend;
bc36a686
MCC
1878 }
1879 }
1880
363c35fc 1881 if (NULL == fe0->dvb.frontend) {
cf3c34c8 1882 printk(KERN_ERR "%s/dvb: frontend initialization failed\n", dev->name);
91268a5e 1883 goto detach_frontend;
1da177e4 1884 }
d7cba043 1885 /* define general-purpose callback pointer */
363c35fc 1886 fe0->dvb.frontend->callback = saa7134_tuner_callback;
1da177e4
LT
1887
1888 /* register everything else */
2ada815f 1889 ret = vb2_dvb_register_bus(&dev->frontends, THIS_MODULE, dev,
9adf6132 1890 &dev->pci->dev, adapter_nr, 0);
1c4f76ab
HH
1891
1892 /* this sequence is necessary to make the tda1004x load its firmware
1893 * and to enter analog mode of hybrid boards
1894 */
1895 if (!ret) {
363c35fc
ST
1896 if (fe0->dvb.frontend->ops.init)
1897 fe0->dvb.frontend->ops.init(fe0->dvb.frontend);
1898 if (fe0->dvb.frontend->ops.sleep)
1899 fe0->dvb.frontend->ops.sleep(fe0->dvb.frontend);
1900 if (fe0->dvb.frontend->ops.tuner_ops.sleep)
1901 fe0->dvb.frontend->ops.tuner_ops.sleep(fe0->dvb.frontend);
1c4f76ab
HH
1902 }
1903 return ret;
d557dab5 1904
91268a5e 1905detach_frontend:
2ada815f
HV
1906 vb2_dvb_dealloc_frontends(&dev->frontends);
1907 vb2_queue_release(&fe0->dvb.dvbq);
f3f741e7 1908 return -EINVAL;
1da177e4
LT
1909}
1910
1911static int dvb_fini(struct saa7134_dev *dev)
1912{
2ada815f 1913 struct vb2_dvb_frontend *fe0;
363c35fc
ST
1914
1915 /* Get the first frontend */
2ada815f 1916 fe0 = vb2_dvb_get_frontend(&dev->frontends, 1);
363c35fc
ST
1917 if (!fe0)
1918 return -EINVAL;
1919
7f171123
MCC
1920 /* FIXME: I suspect that this code is bogus, since the entry for
1921 Pinnacle 300I DVB-T PAL already defines the proper init to allow
1922 the detection of mt2032 (TDA9887_PORT2_INACTIVE)
1923 */
1924 if (dev->board == SAA7134_BOARD_PINNACLE_300I_DVBT_PAL) {
1925 struct v4l2_priv_tun_config tda9887_cfg;
1926 static int on = TDA9887_PRESENT | TDA9887_PORT2_INACTIVE;
1927
1928 tda9887_cfg.tuner = TUNER_TDA9887;
1929 tda9887_cfg.priv = &on;
1da177e4 1930
1da177e4 1931 /* otherwise we don't detect the tuner on next insmod */
fac6986c 1932 saa_call_all(dev, tuner, s_config, &tda9887_cfg);
5823b3a6 1933 } else if (dev->board == SAA7134_BOARD_MEDION_MD8800_QUADRO) {
e9c1ac9d 1934 if ((dev->eedata[2] == 0x07) && use_frontend) {
5823b3a6
HH
1935 /* turn off the 2nd lnb supply */
1936 u8 data = 0x80;
1937 struct i2c_msg msg = {.addr = 0x08, .buf = &data, .flags = 0, .len = 1};
1938 struct dvb_frontend *fe;
363c35fc 1939 fe = fe0->dvb.frontend;
5823b3a6
HH
1940 if (fe->ops.i2c_gate_ctrl) {
1941 fe->ops.i2c_gate_ctrl(fe, 1);
1942 i2c_transfer(&dev->i2c_adap, &msg, 1);
1943 fe->ops.i2c_gate_ctrl(fe, 0);
1944 }
1945 }
7f171123 1946 }
2ada815f
HV
1947 vb2_dvb_unregister_bus(&dev->frontends);
1948 vb2_queue_release(&fe0->dvb.dvbq);
1da177e4
LT
1949 return 0;
1950}
1951
1952static struct saa7134_mpeg_ops dvb_ops = {
1953 .type = SAA7134_MPEG_DVB,
1954 .init = dvb_init,
1955 .fini = dvb_fini,
1956};
1957
1958static int __init dvb_register(void)
1959{
1960 return saa7134_ts_register(&dvb_ops);
1961}
1962
1963static void __exit dvb_unregister(void)
1964{
1965 saa7134_ts_unregister(&dvb_ops);
1966}
1967
1968module_init(dvb_register);
1969module_exit(dvb_unregister);