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1da177e4 | 1 | /* |
1da177e4 LT |
2 | * |
3 | * device driver for philips saa7134 based TV cards | |
4 | * video4linux video interface | |
5 | * | |
6 | * (c) 2001-03 Gerd Knorr <kraxel@bytesex.org> [SuSE Labs] | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
21 | */ | |
22 | ||
9a12ccfc MCC |
23 | #include "saa7134.h" |
24 | #include "saa7134-reg.h" | |
25 | ||
1da177e4 LT |
26 | #include <linux/init.h> |
27 | #include <linux/list.h> | |
28 | #include <linux/module.h> | |
1da177e4 LT |
29 | #include <linux/kernel.h> |
30 | #include <linux/slab.h> | |
9040b32e | 31 | #include <linux/sort.h> |
1da177e4 | 32 | |
5e453dc7 | 33 | #include <media/v4l2-common.h> |
a2004502 | 34 | #include <media/v4l2-event.h> |
b5dcee22 | 35 | #include <media/i2c/saa6588.h> |
1da177e4 | 36 | |
1da177e4 LT |
37 | /* ------------------------------------------------------------------ */ |
38 | ||
8c85454a | 39 | unsigned int video_debug; |
1da177e4 | 40 | static unsigned int gbuffers = 8; |
ff699e6b | 41 | static unsigned int noninterlaced; /* 0 */ |
1da177e4 LT |
42 | static unsigned int gbufsize = 720*576*4; |
43 | static unsigned int gbufsize_max = 720*576*4; | |
17b10a73 | 44 | static char secam[] = "--"; |
1da177e4 LT |
45 | module_param(video_debug, int, 0644); |
46 | MODULE_PARM_DESC(video_debug,"enable debug messages [video]"); | |
47 | module_param(gbuffers, int, 0444); | |
48 | MODULE_PARM_DESC(gbuffers,"number of capture buffers, range 2-32"); | |
49 | module_param(noninterlaced, int, 0644); | |
d5fdd135 | 50 | MODULE_PARM_DESC(noninterlaced,"capture non interlaced video"); |
17b10a73 HH |
51 | module_param_string(secam, secam, sizeof(secam), 0644); |
52 | MODULE_PARM_DESC(secam, "force SECAM variant, either DK,L or Lc"); | |
53 | ||
1da177e4 | 54 | |
45f38cb3 MCC |
55 | #define video_dbg(fmt, arg...) do { \ |
56 | if (video_debug & 0x04) \ | |
57 | printk(KERN_DEBUG pr_fmt("video: " fmt), ## arg); \ | |
58 | } while (0) | |
1da177e4 | 59 | |
2f8d4f51 RB |
60 | /* ------------------------------------------------------------------ */ |
61 | /* Defines for Video Output Port Register at address 0x191 */ | |
62 | ||
63 | /* Bit 0: VIP code T bit polarity */ | |
64 | ||
65 | #define VP_T_CODE_P_NON_INVERTED 0x00 | |
66 | #define VP_T_CODE_P_INVERTED 0x01 | |
67 | ||
68 | /* ------------------------------------------------------------------ */ | |
69 | /* Defines for Video Output Port Register at address 0x195 */ | |
70 | ||
71 | /* Bit 2: Video output clock delay control */ | |
72 | ||
73 | #define VP_CLK_CTRL2_NOT_DELAYED 0x00 | |
74 | #define VP_CLK_CTRL2_DELAYED 0x04 | |
75 | ||
76 | /* Bit 1: Video output clock invert control */ | |
77 | ||
78 | #define VP_CLK_CTRL1_NON_INVERTED 0x00 | |
79 | #define VP_CLK_CTRL1_INVERTED 0x02 | |
80 | ||
81 | /* ------------------------------------------------------------------ */ | |
82 | /* Defines for Video Output Port Register at address 0x196 */ | |
83 | ||
84 | /* Bits 2 to 0: VSYNC pin video vertical sync type */ | |
85 | ||
86 | #define VP_VS_TYPE_MASK 0x07 | |
87 | ||
88 | #define VP_VS_TYPE_OFF 0x00 | |
89 | #define VP_VS_TYPE_V123 0x01 | |
90 | #define VP_VS_TYPE_V_ITU 0x02 | |
91 | #define VP_VS_TYPE_VGATE_L 0x03 | |
92 | #define VP_VS_TYPE_RESERVED1 0x04 | |
93 | #define VP_VS_TYPE_RESERVED2 0x05 | |
94 | #define VP_VS_TYPE_F_ITU 0x06 | |
95 | #define VP_VS_TYPE_SC_FID 0x07 | |
96 | ||
1da177e4 LT |
97 | /* ------------------------------------------------------------------ */ |
98 | /* data structs for video */ | |
99 | ||
100 | static int video_out[][9] = { | |
101 | [CCIR656] = { 0x00, 0xb1, 0x00, 0xa1, 0x00, 0x04, 0x06, 0x00, 0x00 }, | |
102 | }; | |
103 | ||
104 | static struct saa7134_format formats[] = { | |
105 | { | |
106 | .name = "8 bpp gray", | |
107 | .fourcc = V4L2_PIX_FMT_GREY, | |
108 | .depth = 8, | |
109 | .pm = 0x06, | |
110 | },{ | |
111 | .name = "15 bpp RGB, le", | |
112 | .fourcc = V4L2_PIX_FMT_RGB555, | |
113 | .depth = 16, | |
114 | .pm = 0x13 | 0x80, | |
115 | },{ | |
116 | .name = "15 bpp RGB, be", | |
117 | .fourcc = V4L2_PIX_FMT_RGB555X, | |
118 | .depth = 16, | |
119 | .pm = 0x13 | 0x80, | |
120 | .bswap = 1, | |
121 | },{ | |
122 | .name = "16 bpp RGB, le", | |
123 | .fourcc = V4L2_PIX_FMT_RGB565, | |
124 | .depth = 16, | |
125 | .pm = 0x10 | 0x80, | |
126 | },{ | |
127 | .name = "16 bpp RGB, be", | |
128 | .fourcc = V4L2_PIX_FMT_RGB565X, | |
129 | .depth = 16, | |
130 | .pm = 0x10 | 0x80, | |
131 | .bswap = 1, | |
132 | },{ | |
133 | .name = "24 bpp RGB, le", | |
134 | .fourcc = V4L2_PIX_FMT_BGR24, | |
135 | .depth = 24, | |
136 | .pm = 0x11, | |
137 | },{ | |
138 | .name = "24 bpp RGB, be", | |
139 | .fourcc = V4L2_PIX_FMT_RGB24, | |
140 | .depth = 24, | |
141 | .pm = 0x11, | |
142 | .bswap = 1, | |
143 | },{ | |
144 | .name = "32 bpp RGB, le", | |
145 | .fourcc = V4L2_PIX_FMT_BGR32, | |
146 | .depth = 32, | |
147 | .pm = 0x12, | |
148 | },{ | |
149 | .name = "32 bpp RGB, be", | |
150 | .fourcc = V4L2_PIX_FMT_RGB32, | |
151 | .depth = 32, | |
152 | .pm = 0x12, | |
153 | .bswap = 1, | |
154 | .wswap = 1, | |
155 | },{ | |
156 | .name = "4:2:2 packed, YUYV", | |
157 | .fourcc = V4L2_PIX_FMT_YUYV, | |
158 | .depth = 16, | |
159 | .pm = 0x00, | |
160 | .bswap = 1, | |
161 | .yuv = 1, | |
162 | },{ | |
163 | .name = "4:2:2 packed, UYVY", | |
164 | .fourcc = V4L2_PIX_FMT_UYVY, | |
165 | .depth = 16, | |
166 | .pm = 0x00, | |
167 | .yuv = 1, | |
168 | },{ | |
169 | .name = "4:2:2 planar, Y-Cb-Cr", | |
170 | .fourcc = V4L2_PIX_FMT_YUV422P, | |
171 | .depth = 16, | |
172 | .pm = 0x09, | |
173 | .yuv = 1, | |
174 | .planar = 1, | |
175 | .hshift = 1, | |
176 | .vshift = 0, | |
177 | },{ | |
178 | .name = "4:2:0 planar, Y-Cb-Cr", | |
179 | .fourcc = V4L2_PIX_FMT_YUV420, | |
180 | .depth = 12, | |
181 | .pm = 0x0a, | |
182 | .yuv = 1, | |
183 | .planar = 1, | |
184 | .hshift = 1, | |
185 | .vshift = 1, | |
186 | },{ | |
187 | .name = "4:2:0 planar, Y-Cb-Cr", | |
188 | .fourcc = V4L2_PIX_FMT_YVU420, | |
189 | .depth = 12, | |
190 | .pm = 0x0a, | |
191 | .yuv = 1, | |
192 | .planar = 1, | |
193 | .uvswap = 1, | |
194 | .hshift = 1, | |
195 | .vshift = 1, | |
196 | } | |
197 | }; | |
198 | #define FORMATS ARRAY_SIZE(formats) | |
199 | ||
200 | #define NORM_625_50 \ | |
201 | .h_start = 0, \ | |
202 | .h_stop = 719, \ | |
203 | .video_v_start = 24, \ | |
204 | .video_v_stop = 311, \ | |
f246a817 | 205 | .vbi_v_start_0 = 7, \ |
033d0088 | 206 | .vbi_v_stop_0 = 23, \ |
f246a817 | 207 | .vbi_v_start_1 = 319, \ |
1da177e4 LT |
208 | .src_timing = 4 |
209 | ||
210 | #define NORM_525_60 \ | |
211 | .h_start = 0, \ | |
dd6ed861 | 212 | .h_stop = 719, \ |
f246a817 MS |
213 | .video_v_start = 23, \ |
214 | .video_v_stop = 262, \ | |
215 | .vbi_v_start_0 = 10, \ | |
216 | .vbi_v_stop_0 = 21, \ | |
217 | .vbi_v_start_1 = 273, \ | |
218 | .src_timing = 7 | |
1da177e4 LT |
219 | |
220 | static struct saa7134_tvnorm tvnorms[] = { | |
221 | { | |
222 | .name = "PAL", /* autodetect */ | |
223 | .id = V4L2_STD_PAL, | |
224 | NORM_625_50, | |
225 | ||
226 | .sync_control = 0x18, | |
227 | .luma_control = 0x40, | |
228 | .chroma_ctrl1 = 0x81, | |
229 | .chroma_gain = 0x2a, | |
230 | .chroma_ctrl2 = 0x06, | |
231 | .vgate_misc = 0x1c, | |
232 | ||
233 | },{ | |
234 | .name = "PAL-BG", | |
235 | .id = V4L2_STD_PAL_BG, | |
236 | NORM_625_50, | |
237 | ||
238 | .sync_control = 0x18, | |
239 | .luma_control = 0x40, | |
240 | .chroma_ctrl1 = 0x81, | |
241 | .chroma_gain = 0x2a, | |
242 | .chroma_ctrl2 = 0x06, | |
243 | .vgate_misc = 0x1c, | |
244 | ||
245 | },{ | |
246 | .name = "PAL-I", | |
247 | .id = V4L2_STD_PAL_I, | |
248 | NORM_625_50, | |
249 | ||
250 | .sync_control = 0x18, | |
251 | .luma_control = 0x40, | |
252 | .chroma_ctrl1 = 0x81, | |
253 | .chroma_gain = 0x2a, | |
254 | .chroma_ctrl2 = 0x06, | |
255 | .vgate_misc = 0x1c, | |
256 | ||
257 | },{ | |
258 | .name = "PAL-DK", | |
259 | .id = V4L2_STD_PAL_DK, | |
260 | NORM_625_50, | |
261 | ||
262 | .sync_control = 0x18, | |
263 | .luma_control = 0x40, | |
264 | .chroma_ctrl1 = 0x81, | |
265 | .chroma_gain = 0x2a, | |
266 | .chroma_ctrl2 = 0x06, | |
267 | .vgate_misc = 0x1c, | |
268 | ||
269 | },{ | |
270 | .name = "NTSC", | |
271 | .id = V4L2_STD_NTSC, | |
272 | NORM_525_60, | |
273 | ||
274 | .sync_control = 0x59, | |
275 | .luma_control = 0x40, | |
276 | .chroma_ctrl1 = 0x89, | |
277 | .chroma_gain = 0x2a, | |
278 | .chroma_ctrl2 = 0x0e, | |
279 | .vgate_misc = 0x18, | |
280 | ||
281 | },{ | |
282 | .name = "SECAM", | |
283 | .id = V4L2_STD_SECAM, | |
284 | NORM_625_50, | |
285 | ||
17b10a73 HH |
286 | .sync_control = 0x18, |
287 | .luma_control = 0x1b, | |
288 | .chroma_ctrl1 = 0xd1, | |
289 | .chroma_gain = 0x80, | |
290 | .chroma_ctrl2 = 0x00, | |
291 | .vgate_misc = 0x1c, | |
292 | ||
293 | },{ | |
294 | .name = "SECAM-DK", | |
295 | .id = V4L2_STD_SECAM_DK, | |
296 | NORM_625_50, | |
297 | ||
298 | .sync_control = 0x18, | |
299 | .luma_control = 0x1b, | |
300 | .chroma_ctrl1 = 0xd1, | |
301 | .chroma_gain = 0x80, | |
302 | .chroma_ctrl2 = 0x00, | |
303 | .vgate_misc = 0x1c, | |
304 | ||
305 | },{ | |
306 | .name = "SECAM-L", | |
307 | .id = V4L2_STD_SECAM_L, | |
308 | NORM_625_50, | |
309 | ||
310 | .sync_control = 0x18, | |
311 | .luma_control = 0x1b, | |
312 | .chroma_ctrl1 = 0xd1, | |
313 | .chroma_gain = 0x80, | |
314 | .chroma_ctrl2 = 0x00, | |
315 | .vgate_misc = 0x1c, | |
316 | ||
317 | },{ | |
318 | .name = "SECAM-Lc", | |
319 | .id = V4L2_STD_SECAM_LC, | |
320 | NORM_625_50, | |
321 | ||
322 | .sync_control = 0x18, | |
1da177e4 LT |
323 | .luma_control = 0x1b, |
324 | .chroma_ctrl1 = 0xd1, | |
325 | .chroma_gain = 0x80, | |
326 | .chroma_ctrl2 = 0x00, | |
327 | .vgate_misc = 0x1c, | |
328 | ||
329 | },{ | |
330 | .name = "PAL-M", | |
331 | .id = V4L2_STD_PAL_M, | |
332 | NORM_525_60, | |
333 | ||
334 | .sync_control = 0x59, | |
335 | .luma_control = 0x40, | |
336 | .chroma_ctrl1 = 0xb9, | |
337 | .chroma_gain = 0x2a, | |
338 | .chroma_ctrl2 = 0x0e, | |
339 | .vgate_misc = 0x18, | |
340 | ||
341 | },{ | |
342 | .name = "PAL-Nc", | |
343 | .id = V4L2_STD_PAL_Nc, | |
344 | NORM_625_50, | |
345 | ||
346 | .sync_control = 0x18, | |
347 | .luma_control = 0x40, | |
348 | .chroma_ctrl1 = 0xa1, | |
349 | .chroma_gain = 0x2a, | |
350 | .chroma_ctrl2 = 0x06, | |
351 | .vgate_misc = 0x1c, | |
352 | ||
353 | },{ | |
354 | .name = "PAL-60", | |
355 | .id = V4L2_STD_PAL_60, | |
356 | ||
357 | .h_start = 0, | |
358 | .h_stop = 719, | |
4ac97914 MCC |
359 | .video_v_start = 23, |
360 | .video_v_stop = 262, | |
361 | .vbi_v_start_0 = 10, | |
362 | .vbi_v_stop_0 = 21, | |
363 | .vbi_v_start_1 = 273, | |
364 | .src_timing = 7, | |
1da177e4 LT |
365 | |
366 | .sync_control = 0x18, | |
367 | .luma_control = 0x40, | |
368 | .chroma_ctrl1 = 0x81, | |
369 | .chroma_gain = 0x2a, | |
370 | .chroma_ctrl2 = 0x06, | |
371 | .vgate_misc = 0x1c, | |
372 | } | |
373 | }; | |
374 | #define TVNORMS ARRAY_SIZE(tvnorms) | |
375 | ||
1da177e4 LT |
376 | static struct saa7134_format* format_by_fourcc(unsigned int fourcc) |
377 | { | |
378 | unsigned int i; | |
379 | ||
380 | for (i = 0; i < FORMATS; i++) | |
381 | if (formats[i].fourcc == fourcc) | |
382 | return formats+i; | |
383 | return NULL; | |
384 | } | |
385 | ||
1da177e4 LT |
386 | /* ------------------------------------------------------------------ */ |
387 | ||
b02044d8 | 388 | static void set_tvnorm(struct saa7134_dev *dev, struct saa7134_tvnorm *norm) |
1da177e4 | 389 | { |
6139ebc6 | 390 | video_dbg("set tv norm = %s\n", norm->name); |
1da177e4 LT |
391 | dev->tvnorm = norm; |
392 | ||
1da177e4 LT |
393 | /* setup cropping */ |
394 | dev->crop_bounds.left = norm->h_start; | |
395 | dev->crop_defrect.left = norm->h_start; | |
396 | dev->crop_bounds.width = norm->h_stop - norm->h_start +1; | |
397 | dev->crop_defrect.width = norm->h_stop - norm->h_start +1; | |
398 | ||
f246a817 | 399 | dev->crop_bounds.top = (norm->vbi_v_stop_0+1)*2; |
1da177e4 LT |
400 | dev->crop_defrect.top = norm->video_v_start*2; |
401 | dev->crop_bounds.height = ((norm->id & V4L2_STD_525_60) ? 524 : 624) | |
402 | - dev->crop_bounds.top; | |
403 | dev->crop_defrect.height = (norm->video_v_stop - norm->video_v_start +1)*2; | |
404 | ||
405 | dev->crop_current = dev->crop_defrect; | |
406 | ||
c458473e | 407 | saa7134_set_tvnorm_hw(dev); |
cb71201f ML |
408 | } |
409 | ||
410 | static void video_mux(struct saa7134_dev *dev, int input) | |
411 | { | |
8fc34867 MCC |
412 | video_dbg("video input = %d [%s]\n", |
413 | input, saa7134_input_name[card_in(dev, input).type]); | |
cb71201f ML |
414 | dev->ctl_input = input; |
415 | set_tvnorm(dev, dev->tvnorm); | |
416 | saa7134_tvaudio_setinput(dev, &card_in(dev, input)); | |
417 | } | |
418 | ||
c458473e ML |
419 | |
420 | static void saa7134_set_decoder(struct saa7134_dev *dev) | |
cb71201f | 421 | { |
707b7f80 | 422 | int luma_control, sync_control, chroma_ctrl1, mux; |
cb71201f ML |
423 | |
424 | struct saa7134_tvnorm *norm = dev->tvnorm; | |
425 | mux = card_in(dev, dev->ctl_input).vmux; | |
426 | ||
427 | luma_control = norm->luma_control; | |
428 | sync_control = norm->sync_control; | |
707b7f80 | 429 | chroma_ctrl1 = norm->chroma_ctrl1; |
cb71201f ML |
430 | |
431 | if (mux > 5) | |
432 | luma_control |= 0x80; /* svideo */ | |
433 | if (noninterlaced || dev->nosignal) | |
434 | sync_control |= 0x20; | |
435 | ||
707b7f80 MD |
436 | /* switch on auto standard detection */ |
437 | sync_control |= SAA7134_SYNC_CTRL_AUFD; | |
438 | chroma_ctrl1 |= SAA7134_CHROMA_CTRL1_AUTO0; | |
439 | chroma_ctrl1 &= ~SAA7134_CHROMA_CTRL1_FCTC; | |
440 | luma_control &= ~SAA7134_LUMA_CTRL_LDEL; | |
441 | ||
1da177e4 LT |
442 | /* setup video decoder */ |
443 | saa_writeb(SAA7134_INCR_DELAY, 0x08); | |
444 | saa_writeb(SAA7134_ANALOG_IN_CTRL1, 0xc0 | mux); | |
445 | saa_writeb(SAA7134_ANALOG_IN_CTRL2, 0x00); | |
446 | ||
447 | saa_writeb(SAA7134_ANALOG_IN_CTRL3, 0x90); | |
448 | saa_writeb(SAA7134_ANALOG_IN_CTRL4, 0x90); | |
449 | saa_writeb(SAA7134_HSYNC_START, 0xeb); | |
450 | saa_writeb(SAA7134_HSYNC_STOP, 0xe0); | |
451 | saa_writeb(SAA7134_SOURCE_TIMING1, norm->src_timing); | |
452 | ||
453 | saa_writeb(SAA7134_SYNC_CTRL, sync_control); | |
454 | saa_writeb(SAA7134_LUMA_CTRL, luma_control); | |
455 | saa_writeb(SAA7134_DEC_LUMA_BRIGHT, dev->ctl_bright); | |
1da177e4 | 456 | |
f5a1ac64 ML |
457 | saa_writeb(SAA7134_DEC_LUMA_CONTRAST, |
458 | dev->ctl_invert ? -dev->ctl_contrast : dev->ctl_contrast); | |
459 | ||
460 | saa_writeb(SAA7134_DEC_CHROMA_SATURATION, | |
461 | dev->ctl_invert ? -dev->ctl_saturation : dev->ctl_saturation); | |
462 | ||
1da177e4 | 463 | saa_writeb(SAA7134_DEC_CHROMA_HUE, dev->ctl_hue); |
707b7f80 | 464 | saa_writeb(SAA7134_CHROMA_CTRL1, chroma_ctrl1); |
1da177e4 LT |
465 | saa_writeb(SAA7134_CHROMA_GAIN, norm->chroma_gain); |
466 | ||
467 | saa_writeb(SAA7134_CHROMA_CTRL2, norm->chroma_ctrl2); | |
468 | saa_writeb(SAA7134_MODE_DELAY_CTRL, 0x00); | |
469 | ||
470 | saa_writeb(SAA7134_ANALOG_ADC, 0x01); | |
471 | saa_writeb(SAA7134_VGATE_START, 0x11); | |
472 | saa_writeb(SAA7134_VGATE_STOP, 0xfe); | |
473 | saa_writeb(SAA7134_MISC_VGATE_MSB, norm->vgate_misc); | |
474 | saa_writeb(SAA7134_RAW_DATA_GAIN, 0x40); | |
475 | saa_writeb(SAA7134_RAW_DATA_OFFSET, 0x80); | |
1da177e4 LT |
476 | } |
477 | ||
c458473e ML |
478 | void saa7134_set_tvnorm_hw(struct saa7134_dev *dev) |
479 | { | |
480 | saa7134_set_decoder(dev); | |
481 | ||
568b2feb | 482 | saa_call_all(dev, video, s_std, dev->tvnorm->id); |
9afb7377 HV |
483 | /* Set the correct norm for the saa6752hs. This function |
484 | does nothing if there is no saa6752hs. */ | |
8774bed9 | 485 | saa_call_empress(dev, video, s_std, dev->tvnorm->id); |
c458473e ML |
486 | } |
487 | ||
1da177e4 LT |
488 | static void set_h_prescale(struct saa7134_dev *dev, int task, int prescale) |
489 | { | |
490 | static const struct { | |
491 | int xpsc; | |
492 | int xacl; | |
493 | int xc2_1; | |
494 | int xdcg; | |
495 | int vpfy; | |
496 | } vals[] = { | |
497 | /* XPSC XACL XC2_1 XDCG VPFY */ | |
498 | { 1, 0, 0, 0, 0 }, | |
499 | { 2, 2, 1, 2, 2 }, | |
500 | { 3, 4, 1, 3, 2 }, | |
501 | { 4, 8, 1, 4, 2 }, | |
502 | { 5, 8, 1, 4, 2 }, | |
503 | { 6, 8, 1, 4, 3 }, | |
504 | { 7, 8, 1, 4, 3 }, | |
505 | { 8, 15, 0, 4, 3 }, | |
506 | { 9, 15, 0, 4, 3 }, | |
507 | { 10, 16, 1, 5, 3 }, | |
508 | }; | |
509 | static const int count = ARRAY_SIZE(vals); | |
510 | int i; | |
511 | ||
512 | for (i = 0; i < count; i++) | |
513 | if (vals[i].xpsc == prescale) | |
514 | break; | |
515 | if (i == count) | |
516 | return; | |
517 | ||
518 | saa_writeb(SAA7134_H_PRESCALE(task), vals[i].xpsc); | |
519 | saa_writeb(SAA7134_ACC_LENGTH(task), vals[i].xacl); | |
520 | saa_writeb(SAA7134_LEVEL_CTRL(task), | |
521 | (vals[i].xc2_1 << 3) | (vals[i].xdcg)); | |
522 | saa_andorb(SAA7134_FIR_PREFILTER_CTRL(task), 0x0f, | |
523 | (vals[i].vpfy << 2) | vals[i].vpfy); | |
524 | } | |
525 | ||
526 | static void set_v_scale(struct saa7134_dev *dev, int task, int yscale) | |
527 | { | |
528 | int val,mirror; | |
529 | ||
530 | saa_writeb(SAA7134_V_SCALE_RATIO1(task), yscale & 0xff); | |
531 | saa_writeb(SAA7134_V_SCALE_RATIO2(task), yscale >> 8); | |
532 | ||
533 | mirror = (dev->ctl_mirror) ? 0x02 : 0x00; | |
534 | if (yscale < 2048) { | |
535 | /* LPI */ | |
6139ebc6 | 536 | video_dbg("yscale LPI yscale=%d\n", yscale); |
1da177e4 LT |
537 | saa_writeb(SAA7134_V_FILTER(task), 0x00 | mirror); |
538 | saa_writeb(SAA7134_LUMA_CONTRAST(task), 0x40); | |
539 | saa_writeb(SAA7134_CHROMA_SATURATION(task), 0x40); | |
540 | } else { | |
541 | /* ACM */ | |
542 | val = 0x40 * 1024 / yscale; | |
6139ebc6 | 543 | video_dbg("yscale ACM yscale=%d val=0x%x\n", yscale, val); |
1da177e4 LT |
544 | saa_writeb(SAA7134_V_FILTER(task), 0x01 | mirror); |
545 | saa_writeb(SAA7134_LUMA_CONTRAST(task), val); | |
546 | saa_writeb(SAA7134_CHROMA_SATURATION(task), val); | |
547 | } | |
548 | saa_writeb(SAA7134_LUMA_BRIGHT(task), 0x80); | |
549 | } | |
550 | ||
551 | static void set_size(struct saa7134_dev *dev, int task, | |
552 | int width, int height, int interlace) | |
553 | { | |
554 | int prescale,xscale,yscale,y_even,y_odd; | |
555 | int h_start, h_stop, v_start, v_stop; | |
556 | int div = interlace ? 2 : 1; | |
557 | ||
558 | /* setup video scaler */ | |
559 | h_start = dev->crop_current.left; | |
560 | v_start = dev->crop_current.top/2; | |
561 | h_stop = (dev->crop_current.left + dev->crop_current.width -1); | |
562 | v_stop = (dev->crop_current.top + dev->crop_current.height -1)/2; | |
563 | ||
564 | saa_writeb(SAA7134_VIDEO_H_START1(task), h_start & 0xff); | |
565 | saa_writeb(SAA7134_VIDEO_H_START2(task), h_start >> 8); | |
566 | saa_writeb(SAA7134_VIDEO_H_STOP1(task), h_stop & 0xff); | |
567 | saa_writeb(SAA7134_VIDEO_H_STOP2(task), h_stop >> 8); | |
568 | saa_writeb(SAA7134_VIDEO_V_START1(task), v_start & 0xff); | |
569 | saa_writeb(SAA7134_VIDEO_V_START2(task), v_start >> 8); | |
570 | saa_writeb(SAA7134_VIDEO_V_STOP1(task), v_stop & 0xff); | |
571 | saa_writeb(SAA7134_VIDEO_V_STOP2(task), v_stop >> 8); | |
572 | ||
573 | prescale = dev->crop_current.width / width; | |
574 | if (0 == prescale) | |
575 | prescale = 1; | |
576 | xscale = 1024 * dev->crop_current.width / prescale / width; | |
577 | yscale = 512 * div * dev->crop_current.height / height; | |
6139ebc6 MCC |
578 | video_dbg("prescale=%d xscale=%d yscale=%d\n", |
579 | prescale, xscale, yscale); | |
1da177e4 LT |
580 | set_h_prescale(dev,task,prescale); |
581 | saa_writeb(SAA7134_H_SCALE_INC1(task), xscale & 0xff); | |
582 | saa_writeb(SAA7134_H_SCALE_INC2(task), xscale >> 8); | |
583 | set_v_scale(dev,task,yscale); | |
584 | ||
585 | saa_writeb(SAA7134_VIDEO_PIXELS1(task), width & 0xff); | |
586 | saa_writeb(SAA7134_VIDEO_PIXELS2(task), width >> 8); | |
587 | saa_writeb(SAA7134_VIDEO_LINES1(task), height/div & 0xff); | |
588 | saa_writeb(SAA7134_VIDEO_LINES2(task), height/div >> 8); | |
589 | ||
590 | /* deinterlace y offsets */ | |
591 | y_odd = dev->ctl_y_odd; | |
592 | y_even = dev->ctl_y_even; | |
593 | saa_writeb(SAA7134_V_PHASE_OFFSET0(task), y_odd); | |
594 | saa_writeb(SAA7134_V_PHASE_OFFSET1(task), y_even); | |
595 | saa_writeb(SAA7134_V_PHASE_OFFSET2(task), y_odd); | |
596 | saa_writeb(SAA7134_V_PHASE_OFFSET3(task), y_even); | |
597 | } | |
598 | ||
599 | /* ------------------------------------------------------------------ */ | |
600 | ||
601 | struct cliplist { | |
602 | __u16 position; | |
603 | __u8 enable; | |
604 | __u8 disable; | |
605 | }; | |
606 | ||
1da177e4 LT |
607 | static void set_cliplist(struct saa7134_dev *dev, int reg, |
608 | struct cliplist *cl, int entries, char *name) | |
609 | { | |
610 | __u8 winbits = 0; | |
611 | int i; | |
612 | ||
613 | for (i = 0; i < entries; i++) { | |
614 | winbits |= cl[i].enable; | |
615 | winbits &= ~cl[i].disable; | |
616 | if (i < 15 && cl[i].position == cl[i+1].position) | |
617 | continue; | |
618 | saa_writeb(reg + 0, winbits); | |
619 | saa_writeb(reg + 2, cl[i].position & 0xff); | |
620 | saa_writeb(reg + 3, cl[i].position >> 8); | |
630983b7 | 621 | video_dbg("clip: %s winbits=%02x pos=%d\n", |
1da177e4 LT |
622 | name,winbits,cl[i].position); |
623 | reg += 8; | |
624 | } | |
625 | for (; reg < 0x400; reg += 8) { | |
626 | saa_writeb(reg+ 0, 0); | |
627 | saa_writeb(reg + 1, 0); | |
628 | saa_writeb(reg + 2, 0); | |
629 | saa_writeb(reg + 3, 0); | |
630 | } | |
631 | } | |
632 | ||
633 | static int clip_range(int val) | |
634 | { | |
635 | if (val < 0) | |
636 | val = 0; | |
637 | return val; | |
638 | } | |
639 | ||
9040b32e HO |
640 | /* Sort into smallest position first order */ |
641 | static int cliplist_cmp(const void *a, const void *b) | |
642 | { | |
643 | const struct cliplist *cla = a; | |
644 | const struct cliplist *clb = b; | |
645 | if (cla->position < clb->position) | |
646 | return -1; | |
647 | if (cla->position > clb->position) | |
648 | return 1; | |
649 | return 0; | |
650 | } | |
651 | ||
1da177e4 LT |
652 | static int setup_clipping(struct saa7134_dev *dev, struct v4l2_clip *clips, |
653 | int nclips, int interlace) | |
654 | { | |
655 | struct cliplist col[16], row[16]; | |
9040b32e | 656 | int cols = 0, rows = 0, i; |
1da177e4 LT |
657 | int div = interlace ? 2 : 1; |
658 | ||
9040b32e HO |
659 | memset(col, 0, sizeof(col)); |
660 | memset(row, 0, sizeof(row)); | |
1da177e4 LT |
661 | for (i = 0; i < nclips && i < 8; i++) { |
662 | col[cols].position = clip_range(clips[i].c.left); | |
663 | col[cols].enable = (1 << i); | |
664 | cols++; | |
665 | col[cols].position = clip_range(clips[i].c.left+clips[i].c.width); | |
666 | col[cols].disable = (1 << i); | |
667 | cols++; | |
668 | row[rows].position = clip_range(clips[i].c.top / div); | |
669 | row[rows].enable = (1 << i); | |
670 | rows++; | |
671 | row[rows].position = clip_range((clips[i].c.top + clips[i].c.height) | |
672 | / div); | |
673 | row[rows].disable = (1 << i); | |
674 | rows++; | |
675 | } | |
9040b32e HO |
676 | sort(col, cols, sizeof col[0], cliplist_cmp, NULL); |
677 | sort(row, rows, sizeof row[0], cliplist_cmp, NULL); | |
1da177e4 LT |
678 | set_cliplist(dev,0x380,col,cols,"cols"); |
679 | set_cliplist(dev,0x384,row,rows,"rows"); | |
680 | return 0; | |
681 | } | |
682 | ||
3a0a5a78 | 683 | static int verify_preview(struct saa7134_dev *dev, struct v4l2_window *win, bool try) |
1da177e4 LT |
684 | { |
685 | enum v4l2_field field; | |
686 | int maxw, maxh; | |
687 | ||
3a0a5a78 | 688 | if (!try && (dev->ovbuf.base == NULL || dev->ovfmt == NULL)) |
1da177e4 | 689 | return -EINVAL; |
3a0a5a78 HV |
690 | if (win->w.width < 48) |
691 | win->w.width = 48; | |
692 | if (win->w.height < 32) | |
693 | win->w.height = 32; | |
694 | if (win->clipcount > 8) | |
695 | win->clipcount = 8; | |
696 | ||
697 | win->chromakey = 0; | |
698 | win->global_alpha = 0; | |
1da177e4 LT |
699 | field = win->field; |
700 | maxw = dev->crop_current.width; | |
701 | maxh = dev->crop_current.height; | |
702 | ||
703 | if (V4L2_FIELD_ANY == field) { | |
4ac97914 MCC |
704 | field = (win->w.height > maxh/2) |
705 | ? V4L2_FIELD_INTERLACED | |
706 | : V4L2_FIELD_TOP; | |
707 | } | |
708 | switch (field) { | |
709 | case V4L2_FIELD_TOP: | |
710 | case V4L2_FIELD_BOTTOM: | |
711 | maxh = maxh / 2; | |
712 | break; | |
4ac97914 | 713 | default: |
3a0a5a78 HV |
714 | field = V4L2_FIELD_INTERLACED; |
715 | break; | |
4ac97914 | 716 | } |
1da177e4 LT |
717 | |
718 | win->field = field; | |
719 | if (win->w.width > maxw) | |
720 | win->w.width = maxw; | |
721 | if (win->w.height > maxh) | |
722 | win->w.height = maxh; | |
723 | return 0; | |
724 | } | |
725 | ||
718bde1a | 726 | static int start_preview(struct saa7134_dev *dev) |
1da177e4 LT |
727 | { |
728 | unsigned long base,control,bpl; | |
729 | int err; | |
730 | ||
3a0a5a78 | 731 | err = verify_preview(dev, &dev->win, false); |
1da177e4 LT |
732 | if (0 != err) |
733 | return err; | |
734 | ||
b12262f9 | 735 | dev->ovfield = dev->win.field; |
630983b7 | 736 | video_dbg("start_preview %dx%d+%d+%d %s field=%s\n", |
b12262f9 HV |
737 | dev->win.w.width, dev->win.w.height, |
738 | dev->win.w.left, dev->win.w.top, | |
739 | dev->ovfmt->name, v4l2_field_names[dev->ovfield]); | |
1da177e4 LT |
740 | |
741 | /* setup window + clipping */ | |
b12262f9 | 742 | set_size(dev, TASK_B, dev->win.w.width, dev->win.w.height, |
1da177e4 | 743 | V4L2_FIELD_HAS_BOTH(dev->ovfield)); |
b12262f9 | 744 | setup_clipping(dev, dev->clips, dev->nclips, |
1da177e4 LT |
745 | V4L2_FIELD_HAS_BOTH(dev->ovfield)); |
746 | if (dev->ovfmt->yuv) | |
747 | saa_andorb(SAA7134_DATA_PATH(TASK_B), 0x3f, 0x03); | |
748 | else | |
749 | saa_andorb(SAA7134_DATA_PATH(TASK_B), 0x3f, 0x01); | |
750 | saa_writeb(SAA7134_OFMT_VIDEO_B, dev->ovfmt->pm | 0x20); | |
751 | ||
752 | /* dma: setup channel 1 (= Video Task B) */ | |
753 | base = (unsigned long)dev->ovbuf.base; | |
b12262f9 HV |
754 | base += dev->ovbuf.fmt.bytesperline * dev->win.w.top; |
755 | base += dev->ovfmt->depth/8 * dev->win.w.left; | |
1da177e4 LT |
756 | bpl = dev->ovbuf.fmt.bytesperline; |
757 | control = SAA7134_RS_CONTROL_BURST_16; | |
758 | if (dev->ovfmt->bswap) | |
759 | control |= SAA7134_RS_CONTROL_BSWAP; | |
760 | if (dev->ovfmt->wswap) | |
761 | control |= SAA7134_RS_CONTROL_WSWAP; | |
762 | if (V4L2_FIELD_HAS_BOTH(dev->ovfield)) { | |
763 | saa_writel(SAA7134_RS_BA1(1),base); | |
764 | saa_writel(SAA7134_RS_BA2(1),base+bpl); | |
765 | saa_writel(SAA7134_RS_PITCH(1),bpl*2); | |
766 | saa_writel(SAA7134_RS_CONTROL(1),control); | |
767 | } else { | |
768 | saa_writel(SAA7134_RS_BA1(1),base); | |
769 | saa_writel(SAA7134_RS_BA2(1),base); | |
770 | saa_writel(SAA7134_RS_PITCH(1),bpl); | |
771 | saa_writel(SAA7134_RS_CONTROL(1),control); | |
772 | } | |
773 | ||
774 | /* start dma */ | |
775 | dev->ovenable = 1; | |
776 | saa7134_set_dmabits(dev); | |
777 | ||
778 | return 0; | |
779 | } | |
780 | ||
718bde1a | 781 | static int stop_preview(struct saa7134_dev *dev) |
1da177e4 LT |
782 | { |
783 | dev->ovenable = 0; | |
784 | saa7134_set_dmabits(dev); | |
785 | return 0; | |
786 | } | |
787 | ||
ac90aa02 MCC |
788 | /* |
789 | * Media Controller helper functions | |
790 | */ | |
791 | ||
792 | static int saa7134_enable_analog_tuner(struct saa7134_dev *dev) | |
793 | { | |
794 | #ifdef CONFIG_MEDIA_CONTROLLER | |
795 | struct media_device *mdev = dev->media_dev; | |
796 | struct media_entity *source; | |
797 | struct media_link *link, *found_link = NULL; | |
798 | int ret, active_links = 0; | |
799 | ||
800 | if (!mdev || !dev->decoder) | |
801 | return 0; | |
802 | ||
803 | /* | |
804 | * This will find the tuner that is connected into the decoder. | |
805 | * Technically, this is not 100% correct, as the device may be | |
806 | * using an analog input instead of the tuner. However, as we can't | |
807 | * do DVB streaming while the DMA engine is being used for V4L2, | |
808 | * this should be enough for the actual needs. | |
809 | */ | |
810 | list_for_each_entry(link, &dev->decoder->links, list) { | |
811 | if (link->sink->entity == dev->decoder) { | |
812 | found_link = link; | |
813 | if (link->flags & MEDIA_LNK_FL_ENABLED) | |
814 | active_links++; | |
815 | break; | |
816 | } | |
817 | } | |
818 | ||
819 | if (active_links == 1 || !found_link) | |
820 | return 0; | |
821 | ||
822 | source = found_link->source->entity; | |
823 | list_for_each_entry(link, &source->links, list) { | |
824 | struct media_entity *sink; | |
825 | int flags = 0; | |
826 | ||
827 | sink = link->sink->entity; | |
828 | ||
829 | if (sink == dev->decoder) | |
830 | flags = MEDIA_LNK_FL_ENABLED; | |
831 | ||
832 | ret = media_entity_setup_link(link, flags); | |
833 | if (ret) { | |
834 | pr_err("Couldn't change link %s->%s to %s. Error %d\n", | |
835 | source->name, sink->name, | |
836 | flags ? "enabled" : "disabled", | |
837 | ret); | |
838 | return ret; | |
839 | } | |
840 | } | |
841 | #endif | |
842 | return 0; | |
843 | } | |
844 | ||
1da177e4 LT |
845 | /* ------------------------------------------------------------------ */ |
846 | ||
847 | static int buffer_activate(struct saa7134_dev *dev, | |
848 | struct saa7134_buf *buf, | |
849 | struct saa7134_buf *next) | |
850 | { | |
2d700715 | 851 | struct saa7134_dmaqueue *dmaq = buf->vb2.vb2_buf.vb2_queue->drv_priv; |
1da177e4 LT |
852 | unsigned long base,control,bpl; |
853 | unsigned long bpl_uv,lines_uv,base2,base3,tmp; /* planar */ | |
854 | ||
6139ebc6 | 855 | video_dbg("buffer_activate buf=%p\n", buf); |
1da177e4 LT |
856 | buf->top_seen = 0; |
857 | ||
2ada815f HV |
858 | set_size(dev, TASK_A, dev->width, dev->height, |
859 | V4L2_FIELD_HAS_BOTH(dev->field)); | |
9e534f84 | 860 | if (dev->fmt->yuv) |
1da177e4 LT |
861 | saa_andorb(SAA7134_DATA_PATH(TASK_A), 0x3f, 0x03); |
862 | else | |
863 | saa_andorb(SAA7134_DATA_PATH(TASK_A), 0x3f, 0x01); | |
9e534f84 | 864 | saa_writeb(SAA7134_OFMT_VIDEO_A, dev->fmt->pm); |
1da177e4 LT |
865 | |
866 | /* DMA: setup channel 0 (= Video Task A0) */ | |
867 | base = saa7134_buffer_base(buf); | |
9e534f84 | 868 | if (dev->fmt->planar) |
2ada815f | 869 | bpl = dev->width; |
1da177e4 | 870 | else |
2ada815f | 871 | bpl = (dev->width * dev->fmt->depth) / 8; |
1da177e4 LT |
872 | control = SAA7134_RS_CONTROL_BURST_16 | |
873 | SAA7134_RS_CONTROL_ME | | |
2ada815f | 874 | (dmaq->pt.dma >> 12); |
9e534f84 | 875 | if (dev->fmt->bswap) |
1da177e4 | 876 | control |= SAA7134_RS_CONTROL_BSWAP; |
9e534f84 | 877 | if (dev->fmt->wswap) |
1da177e4 | 878 | control |= SAA7134_RS_CONTROL_WSWAP; |
2ada815f | 879 | if (V4L2_FIELD_HAS_BOTH(dev->field)) { |
1da177e4 LT |
880 | /* interlaced */ |
881 | saa_writel(SAA7134_RS_BA1(0),base); | |
882 | saa_writel(SAA7134_RS_BA2(0),base+bpl); | |
883 | saa_writel(SAA7134_RS_PITCH(0),bpl*2); | |
884 | } else { | |
885 | /* non-interlaced */ | |
886 | saa_writel(SAA7134_RS_BA1(0),base); | |
887 | saa_writel(SAA7134_RS_BA2(0),base); | |
888 | saa_writel(SAA7134_RS_PITCH(0),bpl); | |
889 | } | |
890 | saa_writel(SAA7134_RS_CONTROL(0),control); | |
891 | ||
9e534f84 | 892 | if (dev->fmt->planar) { |
1da177e4 | 893 | /* DMA: setup channel 4+5 (= planar task A) */ |
9e534f84 | 894 | bpl_uv = bpl >> dev->fmt->hshift; |
2ada815f HV |
895 | lines_uv = dev->height >> dev->fmt->vshift; |
896 | base2 = base + bpl * dev->height; | |
1da177e4 | 897 | base3 = base2 + bpl_uv * lines_uv; |
9e534f84 | 898 | if (dev->fmt->uvswap) |
1da177e4 | 899 | tmp = base2, base2 = base3, base3 = tmp; |
630983b7 | 900 | video_dbg("uv: bpl=%ld lines=%ld base2/3=%ld/%ld\n", |
1da177e4 | 901 | bpl_uv,lines_uv,base2,base3); |
2ada815f | 902 | if (V4L2_FIELD_HAS_BOTH(dev->field)) { |
1da177e4 LT |
903 | /* interlaced */ |
904 | saa_writel(SAA7134_RS_BA1(4),base2); | |
905 | saa_writel(SAA7134_RS_BA2(4),base2+bpl_uv); | |
906 | saa_writel(SAA7134_RS_PITCH(4),bpl_uv*2); | |
907 | saa_writel(SAA7134_RS_BA1(5),base3); | |
908 | saa_writel(SAA7134_RS_BA2(5),base3+bpl_uv); | |
909 | saa_writel(SAA7134_RS_PITCH(5),bpl_uv*2); | |
910 | } else { | |
911 | /* non-interlaced */ | |
912 | saa_writel(SAA7134_RS_BA1(4),base2); | |
913 | saa_writel(SAA7134_RS_BA2(4),base2); | |
914 | saa_writel(SAA7134_RS_PITCH(4),bpl_uv); | |
915 | saa_writel(SAA7134_RS_BA1(5),base3); | |
916 | saa_writel(SAA7134_RS_BA2(5),base3); | |
917 | saa_writel(SAA7134_RS_PITCH(5),bpl_uv); | |
918 | } | |
919 | saa_writel(SAA7134_RS_CONTROL(4),control); | |
920 | saa_writel(SAA7134_RS_CONTROL(5),control); | |
921 | } | |
922 | ||
923 | /* start DMA */ | |
924 | saa7134_set_dmabits(dev); | |
2ada815f | 925 | mod_timer(&dmaq->timeout, jiffies + BUFFER_TIMEOUT); |
1da177e4 LT |
926 | return 0; |
927 | } | |
928 | ||
2ada815f | 929 | static int buffer_init(struct vb2_buffer *vb2) |
1da177e4 | 930 | { |
2ada815f | 931 | struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; |
2d700715 JS |
932 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2); |
933 | struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2); | |
2ada815f HV |
934 | |
935 | dmaq->curr = NULL; | |
936 | buf->activate = buffer_activate; | |
937 | return 0; | |
938 | } | |
939 | ||
940 | static int buffer_prepare(struct vb2_buffer *vb2) | |
941 | { | |
942 | struct saa7134_dmaqueue *dmaq = vb2->vb2_queue->drv_priv; | |
a00e6888 | 943 | struct saa7134_dev *dev = dmaq->dev; |
2d700715 JS |
944 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb2); |
945 | struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2); | |
946 | struct sg_table *dma = vb2_dma_sg_plane_desc(vb2, 0); | |
1da177e4 | 947 | unsigned int size; |
1da177e4 | 948 | |
a3f415ab HV |
949 | if (dma->sgl->offset) { |
950 | pr_err("The buffer is not page-aligned\n"); | |
951 | return -EINVAL; | |
952 | } | |
2ada815f HV |
953 | size = (dev->width * dev->height * dev->fmt->depth) >> 3; |
954 | if (vb2_plane_size(vb2, 0) < size) | |
1da177e4 | 955 | return -EINVAL; |
2ada815f HV |
956 | |
957 | vb2_set_plane_payload(vb2, 0, size); | |
2d700715 | 958 | vbuf->field = dev->field; |
2ada815f | 959 | |
2ada815f HV |
960 | return saa7134_pgtable_build(dev->pci, &dmaq->pt, dma->sgl, dma->nents, |
961 | saa7134_buffer_startpage(buf)); | |
962 | } | |
963 | ||
df9ecb0c | 964 | static int queue_setup(struct vb2_queue *q, |
2ada815f | 965 | unsigned int *nbuffers, unsigned int *nplanes, |
36c0f8b3 | 966 | unsigned int sizes[], struct device *alloc_devs[]) |
2ada815f HV |
967 | { |
968 | struct saa7134_dmaqueue *dmaq = q->drv_priv; | |
969 | struct saa7134_dev *dev = dmaq->dev; | |
970 | int size = dev->fmt->depth * dev->width * dev->height >> 3; | |
971 | ||
813b9dff HV |
972 | if (dev->width < 48 || |
973 | dev->height < 32 || | |
974 | dev->width/4 > dev->crop_current.width || | |
975 | dev->height/4 > dev->crop_current.height || | |
976 | dev->width > dev->crop_bounds.width || | |
977 | dev->height > dev->crop_bounds.height) | |
1da177e4 | 978 | return -EINVAL; |
1da177e4 | 979 | |
2ada815f HV |
980 | *nbuffers = saa7134_buffer_count(size, *nbuffers); |
981 | *nplanes = 1; | |
982 | sizes[0] = size; | |
ac90aa02 MCC |
983 | |
984 | saa7134_enable_analog_tuner(dev); | |
985 | ||
1da177e4 | 986 | return 0; |
1da177e4 LT |
987 | } |
988 | ||
2ada815f HV |
989 | /* |
990 | * move buffer to hardware queue | |
991 | */ | |
992 | void saa7134_vb2_buffer_queue(struct vb2_buffer *vb) | |
1da177e4 | 993 | { |
2ada815f | 994 | struct saa7134_dmaqueue *dmaq = vb->vb2_queue->drv_priv; |
a00e6888 | 995 | struct saa7134_dev *dev = dmaq->dev; |
2d700715 JS |
996 | struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb); |
997 | struct saa7134_buf *buf = container_of(vbuf, struct saa7134_buf, vb2); | |
1da177e4 | 998 | |
2ada815f | 999 | saa7134_buffer_queue(dev, dmaq, buf); |
1da177e4 | 1000 | } |
2ada815f | 1001 | EXPORT_SYMBOL_GPL(saa7134_vb2_buffer_queue); |
1da177e4 | 1002 | |
2ada815f | 1003 | int saa7134_vb2_start_streaming(struct vb2_queue *vq, unsigned int count) |
1da177e4 | 1004 | { |
2ada815f | 1005 | struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
a00e6888 | 1006 | struct saa7134_dev *dev = dmaq->dev; |
1da177e4 | 1007 | |
2ada815f HV |
1008 | /* |
1009 | * Planar video capture and TS share the same DMA channel, | |
1010 | * so only one can be active at a time. | |
1011 | */ | |
1012 | if (card_is_empress(dev) && vb2_is_busy(&dev->empress_vbq) && | |
1013 | dmaq == &dev->video_q && dev->fmt->planar) { | |
1014 | struct saa7134_buf *buf, *tmp; | |
1015 | ||
1016 | list_for_each_entry_safe(buf, tmp, &dmaq->queue, entry) { | |
1017 | list_del(&buf->entry); | |
2d700715 JS |
1018 | vb2_buffer_done(&buf->vb2.vb2_buf, |
1019 | VB2_BUF_STATE_QUEUED); | |
2ada815f HV |
1020 | } |
1021 | if (dmaq->curr) { | |
2d700715 JS |
1022 | vb2_buffer_done(&dmaq->curr->vb2.vb2_buf, |
1023 | VB2_BUF_STATE_QUEUED); | |
2ada815f HV |
1024 | dmaq->curr = NULL; |
1025 | } | |
1026 | return -EBUSY; | |
1027 | } | |
1028 | ||
1029 | /* The SAA7134 has a 1K FIFO; the datasheet suggests that when | |
1030 | * configured conservatively, there's 22 usec of buffering for video. | |
1031 | * We therefore request a DMA latency of 20 usec, giving us 2 usec of | |
1032 | * margin in case the FIFO is configured differently to the datasheet. | |
1033 | * Unfortunately, I lack register-level documentation to check the | |
1034 | * Linux FIFO setup and confirm the perfect value. | |
1035 | */ | |
1036 | if ((dmaq == &dev->video_q && !vb2_is_streaming(&dev->vbi_vbq)) || | |
1037 | (dmaq == &dev->vbi_q && !vb2_is_streaming(&dev->video_vbq))) | |
1038 | pm_qos_add_request(&dev->qos_request, | |
1039 | PM_QOS_CPU_DMA_LATENCY, 20); | |
1040 | dmaq->seq_nr = 0; | |
1041 | ||
1042 | return 0; | |
1da177e4 LT |
1043 | } |
1044 | ||
2ada815f | 1045 | void saa7134_vb2_stop_streaming(struct vb2_queue *vq) |
1da177e4 | 1046 | { |
2ada815f HV |
1047 | struct saa7134_dmaqueue *dmaq = vq->drv_priv; |
1048 | struct saa7134_dev *dev = dmaq->dev; | |
1049 | ||
1050 | saa7134_stop_streaming(dev, dmaq); | |
1da177e4 | 1051 | |
2ada815f HV |
1052 | if ((dmaq == &dev->video_q && !vb2_is_streaming(&dev->vbi_vbq)) || |
1053 | (dmaq == &dev->vbi_q && !vb2_is_streaming(&dev->video_vbq))) | |
1054 | pm_qos_remove_request(&dev->qos_request); | |
1da177e4 LT |
1055 | } |
1056 | ||
2ada815f HV |
1057 | static struct vb2_ops vb2_qops = { |
1058 | .queue_setup = queue_setup, | |
1059 | .buf_init = buffer_init, | |
1060 | .buf_prepare = buffer_prepare, | |
2ada815f HV |
1061 | .buf_queue = saa7134_vb2_buffer_queue, |
1062 | .wait_prepare = vb2_ops_wait_prepare, | |
1063 | .wait_finish = vb2_ops_wait_finish, | |
1064 | .start_streaming = saa7134_vb2_start_streaming, | |
1065 | .stop_streaming = saa7134_vb2_stop_streaming, | |
1da177e4 LT |
1066 | }; |
1067 | ||
1068 | /* ------------------------------------------------------------------ */ | |
1069 | ||
718bde1a | 1070 | static int saa7134_s_ctrl(struct v4l2_ctrl *ctrl) |
531d83a3 | 1071 | { |
718bde1a | 1072 | struct saa7134_dev *dev = container_of(ctrl->handler, struct saa7134_dev, ctrl_handler); |
1da177e4 LT |
1073 | unsigned long flags; |
1074 | int restart_overlay = 0; | |
1075 | ||
718bde1a | 1076 | switch (ctrl->id) { |
1da177e4 | 1077 | case V4L2_CID_BRIGHTNESS: |
718bde1a HV |
1078 | dev->ctl_bright = ctrl->val; |
1079 | saa_writeb(SAA7134_DEC_LUMA_BRIGHT, ctrl->val); | |
1da177e4 LT |
1080 | break; |
1081 | case V4L2_CID_HUE: | |
718bde1a HV |
1082 | dev->ctl_hue = ctrl->val; |
1083 | saa_writeb(SAA7134_DEC_CHROMA_HUE, ctrl->val); | |
1da177e4 LT |
1084 | break; |
1085 | case V4L2_CID_CONTRAST: | |
718bde1a | 1086 | dev->ctl_contrast = ctrl->val; |
1da177e4 LT |
1087 | saa_writeb(SAA7134_DEC_LUMA_CONTRAST, |
1088 | dev->ctl_invert ? -dev->ctl_contrast : dev->ctl_contrast); | |
1089 | break; | |
1090 | case V4L2_CID_SATURATION: | |
718bde1a | 1091 | dev->ctl_saturation = ctrl->val; |
1da177e4 LT |
1092 | saa_writeb(SAA7134_DEC_CHROMA_SATURATION, |
1093 | dev->ctl_invert ? -dev->ctl_saturation : dev->ctl_saturation); | |
1094 | break; | |
1095 | case V4L2_CID_AUDIO_MUTE: | |
718bde1a | 1096 | dev->ctl_mute = ctrl->val; |
1da177e4 LT |
1097 | saa7134_tvaudio_setmute(dev); |
1098 | break; | |
1099 | case V4L2_CID_AUDIO_VOLUME: | |
718bde1a | 1100 | dev->ctl_volume = ctrl->val; |
1da177e4 LT |
1101 | saa7134_tvaudio_setvolume(dev,dev->ctl_volume); |
1102 | break; | |
1103 | case V4L2_CID_PRIVATE_INVERT: | |
718bde1a | 1104 | dev->ctl_invert = ctrl->val; |
1da177e4 LT |
1105 | saa_writeb(SAA7134_DEC_LUMA_CONTRAST, |
1106 | dev->ctl_invert ? -dev->ctl_contrast : dev->ctl_contrast); | |
1107 | saa_writeb(SAA7134_DEC_CHROMA_SATURATION, | |
1108 | dev->ctl_invert ? -dev->ctl_saturation : dev->ctl_saturation); | |
1109 | break; | |
f246a817 | 1110 | case V4L2_CID_HFLIP: |
718bde1a | 1111 | dev->ctl_mirror = ctrl->val; |
1da177e4 LT |
1112 | restart_overlay = 1; |
1113 | break; | |
1114 | case V4L2_CID_PRIVATE_Y_EVEN: | |
718bde1a | 1115 | dev->ctl_y_even = ctrl->val; |
1da177e4 LT |
1116 | restart_overlay = 1; |
1117 | break; | |
1118 | case V4L2_CID_PRIVATE_Y_ODD: | |
718bde1a | 1119 | dev->ctl_y_odd = ctrl->val; |
1da177e4 LT |
1120 | restart_overlay = 1; |
1121 | break; | |
1122 | case V4L2_CID_PRIVATE_AUTOMUTE: | |
7f171123 MCC |
1123 | { |
1124 | struct v4l2_priv_tun_config tda9887_cfg; | |
1125 | ||
1126 | tda9887_cfg.tuner = TUNER_TDA9887; | |
1127 | tda9887_cfg.priv = &dev->tda9887_conf; | |
1128 | ||
718bde1a | 1129 | dev->ctl_automute = ctrl->val; |
1da177e4 LT |
1130 | if (dev->tda9887_conf) { |
1131 | if (dev->ctl_automute) | |
1132 | dev->tda9887_conf |= TDA9887_AUTOMUTE; | |
1133 | else | |
1134 | dev->tda9887_conf &= ~TDA9887_AUTOMUTE; | |
7f171123 | 1135 | |
fac6986c | 1136 | saa_call_all(dev, tuner, s_config, &tda9887_cfg); |
1da177e4 LT |
1137 | } |
1138 | break; | |
7f171123 | 1139 | } |
1da177e4 | 1140 | default: |
718bde1a | 1141 | return -EINVAL; |
1da177e4 | 1142 | } |
2ada815f | 1143 | if (restart_overlay && dev->overlay_owner) { |
718bde1a HV |
1144 | spin_lock_irqsave(&dev->slock, flags); |
1145 | stop_preview(dev); | |
1146 | start_preview(dev); | |
1147 | spin_unlock_irqrestore(&dev->slock, flags); | |
1da177e4 | 1148 | } |
718bde1a | 1149 | return 0; |
531d83a3 | 1150 | } |
1da177e4 LT |
1151 | |
1152 | /* ------------------------------------------------------------------ */ | |
1153 | ||
bec43661 | 1154 | static int video_open(struct file *file) |
1da177e4 | 1155 | { |
63b0d5ad LP |
1156 | struct video_device *vdev = video_devdata(file); |
1157 | struct saa7134_dev *dev = video_drvdata(file); | |
2ada815f | 1158 | int ret = v4l2_fh_open(file); |
1da177e4 | 1159 | |
2ada815f HV |
1160 | if (ret < 0) |
1161 | return ret; | |
1da177e4 | 1162 | |
2ada815f | 1163 | mutex_lock(&dev->lock); |
8fcd4769 | 1164 | if (vdev->vfl_type == VFL_TYPE_RADIO) { |
1da177e4 | 1165 | /* switch to radio mode */ |
e72936d2 | 1166 | saa7134_tvaudio_setinput(dev, &card(dev).radio); |
fac6986c | 1167 | saa_call_all(dev, tuner, s_radio); |
1da177e4 LT |
1168 | } else { |
1169 | /* switch to video/vbi mode */ | |
e72936d2 | 1170 | video_mux(dev, dev->ctl_input); |
1da177e4 | 1171 | } |
2ada815f | 1172 | mutex_unlock(&dev->lock); |
3bbaa3a6 | 1173 | |
330a115a | 1174 | return 0; |
1da177e4 LT |
1175 | } |
1176 | ||
bec43661 | 1177 | static int video_release(struct file *file) |
1da177e4 | 1178 | { |
8fcd4769 | 1179 | struct video_device *vdev = video_devdata(file); |
b9f63b25 | 1180 | struct saa7134_dev *dev = video_drvdata(file); |
2ada815f | 1181 | struct v4l2_fh *fh = file->private_data; |
b9218f2f | 1182 | struct saa6588_command cmd; |
1da177e4 LT |
1183 | unsigned long flags; |
1184 | ||
2ada815f | 1185 | mutex_lock(&dev->lock); |
a1dca1e3 SS |
1186 | saa7134_tvaudio_close(dev); |
1187 | ||
1da177e4 | 1188 | /* turn off overlay */ |
2ada815f | 1189 | if (fh == dev->overlay_owner) { |
1da177e4 | 1190 | spin_lock_irqsave(&dev->slock,flags); |
718bde1a | 1191 | stop_preview(dev); |
1da177e4 | 1192 | spin_unlock_irqrestore(&dev->slock,flags); |
2ada815f | 1193 | dev->overlay_owner = NULL; |
1da177e4 LT |
1194 | } |
1195 | ||
2ada815f HV |
1196 | if (vdev->vfl_type == VFL_TYPE_RADIO) |
1197 | v4l2_fh_release(file); | |
1198 | else | |
1199 | _vb2_fop_release(file, NULL); | |
1da177e4 | 1200 | |
330a115a MCC |
1201 | /* ts-capture will not work in planar mode, so turn it off Hac: 04.05*/ |
1202 | saa_andorb(SAA7134_OFMT_VIDEO_A, 0x1f, 0); | |
1203 | saa_andorb(SAA7134_OFMT_VIDEO_B, 0x1f, 0); | |
1204 | saa_andorb(SAA7134_OFMT_DATA_A, 0x1f, 0); | |
1205 | saa_andorb(SAA7134_OFMT_DATA_B, 0x1f, 0); | |
1206 | ||
622b828a | 1207 | saa_call_all(dev, core, s_power, 0); |
8fcd4769 | 1208 | if (vdev->vfl_type == VFL_TYPE_RADIO) |
b9218f2f | 1209 | saa_call_all(dev, core, ioctl, SAA6588_CMD_CLOSE, &cmd); |
2ada815f | 1210 | mutex_unlock(&dev->lock); |
330a115a | 1211 | |
1da177e4 LT |
1212 | return 0; |
1213 | } | |
1214 | ||
2983baf8 HV |
1215 | static ssize_t radio_read(struct file *file, char __user *data, |
1216 | size_t count, loff_t *ppos) | |
1217 | { | |
b9f63b25 | 1218 | struct saa7134_dev *dev = video_drvdata(file); |
b9218f2f | 1219 | struct saa6588_command cmd; |
2983baf8 HV |
1220 | |
1221 | cmd.block_count = count/3; | |
09092787 | 1222 | cmd.nonblocking = file->f_flags & O_NONBLOCK; |
2983baf8 HV |
1223 | cmd.buffer = data; |
1224 | cmd.instance = file; | |
1225 | cmd.result = -ENODEV; | |
1226 | ||
2ada815f | 1227 | mutex_lock(&dev->lock); |
b9218f2f | 1228 | saa_call_all(dev, core, ioctl, SAA6588_CMD_READ, &cmd); |
2ada815f | 1229 | mutex_unlock(&dev->lock); |
2983baf8 HV |
1230 | |
1231 | return cmd.result; | |
1232 | } | |
1233 | ||
1234 | static unsigned int radio_poll(struct file *file, poll_table *wait) | |
1235 | { | |
b9f63b25 | 1236 | struct saa7134_dev *dev = video_drvdata(file); |
b9218f2f | 1237 | struct saa6588_command cmd; |
a2004502 | 1238 | unsigned int rc = v4l2_ctrl_poll(file, wait); |
2983baf8 HV |
1239 | |
1240 | cmd.instance = file; | |
1241 | cmd.event_list = wait; | |
a2004502 | 1242 | cmd.result = 0; |
2ada815f | 1243 | mutex_lock(&dev->lock); |
b9218f2f | 1244 | saa_call_all(dev, core, ioctl, SAA6588_CMD_POLL, &cmd); |
2ada815f | 1245 | mutex_unlock(&dev->lock); |
2983baf8 | 1246 | |
a2004502 | 1247 | return rc | cmd.result; |
2983baf8 HV |
1248 | } |
1249 | ||
1da177e4 LT |
1250 | /* ------------------------------------------------------------------ */ |
1251 | ||
78b526a4 | 1252 | static int saa7134_try_get_set_fmt_vbi_cap(struct file *file, void *priv, |
8c85454a | 1253 | struct v4l2_format *f) |
1da177e4 | 1254 | { |
b9f63b25 | 1255 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 LT |
1256 | struct saa7134_tvnorm *norm = dev->tvnorm; |
1257 | ||
d047795c | 1258 | memset(&f->fmt.vbi.reserved, 0, sizeof(f->fmt.vbi.reserved)); |
1da177e4 LT |
1259 | f->fmt.vbi.sampling_rate = 6750000 * 4; |
1260 | f->fmt.vbi.samples_per_line = 2048 /* VBI_LINE_LENGTH */; | |
1261 | f->fmt.vbi.sample_format = V4L2_PIX_FMT_GREY; | |
1262 | f->fmt.vbi.offset = 64 * 4; | |
f246a817 MS |
1263 | f->fmt.vbi.start[0] = norm->vbi_v_start_0; |
1264 | f->fmt.vbi.count[0] = norm->vbi_v_stop_0 - norm->vbi_v_start_0 +1; | |
1265 | f->fmt.vbi.start[1] = norm->vbi_v_start_1; | |
1da177e4 LT |
1266 | f->fmt.vbi.count[1] = f->fmt.vbi.count[0]; |
1267 | f->fmt.vbi.flags = 0; /* VBI_UNSYNC VBI_INTERLACED */ | |
1268 | ||
8c85454a | 1269 | return 0; |
1da177e4 LT |
1270 | } |
1271 | ||
78b526a4 | 1272 | static int saa7134_g_fmt_vid_cap(struct file *file, void *priv, |
8f61ae2f | 1273 | struct v4l2_format *f) |
1da177e4 | 1274 | { |
b9f63b25 | 1275 | struct saa7134_dev *dev = video_drvdata(file); |
8f61ae2f | 1276 | |
813b9dff HV |
1277 | f->fmt.pix.width = dev->width; |
1278 | f->fmt.pix.height = dev->height; | |
2ada815f | 1279 | f->fmt.pix.field = dev->field; |
813b9dff | 1280 | f->fmt.pix.pixelformat = dev->fmt->fourcc; |
3e71da19 HG |
1281 | if (dev->fmt->planar) |
1282 | f->fmt.pix.bytesperline = f->fmt.pix.width; | |
1283 | else | |
1284 | f->fmt.pix.bytesperline = | |
1285 | (f->fmt.pix.width * dev->fmt->depth) / 8; | |
8c85454a | 1286 | f->fmt.pix.sizeimage = |
3e71da19 | 1287 | (f->fmt.pix.height * f->fmt.pix.width * dev->fmt->depth) / 8; |
3a0a5a78 | 1288 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
8c85454a MCC |
1289 | return 0; |
1290 | } | |
1291 | ||
78b526a4 | 1292 | static int saa7134_g_fmt_vid_overlay(struct file *file, void *priv, |
8c85454a MCC |
1293 | struct v4l2_format *f) |
1294 | { | |
b9f63b25 | 1295 | struct saa7134_dev *dev = video_drvdata(file); |
12d866ec | 1296 | struct v4l2_clip __user *clips = f->fmt.win.clips; |
3a0a5a78 HV |
1297 | u32 clipcount = f->fmt.win.clipcount; |
1298 | int err = 0; | |
1299 | int i; | |
8c85454a MCC |
1300 | |
1301 | if (saa7134_no_overlay > 0) { | |
83582009 | 1302 | pr_err("V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n"); |
1da177e4 LT |
1303 | return -EINVAL; |
1304 | } | |
b12262f9 | 1305 | f->fmt.win = dev->win; |
3a0a5a78 HV |
1306 | f->fmt.win.clips = clips; |
1307 | if (clips == NULL) | |
1308 | clipcount = 0; | |
1309 | if (dev->nclips < clipcount) | |
1310 | clipcount = dev->nclips; | |
1311 | f->fmt.win.clipcount = clipcount; | |
1312 | ||
1313 | for (i = 0; !err && i < clipcount; i++) { | |
1314 | if (copy_to_user(&f->fmt.win.clips[i].c, &dev->clips[i].c, | |
1315 | sizeof(struct v4l2_rect))) | |
1316 | err = -EFAULT; | |
1317 | } | |
8c85454a | 1318 | |
3a0a5a78 | 1319 | return err; |
1da177e4 LT |
1320 | } |
1321 | ||
78b526a4 | 1322 | static int saa7134_try_fmt_vid_cap(struct file *file, void *priv, |
8f61ae2f | 1323 | struct v4l2_format *f) |
1da177e4 | 1324 | { |
b9f63b25 | 1325 | struct saa7134_dev *dev = video_drvdata(file); |
8c85454a MCC |
1326 | struct saa7134_format *fmt; |
1327 | enum v4l2_field field; | |
1328 | unsigned int maxw, maxh; | |
1da177e4 | 1329 | |
8c85454a MCC |
1330 | fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
1331 | if (NULL == fmt) | |
1332 | return -EINVAL; | |
1da177e4 | 1333 | |
8c85454a MCC |
1334 | field = f->fmt.pix.field; |
1335 | maxw = min(dev->crop_current.width*4, dev->crop_bounds.width); | |
1336 | maxh = min(dev->crop_current.height*4, dev->crop_bounds.height); | |
1da177e4 | 1337 | |
8c85454a MCC |
1338 | if (V4L2_FIELD_ANY == field) { |
1339 | field = (f->fmt.pix.height > maxh/2) | |
1340 | ? V4L2_FIELD_INTERLACED | |
1341 | : V4L2_FIELD_BOTTOM; | |
1342 | } | |
1343 | switch (field) { | |
1344 | case V4L2_FIELD_TOP: | |
1345 | case V4L2_FIELD_BOTTOM: | |
1346 | maxh = maxh / 2; | |
1347 | break; | |
8c85454a | 1348 | default: |
3a0a5a78 HV |
1349 | field = V4L2_FIELD_INTERLACED; |
1350 | break; | |
8c85454a | 1351 | } |
1da177e4 | 1352 | |
8c85454a | 1353 | f->fmt.pix.field = field; |
0a062033 HRK |
1354 | if (f->fmt.pix.width < 48) |
1355 | f->fmt.pix.width = 48; | |
1356 | if (f->fmt.pix.height < 32) | |
1357 | f->fmt.pix.height = 32; | |
1358 | if (f->fmt.pix.width > maxw) | |
1359 | f->fmt.pix.width = maxw; | |
1360 | if (f->fmt.pix.height > maxh) | |
1361 | f->fmt.pix.height = maxh; | |
1362 | f->fmt.pix.width &= ~0x03; | |
3e71da19 HG |
1363 | if (fmt->planar) |
1364 | f->fmt.pix.bytesperline = f->fmt.pix.width; | |
1365 | else | |
1366 | f->fmt.pix.bytesperline = | |
1367 | (f->fmt.pix.width * fmt->depth) / 8; | |
8c85454a | 1368 | f->fmt.pix.sizeimage = |
3e71da19 | 1369 | (f->fmt.pix.height * f->fmt.pix.width * fmt->depth) / 8; |
3a0a5a78 | 1370 | f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M; |
1da177e4 | 1371 | |
8c85454a MCC |
1372 | return 0; |
1373 | } | |
1da177e4 | 1374 | |
78b526a4 | 1375 | static int saa7134_try_fmt_vid_overlay(struct file *file, void *priv, |
8c85454a MCC |
1376 | struct v4l2_format *f) |
1377 | { | |
b9f63b25 | 1378 | struct saa7134_dev *dev = video_drvdata(file); |
8c85454a MCC |
1379 | |
1380 | if (saa7134_no_overlay > 0) { | |
83582009 | 1381 | pr_err("V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n"); |
1da177e4 LT |
1382 | return -EINVAL; |
1383 | } | |
8c85454a | 1384 | |
3a0a5a78 HV |
1385 | if (f->fmt.win.clips == NULL) |
1386 | f->fmt.win.clipcount = 0; | |
1387 | return verify_preview(dev, &f->fmt.win, true); | |
1da177e4 LT |
1388 | } |
1389 | ||
78b526a4 | 1390 | static int saa7134_s_fmt_vid_cap(struct file *file, void *priv, |
8f61ae2f | 1391 | struct v4l2_format *f) |
8c85454a | 1392 | { |
b9f63b25 | 1393 | struct saa7134_dev *dev = video_drvdata(file); |
8c85454a MCC |
1394 | int err; |
1395 | ||
78b526a4 | 1396 | err = saa7134_try_fmt_vid_cap(file, priv, f); |
8c85454a MCC |
1397 | if (0 != err) |
1398 | return err; | |
1399 | ||
e72936d2 HV |
1400 | dev->fmt = format_by_fourcc(f->fmt.pix.pixelformat); |
1401 | dev->width = f->fmt.pix.width; | |
1402 | dev->height = f->fmt.pix.height; | |
2ada815f | 1403 | dev->field = f->fmt.pix.field; |
8c85454a MCC |
1404 | return 0; |
1405 | } | |
1406 | ||
78b526a4 | 1407 | static int saa7134_s_fmt_vid_overlay(struct file *file, void *priv, |
8c85454a | 1408 | struct v4l2_format *f) |
1da177e4 | 1409 | { |
b9f63b25 | 1410 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1411 | int err; |
a8b1ecf3 | 1412 | unsigned long flags; |
1da177e4 | 1413 | |
8c85454a | 1414 | if (saa7134_no_overlay > 0) { |
83582009 | 1415 | pr_err("V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n"); |
8c85454a MCC |
1416 | return -EINVAL; |
1417 | } | |
3a0a5a78 HV |
1418 | if (f->fmt.win.clips == NULL) |
1419 | f->fmt.win.clipcount = 0; | |
1420 | err = verify_preview(dev, &f->fmt.win, true); | |
8c85454a MCC |
1421 | if (0 != err) |
1422 | return err; | |
1da177e4 | 1423 | |
b12262f9 HV |
1424 | dev->win = f->fmt.win; |
1425 | dev->nclips = f->fmt.win.clipcount; | |
8c85454a | 1426 | |
b12262f9 | 1427 | if (copy_from_user(dev->clips, f->fmt.win.clips, |
2ada815f | 1428 | sizeof(struct v4l2_clip) * dev->nclips)) |
8c85454a | 1429 | return -EFAULT; |
8c85454a | 1430 | |
2ada815f | 1431 | if (priv == dev->overlay_owner) { |
8c85454a | 1432 | spin_lock_irqsave(&dev->slock, flags); |
718bde1a HV |
1433 | stop_preview(dev); |
1434 | start_preview(dev); | |
8c85454a MCC |
1435 | spin_unlock_irqrestore(&dev->slock, flags); |
1436 | } | |
1437 | ||
8c85454a | 1438 | return 0; |
1da177e4 LT |
1439 | } |
1440 | ||
b93a18d5 | 1441 | int saa7134_enum_input(struct file *file, void *priv, struct v4l2_input *i) |
1da177e4 | 1442 | { |
b93a18d5 | 1443 | struct saa7134_dev *dev = video_drvdata(file); |
8f61ae2f | 1444 | unsigned int n; |
1da177e4 | 1445 | |
8f61ae2f DSL |
1446 | n = i->index; |
1447 | if (n >= SAA7134_INPUT_MAX) | |
1448 | return -EINVAL; | |
8fc34867 | 1449 | if (card_in(dev, i->index).type == SAA7134_NO_INPUT) |
8f61ae2f | 1450 | return -EINVAL; |
8f61ae2f | 1451 | i->index = n; |
8fc34867 | 1452 | strcpy(i->name, saa7134_input_name[card_in(dev, n).type]); |
8bf77f9e MCC |
1453 | switch (card_in(dev, n).type) { |
1454 | case SAA7134_INPUT_TV: | |
1455 | case SAA7134_INPUT_TV_MONO: | |
8f61ae2f | 1456 | i->type = V4L2_INPUT_TYPE_TUNER; |
8bf77f9e MCC |
1457 | break; |
1458 | default: | |
1459 | i->type = V4L2_INPUT_TYPE_CAMERA; | |
1460 | break; | |
1461 | } | |
8f61ae2f DSL |
1462 | if (n == dev->ctl_input) { |
1463 | int v1 = saa_readb(SAA7134_STATUS_VIDEO1); | |
1464 | int v2 = saa_readb(SAA7134_STATUS_VIDEO2); | |
1465 | ||
1466 | if (0 != (v1 & 0x40)) | |
1467 | i->status |= V4L2_IN_ST_NO_H_LOCK; | |
1468 | if (0 != (v2 & 0x40)) | |
95075dd0 | 1469 | i->status |= V4L2_IN_ST_NO_SIGNAL; |
8f61ae2f DSL |
1470 | if (0 != (v2 & 0x0e)) |
1471 | i->status |= V4L2_IN_ST_MACROVISION; | |
1472 | } | |
8c85454a | 1473 | i->std = SAA7134_NORMS; |
8f61ae2f DSL |
1474 | return 0; |
1475 | } | |
b93a18d5 | 1476 | EXPORT_SYMBOL_GPL(saa7134_enum_input); |
1da177e4 | 1477 | |
b93a18d5 | 1478 | int saa7134_g_input(struct file *file, void *priv, unsigned int *i) |
90bdc145 | 1479 | { |
b93a18d5 | 1480 | struct saa7134_dev *dev = video_drvdata(file); |
90bdc145 MCC |
1481 | |
1482 | *i = dev->ctl_input; | |
1483 | return 0; | |
1484 | } | |
b93a18d5 | 1485 | EXPORT_SYMBOL_GPL(saa7134_g_input); |
90bdc145 | 1486 | |
b93a18d5 | 1487 | int saa7134_s_input(struct file *file, void *priv, unsigned int i) |
90bdc145 | 1488 | { |
b93a18d5 | 1489 | struct saa7134_dev *dev = video_drvdata(file); |
90bdc145 | 1490 | |
de81c3c3 | 1491 | if (i >= SAA7134_INPUT_MAX) |
90bdc145 | 1492 | return -EINVAL; |
8fc34867 | 1493 | if (card_in(dev, i).type == SAA7134_NO_INPUT) |
90bdc145 | 1494 | return -EINVAL; |
90bdc145 | 1495 | video_mux(dev, i); |
90bdc145 MCC |
1496 | return 0; |
1497 | } | |
b93a18d5 | 1498 | EXPORT_SYMBOL_GPL(saa7134_s_input); |
90bdc145 | 1499 | |
b93a18d5 | 1500 | int saa7134_querycap(struct file *file, void *priv, |
8f61ae2f DSL |
1501 | struct v4l2_capability *cap) |
1502 | { | |
b93a18d5 | 1503 | struct saa7134_dev *dev = video_drvdata(file); |
c3b3e0c5 OZ |
1504 | struct video_device *vdev = video_devdata(file); |
1505 | u32 radio_caps, video_caps, vbi_caps; | |
1da177e4 | 1506 | |
8f61ae2f DSL |
1507 | unsigned int tuner_type = dev->tuner_type; |
1508 | ||
8f61ae2f DSL |
1509 | strcpy(cap->driver, "saa7134"); |
1510 | strlcpy(cap->card, saa7134_boards[dev->board].name, | |
1511 | sizeof(cap->card)); | |
1512 | sprintf(cap->bus_info, "PCI:%s", pci_name(dev->pci)); | |
c3b3e0c5 OZ |
1513 | |
1514 | cap->device_caps = V4L2_CAP_READWRITE | V4L2_CAP_STREAMING; | |
1515 | if ((tuner_type != TUNER_ABSENT) && (tuner_type != UNSET)) | |
1516 | cap->device_caps |= V4L2_CAP_TUNER; | |
1517 | ||
1518 | radio_caps = V4L2_CAP_RADIO; | |
f101a2a7 | 1519 | if (dev->has_rds) |
c3b3e0c5 OZ |
1520 | radio_caps |= V4L2_CAP_RDS_CAPTURE; |
1521 | ||
1522 | video_caps = V4L2_CAP_VIDEO_CAPTURE; | |
2ada815f | 1523 | if (saa7134_no_overlay <= 0 && !is_empress(file)) |
c3b3e0c5 OZ |
1524 | video_caps |= V4L2_CAP_VIDEO_OVERLAY; |
1525 | ||
1526 | vbi_caps = V4L2_CAP_VBI_CAPTURE; | |
1527 | ||
1528 | switch (vdev->vfl_type) { | |
1529 | case VFL_TYPE_RADIO: | |
1530 | cap->device_caps |= radio_caps; | |
1531 | break; | |
1532 | case VFL_TYPE_GRABBER: | |
1533 | cap->device_caps |= video_caps; | |
1534 | break; | |
1535 | case VFL_TYPE_VBI: | |
1536 | cap->device_caps |= vbi_caps; | |
1537 | break; | |
1538 | } | |
1539 | cap->capabilities = radio_caps | video_caps | vbi_caps | | |
1540 | cap->device_caps | V4L2_CAP_DEVICE_CAPS; | |
1541 | if (vdev->vfl_type == VFL_TYPE_RADIO) { | |
1542 | cap->device_caps &= ~V4L2_CAP_STREAMING; | |
1543 | if (!dev->has_rds) | |
1544 | cap->device_caps &= ~V4L2_CAP_READWRITE; | |
1545 | } | |
8f61ae2f | 1546 | |
473d8024 | 1547 | return 0; |
8f61ae2f | 1548 | } |
b93a18d5 | 1549 | EXPORT_SYMBOL_GPL(saa7134_querycap); |
bb881f14 | 1550 | |
b93a18d5 | 1551 | int saa7134_s_std(struct file *file, void *priv, v4l2_std_id id) |
8f61ae2f | 1552 | { |
b93a18d5 | 1553 | struct saa7134_dev *dev = video_drvdata(file); |
2ada815f | 1554 | struct v4l2_fh *fh = priv; |
8f61ae2f DSL |
1555 | unsigned long flags; |
1556 | unsigned int i; | |
1557 | v4l2_std_id fixup; | |
8c85454a | 1558 | |
2ada815f | 1559 | if (is_empress(file) && dev->overlay_owner) { |
9afb7377 HV |
1560 | /* Don't change the std from the mpeg device |
1561 | if overlay is active. */ | |
1562 | return -EBUSY; | |
1563 | } | |
bb881f14 | 1564 | |
8f61ae2f | 1565 | for (i = 0; i < TVNORMS; i++) |
314527ac | 1566 | if (id == tvnorms[i].id) |
8f61ae2f | 1567 | break; |
8c85454a | 1568 | |
8f61ae2f DSL |
1569 | if (i == TVNORMS) |
1570 | for (i = 0; i < TVNORMS; i++) | |
314527ac | 1571 | if (id & tvnorms[i].id) |
8f61ae2f DSL |
1572 | break; |
1573 | if (i == TVNORMS) | |
1574 | return -EINVAL; | |
8c85454a | 1575 | |
314527ac | 1576 | if ((id & V4L2_STD_SECAM) && (secam[0] != '-')) { |
8f61ae2f DSL |
1577 | if (secam[0] == 'L' || secam[0] == 'l') { |
1578 | if (secam[1] == 'C' || secam[1] == 'c') | |
1579 | fixup = V4L2_STD_SECAM_LC; | |
1580 | else | |
1581 | fixup = V4L2_STD_SECAM_L; | |
1582 | } else { | |
1583 | if (secam[0] == 'D' || secam[0] == 'd') | |
1584 | fixup = V4L2_STD_SECAM_DK; | |
1585 | else | |
1586 | fixup = V4L2_STD_SECAM; | |
1587 | } | |
06e6588e | 1588 | for (i = 0; i < TVNORMS; i++) { |
8f61ae2f DSL |
1589 | if (fixup == tvnorms[i].id) |
1590 | break; | |
06e6588e DC |
1591 | } |
1592 | if (i == TVNORMS) | |
1593 | return -EINVAL; | |
1da177e4 | 1594 | } |
8c85454a | 1595 | |
314527ac | 1596 | id = tvnorms[i].id; |
8c85454a | 1597 | |
2ada815f | 1598 | if (!is_empress(file) && fh == dev->overlay_owner) { |
8f61ae2f | 1599 | spin_lock_irqsave(&dev->slock, flags); |
718bde1a | 1600 | stop_preview(dev); |
8f61ae2f DSL |
1601 | spin_unlock_irqrestore(&dev->slock, flags); |
1602 | ||
1603 | set_tvnorm(dev, &tvnorms[i]); | |
1604 | ||
1605 | spin_lock_irqsave(&dev->slock, flags); | |
718bde1a | 1606 | start_preview(dev); |
8f61ae2f DSL |
1607 | spin_unlock_irqrestore(&dev->slock, flags); |
1608 | } else | |
1609 | set_tvnorm(dev, &tvnorms[i]); | |
8c85454a | 1610 | |
8f61ae2f | 1611 | saa7134_tvaudio_do_scan(dev); |
8f61ae2f DSL |
1612 | return 0; |
1613 | } | |
b93a18d5 | 1614 | EXPORT_SYMBOL_GPL(saa7134_s_std); |
9afb7377 | 1615 | |
b93a18d5 | 1616 | int saa7134_g_std(struct file *file, void *priv, v4l2_std_id *id) |
9afb7377 | 1617 | { |
b93a18d5 | 1618 | struct saa7134_dev *dev = video_drvdata(file); |
9afb7377 HV |
1619 | |
1620 | *id = dev->tvnorm->id; | |
1621 | return 0; | |
1622 | } | |
b93a18d5 | 1623 | EXPORT_SYMBOL_GPL(saa7134_g_std); |
1da177e4 | 1624 | |
707b7f80 MD |
1625 | static v4l2_std_id saa7134_read_std(struct saa7134_dev *dev) |
1626 | { | |
1627 | static v4l2_std_id stds[] = { | |
1628 | V4L2_STD_UNKNOWN, | |
1629 | V4L2_STD_NTSC, | |
1630 | V4L2_STD_PAL, | |
1631 | V4L2_STD_SECAM }; | |
1632 | ||
1633 | v4l2_std_id result = 0; | |
1634 | ||
1635 | u8 st1 = saa_readb(SAA7134_STATUS_VIDEO1); | |
1636 | u8 st2 = saa_readb(SAA7134_STATUS_VIDEO2); | |
1637 | ||
1638 | if (!(st2 & 0x1)) /* RDCAP == 0 */ | |
1639 | result = V4L2_STD_UNKNOWN; | |
1640 | else | |
1641 | result = stds[st1 & 0x03]; | |
1642 | ||
1643 | return result; | |
1644 | } | |
1645 | ||
1646 | int saa7134_querystd(struct file *file, void *priv, v4l2_std_id *std) | |
1647 | { | |
1648 | struct saa7134_dev *dev = video_drvdata(file); | |
1649 | *std &= saa7134_read_std(dev); | |
1650 | return 0; | |
1651 | } | |
1652 | EXPORT_SYMBOL_GPL(saa7134_querystd); | |
1653 | ||
bfb12e38 | 1654 | static int saa7134_cropcap(struct file *file, void *priv, |
8f61ae2f DSL |
1655 | struct v4l2_cropcap *cap) |
1656 | { | |
b9f63b25 | 1657 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1658 | |
8f61ae2f DSL |
1659 | if (cap->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && |
1660 | cap->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) | |
1661 | return -EINVAL; | |
8f61ae2f DSL |
1662 | cap->pixelaspect.numerator = 1; |
1663 | cap->pixelaspect.denominator = 1; | |
1664 | if (dev->tvnorm->id & V4L2_STD_525_60) { | |
1665 | cap->pixelaspect.numerator = 11; | |
1666 | cap->pixelaspect.denominator = 10; | |
1667 | } | |
1668 | if (dev->tvnorm->id & V4L2_STD_625_50) { | |
1669 | cap->pixelaspect.numerator = 54; | |
1670 | cap->pixelaspect.denominator = 59; | |
1da177e4 | 1671 | } |
8f61ae2f DSL |
1672 | return 0; |
1673 | } | |
1da177e4 | 1674 | |
802d62c1 | 1675 | static int saa7134_g_selection(struct file *file, void *f, struct v4l2_selection *sel) |
90bdc145 | 1676 | { |
b9f63b25 | 1677 | struct saa7134_dev *dev = video_drvdata(file); |
90bdc145 | 1678 | |
802d62c1 HV |
1679 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && |
1680 | sel->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) | |
90bdc145 | 1681 | return -EINVAL; |
802d62c1 HV |
1682 | |
1683 | switch (sel->target) { | |
1684 | case V4L2_SEL_TGT_CROP: | |
1685 | sel->r = dev->crop_current; | |
1686 | break; | |
1687 | case V4L2_SEL_TGT_CROP_DEFAULT: | |
1688 | sel->r = dev->crop_defrect; | |
1689 | break; | |
1690 | case V4L2_SEL_TGT_CROP_BOUNDS: | |
1691 | sel->r = dev->crop_bounds; | |
1692 | break; | |
1693 | default: | |
1694 | return -EINVAL; | |
1695 | } | |
90bdc145 MCC |
1696 | return 0; |
1697 | } | |
1698 | ||
802d62c1 | 1699 | static int saa7134_s_selection(struct file *file, void *f, struct v4l2_selection *sel) |
90bdc145 | 1700 | { |
b9f63b25 | 1701 | struct saa7134_dev *dev = video_drvdata(file); |
90bdc145 | 1702 | struct v4l2_rect *b = &dev->crop_bounds; |
4f996594 | 1703 | struct v4l2_rect *c = &dev->crop_current; |
90bdc145 | 1704 | |
802d62c1 HV |
1705 | if (sel->type != V4L2_BUF_TYPE_VIDEO_CAPTURE && |
1706 | sel->type != V4L2_BUF_TYPE_VIDEO_OVERLAY) | |
1707 | return -EINVAL; | |
1708 | ||
1709 | if (sel->target != V4L2_SEL_TGT_CROP) | |
90bdc145 | 1710 | return -EINVAL; |
90bdc145 | 1711 | |
2ada815f | 1712 | if (dev->overlay_owner) |
90bdc145 | 1713 | return -EBUSY; |
2ada815f | 1714 | if (vb2_is_streaming(&dev->video_vbq)) |
90bdc145 MCC |
1715 | return -EBUSY; |
1716 | ||
802d62c1 | 1717 | *c = sel->r; |
4f996594 HV |
1718 | if (c->top < b->top) |
1719 | c->top = b->top; | |
1720 | if (c->top > b->top + b->height) | |
1721 | c->top = b->top + b->height; | |
1722 | if (c->height > b->top - c->top + b->height) | |
1723 | c->height = b->top - c->top + b->height; | |
1724 | ||
1725 | if (c->left < b->left) | |
1726 | c->left = b->left; | |
1727 | if (c->left > b->left + b->width) | |
1728 | c->left = b->left + b->width; | |
1729 | if (c->width > b->left - c->left + b->width) | |
1730 | c->width = b->left - c->left + b->width; | |
802d62c1 | 1731 | sel->r = *c; |
90bdc145 MCC |
1732 | return 0; |
1733 | } | |
1734 | ||
b93a18d5 | 1735 | int saa7134_g_tuner(struct file *file, void *priv, |
8f61ae2f DSL |
1736 | struct v4l2_tuner *t) |
1737 | { | |
b93a18d5 | 1738 | struct saa7134_dev *dev = video_drvdata(file); |
8f61ae2f | 1739 | int n; |
1da177e4 | 1740 | |
8f61ae2f DSL |
1741 | if (0 != t->index) |
1742 | return -EINVAL; | |
1743 | memset(t, 0, sizeof(*t)); | |
06e6588e | 1744 | for (n = 0; n < SAA7134_INPUT_MAX; n++) { |
8bf77f9e MCC |
1745 | if (card_in(dev, n).type == SAA7134_INPUT_TV || |
1746 | card_in(dev, n).type == SAA7134_INPUT_TV_MONO) | |
8f61ae2f | 1747 | break; |
06e6588e DC |
1748 | } |
1749 | if (n == SAA7134_INPUT_MAX) | |
1750 | return -EINVAL; | |
8fc34867 | 1751 | if (card_in(dev, n).type != SAA7134_NO_INPUT) { |
8f61ae2f DSL |
1752 | strcpy(t->name, "Television"); |
1753 | t->type = V4L2_TUNER_ANALOG_TV; | |
ce5bdd52 | 1754 | saa_call_all(dev, tuner, g_tuner, t); |
8f61ae2f DSL |
1755 | t->capability = V4L2_TUNER_CAP_NORM | |
1756 | V4L2_TUNER_CAP_STEREO | | |
1757 | V4L2_TUNER_CAP_LANG1 | | |
1758 | V4L2_TUNER_CAP_LANG2; | |
8f61ae2f DSL |
1759 | t->rxsubchans = saa7134_tvaudio_getstereo(dev); |
1760 | t->audmode = saa7134_tvaudio_rx2mode(t->rxsubchans); | |
1761 | } | |
1762 | if (0 != (saa_readb(SAA7134_STATUS_VIDEO1) & 0x03)) | |
1763 | t->signal = 0xffff; | |
1764 | return 0; | |
1765 | } | |
b93a18d5 | 1766 | EXPORT_SYMBOL_GPL(saa7134_g_tuner); |
b4aeb8b8 | 1767 | |
b93a18d5 | 1768 | int saa7134_s_tuner(struct file *file, void *priv, |
2f73c7c5 | 1769 | const struct v4l2_tuner *t) |
8f61ae2f | 1770 | { |
b93a18d5 | 1771 | struct saa7134_dev *dev = video_drvdata(file); |
3bbaa3a6 | 1772 | int rx, mode; |
b4aeb8b8 | 1773 | |
ce5bdd52 OZ |
1774 | if (0 != t->index) |
1775 | return -EINVAL; | |
1776 | ||
8f61ae2f DSL |
1777 | mode = dev->thread.mode; |
1778 | if (UNSET == mode) { | |
1779 | rx = saa7134_tvaudio_getstereo(dev); | |
e92ba283 | 1780 | mode = saa7134_tvaudio_rx2mode(rx); |
1da177e4 | 1781 | } |
8f61ae2f DSL |
1782 | if (mode != t->audmode) |
1783 | dev->thread.mode = t->audmode; | |
8c85454a | 1784 | |
8f61ae2f DSL |
1785 | return 0; |
1786 | } | |
b93a18d5 | 1787 | EXPORT_SYMBOL_GPL(saa7134_s_tuner); |
1da177e4 | 1788 | |
b93a18d5 | 1789 | int saa7134_g_frequency(struct file *file, void *priv, |
8f61ae2f DSL |
1790 | struct v4l2_frequency *f) |
1791 | { | |
b93a18d5 | 1792 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1793 | |
0a5ea88b OZ |
1794 | if (0 != f->tuner) |
1795 | return -EINVAL; | |
1796 | ||
0a5ea88b | 1797 | saa_call_all(dev, tuner, g_frequency, f); |
8c85454a | 1798 | |
8f61ae2f DSL |
1799 | return 0; |
1800 | } | |
b93a18d5 | 1801 | EXPORT_SYMBOL_GPL(saa7134_g_frequency); |
1da177e4 | 1802 | |
b93a18d5 | 1803 | int saa7134_s_frequency(struct file *file, void *priv, |
b530a447 | 1804 | const struct v4l2_frequency *f) |
8f61ae2f | 1805 | { |
b93a18d5 | 1806 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1807 | |
8f61ae2f DSL |
1808 | if (0 != f->tuner) |
1809 | return -EINVAL; | |
1da177e4 | 1810 | |
fac6986c | 1811 | saa_call_all(dev, tuner, s_frequency, f); |
1da177e4 | 1812 | |
8f61ae2f | 1813 | saa7134_tvaudio_do_scan(dev); |
8f61ae2f DSL |
1814 | return 0; |
1815 | } | |
b93a18d5 | 1816 | EXPORT_SYMBOL_GPL(saa7134_s_frequency); |
1da177e4 | 1817 | |
78b526a4 | 1818 | static int saa7134_enum_fmt_vid_cap(struct file *file, void *priv, |
90bdc145 | 1819 | struct v4l2_fmtdesc *f) |
8f61ae2f | 1820 | { |
8c85454a MCC |
1821 | if (f->index >= FORMATS) |
1822 | return -EINVAL; | |
1da177e4 | 1823 | |
8c85454a MCC |
1824 | strlcpy(f->description, formats[f->index].name, |
1825 | sizeof(f->description)); | |
1da177e4 | 1826 | |
8c85454a | 1827 | f->pixelformat = formats[f->index].fourcc; |
1da177e4 | 1828 | |
8c85454a MCC |
1829 | return 0; |
1830 | } | |
1831 | ||
78b526a4 | 1832 | static int saa7134_enum_fmt_vid_overlay(struct file *file, void *priv, |
8c85454a MCC |
1833 | struct v4l2_fmtdesc *f) |
1834 | { | |
1835 | if (saa7134_no_overlay > 0) { | |
83582009 | 1836 | pr_err("V4L2_BUF_TYPE_VIDEO_OVERLAY: no_overlay\n"); |
90bdc145 MCC |
1837 | return -EINVAL; |
1838 | } | |
8c85454a MCC |
1839 | |
1840 | if ((f->index >= FORMATS) || formats[f->index].planar) | |
1841 | return -EINVAL; | |
1842 | ||
1843 | strlcpy(f->description, formats[f->index].name, | |
1844 | sizeof(f->description)); | |
1845 | ||
1846 | f->pixelformat = formats[f->index].fourcc; | |
1847 | ||
1848 | return 0; | |
1849 | } | |
1850 | ||
bfb12e38 | 1851 | static int saa7134_g_fbuf(struct file *file, void *f, |
8f61ae2f DSL |
1852 | struct v4l2_framebuffer *fb) |
1853 | { | |
b9f63b25 | 1854 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1855 | |
8f61ae2f DSL |
1856 | *fb = dev->ovbuf; |
1857 | fb->capability = V4L2_FBUF_CAP_LIST_CLIPPING; | |
ecb73774 | 1858 | |
8f61ae2f DSL |
1859 | return 0; |
1860 | } | |
1da177e4 | 1861 | |
bfb12e38 | 1862 | static int saa7134_s_fbuf(struct file *file, void *f, |
e6eb28c2 | 1863 | const struct v4l2_framebuffer *fb) |
8f61ae2f | 1864 | { |
b9f63b25 | 1865 | struct saa7134_dev *dev = video_drvdata(file); |
8f61ae2f DSL |
1866 | struct saa7134_format *fmt; |
1867 | ||
1868 | if (!capable(CAP_SYS_ADMIN) && | |
1869 | !capable(CAP_SYS_RAWIO)) | |
1870 | return -EPERM; | |
1da177e4 | 1871 | |
8f61ae2f DSL |
1872 | /* check args */ |
1873 | fmt = format_by_fourcc(fb->fmt.pixelformat); | |
1874 | if (NULL == fmt) | |
1875 | return -EINVAL; | |
1da177e4 | 1876 | |
8f61ae2f DSL |
1877 | /* ok, accept it */ |
1878 | dev->ovbuf = *fb; | |
1879 | dev->ovfmt = fmt; | |
1880 | if (0 == dev->ovbuf.fmt.bytesperline) | |
1881 | dev->ovbuf.fmt.bytesperline = | |
1882 | dev->ovbuf.fmt.width*fmt->depth/8; | |
1883 | return 0; | |
1884 | } | |
1da177e4 | 1885 | |
b9f63b25 | 1886 | static int saa7134_overlay(struct file *file, void *priv, unsigned int on) |
8f61ae2f | 1887 | { |
b9f63b25 | 1888 | struct saa7134_dev *dev = video_drvdata(file); |
8f61ae2f DSL |
1889 | unsigned long flags; |
1890 | ||
1891 | if (on) { | |
1892 | if (saa7134_no_overlay > 0) { | |
630983b7 | 1893 | video_dbg("no_overlay\n"); |
8f61ae2f DSL |
1894 | return -EINVAL; |
1895 | } | |
1da177e4 | 1896 | |
2ada815f | 1897 | if (dev->overlay_owner && priv != dev->overlay_owner) |
1da177e4 | 1898 | return -EBUSY; |
2ada815f | 1899 | dev->overlay_owner = priv; |
8f61ae2f | 1900 | spin_lock_irqsave(&dev->slock, flags); |
718bde1a | 1901 | start_preview(dev); |
8f61ae2f | 1902 | spin_unlock_irqrestore(&dev->slock, flags); |
1da177e4 | 1903 | } |
8f61ae2f | 1904 | if (!on) { |
2ada815f | 1905 | if (priv != dev->overlay_owner) |
8f61ae2f DSL |
1906 | return -EINVAL; |
1907 | spin_lock_irqsave(&dev->slock, flags); | |
718bde1a | 1908 | stop_preview(dev); |
8f61ae2f | 1909 | spin_unlock_irqrestore(&dev->slock, flags); |
2ada815f | 1910 | dev->overlay_owner = NULL; |
1da177e4 | 1911 | } |
8f61ae2f DSL |
1912 | return 0; |
1913 | } | |
1914 | ||
c121ba1f MCC |
1915 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
1916 | static int vidioc_g_register (struct file *file, void *priv, | |
aecde8b5 | 1917 | struct v4l2_dbg_register *reg) |
c121ba1f | 1918 | { |
b9f63b25 | 1919 | struct saa7134_dev *dev = video_drvdata(file); |
c121ba1f | 1920 | |
b8300702 | 1921 | reg->val = saa_readb(reg->reg & 0xffffff); |
aecde8b5 | 1922 | reg->size = 1; |
c121ba1f MCC |
1923 | return 0; |
1924 | } | |
1925 | ||
1926 | static int vidioc_s_register (struct file *file, void *priv, | |
977ba3b1 | 1927 | const struct v4l2_dbg_register *reg) |
c121ba1f | 1928 | { |
b9f63b25 | 1929 | struct saa7134_dev *dev = video_drvdata(file); |
c121ba1f | 1930 | |
b8300702 | 1931 | saa_writeb(reg->reg & 0xffffff, reg->val); |
c121ba1f MCC |
1932 | return 0; |
1933 | } | |
1934 | #endif | |
1935 | ||
8f61ae2f DSL |
1936 | static int radio_g_tuner(struct file *file, void *priv, |
1937 | struct v4l2_tuner *t) | |
1938 | { | |
b9f63b25 | 1939 | struct saa7134_dev *dev = video_drvdata(file); |
1da177e4 | 1940 | |
8f61ae2f DSL |
1941 | if (0 != t->index) |
1942 | return -EINVAL; | |
1da177e4 | 1943 | |
8f61ae2f | 1944 | strcpy(t->name, "Radio"); |
8f61ae2f | 1945 | |
fac6986c | 1946 | saa_call_all(dev, tuner, g_tuner, t); |
82456708 | 1947 | t->audmode &= V4L2_TUNER_MODE_MONO | V4L2_TUNER_MODE_STEREO; |
8f61ae2f DSL |
1948 | if (dev->input->amux == TV) { |
1949 | t->signal = 0xf800 - ((saa_readb(0x581) & 0x1f) << 11); | |
1950 | t->rxsubchans = (saa_readb(0x529) & 0x08) ? | |
1951 | V4L2_TUNER_SUB_STEREO : V4L2_TUNER_SUB_MONO; | |
ac19ecc6 | 1952 | } |
8f61ae2f DSL |
1953 | return 0; |
1954 | } | |
1955 | static int radio_s_tuner(struct file *file, void *priv, | |
2f73c7c5 | 1956 | const struct v4l2_tuner *t) |
8f61ae2f | 1957 | { |
b9f63b25 | 1958 | struct saa7134_dev *dev = video_drvdata(file); |
ac19ecc6 | 1959 | |
8f61ae2f DSL |
1960 | if (0 != t->index) |
1961 | return -EINVAL; | |
1962 | ||
fac6986c | 1963 | saa_call_all(dev, tuner, s_tuner, t); |
8f61ae2f DSL |
1964 | return 0; |
1965 | } | |
ac19ecc6 | 1966 | |
bec43661 | 1967 | static const struct v4l2_file_operations video_fops = |
1da177e4 LT |
1968 | { |
1969 | .owner = THIS_MODULE, | |
1970 | .open = video_open, | |
1971 | .release = video_release, | |
2ada815f HV |
1972 | .read = vb2_fop_read, |
1973 | .poll = vb2_fop_poll, | |
1974 | .mmap = vb2_fop_mmap, | |
1975 | .unlocked_ioctl = video_ioctl2, | |
1da177e4 LT |
1976 | }; |
1977 | ||
a399810c | 1978 | static const struct v4l2_ioctl_ops video_ioctl_ops = { |
bfb12e38 | 1979 | .vidioc_querycap = saa7134_querycap, |
78b526a4 HV |
1980 | .vidioc_enum_fmt_vid_cap = saa7134_enum_fmt_vid_cap, |
1981 | .vidioc_g_fmt_vid_cap = saa7134_g_fmt_vid_cap, | |
1982 | .vidioc_try_fmt_vid_cap = saa7134_try_fmt_vid_cap, | |
1983 | .vidioc_s_fmt_vid_cap = saa7134_s_fmt_vid_cap, | |
1984 | .vidioc_enum_fmt_vid_overlay = saa7134_enum_fmt_vid_overlay, | |
1985 | .vidioc_g_fmt_vid_overlay = saa7134_g_fmt_vid_overlay, | |
1986 | .vidioc_try_fmt_vid_overlay = saa7134_try_fmt_vid_overlay, | |
1987 | .vidioc_s_fmt_vid_overlay = saa7134_s_fmt_vid_overlay, | |
78b526a4 HV |
1988 | .vidioc_g_fmt_vbi_cap = saa7134_try_get_set_fmt_vbi_cap, |
1989 | .vidioc_try_fmt_vbi_cap = saa7134_try_get_set_fmt_vbi_cap, | |
1990 | .vidioc_s_fmt_vbi_cap = saa7134_try_get_set_fmt_vbi_cap, | |
bfb12e38 | 1991 | .vidioc_cropcap = saa7134_cropcap, |
2ada815f HV |
1992 | .vidioc_reqbufs = vb2_ioctl_reqbufs, |
1993 | .vidioc_querybuf = vb2_ioctl_querybuf, | |
1994 | .vidioc_qbuf = vb2_ioctl_qbuf, | |
1995 | .vidioc_dqbuf = vb2_ioctl_dqbuf, | |
9f183020 | 1996 | .vidioc_expbuf = vb2_ioctl_expbuf, |
bfb12e38 | 1997 | .vidioc_s_std = saa7134_s_std, |
9afb7377 | 1998 | .vidioc_g_std = saa7134_g_std, |
707b7f80 | 1999 | .vidioc_querystd = saa7134_querystd, |
bfb12e38 MCC |
2000 | .vidioc_enum_input = saa7134_enum_input, |
2001 | .vidioc_g_input = saa7134_g_input, | |
2002 | .vidioc_s_input = saa7134_s_input, | |
2ada815f HV |
2003 | .vidioc_streamon = vb2_ioctl_streamon, |
2004 | .vidioc_streamoff = vb2_ioctl_streamoff, | |
bfb12e38 MCC |
2005 | .vidioc_g_tuner = saa7134_g_tuner, |
2006 | .vidioc_s_tuner = saa7134_s_tuner, | |
802d62c1 HV |
2007 | .vidioc_g_selection = saa7134_g_selection, |
2008 | .vidioc_s_selection = saa7134_s_selection, | |
bfb12e38 MCC |
2009 | .vidioc_g_fbuf = saa7134_g_fbuf, |
2010 | .vidioc_s_fbuf = saa7134_s_fbuf, | |
2011 | .vidioc_overlay = saa7134_overlay, | |
bfb12e38 MCC |
2012 | .vidioc_g_frequency = saa7134_g_frequency, |
2013 | .vidioc_s_frequency = saa7134_s_frequency, | |
c121ba1f MCC |
2014 | #ifdef CONFIG_VIDEO_ADV_DEBUG |
2015 | .vidioc_g_register = vidioc_g_register, | |
2016 | .vidioc_s_register = vidioc_s_register, | |
2017 | #endif | |
a2004502 HV |
2018 | .vidioc_log_status = v4l2_ctrl_log_status, |
2019 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, | |
2020 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | |
1da177e4 LT |
2021 | }; |
2022 | ||
bec43661 | 2023 | static const struct v4l2_file_operations radio_fops = { |
a399810c HV |
2024 | .owner = THIS_MODULE, |
2025 | .open = video_open, | |
2983baf8 | 2026 | .read = radio_read, |
a399810c | 2027 | .release = video_release, |
2ada815f | 2028 | .unlocked_ioctl = video_ioctl2, |
2983baf8 | 2029 | .poll = radio_poll, |
a399810c HV |
2030 | }; |
2031 | ||
2032 | static const struct v4l2_ioctl_ops radio_ioctl_ops = { | |
c3b3e0c5 | 2033 | .vidioc_querycap = saa7134_querycap, |
8f61ae2f | 2034 | .vidioc_g_tuner = radio_g_tuner, |
8f61ae2f | 2035 | .vidioc_s_tuner = radio_s_tuner, |
bfb12e38 MCC |
2036 | .vidioc_g_frequency = saa7134_g_frequency, |
2037 | .vidioc_s_frequency = saa7134_s_frequency, | |
a2004502 HV |
2038 | .vidioc_subscribe_event = v4l2_ctrl_subscribe_event, |
2039 | .vidioc_unsubscribe_event = v4l2_event_unsubscribe, | |
1da177e4 LT |
2040 | }; |
2041 | ||
a399810c HV |
2042 | /* ----------------------------------------------------------- */ |
2043 | /* exported stuff */ | |
2044 | ||
2045 | struct video_device saa7134_video_template = { | |
2046 | .name = "saa7134-video", | |
a399810c HV |
2047 | .fops = &video_fops, |
2048 | .ioctl_ops = &video_ioctl_ops, | |
a399810c | 2049 | .tvnorms = SAA7134_NORMS, |
a399810c HV |
2050 | }; |
2051 | ||
2052 | struct video_device saa7134_radio_template = { | |
2053 | .name = "saa7134-radio", | |
a399810c HV |
2054 | .fops = &radio_fops, |
2055 | .ioctl_ops = &radio_ioctl_ops, | |
a399810c HV |
2056 | }; |
2057 | ||
718bde1a HV |
2058 | static const struct v4l2_ctrl_ops saa7134_ctrl_ops = { |
2059 | .s_ctrl = saa7134_s_ctrl, | |
2060 | }; | |
2061 | ||
2062 | static const struct v4l2_ctrl_config saa7134_ctrl_invert = { | |
2063 | .ops = &saa7134_ctrl_ops, | |
2064 | .id = V4L2_CID_PRIVATE_INVERT, | |
2065 | .name = "Invert", | |
2066 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
2067 | .min = 0, | |
2068 | .max = 1, | |
2069 | .step = 1, | |
2070 | }; | |
2071 | ||
2072 | static const struct v4l2_ctrl_config saa7134_ctrl_y_odd = { | |
2073 | .ops = &saa7134_ctrl_ops, | |
2074 | .id = V4L2_CID_PRIVATE_Y_ODD, | |
2075 | .name = "Y Offset Odd Field", | |
2076 | .type = V4L2_CTRL_TYPE_INTEGER, | |
2077 | .min = 0, | |
2078 | .max = 128, | |
2079 | .step = 1, | |
2080 | }; | |
2081 | ||
2082 | static const struct v4l2_ctrl_config saa7134_ctrl_y_even = { | |
2083 | .ops = &saa7134_ctrl_ops, | |
2084 | .id = V4L2_CID_PRIVATE_Y_EVEN, | |
2085 | .name = "Y Offset Even Field", | |
2086 | .type = V4L2_CTRL_TYPE_INTEGER, | |
2087 | .min = 0, | |
2088 | .max = 128, | |
2089 | .step = 1, | |
2090 | }; | |
2091 | ||
2092 | static const struct v4l2_ctrl_config saa7134_ctrl_automute = { | |
2093 | .ops = &saa7134_ctrl_ops, | |
2094 | .id = V4L2_CID_PRIVATE_AUTOMUTE, | |
2095 | .name = "Automute", | |
2096 | .type = V4L2_CTRL_TYPE_BOOLEAN, | |
2097 | .min = 0, | |
2098 | .max = 1, | |
2099 | .step = 1, | |
2100 | .def = 1, | |
2101 | }; | |
2102 | ||
1da177e4 LT |
2103 | int saa7134_video_init1(struct saa7134_dev *dev) |
2104 | { | |
718bde1a | 2105 | struct v4l2_ctrl_handler *hdl = &dev->ctrl_handler; |
2ada815f HV |
2106 | struct vb2_queue *q; |
2107 | int ret; | |
718bde1a | 2108 | |
1da177e4 LT |
2109 | /* sanitycheck insmod options */ |
2110 | if (gbuffers < 2 || gbuffers > VIDEO_MAX_FRAME) | |
2111 | gbuffers = 2; | |
3eeba4a7 | 2112 | if (gbufsize > gbufsize_max) |
1da177e4 LT |
2113 | gbufsize = gbufsize_max; |
2114 | gbufsize = (gbufsize + PAGE_SIZE - 1) & PAGE_MASK; | |
2115 | ||
718bde1a HV |
2116 | v4l2_ctrl_handler_init(hdl, 11); |
2117 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2118 | V4L2_CID_BRIGHTNESS, 0, 255, 1, 128); | |
2119 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2120 | V4L2_CID_CONTRAST, 0, 127, 1, 68); | |
2121 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2122 | V4L2_CID_SATURATION, 0, 127, 1, 64); | |
2123 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2124 | V4L2_CID_HUE, -128, 127, 1, 0); | |
2125 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2126 | V4L2_CID_HFLIP, 0, 1, 1, 0); | |
2127 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2128 | V4L2_CID_AUDIO_MUTE, 0, 1, 1, 0); | |
2129 | v4l2_ctrl_new_std(hdl, &saa7134_ctrl_ops, | |
2130 | V4L2_CID_AUDIO_VOLUME, -15, 15, 1, 0); | |
2131 | v4l2_ctrl_new_custom(hdl, &saa7134_ctrl_invert, NULL); | |
2132 | v4l2_ctrl_new_custom(hdl, &saa7134_ctrl_y_odd, NULL); | |
2133 | v4l2_ctrl_new_custom(hdl, &saa7134_ctrl_y_even, NULL); | |
2134 | v4l2_ctrl_new_custom(hdl, &saa7134_ctrl_automute, NULL); | |
2135 | if (hdl->error) | |
2136 | return hdl->error; | |
2137 | if (card_has_radio(dev)) { | |
2138 | hdl = &dev->radio_ctrl_handler; | |
2139 | v4l2_ctrl_handler_init(hdl, 2); | |
2140 | v4l2_ctrl_add_handler(hdl, &dev->ctrl_handler, | |
2141 | v4l2_ctrl_radio_filter); | |
2142 | if (hdl->error) | |
2143 | return hdl->error; | |
2144 | } | |
2145 | dev->ctl_mute = 1; | |
2146 | ||
2147 | if (dev->tda9887_conf && saa7134_ctrl_automute.def) | |
1da177e4 LT |
2148 | dev->tda9887_conf |= TDA9887_AUTOMUTE; |
2149 | dev->automute = 0; | |
2150 | ||
4ac97914 | 2151 | INIT_LIST_HEAD(&dev->video_q.queue); |
1da177e4 LT |
2152 | init_timer(&dev->video_q.timeout); |
2153 | dev->video_q.timeout.function = saa7134_buffer_timeout; | |
2154 | dev->video_q.timeout.data = (unsigned long)(&dev->video_q); | |
2155 | dev->video_q.dev = dev; | |
813b9dff HV |
2156 | dev->fmt = format_by_fourcc(V4L2_PIX_FMT_BGR24); |
2157 | dev->width = 720; | |
2158 | dev->height = 576; | |
2ada815f | 2159 | dev->field = V4L2_FIELD_INTERLACED; |
3a0a5a78 HV |
2160 | dev->win.w.width = dev->width; |
2161 | dev->win.w.height = dev->height; | |
2162 | dev->win.field = V4L2_FIELD_INTERLACED; | |
2163 | dev->ovbuf.fmt.width = dev->width; | |
2164 | dev->ovbuf.fmt.height = dev->height; | |
2165 | dev->ovbuf.fmt.pixelformat = dev->fmt->fourcc; | |
2166 | dev->ovbuf.fmt.colorspace = V4L2_COLORSPACE_SMPTE170M; | |
1da177e4 | 2167 | |
cb71201f ML |
2168 | if (saa7134_boards[dev->board].video_out) |
2169 | saa7134_videoport_init(dev); | |
2170 | ||
2ada815f HV |
2171 | q = &dev->video_vbq; |
2172 | q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE; | |
2173 | /* | |
a3f415ab HV |
2174 | * Do not add VB2_USERPTR unless explicitly requested: the saa7134 DMA |
2175 | * engine cannot handle transfers that do not start at the beginning | |
2176 | * of a page. A user-provided pointer can start anywhere in a page, so | |
2177 | * USERPTR support is a no-go unless the application knows about these | |
2178 | * limitations and has special support for this. | |
2ada815f | 2179 | */ |
9f183020 | 2180 | q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ; |
a3f415ab HV |
2181 | if (saa7134_userptr) |
2182 | q->io_modes |= VB2_USERPTR; | |
2ada815f HV |
2183 | q->drv_priv = &dev->video_q; |
2184 | q->ops = &vb2_qops; | |
2185 | q->gfp_flags = GFP_DMA32; | |
2186 | q->mem_ops = &vb2_dma_sg_memops; | |
2187 | q->buf_struct_size = sizeof(struct saa7134_buf); | |
2188 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
2189 | q->lock = &dev->lock; | |
2bc46b3a | 2190 | q->dev = &dev->pci->dev; |
2ada815f HV |
2191 | ret = vb2_queue_init(q); |
2192 | if (ret) | |
2193 | return ret; | |
a00e6888 | 2194 | saa7134_pgtable_alloc(dev->pci, &dev->video_q.pt); |
2ada815f HV |
2195 | |
2196 | q = &dev->vbi_vbq; | |
2197 | q->type = V4L2_BUF_TYPE_VBI_CAPTURE; | |
2198 | /* Don't add VB2_USERPTR, see comment above */ | |
2199 | q->io_modes = VB2_MMAP | VB2_READ; | |
a3f415ab HV |
2200 | if (saa7134_userptr) |
2201 | q->io_modes |= VB2_USERPTR; | |
2ada815f HV |
2202 | q->drv_priv = &dev->vbi_q; |
2203 | q->ops = &saa7134_vbi_qops; | |
2204 | q->gfp_flags = GFP_DMA32; | |
2205 | q->mem_ops = &vb2_dma_sg_memops; | |
2206 | q->buf_struct_size = sizeof(struct saa7134_buf); | |
2207 | q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC; | |
2208 | q->lock = &dev->lock; | |
2bc46b3a | 2209 | q->dev = &dev->pci->dev; |
2ada815f HV |
2210 | ret = vb2_queue_init(q); |
2211 | if (ret) | |
2212 | return ret; | |
a00e6888 | 2213 | saa7134_pgtable_alloc(dev->pci, &dev->vbi_q.pt); |
9db0fb18 | 2214 | |
cb71201f ML |
2215 | return 0; |
2216 | } | |
2217 | ||
9db0fb18 HV |
2218 | void saa7134_video_fini(struct saa7134_dev *dev) |
2219 | { | |
2220 | /* free stuff */ | |
2ada815f | 2221 | vb2_queue_release(&dev->video_vbq); |
a00e6888 | 2222 | saa7134_pgtable_free(dev->pci, &dev->video_q.pt); |
2ada815f | 2223 | vb2_queue_release(&dev->vbi_vbq); |
a00e6888 | 2224 | saa7134_pgtable_free(dev->pci, &dev->vbi_q.pt); |
718bde1a HV |
2225 | v4l2_ctrl_handler_free(&dev->ctrl_handler); |
2226 | if (card_has_radio(dev)) | |
2227 | v4l2_ctrl_handler_free(&dev->radio_ctrl_handler); | |
9db0fb18 HV |
2228 | } |
2229 | ||
cb71201f ML |
2230 | int saa7134_videoport_init(struct saa7134_dev *dev) |
2231 | { | |
2232 | /* enable video output */ | |
2233 | int vo = saa7134_boards[dev->board].video_out; | |
2234 | int video_reg; | |
2235 | unsigned int vid_port_opts = saa7134_boards[dev->board].vid_port_opts; | |
37df96d3 DB |
2236 | |
2237 | /* Configure videoport */ | |
cb71201f ML |
2238 | saa_writeb(SAA7134_VIDEO_PORT_CTRL0, video_out[vo][0]); |
2239 | video_reg = video_out[vo][1]; | |
2240 | if (vid_port_opts & SET_T_CODE_POLARITY_NON_INVERTED) | |
2241 | video_reg &= ~VP_T_CODE_P_INVERTED; | |
2242 | saa_writeb(SAA7134_VIDEO_PORT_CTRL1, video_reg); | |
2243 | saa_writeb(SAA7134_VIDEO_PORT_CTRL2, video_out[vo][2]); | |
cb71201f ML |
2244 | saa_writeb(SAA7134_VIDEO_PORT_CTRL4, video_out[vo][4]); |
2245 | video_reg = video_out[vo][5]; | |
2246 | if (vid_port_opts & SET_CLOCK_NOT_DELAYED) | |
2247 | video_reg &= ~VP_CLK_CTRL2_DELAYED; | |
2248 | if (vid_port_opts & SET_CLOCK_INVERTED) | |
2249 | video_reg |= VP_CLK_CTRL1_INVERTED; | |
2250 | saa_writeb(SAA7134_VIDEO_PORT_CTRL5, video_reg); | |
2251 | video_reg = video_out[vo][6]; | |
2252 | if (vid_port_opts & SET_VSYNC_OFF) { | |
2253 | video_reg &= ~VP_VS_TYPE_MASK; | |
2254 | video_reg |= VP_VS_TYPE_OFF; | |
2255 | } | |
2256 | saa_writeb(SAA7134_VIDEO_PORT_CTRL6, video_reg); | |
2257 | saa_writeb(SAA7134_VIDEO_PORT_CTRL7, video_out[vo][7]); | |
2258 | saa_writeb(SAA7134_VIDEO_PORT_CTRL8, video_out[vo][8]); | |
1da177e4 | 2259 | |
37df96d3 DB |
2260 | /* Start videoport */ |
2261 | saa_writeb(SAA7134_VIDEO_PORT_CTRL3, video_out[vo][3]); | |
2262 | ||
1da177e4 LT |
2263 | return 0; |
2264 | } | |
2265 | ||
2266 | int saa7134_video_init2(struct saa7134_dev *dev) | |
2267 | { | |
2268 | /* init video hw */ | |
2269 | set_tvnorm(dev,&tvnorms[0]); | |
2270 | video_mux(dev,0); | |
718bde1a | 2271 | v4l2_ctrl_handler_setup(&dev->ctrl_handler); |
1da177e4 LT |
2272 | saa7134_tvaudio_setmute(dev); |
2273 | saa7134_tvaudio_setvolume(dev,dev->ctl_volume); | |
2274 | return 0; | |
2275 | } | |
2276 | ||
11f7078c | 2277 | void saa7134_irq_video_signalchange(struct saa7134_dev *dev) |
1da177e4 LT |
2278 | { |
2279 | static const char *st[] = { | |
2280 | "(no signal)", "NTSC", "PAL", "SECAM" }; | |
2281 | u32 st1,st2; | |
2282 | ||
2283 | st1 = saa_readb(SAA7134_STATUS_VIDEO1); | |
2284 | st2 = saa_readb(SAA7134_STATUS_VIDEO2); | |
630983b7 | 2285 | video_dbg("DCSDT: pll: %s, sync: %s, norm: %s\n", |
1da177e4 LT |
2286 | (st1 & 0x40) ? "not locked" : "locked", |
2287 | (st2 & 0x40) ? "no" : "yes", | |
2288 | st[st1 & 0x03]); | |
11f7078c | 2289 | dev->nosignal = (st1 & 0x40) || (st2 & 0x40) || !(st2 & 0x1); |
1da177e4 LT |
2290 | |
2291 | if (dev->nosignal) { | |
2292 | /* no video signal -> mute audio */ | |
2293 | if (dev->ctl_automute) | |
2294 | dev->automute = 1; | |
2295 | saa7134_tvaudio_setmute(dev); | |
1da177e4 LT |
2296 | } else { |
2297 | /* wake up tvaudio audio carrier scan thread */ | |
2298 | saa7134_tvaudio_do_scan(dev); | |
1da177e4 | 2299 | } |
11f7078c ML |
2300 | |
2301 | if ((st2 & 0x80) && !noninterlaced && !dev->nosignal) | |
2302 | saa_clearb(SAA7134_SYNC_CTRL, 0x20); | |
2303 | else | |
2304 | saa_setb(SAA7134_SYNC_CTRL, 0x20); | |
2305 | ||
1da177e4 LT |
2306 | if (dev->mops && dev->mops->signal_change) |
2307 | dev->mops->signal_change(dev); | |
2308 | } | |
2309 | ||
11f7078c | 2310 | |
1da177e4 LT |
2311 | void saa7134_irq_video_done(struct saa7134_dev *dev, unsigned long status) |
2312 | { | |
2313 | enum v4l2_field field; | |
2314 | ||
2315 | spin_lock(&dev->slock); | |
2316 | if (dev->video_q.curr) { | |
2ada815f | 2317 | field = dev->field; |
1da177e4 LT |
2318 | if (V4L2_FIELD_HAS_BOTH(field)) { |
2319 | /* make sure we have seen both fields */ | |
2320 | if ((status & 0x10) == 0x00) { | |
2321 | dev->video_q.curr->top_seen = 1; | |
2322 | goto done; | |
2323 | } | |
2324 | if (!dev->video_q.curr->top_seen) | |
2325 | goto done; | |
2326 | } else if (field == V4L2_FIELD_TOP) { | |
2327 | if ((status & 0x10) != 0x10) | |
2328 | goto done; | |
2329 | } else if (field == V4L2_FIELD_BOTTOM) { | |
2330 | if ((status & 0x10) != 0x00) | |
2331 | goto done; | |
2332 | } | |
2ada815f | 2333 | saa7134_buffer_finish(dev, &dev->video_q, VB2_BUF_STATE_DONE); |
1da177e4 | 2334 | } |
e72936d2 | 2335 | saa7134_buffer_next(dev, &dev->video_q); |
1da177e4 LT |
2336 | |
2337 | done: | |
2338 | spin_unlock(&dev->slock); | |
2339 | } |