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Commit | Line | Data |
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443c1228 ST |
1 | /* |
2 | * Driver for the NXP SAA7164 PCIe bridge | |
3 | * | |
9b8b0199 | 4 | * Copyright (c) 2010 Steven Toth <stoth@kernellabs.com> |
443c1228 ST |
5 | * |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * | |
15 | * GNU General Public License for more details. | |
16 | * | |
17 | * You should have received a copy of the GNU General Public License | |
18 | * along with this program; if not, write to the Free Software | |
19 | * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA. | |
20 | */ | |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/list.h> | |
24 | #include <linux/module.h> | |
25 | #include <linux/moduleparam.h> | |
26 | #include <linux/kmod.h> | |
27 | #include <linux/kernel.h> | |
28 | #include <linux/slab.h> | |
29 | #include <linux/interrupt.h> | |
30 | #include <linux/delay.h> | |
31 | #include <asm/div64.h> | |
32 | ||
e48836b8 ST |
33 | #ifdef CONFIG_PROC_FS |
34 | #include <linux/proc_fs.h> | |
35 | #endif | |
443c1228 ST |
36 | #include "saa7164.h" |
37 | ||
38 | MODULE_DESCRIPTION("Driver for NXP SAA7164 based TV cards"); | |
9d119c33 | 39 | MODULE_AUTHOR("Steven Toth <stoth@kernellabs.com>"); |
443c1228 ST |
40 | MODULE_LICENSE("GPL"); |
41 | ||
42 | /* | |
bc250684 ST |
43 | * 1 Basic |
44 | * 2 | |
45 | * 4 i2c | |
46 | * 8 api | |
47 | * 16 cmd | |
48 | * 32 bus | |
443c1228 ST |
49 | */ |
50 | ||
b1912a85 IM |
51 | unsigned int saa_debug; |
52 | module_param_named(debug, saa_debug, int, 0644); | |
443c1228 ST |
53 | MODULE_PARM_DESC(debug, "enable debug messages"); |
54 | ||
841fec00 | 55 | unsigned int fw_debug; |
e48836b8 ST |
56 | module_param(fw_debug, int, 0644); |
57 | MODULE_PARM_DESC(fw_debug, "Firware debug level def:2"); | |
58 | ||
66e1d378 ST |
59 | unsigned int encoder_buffers = SAA7164_MAX_ENCODER_BUFFERS; |
60 | module_param(encoder_buffers, int, 0644); | |
61 | MODULE_PARM_DESC(encoder_buffers, "Total buffers in read queue 16-512 def:64"); | |
62 | ||
e8ce2f21 ST |
63 | unsigned int vbi_buffers = SAA7164_MAX_VBI_BUFFERS; |
64 | module_param(vbi_buffers, int, 0644); | |
65 | MODULE_PARM_DESC(vbi_buffers, "Total buffers in read queue 16-512 def:64"); | |
66 | ||
bbf504c3 | 67 | unsigned int waitsecs = 10; |
dd1ee444 | 68 | module_param(waitsecs, int, 0644); |
66e1d378 | 69 | MODULE_PARM_DESC(waitsecs, "timeout on firmware messages"); |
dd1ee444 | 70 | |
443c1228 ST |
71 | static unsigned int card[] = {[0 ... (SAA7164_MAXBOARDS - 1)] = UNSET }; |
72 | module_param_array(card, int, NULL, 0444); | |
73 | MODULE_PARM_DESC(card, "card type"); | |
74 | ||
91d80189 ST |
75 | unsigned int print_histogram = 64; |
76 | module_param(print_histogram, int, 0644); | |
66e1d378 | 77 | MODULE_PARM_DESC(print_histogram, "print histogram values once"); |
91d80189 | 78 | |
1b0e8e46 ST |
79 | unsigned int crc_checking = 1; |
80 | module_param(crc_checking, int, 0644); | |
81 | MODULE_PARM_DESC(crc_checking, "enable crc sanity checking on buffers"); | |
82 | ||
83 | unsigned int guard_checking = 1; | |
84 | module_param(guard_checking, int, 0644); | |
bc250684 ST |
85 | MODULE_PARM_DESC(guard_checking, |
86 | "enable dma sanity checking for buffer overruns"); | |
1b0e8e46 | 87 | |
443c1228 ST |
88 | static unsigned int saa7164_devcount; |
89 | ||
90 | static DEFINE_MUTEX(devlist); | |
91 | LIST_HEAD(saa7164_devlist); | |
92 | ||
93 | #define INT_SIZE 16 | |
94 | ||
a97781ac ST |
95 | static void saa7164_pack_verifier(struct saa7164_buffer *buf) |
96 | { | |
97 | u8 *p = (u8 *)buf->cpu; | |
98 | int i; | |
99 | ||
100 | for (i = 0; i < buf->actual_size; i += 2048) { | |
101 | ||
c7e242ba MCC |
102 | if ((*(p + i + 0) != 0x00) || (*(p + i + 1) != 0x00) || |
103 | (*(p + i + 2) != 0x01) || (*(p + i + 3) != 0xBA)) { | |
a97781ac | 104 | printk(KERN_ERR "No pack at 0x%x\n", i); |
bc250684 | 105 | #if 0 |
518c267f AS |
106 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, |
107 | p + 1, 32, false); | |
bc250684 | 108 | #endif |
1b0e8e46 | 109 | } |
a97781ac ST |
110 | } |
111 | } | |
112 | ||
1b0e8e46 ST |
113 | #define FIXED_VIDEO_PID 0xf1 |
114 | #define FIXED_AUDIO_PID 0xf2 | |
115 | ||
9230acaa ST |
116 | static void saa7164_ts_verifier(struct saa7164_buffer *buf) |
117 | { | |
118 | struct saa7164_port *port = buf->port; | |
9230acaa | 119 | u32 i; |
1b0e8e46 ST |
120 | u8 cc, a; |
121 | u16 pid; | |
122 | u8 __iomem *bufcpu = (u8 *)buf->cpu; | |
9230acaa ST |
123 | |
124 | port->sync_errors = 0; | |
125 | port->v_cc_errors = 0; | |
126 | port->a_cc_errors = 0; | |
127 | ||
128 | for (i = 0; i < buf->actual_size; i += 188) { | |
129 | if (*(bufcpu + i) != 0x47) | |
130 | port->sync_errors++; | |
131 | ||
1b0e8e46 ST |
132 | /* TODO: Query pid lower 8 bits, ignoring upper bits intensionally */ |
133 | pid = ((*(bufcpu + i + 1) & 0x1f) << 8) | *(bufcpu + i + 2); | |
9230acaa ST |
134 | cc = *(bufcpu + i + 3) & 0x0f; |
135 | ||
1b0e8e46 | 136 | if (pid == FIXED_VIDEO_PID) { |
9230acaa ST |
137 | a = ((port->last_v_cc + 1) & 0x0f); |
138 | if (a != cc) { | |
1b0e8e46 ST |
139 | printk(KERN_ERR "video cc last = %x current = %x i = %d\n", |
140 | port->last_v_cc, cc, i); | |
9230acaa ST |
141 | port->v_cc_errors++; |
142 | } | |
143 | ||
144 | port->last_v_cc = cc; | |
145 | } else | |
1b0e8e46 | 146 | if (pid == FIXED_AUDIO_PID) { |
9230acaa ST |
147 | a = ((port->last_a_cc + 1) & 0x0f); |
148 | if (a != cc) { | |
1b0e8e46 ST |
149 | printk(KERN_ERR "audio cc last = %x current = %x i = %d\n", |
150 | port->last_a_cc, cc, i); | |
9230acaa ST |
151 | port->a_cc_errors++; |
152 | } | |
153 | ||
154 | port->last_a_cc = cc; | |
155 | } | |
156 | ||
157 | } | |
158 | ||
32299a14 ST |
159 | /* Only report errors if we've been through this function atleast |
160 | * once already and the cached cc values are primed. First time through | |
161 | * always generates errors. | |
162 | */ | |
163 | if (port->v_cc_errors && (port->done_first_interrupt > 1)) | |
9230acaa ST |
164 | printk(KERN_ERR "video pid cc, %d errors\n", port->v_cc_errors); |
165 | ||
32299a14 | 166 | if (port->a_cc_errors && (port->done_first_interrupt > 1)) |
9230acaa ST |
167 | printk(KERN_ERR "audio pid cc, %d errors\n", port->a_cc_errors); |
168 | ||
32299a14 | 169 | if (port->sync_errors && (port->done_first_interrupt > 1)) |
9230acaa | 170 | printk(KERN_ERR "sync_errors = %d\n", port->sync_errors); |
32299a14 ST |
171 | |
172 | if (port->done_first_interrupt == 1) | |
173 | port->done_first_interrupt++; | |
9230acaa ST |
174 | } |
175 | ||
91d80189 | 176 | static void saa7164_histogram_reset(struct saa7164_histogram *hg, char *name) |
443c1228 | 177 | { |
91d80189 | 178 | int i; |
443c1228 | 179 | |
91d80189 ST |
180 | memset(hg, 0, sizeof(struct saa7164_histogram)); |
181 | strcpy(hg->name, name); | |
182 | ||
183 | /* First 30ms x 1ms */ | |
bc250684 | 184 | for (i = 0; i < 30; i++) |
91d80189 | 185 | hg->counter1[0 + i].val = i; |
91d80189 ST |
186 | |
187 | /* 30 - 200ms x 10ms */ | |
bc250684 | 188 | for (i = 0; i < 18; i++) |
91d80189 | 189 | hg->counter1[30 + i].val = 30 + (i * 10); |
91d80189 ST |
190 | |
191 | /* 200 - 2000ms x 100ms */ | |
bc250684 | 192 | for (i = 0; i < 15; i++) |
58acca10 | 193 | hg->counter1[48 + i].val = 200 + (i * 200); |
91d80189 | 194 | |
58acca10 ST |
195 | /* Catch all massive value (2secs) */ |
196 | hg->counter1[55].val = 2000; | |
197 | ||
198 | /* Catch all massive value (4secs) */ | |
199 | hg->counter1[56].val = 4000; | |
200 | ||
201 | /* Catch all massive value (8secs) */ | |
202 | hg->counter1[57].val = 8000; | |
203 | ||
204 | /* Catch all massive value (15secs) */ | |
205 | hg->counter1[58].val = 15000; | |
206 | ||
207 | /* Catch all massive value (30secs) */ | |
208 | hg->counter1[59].val = 30000; | |
209 | ||
210 | /* Catch all massive value (60secs) */ | |
211 | hg->counter1[60].val = 60000; | |
212 | ||
213 | /* Catch all massive value (5mins) */ | |
214 | hg->counter1[61].val = 300000; | |
215 | ||
216 | /* Catch all massive value (15mins) */ | |
217 | hg->counter1[62].val = 900000; | |
218 | ||
219 | /* Catch all massive values (1hr) */ | |
91d80189 | 220 | hg->counter1[63].val = 3600000; |
443c1228 ST |
221 | } |
222 | ||
58acca10 | 223 | void saa7164_histogram_update(struct saa7164_histogram *hg, u32 val) |
443c1228 | 224 | { |
91d80189 | 225 | int i; |
c7e242ba | 226 | for (i = 0; i < 64; i++) { |
91d80189 ST |
227 | if (val <= hg->counter1[i].val) { |
228 | hg->counter1[i].count++; | |
229 | hg->counter1[i].update_time = jiffies; | |
230 | break; | |
231 | } | |
232 | } | |
233 | } | |
443c1228 | 234 | |
91d80189 ST |
235 | static void saa7164_histogram_print(struct saa7164_port *port, |
236 | struct saa7164_histogram *hg) | |
237 | { | |
91d80189 ST |
238 | u32 entries = 0; |
239 | int i; | |
240 | ||
58acca10 | 241 | printk(KERN_ERR "Histogram named %s (ms, count, last_update_jiffy)\n", hg->name); |
c7e242ba | 242 | for (i = 0; i < 64; i++) { |
91d80189 ST |
243 | if (hg->counter1[i].count == 0) |
244 | continue; | |
443c1228 | 245 | |
91d80189 ST |
246 | printk(KERN_ERR " %4d %12d %Ld\n", |
247 | hg->counter1[i].val, | |
248 | hg->counter1[i].count, | |
249 | hg->counter1[i].update_time); | |
250 | ||
251 | entries++; | |
252 | } | |
253 | printk(KERN_ERR "Total: %d\n", entries); | |
443c1228 ST |
254 | } |
255 | ||
cfbaf337 | 256 | static void saa7164_work_enchandler_helper(struct saa7164_port *port, int bufnr) |
7615e434 ST |
257 | { |
258 | struct saa7164_dev *dev = port->dev; | |
61ca1500 PH |
259 | struct saa7164_buffer *buf = NULL; |
260 | struct saa7164_user_buffer *ubuf = NULL; | |
7615e434 | 261 | struct list_head *c, *n; |
cfbaf337 | 262 | int i = 0; |
1b0e8e46 | 263 | u8 __iomem *p; |
91d80189 ST |
264 | |
265 | mutex_lock(&port->dmaqueue_lock); | |
7615e434 | 266 | list_for_each_safe(c, n, &port->dmaqueue.list) { |
91d80189 | 267 | |
7615e434 | 268 | buf = list_entry(c, struct saa7164_buffer, list); |
91d80189 ST |
269 | if (i++ > port->hwcfg.buffercount) { |
270 | printk(KERN_ERR "%s() illegal i count %d\n", | |
271 | __func__, i); | |
272 | break; | |
273 | } | |
7615e434 | 274 | |
cfbaf337 | 275 | if (buf->idx == bufnr) { |
12d3203e | 276 | |
7615e434 | 277 | /* Found the buffer, deal with it */ |
1b0e8e46 ST |
278 | dprintk(DBGLVL_IRQ, "%s() bufnr: %d\n", __func__, bufnr); |
279 | ||
280 | if (crc_checking) { | |
281 | /* Throw a new checksum on the dma buffer */ | |
282 | buf->crc = crc32(0, buf->cpu, buf->actual_size); | |
283 | } | |
284 | ||
285 | if (guard_checking) { | |
286 | p = (u8 *)buf->cpu; | |
c7e242ba | 287 | if ((*(p + buf->actual_size + 0) != 0xff) || |
1b0e8e46 ST |
288 | (*(p + buf->actual_size + 1) != 0xff) || |
289 | (*(p + buf->actual_size + 2) != 0xff) || | |
290 | (*(p + buf->actual_size + 3) != 0xff) || | |
291 | (*(p + buf->actual_size + 0x10) != 0xff) || | |
292 | (*(p + buf->actual_size + 0x11) != 0xff) || | |
293 | (*(p + buf->actual_size + 0x12) != 0xff) || | |
c7e242ba | 294 | (*(p + buf->actual_size + 0x13) != 0xff)) { |
1b0e8e46 ST |
295 | printk(KERN_ERR "%s() buf %p guard buffer breach\n", |
296 | __func__, buf); | |
bc250684 | 297 | #if 0 |
518c267f AS |
298 | print_hex_dump(KERN_INFO, "", DUMP_PREFIX_OFFSET, 16, 1, |
299 | p + buf->actual_size - 32, 64, false); | |
bc250684 | 300 | #endif |
1b0e8e46 ST |
301 | } |
302 | } | |
7615e434 | 303 | |
1107237e ST |
304 | if ((port->nr != SAA7164_PORT_VBI1) && (port->nr != SAA7164_PORT_VBI2)) { |
305 | /* Validate the incoming buffer content */ | |
306 | if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_TS) | |
307 | saa7164_ts_verifier(buf); | |
308 | else if (port->encoder_params.stream_type == V4L2_MPEG_STREAM_TYPE_MPEG2_PS) | |
309 | saa7164_pack_verifier(buf); | |
310 | } | |
9230acaa | 311 | |
7615e434 ST |
312 | /* find a free user buffer and clone to it */ |
313 | if (!list_empty(&port->list_buf_free.list)) { | |
314 | ||
315 | /* Pull the first buffer from the used list */ | |
316 | ubuf = list_first_entry(&port->list_buf_free.list, | |
317 | struct saa7164_user_buffer, list); | |
318 | ||
a97781ac ST |
319 | if (buf->actual_size <= ubuf->actual_size) { |
320 | ||
cfbaf337 | 321 | memcpy_fromio(ubuf->data, buf->cpu, |
f6eeece8 | 322 | ubuf->actual_size); |
12d3203e | 323 | |
1b0e8e46 ST |
324 | if (crc_checking) { |
325 | /* Throw a new checksum on the read buffer */ | |
326 | ubuf->crc = crc32(0, ubuf->data, ubuf->actual_size); | |
327 | } | |
12d3203e | 328 | |
a97781ac ST |
329 | /* Requeue the buffer on the free list */ |
330 | ubuf->pos = 0; | |
7615e434 | 331 | |
a97781ac ST |
332 | list_move_tail(&ubuf->list, |
333 | &port->list_buf_used.list); | |
7615e434 | 334 | |
a97781ac ST |
335 | /* Flag any userland waiters */ |
336 | wake_up_interruptible(&port->wait_read); | |
7615e434 | 337 | |
a97781ac ST |
338 | } else { |
339 | printk(KERN_ERR "buf %p bufsize fails match\n", buf); | |
340 | } | |
7615e434 ST |
341 | |
342 | } else | |
66e1d378 | 343 | printk(KERN_ERR "encirq no free buffers, increase param encoder_buffers\n"); |
7615e434 | 344 | |
9230acaa | 345 | /* Ensure offset into buffer remains 0, fill buffer |
a97781ac ST |
346 | * with known bad data. We check for this data at a later point |
347 | * in time. */ | |
cfbaf337 | 348 | saa7164_buffer_zero_offsets(port, bufnr); |
12d3203e | 349 | memset_io(buf->cpu, 0xff, buf->pci_size); |
1b0e8e46 ST |
350 | if (crc_checking) { |
351 | /* Throw yet aanother new checksum on the dma buffer */ | |
352 | buf->crc = crc32(0, buf->cpu, buf->actual_size); | |
353 | } | |
12d3203e | 354 | |
a97781ac | 355 | break; |
cfbaf337 ST |
356 | } |
357 | } | |
358 | mutex_unlock(&port->dmaqueue_lock); | |
359 | } | |
360 | ||
361 | static void saa7164_work_enchandler(struct work_struct *w) | |
362 | { | |
363 | struct saa7164_port *port = | |
364 | container_of(w, struct saa7164_port, workenc); | |
365 | struct saa7164_dev *dev = port->dev; | |
366 | ||
367 | u32 wp, mcb, rp, cnt = 0; | |
368 | ||
369 | port->last_svc_msecs_diff = port->last_svc_msecs; | |
370 | port->last_svc_msecs = jiffies_to_msecs(jiffies); | |
371 | ||
372 | port->last_svc_msecs_diff = port->last_svc_msecs - | |
373 | port->last_svc_msecs_diff; | |
374 | ||
375 | saa7164_histogram_update(&port->svc_interval, | |
376 | port->last_svc_msecs_diff); | |
377 | ||
378 | port->last_irq_svc_msecs_diff = port->last_svc_msecs - | |
379 | port->last_irq_msecs; | |
380 | ||
381 | saa7164_histogram_update(&port->irq_svc_interval, | |
382 | port->last_irq_svc_msecs_diff); | |
9230acaa | 383 | |
cfbaf337 ST |
384 | dprintk(DBGLVL_IRQ, |
385 | "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", | |
386 | __func__, | |
387 | port->last_svc_msecs_diff, | |
388 | port->last_irq_svc_msecs_diff, | |
389 | port->last_svc_wp, | |
390 | port->last_svc_rp | |
391 | ); | |
392 | ||
393 | /* Current write position */ | |
394 | wp = saa7164_readl(port->bufcounter); | |
395 | if (wp > (port->hwcfg.buffercount - 1)) { | |
396 | printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); | |
397 | return; | |
398 | } | |
399 | ||
400 | /* Most current complete buffer */ | |
401 | if (wp == 0) | |
1b0e8e46 | 402 | mcb = (port->hwcfg.buffercount - 1); |
cfbaf337 ST |
403 | else |
404 | mcb = wp - 1; | |
405 | ||
406 | while (1) { | |
1b0e8e46 ST |
407 | if (port->done_first_interrupt == 0) { |
408 | port->done_first_interrupt++; | |
409 | rp = mcb; | |
410 | } else | |
411 | rp = (port->last_svc_rp + 1) % 8; | |
cfbaf337 | 412 | |
3eeba4a7 | 413 | if (rp > (port->hwcfg.buffercount - 1)) { |
cfbaf337 ST |
414 | printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); |
415 | break; | |
7615e434 | 416 | } |
1b0e8e46 | 417 | |
cfbaf337 ST |
418 | saa7164_work_enchandler_helper(port, rp); |
419 | port->last_svc_rp = rp; | |
420 | cnt++; | |
421 | ||
422 | if (rp == mcb) | |
423 | break; | |
7615e434 | 424 | } |
cfbaf337 | 425 | |
1b0e8e46 | 426 | /* TODO: Convert this into a /proc/saa7164 style readable file */ |
91d80189 ST |
427 | if (print_histogram == port->nr) { |
428 | saa7164_histogram_print(port, &port->irq_interval); | |
429 | saa7164_histogram_print(port, &port->svc_interval); | |
430 | saa7164_histogram_print(port, &port->irq_svc_interval); | |
58acca10 ST |
431 | saa7164_histogram_print(port, &port->read_interval); |
432 | saa7164_histogram_print(port, &port->poll_interval); | |
7c161822 | 433 | /* TODO: fix this to preserve any previous state */ |
91d80189 ST |
434 | print_histogram = 64 + port->nr; |
435 | } | |
436 | } | |
cfbaf337 | 437 | |
e8ce2f21 ST |
438 | static void saa7164_work_vbihandler(struct work_struct *w) |
439 | { | |
440 | struct saa7164_port *port = | |
441 | container_of(w, struct saa7164_port, workenc); | |
442 | struct saa7164_dev *dev = port->dev; | |
443 | ||
444 | u32 wp, mcb, rp, cnt = 0; | |
445 | ||
446 | port->last_svc_msecs_diff = port->last_svc_msecs; | |
447 | port->last_svc_msecs = jiffies_to_msecs(jiffies); | |
448 | port->last_svc_msecs_diff = port->last_svc_msecs - | |
449 | port->last_svc_msecs_diff; | |
450 | ||
451 | saa7164_histogram_update(&port->svc_interval, | |
452 | port->last_svc_msecs_diff); | |
453 | ||
454 | port->last_irq_svc_msecs_diff = port->last_svc_msecs - | |
455 | port->last_irq_msecs; | |
456 | ||
457 | saa7164_histogram_update(&port->irq_svc_interval, | |
458 | port->last_irq_svc_msecs_diff); | |
459 | ||
460 | dprintk(DBGLVL_IRQ, | |
461 | "%s() %Ldms elapsed irq->deferred %Ldms wp: %d rp: %d\n", | |
462 | __func__, | |
463 | port->last_svc_msecs_diff, | |
464 | port->last_irq_svc_msecs_diff, | |
465 | port->last_svc_wp, | |
466 | port->last_svc_rp | |
467 | ); | |
468 | ||
469 | /* Current write position */ | |
470 | wp = saa7164_readl(port->bufcounter); | |
471 | if (wp > (port->hwcfg.buffercount - 1)) { | |
472 | printk(KERN_ERR "%s() illegal buf count %d\n", __func__, wp); | |
473 | return; | |
474 | } | |
475 | ||
476 | /* Most current complete buffer */ | |
477 | if (wp == 0) | |
478 | mcb = (port->hwcfg.buffercount - 1); | |
479 | else | |
480 | mcb = wp - 1; | |
1107237e ST |
481 | |
482 | while (1) { | |
483 | if (port->done_first_interrupt == 0) { | |
484 | port->done_first_interrupt++; | |
485 | rp = mcb; | |
486 | } else | |
487 | rp = (port->last_svc_rp + 1) % 8; | |
488 | ||
3eeba4a7 | 489 | if (rp > (port->hwcfg.buffercount - 1)) { |
1107237e ST |
490 | printk(KERN_ERR "%s() illegal rp count %d\n", __func__, rp); |
491 | break; | |
492 | } | |
493 | ||
494 | saa7164_work_enchandler_helper(port, rp); | |
495 | port->last_svc_rp = rp; | |
496 | cnt++; | |
497 | ||
498 | if (rp == mcb) | |
499 | break; | |
500 | } | |
501 | ||
e8ce2f21 ST |
502 | /* TODO: Convert this into a /proc/saa7164 style readable file */ |
503 | if (print_histogram == port->nr) { | |
504 | saa7164_histogram_print(port, &port->irq_interval); | |
505 | saa7164_histogram_print(port, &port->svc_interval); | |
506 | saa7164_histogram_print(port, &port->irq_svc_interval); | |
507 | saa7164_histogram_print(port, &port->read_interval); | |
508 | saa7164_histogram_print(port, &port->poll_interval); | |
509 | /* TODO: fix this to preserve any previous state */ | |
510 | print_histogram = 64 + port->nr; | |
511 | } | |
512 | } | |
513 | ||
91d80189 ST |
514 | static void saa7164_work_cmdhandler(struct work_struct *w) |
515 | { | |
516 | struct saa7164_dev *dev = container_of(w, struct saa7164_dev, workcmd); | |
517 | ||
518 | /* Wake up any complete commands */ | |
519 | saa7164_irq_dequeue(dev); | |
520 | } | |
521 | ||
522 | static void saa7164_buffer_deliver(struct saa7164_buffer *buf) | |
523 | { | |
524 | struct saa7164_port *port = buf->port; | |
525 | ||
526 | /* Feed the transport payload into the kernel demux */ | |
527 | dvb_dmx_swfilter_packets(&port->dvb.demux, (u8 *)buf->cpu, | |
528 | SAA7164_TS_NUMBER_OF_LINES); | |
529 | ||
530 | } | |
531 | ||
e8ce2f21 ST |
532 | static irqreturn_t saa7164_irq_vbi(struct saa7164_port *port) |
533 | { | |
534 | struct saa7164_dev *dev = port->dev; | |
535 | ||
536 | /* Store old time */ | |
537 | port->last_irq_msecs_diff = port->last_irq_msecs; | |
538 | ||
539 | /* Collect new stats */ | |
540 | port->last_irq_msecs = jiffies_to_msecs(jiffies); | |
541 | ||
542 | /* Calculate stats */ | |
543 | port->last_irq_msecs_diff = port->last_irq_msecs - | |
544 | port->last_irq_msecs_diff; | |
545 | ||
546 | saa7164_histogram_update(&port->irq_interval, | |
547 | port->last_irq_msecs_diff); | |
548 | ||
549 | dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, | |
550 | port->last_irq_msecs_diff); | |
551 | ||
552 | /* Tis calls the vbi irq handler */ | |
553 | schedule_work(&port->workenc); | |
554 | return 0; | |
555 | } | |
556 | ||
91d80189 ST |
557 | static irqreturn_t saa7164_irq_encoder(struct saa7164_port *port) |
558 | { | |
559 | struct saa7164_dev *dev = port->dev; | |
07603131 ST |
560 | |
561 | /* Store old time */ | |
91d80189 ST |
562 | port->last_irq_msecs_diff = port->last_irq_msecs; |
563 | ||
564 | /* Collect new stats */ | |
565 | port->last_irq_msecs = jiffies_to_msecs(jiffies); | |
91d80189 ST |
566 | |
567 | /* Calculate stats */ | |
568 | port->last_irq_msecs_diff = port->last_irq_msecs - | |
569 | port->last_irq_msecs_diff; | |
570 | ||
571 | saa7164_histogram_update(&port->irq_interval, | |
572 | port->last_irq_msecs_diff); | |
573 | ||
cfbaf337 ST |
574 | dprintk(DBGLVL_IRQ, "%s() %Ldms elapsed\n", __func__, |
575 | port->last_irq_msecs_diff); | |
12d3203e | 576 | |
91d80189 | 577 | schedule_work(&port->workenc); |
7615e434 ST |
578 | return 0; |
579 | } | |
580 | ||
add3f580 | 581 | static irqreturn_t saa7164_irq_ts(struct saa7164_port *port) |
443c1228 ST |
582 | { |
583 | struct saa7164_dev *dev = port->dev; | |
584 | struct saa7164_buffer *buf; | |
585 | struct list_head *c, *n; | |
586 | int wp, i = 0, rp; | |
587 | ||
588 | /* Find the current write point from the hardware */ | |
589 | wp = saa7164_readl(port->bufcounter); | |
590 | if (wp > (port->hwcfg.buffercount - 1)) | |
591 | BUG(); | |
592 | ||
593 | /* Find the previous buffer to the current write point */ | |
594 | if (wp == 0) | |
1b0e8e46 | 595 | rp = (port->hwcfg.buffercount - 1); |
443c1228 ST |
596 | else |
597 | rp = wp - 1; | |
598 | ||
599 | /* Lookup the WP in the buffer list */ | |
600 | /* TODO: turn this into a worker thread */ | |
601 | list_for_each_safe(c, n, &port->dmaqueue.list) { | |
602 | buf = list_entry(c, struct saa7164_buffer, list); | |
603 | if (i++ > port->hwcfg.buffercount) | |
604 | BUG(); | |
605 | ||
add3f580 | 606 | if (buf->idx == rp) { |
443c1228 ST |
607 | /* Found the buffer, deal with it */ |
608 | dprintk(DBGLVL_IRQ, "%s() wp: %d processing: %d\n", | |
609 | __func__, wp, rp); | |
610 | saa7164_buffer_deliver(buf); | |
611 | break; | |
612 | } | |
613 | ||
614 | } | |
615 | return 0; | |
616 | } | |
617 | ||
618 | /* Primary IRQ handler and dispatch mechanism */ | |
619 | static irqreturn_t saa7164_irq(int irq, void *dev_id) | |
620 | { | |
621 | struct saa7164_dev *dev = dev_id; | |
c7e242ba MCC |
622 | struct saa7164_port *porta = &dev->ports[SAA7164_PORT_TS1]; |
623 | struct saa7164_port *portb = &dev->ports[SAA7164_PORT_TS2]; | |
624 | struct saa7164_port *portc = &dev->ports[SAA7164_PORT_ENC1]; | |
625 | struct saa7164_port *portd = &dev->ports[SAA7164_PORT_ENC2]; | |
626 | struct saa7164_port *porte = &dev->ports[SAA7164_PORT_VBI1]; | |
627 | struct saa7164_port *portf = &dev->ports[SAA7164_PORT_VBI2]; | |
7615e434 | 628 | |
50bcb4ae | 629 | u32 intid, intstat[INT_SIZE/4]; |
443c1228 ST |
630 | int i, handled = 0, bit; |
631 | ||
61ca1500 | 632 | if (dev == NULL) { |
d888ea03 ST |
633 | printk(KERN_ERR "%s() No device specified\n", __func__); |
634 | handled = 0; | |
635 | goto out; | |
636 | } | |
637 | ||
b595076a UKK |
638 | /* Check that the hardware is accessible. If the status bytes are |
639 | * 0xFF then the device is not accessible, the the IRQ belongs | |
443c1228 | 640 | * to another driver. |
1a6450d4 | 641 | * 4 x u32 interrupt registers. |
443c1228 ST |
642 | */ |
643 | for (i = 0; i < INT_SIZE/4; i++) { | |
644 | ||
645 | /* TODO: Convert into saa7164_readl() */ | |
646 | /* Read the 4 hardware interrupt registers */ | |
1a6450d4 | 647 | intstat[i] = saa7164_readl(dev->int_status + (i * 4)); |
443c1228 | 648 | |
50bcb4ae ST |
649 | if (intstat[i]) |
650 | handled = 1; | |
443c1228 | 651 | } |
50bcb4ae | 652 | if (handled == 0) |
443c1228 | 653 | goto out; |
443c1228 ST |
654 | |
655 | /* For each of the HW interrupt registers */ | |
656 | for (i = 0; i < INT_SIZE/4; i++) { | |
657 | ||
658 | if (intstat[i]) { | |
659 | /* Each function of the board has it's own interruptid. | |
660 | * Find the function that triggered then call | |
661 | * it's handler. | |
662 | */ | |
663 | for (bit = 0; bit < 32; bit++) { | |
664 | ||
665 | if (((intstat[i] >> bit) & 0x00000001) == 0) | |
666 | continue; | |
667 | ||
668 | /* Calculate the interrupt id (0x00 to 0x7f) */ | |
669 | ||
50bcb4ae ST |
670 | intid = (i * 32) + bit; |
671 | if (intid == dev->intfdesc.bInterruptId) { | |
443c1228 ST |
672 | /* A response to an cmd/api call */ |
673 | schedule_work(&dev->workcmd); | |
7615e434 | 674 | } else if (intid == porta->hwcfg.interruptid) { |
443c1228 ST |
675 | |
676 | /* Transport path 1 */ | |
7615e434 | 677 | saa7164_irq_ts(porta); |
443c1228 | 678 | |
7615e434 | 679 | } else if (intid == portb->hwcfg.interruptid) { |
443c1228 ST |
680 | |
681 | /* Transport path 2 */ | |
7615e434 ST |
682 | saa7164_irq_ts(portb); |
683 | ||
684 | } else if (intid == portc->hwcfg.interruptid) { | |
685 | ||
686 | /* Encoder path 1 */ | |
687 | saa7164_irq_encoder(portc); | |
688 | ||
689 | } else if (intid == portd->hwcfg.interruptid) { | |
690 | ||
e8ce2f21 | 691 | /* Encoder path 2 */ |
7615e434 | 692 | saa7164_irq_encoder(portd); |
443c1228 | 693 | |
e8ce2f21 ST |
694 | } else if (intid == porte->hwcfg.interruptid) { |
695 | ||
696 | /* VBI path 1 */ | |
697 | saa7164_irq_vbi(porte); | |
698 | ||
699 | } else if (intid == portf->hwcfg.interruptid) { | |
700 | ||
701 | /* VBI path 2 */ | |
702 | saa7164_irq_vbi(portf); | |
703 | ||
443c1228 ST |
704 | } else { |
705 | /* Find the function */ | |
706 | dprintk(DBGLVL_IRQ, | |
707 | "%s() unhandled interrupt " | |
708 | "reg 0x%x bit 0x%x " | |
709 | "intid = 0x%x\n", | |
50bcb4ae | 710 | __func__, i, bit, intid); |
443c1228 ST |
711 | } |
712 | } | |
713 | ||
443c1228 | 714 | /* Ack it */ |
1a6450d4 | 715 | saa7164_writel(dev->int_ack + (i * 4), intstat[i]); |
443c1228 ST |
716 | |
717 | } | |
718 | } | |
719 | out: | |
720 | return IRQ_RETVAL(handled); | |
721 | } | |
722 | ||
723 | void saa7164_getfirmwarestatus(struct saa7164_dev *dev) | |
724 | { | |
725 | struct saa7164_fw_status *s = &dev->fw_status; | |
726 | ||
727 | dev->fw_status.status = saa7164_readl(SAA_DEVICE_SYSINIT_STATUS); | |
728 | dev->fw_status.mode = saa7164_readl(SAA_DEVICE_SYSINIT_MODE); | |
729 | dev->fw_status.spec = saa7164_readl(SAA_DEVICE_SYSINIT_SPEC); | |
730 | dev->fw_status.inst = saa7164_readl(SAA_DEVICE_SYSINIT_INST); | |
731 | dev->fw_status.cpuload = saa7164_readl(SAA_DEVICE_SYSINIT_CPULOAD); | |
732 | dev->fw_status.remainheap = | |
733 | saa7164_readl(SAA_DEVICE_SYSINIT_REMAINHEAP); | |
734 | ||
735 | dprintk(1, "Firmware status:\n"); | |
736 | dprintk(1, " .status = 0x%08x\n", s->status); | |
737 | dprintk(1, " .mode = 0x%08x\n", s->mode); | |
738 | dprintk(1, " .spec = 0x%08x\n", s->spec); | |
739 | dprintk(1, " .inst = 0x%08x\n", s->inst); | |
740 | dprintk(1, " .cpuload = 0x%08x\n", s->cpuload); | |
741 | dprintk(1, " .remainheap = 0x%08x\n", s->remainheap); | |
742 | } | |
743 | ||
744 | u32 saa7164_getcurrentfirmwareversion(struct saa7164_dev *dev) | |
745 | { | |
746 | u32 reg; | |
747 | ||
748 | reg = saa7164_readl(SAA_DEVICE_VERSION); | |
749 | dprintk(1, "Device running firmware version %d.%d.%d.%d (0x%x)\n", | |
750 | (reg & 0x0000fc00) >> 10, | |
751 | (reg & 0x000003e0) >> 5, | |
752 | (reg & 0x0000001f), | |
753 | (reg & 0xffff0000) >> 16, | |
754 | reg); | |
755 | ||
756 | return reg; | |
757 | } | |
758 | ||
443c1228 ST |
759 | /* TODO: Debugging func, remove */ |
760 | void saa7164_dumpregs(struct saa7164_dev *dev, u32 addr) | |
761 | { | |
762 | int i; | |
763 | ||
764 | dprintk(1, "--------------------> " | |
765 | "00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
766 | ||
767 | for (i = 0; i < 0x100; i += 16) | |
768 | dprintk(1, "region0[0x%08x] = " | |
769 | "%02x %02x %02x %02x %02x %02x %02x %02x" | |
770 | " %02x %02x %02x %02x %02x %02x %02x %02x\n", i, | |
771 | (u8)saa7164_readb(addr + i + 0), | |
772 | (u8)saa7164_readb(addr + i + 1), | |
773 | (u8)saa7164_readb(addr + i + 2), | |
774 | (u8)saa7164_readb(addr + i + 3), | |
775 | (u8)saa7164_readb(addr + i + 4), | |
776 | (u8)saa7164_readb(addr + i + 5), | |
777 | (u8)saa7164_readb(addr + i + 6), | |
778 | (u8)saa7164_readb(addr + i + 7), | |
779 | (u8)saa7164_readb(addr + i + 8), | |
780 | (u8)saa7164_readb(addr + i + 9), | |
781 | (u8)saa7164_readb(addr + i + 10), | |
782 | (u8)saa7164_readb(addr + i + 11), | |
783 | (u8)saa7164_readb(addr + i + 12), | |
784 | (u8)saa7164_readb(addr + i + 13), | |
785 | (u8)saa7164_readb(addr + i + 14), | |
786 | (u8)saa7164_readb(addr + i + 15) | |
787 | ); | |
788 | } | |
789 | ||
790 | static void saa7164_dump_hwdesc(struct saa7164_dev *dev) | |
791 | { | |
4d270cfb MCC |
792 | dprintk(1, "@0x%p hwdesc sizeof(struct tmComResHWDescr) = %d bytes\n", |
793 | &dev->hwdesc, (u32)sizeof(struct tmComResHWDescr)); | |
443c1228 ST |
794 | |
795 | dprintk(1, " .bLength = 0x%x\n", dev->hwdesc.bLength); | |
796 | dprintk(1, " .bDescriptorType = 0x%x\n", dev->hwdesc.bDescriptorType); | |
797 | dprintk(1, " .bDescriptorSubtype = 0x%x\n", | |
798 | dev->hwdesc.bDescriptorSubtype); | |
799 | ||
800 | dprintk(1, " .bcdSpecVersion = 0x%x\n", dev->hwdesc.bcdSpecVersion); | |
801 | dprintk(1, " .dwClockFrequency = 0x%x\n", dev->hwdesc.dwClockFrequency); | |
802 | dprintk(1, " .dwClockUpdateRes = 0x%x\n", dev->hwdesc.dwClockUpdateRes); | |
803 | dprintk(1, " .bCapabilities = 0x%x\n", dev->hwdesc.bCapabilities); | |
804 | dprintk(1, " .dwDeviceRegistersLocation = 0x%x\n", | |
805 | dev->hwdesc.dwDeviceRegistersLocation); | |
806 | ||
807 | dprintk(1, " .dwHostMemoryRegion = 0x%x\n", | |
808 | dev->hwdesc.dwHostMemoryRegion); | |
809 | ||
810 | dprintk(1, " .dwHostMemoryRegionSize = 0x%x\n", | |
811 | dev->hwdesc.dwHostMemoryRegionSize); | |
812 | ||
813 | dprintk(1, " .dwHostHibernatMemRegion = 0x%x\n", | |
814 | dev->hwdesc.dwHostHibernatMemRegion); | |
815 | ||
816 | dprintk(1, " .dwHostHibernatMemRegionSize = 0x%x\n", | |
817 | dev->hwdesc.dwHostHibernatMemRegionSize); | |
818 | } | |
819 | ||
820 | static void saa7164_dump_intfdesc(struct saa7164_dev *dev) | |
821 | { | |
822 | dprintk(1, "@0x%p intfdesc " | |
4d270cfb MCC |
823 | "sizeof(struct tmComResInterfaceDescr) = %d bytes\n", |
824 | &dev->intfdesc, (u32)sizeof(struct tmComResInterfaceDescr)); | |
443c1228 ST |
825 | |
826 | dprintk(1, " .bLength = 0x%x\n", dev->intfdesc.bLength); | |
827 | dprintk(1, " .bDescriptorType = 0x%x\n", dev->intfdesc.bDescriptorType); | |
828 | dprintk(1, " .bDescriptorSubtype = 0x%x\n", | |
829 | dev->intfdesc.bDescriptorSubtype); | |
830 | ||
831 | dprintk(1, " .bFlags = 0x%x\n", dev->intfdesc.bFlags); | |
832 | dprintk(1, " .bInterfaceType = 0x%x\n", dev->intfdesc.bInterfaceType); | |
833 | dprintk(1, " .bInterfaceId = 0x%x\n", dev->intfdesc.bInterfaceId); | |
834 | dprintk(1, " .bBaseInterface = 0x%x\n", dev->intfdesc.bBaseInterface); | |
835 | dprintk(1, " .bInterruptId = 0x%x\n", dev->intfdesc.bInterruptId); | |
836 | dprintk(1, " .bDebugInterruptId = 0x%x\n", | |
837 | dev->intfdesc.bDebugInterruptId); | |
838 | ||
839 | dprintk(1, " .BARLocation = 0x%x\n", dev->intfdesc.BARLocation); | |
840 | } | |
841 | ||
842 | static void saa7164_dump_busdesc(struct saa7164_dev *dev) | |
843 | { | |
4d270cfb MCC |
844 | dprintk(1, "@0x%p busdesc sizeof(struct tmComResBusDescr) = %d bytes\n", |
845 | &dev->busdesc, (u32)sizeof(struct tmComResBusDescr)); | |
443c1228 ST |
846 | |
847 | dprintk(1, " .CommandRing = 0x%016Lx\n", dev->busdesc.CommandRing); | |
848 | dprintk(1, " .ResponseRing = 0x%016Lx\n", dev->busdesc.ResponseRing); | |
849 | dprintk(1, " .CommandWrite = 0x%x\n", dev->busdesc.CommandWrite); | |
850 | dprintk(1, " .CommandRead = 0x%x\n", dev->busdesc.CommandRead); | |
851 | dprintk(1, " .ResponseWrite = 0x%x\n", dev->busdesc.ResponseWrite); | |
852 | dprintk(1, " .ResponseRead = 0x%x\n", dev->busdesc.ResponseRead); | |
853 | } | |
854 | ||
855 | /* Much of the hardware configuration and PCI registers are configured | |
856 | * dynamically depending on firmware. We have to cache some initial | |
857 | * structures then use these to locate other important structures | |
858 | * from PCI space. | |
859 | */ | |
860 | static void saa7164_get_descriptors(struct saa7164_dev *dev) | |
861 | { | |
4d270cfb MCC |
862 | memcpy_fromio(&dev->hwdesc, dev->bmmio, sizeof(struct tmComResHWDescr)); |
863 | memcpy_fromio(&dev->intfdesc, dev->bmmio + sizeof(struct tmComResHWDescr), | |
864 | sizeof(struct tmComResInterfaceDescr)); | |
12d3203e | 865 | memcpy_fromio(&dev->busdesc, dev->bmmio + dev->intfdesc.BARLocation, |
4d270cfb | 866 | sizeof(struct tmComResBusDescr)); |
443c1228 | 867 | |
4d270cfb MCC |
868 | if (dev->hwdesc.bLength != sizeof(struct tmComResHWDescr)) { |
869 | printk(KERN_ERR "Structure struct tmComResHWDescr is mangled\n"); | |
207b42c4 | 870 | printk(KERN_ERR "Need %x got %d\n", dev->hwdesc.bLength, |
4d270cfb | 871 | (u32)sizeof(struct tmComResHWDescr)); |
443c1228 ST |
872 | } else |
873 | saa7164_dump_hwdesc(dev); | |
874 | ||
4d270cfb MCC |
875 | if (dev->intfdesc.bLength != sizeof(struct tmComResInterfaceDescr)) { |
876 | printk(KERN_ERR "struct struct tmComResInterfaceDescr is mangled\n"); | |
207b42c4 | 877 | printk(KERN_ERR "Need %x got %d\n", dev->intfdesc.bLength, |
4d270cfb | 878 | (u32)sizeof(struct tmComResInterfaceDescr)); |
443c1228 ST |
879 | } else |
880 | saa7164_dump_intfdesc(dev); | |
881 | ||
882 | saa7164_dump_busdesc(dev); | |
883 | } | |
884 | ||
885 | static int saa7164_pci_quirks(struct saa7164_dev *dev) | |
886 | { | |
887 | return 0; | |
888 | } | |
889 | ||
890 | static int get_resources(struct saa7164_dev *dev) | |
891 | { | |
892 | if (request_mem_region(pci_resource_start(dev->pci, 0), | |
893 | pci_resource_len(dev->pci, 0), dev->name)) { | |
894 | ||
895 | if (request_mem_region(pci_resource_start(dev->pci, 2), | |
896 | pci_resource_len(dev->pci, 2), dev->name)) | |
897 | return 0; | |
898 | } | |
899 | ||
900 | printk(KERN_ERR "%s: can't get MMIO memory @ 0x%llx or 0x%llx\n", | |
901 | dev->name, | |
902 | (u64)pci_resource_start(dev->pci, 0), | |
903 | (u64)pci_resource_start(dev->pci, 2)); | |
904 | ||
905 | return -EBUSY; | |
906 | } | |
907 | ||
7615e434 ST |
908 | static int saa7164_port_init(struct saa7164_dev *dev, int portnr) |
909 | { | |
61ca1500 | 910 | struct saa7164_port *port = NULL; |
7615e434 ST |
911 | |
912 | if ((portnr < 0) || (portnr >= SAA7164_MAX_PORTS)) | |
913 | BUG(); | |
914 | ||
c7e242ba | 915 | port = &dev->ports[portnr]; |
7615e434 ST |
916 | |
917 | port->dev = dev; | |
918 | port->nr = portnr; | |
919 | ||
920 | if ((portnr == SAA7164_PORT_TS1) || (portnr == SAA7164_PORT_TS2)) | |
921 | port->type = SAA7164_MPEG_DVB; | |
922 | else | |
e8ce2f21 | 923 | if ((portnr == SAA7164_PORT_ENC1) || (portnr == SAA7164_PORT_ENC2)) { |
7615e434 | 924 | port->type = SAA7164_MPEG_ENCODER; |
e8ce2f21 ST |
925 | |
926 | /* We need a deferred interrupt handler for cmd handling */ | |
927 | INIT_WORK(&port->workenc, saa7164_work_enchandler); | |
bc250684 | 928 | } else if ((portnr == SAA7164_PORT_VBI1) || (portnr == SAA7164_PORT_VBI2)) { |
e8ce2f21 ST |
929 | port->type = SAA7164_MPEG_VBI; |
930 | ||
931 | /* We need a deferred interrupt handler for cmd handling */ | |
932 | INIT_WORK(&port->workenc, saa7164_work_vbihandler); | |
933 | } else | |
7615e434 ST |
934 | BUG(); |
935 | ||
936 | /* Init all the critical resources */ | |
937 | mutex_init(&port->dvb.lock); | |
938 | INIT_LIST_HEAD(&port->dmaqueue.list); | |
939 | mutex_init(&port->dmaqueue_lock); | |
940 | ||
941 | INIT_LIST_HEAD(&port->list_buf_used.list); | |
942 | INIT_LIST_HEAD(&port->list_buf_free.list); | |
943 | init_waitqueue_head(&port->wait_read); | |
91d80189 | 944 | |
91d80189 ST |
945 | |
946 | saa7164_histogram_reset(&port->irq_interval, "irq intervals"); | |
947 | saa7164_histogram_reset(&port->svc_interval, "deferred intervals"); | |
948 | saa7164_histogram_reset(&port->irq_svc_interval, | |
949 | "irq to deferred intervals"); | |
58acca10 | 950 | saa7164_histogram_reset(&port->read_interval, |
e8ce2f21 | 951 | "encoder/vbi read() intervals"); |
58acca10 | 952 | saa7164_histogram_reset(&port->poll_interval, |
e8ce2f21 | 953 | "encoder/vbi poll() intervals"); |
91d80189 | 954 | |
7615e434 ST |
955 | return 0; |
956 | } | |
957 | ||
443c1228 ST |
958 | static int saa7164_dev_setup(struct saa7164_dev *dev) |
959 | { | |
960 | int i; | |
961 | ||
962 | mutex_init(&dev->lock); | |
963 | atomic_inc(&dev->refcount); | |
964 | dev->nr = saa7164_devcount++; | |
965 | ||
0e72cc8b | 966 | snprintf(dev->name, sizeof(dev->name), "saa7164[%d]", dev->nr); |
443c1228 ST |
967 | |
968 | mutex_lock(&devlist); | |
969 | list_add_tail(&dev->devlist, &saa7164_devlist); | |
970 | mutex_unlock(&devlist); | |
971 | ||
972 | /* board config */ | |
973 | dev->board = UNSET; | |
974 | if (card[dev->nr] < saa7164_bcount) | |
975 | dev->board = card[dev->nr]; | |
976 | ||
977 | for (i = 0; UNSET == dev->board && i < saa7164_idcount; i++) | |
978 | if (dev->pci->subsystem_vendor == saa7164_subids[i].subvendor && | |
979 | dev->pci->subsystem_device == | |
980 | saa7164_subids[i].subdevice) | |
981 | dev->board = saa7164_subids[i].card; | |
982 | ||
983 | if (UNSET == dev->board) { | |
984 | dev->board = SAA7164_BOARD_UNKNOWN; | |
985 | saa7164_card_list(dev); | |
986 | } | |
987 | ||
988 | dev->pci_bus = dev->pci->bus->number; | |
989 | dev->pci_slot = PCI_SLOT(dev->pci->devfn); | |
990 | ||
991 | /* I2C Defaults / setup */ | |
992 | dev->i2c_bus[0].dev = dev; | |
993 | dev->i2c_bus[0].nr = 0; | |
994 | dev->i2c_bus[1].dev = dev; | |
995 | dev->i2c_bus[1].nr = 1; | |
996 | dev->i2c_bus[2].dev = dev; | |
997 | dev->i2c_bus[2].nr = 2; | |
998 | ||
7615e434 ST |
999 | /* Transport + Encoder ports 1, 2, 3, 4 - Defaults / setup */ |
1000 | saa7164_port_init(dev, SAA7164_PORT_TS1); | |
1001 | saa7164_port_init(dev, SAA7164_PORT_TS2); | |
1002 | saa7164_port_init(dev, SAA7164_PORT_ENC1); | |
1003 | saa7164_port_init(dev, SAA7164_PORT_ENC2); | |
e8ce2f21 ST |
1004 | saa7164_port_init(dev, SAA7164_PORT_VBI1); |
1005 | saa7164_port_init(dev, SAA7164_PORT_VBI2); | |
443c1228 ST |
1006 | |
1007 | if (get_resources(dev) < 0) { | |
1008 | printk(KERN_ERR "CORE %s No more PCIe resources for " | |
1009 | "subsystem: %04x:%04x\n", | |
1010 | dev->name, dev->pci->subsystem_vendor, | |
1011 | dev->pci->subsystem_device); | |
1012 | ||
1013 | saa7164_devcount--; | |
1014 | return -ENODEV; | |
1015 | } | |
1016 | ||
1017 | /* PCI/e allocations */ | |
1018 | dev->lmmio = ioremap(pci_resource_start(dev->pci, 0), | |
1019 | pci_resource_len(dev->pci, 0)); | |
1020 | ||
1021 | dev->lmmio2 = ioremap(pci_resource_start(dev->pci, 2), | |
1022 | pci_resource_len(dev->pci, 2)); | |
1023 | ||
443c1228 ST |
1024 | dev->bmmio = (u8 __iomem *)dev->lmmio; |
1025 | dev->bmmio2 = (u8 __iomem *)dev->lmmio2; | |
443c1228 | 1026 | |
1a6450d4 ST |
1027 | /* Inerrupt and ack register locations offset of bmmio */ |
1028 | dev->int_status = 0x183000 + 0xf80; | |
1029 | dev->int_ack = 0x183000 + 0xf90; | |
443c1228 ST |
1030 | |
1031 | printk(KERN_INFO | |
1032 | "CORE %s: subsystem: %04x:%04x, board: %s [card=%d,%s]\n", | |
1033 | dev->name, dev->pci->subsystem_vendor, | |
1034 | dev->pci->subsystem_device, saa7164_boards[dev->board].name, | |
1035 | dev->board, card[dev->nr] == dev->board ? | |
1036 | "insmod option" : "autodetected"); | |
1037 | ||
1038 | saa7164_pci_quirks(dev); | |
1039 | ||
1040 | return 0; | |
1041 | } | |
1042 | ||
1043 | static void saa7164_dev_unregister(struct saa7164_dev *dev) | |
1044 | { | |
1045 | dprintk(1, "%s()\n", __func__); | |
1046 | ||
1047 | release_mem_region(pci_resource_start(dev->pci, 0), | |
1048 | pci_resource_len(dev->pci, 0)); | |
1049 | ||
1050 | release_mem_region(pci_resource_start(dev->pci, 2), | |
1051 | pci_resource_len(dev->pci, 2)); | |
1052 | ||
1053 | if (!atomic_dec_and_test(&dev->refcount)) | |
1054 | return; | |
1055 | ||
1056 | iounmap(dev->lmmio); | |
1057 | iounmap(dev->lmmio2); | |
1058 | ||
1059 | return; | |
1060 | } | |
1061 | ||
e48836b8 ST |
1062 | #ifdef CONFIG_PROC_FS |
1063 | static int saa7164_proc_show(struct seq_file *m, void *v) | |
1064 | { | |
1065 | struct saa7164_dev *dev; | |
4d270cfb | 1066 | struct tmComResBusInfo *b; |
e48836b8 ST |
1067 | struct list_head *list; |
1068 | int i, c; | |
1069 | ||
1070 | if (saa7164_devcount == 0) | |
1071 | return 0; | |
1072 | ||
1073 | list_for_each(list, &saa7164_devlist) { | |
1074 | dev = list_entry(list, struct saa7164_dev, devlist); | |
1075 | seq_printf(m, "%s = %p\n", dev->name, dev); | |
1076 | ||
e48836b8 ST |
1077 | /* Lock the bus from any other access */ |
1078 | b = &dev->bus; | |
1079 | mutex_lock(&b->lock); | |
0b62ceb0 ST |
1080 | |
1081 | seq_printf(m, " .m_pdwSetWritePos = 0x%x (0x%08x)\n", | |
1082 | b->m_dwSetReadPos, saa7164_readl(b->m_dwSetReadPos)); | |
1083 | ||
1084 | seq_printf(m, " .m_pdwSetReadPos = 0x%x (0x%08x)\n", | |
1085 | b->m_dwSetWritePos, saa7164_readl(b->m_dwSetWritePos)); | |
1086 | ||
1087 | seq_printf(m, " .m_pdwGetWritePos = 0x%x (0x%08x)\n", | |
1088 | b->m_dwGetReadPos, saa7164_readl(b->m_dwGetReadPos)); | |
1089 | ||
1090 | seq_printf(m, " .m_pdwGetReadPos = 0x%x (0x%08x)\n", | |
1091 | b->m_dwGetWritePos, saa7164_readl(b->m_dwGetWritePos)); | |
1092 | c = 0; | |
1093 | seq_printf(m, "\n Set Ring:\n"); | |
1094 | seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
1095 | for (i = 0; i < b->m_dwSizeSetRing; i++) { | |
1096 | if (c == 0) | |
1097 | seq_printf(m, " %04x:", i); | |
1098 | ||
1099 | seq_printf(m, " %02x", *(b->m_pdwSetRing + i)); | |
1100 | ||
1101 | if (++c == 16) { | |
1102 | seq_printf(m, "\n"); | |
1103 | c = 0; | |
1104 | } | |
1105 | } | |
1106 | ||
1107 | c = 0; | |
1108 | seq_printf(m, "\n Get Ring:\n"); | |
1109 | seq_printf(m, "\n addr 00 01 02 03 04 05 06 07 08 09 0a 0b 0c 0d 0e 0f\n"); | |
1110 | for (i = 0; i < b->m_dwSizeGetRing; i++) { | |
1111 | if (c == 0) | |
1112 | seq_printf(m, " %04x:", i); | |
1113 | ||
1114 | seq_printf(m, " %02x", *(b->m_pdwGetRing + i)); | |
1115 | ||
1116 | if (++c == 16) { | |
1117 | seq_printf(m, "\n"); | |
1118 | c = 0; | |
1119 | } | |
1120 | } | |
1121 | ||
e48836b8 ST |
1122 | mutex_unlock(&b->lock); |
1123 | ||
1124 | } | |
1125 | ||
1126 | return 0; | |
1127 | } | |
1128 | ||
1129 | static int saa7164_proc_open(struct inode *inode, struct file *filp) | |
1130 | { | |
1131 | return single_open(filp, saa7164_proc_show, NULL); | |
1132 | } | |
1133 | ||
bc250684 | 1134 | static const struct file_operations saa7164_proc_fops = { |
e48836b8 ST |
1135 | .open = saa7164_proc_open, |
1136 | .read = seq_read, | |
1137 | .llseek = seq_lseek, | |
1138 | .release = single_release, | |
1139 | }; | |
1140 | ||
1141 | static int saa7164_proc_create(void) | |
1142 | { | |
1143 | struct proc_dir_entry *pe; | |
1144 | ||
1145 | pe = proc_create("saa7164", S_IRUGO, NULL, &saa7164_proc_fops); | |
1146 | if (!pe) | |
1147 | return -ENOMEM; | |
1148 | ||
1149 | return 0; | |
1150 | } | |
1151 | #endif | |
1152 | ||
0b62ceb0 ST |
1153 | static int saa7164_thread_function(void *data) |
1154 | { | |
1155 | struct saa7164_dev *dev = data; | |
4d270cfb | 1156 | struct tmFwInfoStruct fwinfo; |
1247ff5c | 1157 | u64 last_poll_time = 0; |
0b62ceb0 ST |
1158 | |
1159 | dprintk(DBGLVL_THR, "thread started\n"); | |
1160 | ||
1161 | set_freezable(); | |
1162 | ||
1163 | while (1) { | |
1164 | msleep_interruptible(100); | |
1165 | if (kthread_should_stop()) | |
1166 | break; | |
1167 | try_to_freeze(); | |
1168 | ||
1169 | dprintk(DBGLVL_THR, "thread running\n"); | |
1170 | ||
1171 | /* Dump the firmware debug message to console */ | |
1247ff5c ST |
1172 | /* Polling this costs us 1-2% of the arm CPU */ |
1173 | /* convert this into a respnde to interrupt 0x7a */ | |
0b62ceb0 ST |
1174 | saa7164_api_collect_debug(dev); |
1175 | ||
1247ff5c ST |
1176 | /* Monitor CPU load every 1 second */ |
1177 | if ((last_poll_time + 1000 /* ms */) < jiffies_to_msecs(jiffies)) { | |
1178 | saa7164_api_get_load_info(dev, &fwinfo); | |
1179 | last_poll_time = jiffies_to_msecs(jiffies); | |
1180 | } | |
1181 | ||
0b62ceb0 ST |
1182 | } |
1183 | ||
1184 | dprintk(DBGLVL_THR, "thread exiting\n"); | |
1185 | return 0; | |
1186 | } | |
1187 | ||
4c62e976 GKH |
1188 | static int saa7164_initdev(struct pci_dev *pci_dev, |
1189 | const struct pci_device_id *pci_id) | |
443c1228 ST |
1190 | { |
1191 | struct saa7164_dev *dev; | |
1192 | int err, i; | |
1193 | u32 version; | |
1194 | ||
1195 | dev = kzalloc(sizeof(*dev), GFP_KERNEL); | |
1196 | if (NULL == dev) | |
1197 | return -ENOMEM; | |
1198 | ||
1199 | /* pci init */ | |
1200 | dev->pci = pci_dev; | |
1201 | if (pci_enable_device(pci_dev)) { | |
1202 | err = -EIO; | |
1203 | goto fail_free; | |
1204 | } | |
1205 | ||
1206 | if (saa7164_dev_setup(dev) < 0) { | |
1207 | err = -EINVAL; | |
1208 | goto fail_free; | |
1209 | } | |
1210 | ||
1211 | /* print pci info */ | |
abd34d8d | 1212 | dev->pci_rev = pci_dev->revision; |
443c1228 ST |
1213 | pci_read_config_byte(pci_dev, PCI_LATENCY_TIMER, &dev->pci_lat); |
1214 | printk(KERN_INFO "%s/0: found at %s, rev: %d, irq: %d, " | |
1215 | "latency: %d, mmio: 0x%llx\n", dev->name, | |
1216 | pci_name(pci_dev), dev->pci_rev, pci_dev->irq, | |
1217 | dev->pci_lat, | |
1218 | (unsigned long long)pci_resource_start(pci_dev, 0)); | |
1219 | ||
1220 | pci_set_master(pci_dev); | |
1221 | /* TODO */ | |
1222 | if (!pci_dma_supported(pci_dev, 0xffffffff)) { | |
1223 | printk("%s/0: Oops: no 32bit PCI DMA ???\n", dev->name); | |
1224 | err = -EIO; | |
1225 | goto fail_irq; | |
1226 | } | |
1227 | ||
1228 | err = request_irq(pci_dev->irq, saa7164_irq, | |
1229 | IRQF_SHARED | IRQF_DISABLED, dev->name, dev); | |
1230 | if (err < 0) { | |
1231 | printk(KERN_ERR "%s: can't get IRQ %d\n", dev->name, | |
1232 | pci_dev->irq); | |
1233 | err = -EIO; | |
1234 | goto fail_irq; | |
1235 | } | |
1236 | ||
1237 | pci_set_drvdata(pci_dev, dev); | |
1238 | ||
443c1228 ST |
1239 | /* Init the internal command list */ |
1240 | for (i = 0; i < SAA_CMD_MAX_MSG_UNITS; i++) { | |
1241 | dev->cmds[i].seqno = i; | |
1242 | dev->cmds[i].inuse = 0; | |
1243 | mutex_init(&dev->cmds[i].lock); | |
1244 | init_waitqueue_head(&dev->cmds[i].wait); | |
1245 | } | |
1246 | ||
1247 | /* We need a deferred interrupt handler for cmd handling */ | |
1248 | INIT_WORK(&dev->workcmd, saa7164_work_cmdhandler); | |
1249 | ||
1250 | /* Only load the firmware if we know the board */ | |
1251 | if (dev->board != SAA7164_BOARD_UNKNOWN) { | |
1252 | ||
1253 | err = saa7164_downloadfirmware(dev); | |
1254 | if (err < 0) { | |
1255 | printk(KERN_ERR | |
50bcb4ae ST |
1256 | "Failed to boot firmware, no features " |
1257 | "registered\n"); | |
1258 | goto fail_fw; | |
443c1228 ST |
1259 | } |
1260 | ||
1261 | saa7164_get_descriptors(dev); | |
1262 | saa7164_dumpregs(dev, 0); | |
1263 | saa7164_getcurrentfirmwareversion(dev); | |
1264 | saa7164_getfirmwarestatus(dev); | |
1265 | err = saa7164_bus_setup(dev); | |
1266 | if (err < 0) | |
1267 | printk(KERN_ERR | |
1268 | "Failed to setup the bus, will continue\n"); | |
1269 | saa7164_bus_dump(dev); | |
1270 | ||
1271 | /* Ping the running firmware via the command bus and get the | |
1272 | * firmware version, this checks the bus is running OK. | |
1273 | */ | |
1274 | version = 0; | |
1275 | if (saa7164_api_get_fw_version(dev, &version) == SAA_OK) | |
1276 | dprintk(1, "Bus is operating correctly using " | |
1277 | "version %d.%d.%d.%d (0x%x)\n", | |
1278 | (version & 0x0000fc00) >> 10, | |
1279 | (version & 0x000003e0) >> 5, | |
1280 | (version & 0x0000001f), | |
1281 | (version & 0xffff0000) >> 16, | |
1282 | version); | |
1283 | else | |
1284 | printk(KERN_ERR | |
1285 | "Failed to communicate with the firmware\n"); | |
1286 | ||
1287 | /* Bring up the I2C buses */ | |
1288 | saa7164_i2c_register(&dev->i2c_bus[0]); | |
1289 | saa7164_i2c_register(&dev->i2c_bus[1]); | |
1290 | saa7164_i2c_register(&dev->i2c_bus[2]); | |
1291 | saa7164_gpio_setup(dev); | |
1292 | saa7164_card_setup(dev); | |
1293 | ||
443c1228 ST |
1294 | /* Parse the dynamic device configuration, find various |
1295 | * media endpoints (MPEG, WMV, PS, TS) and cache their | |
1296 | * configuration details into the driver, so we can | |
1297 | * reference them later during simething_register() func, | |
1298 | * interrupt handlers, deferred work handlers etc. | |
1299 | */ | |
1300 | saa7164_api_enum_subdevs(dev); | |
1301 | ||
443c1228 ST |
1302 | /* Begin to create the video sub-systems and register funcs */ |
1303 | if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) { | |
c7e242ba | 1304 | if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS1]) < 0) { |
443c1228 ST |
1305 | printk(KERN_ERR "%s() Failed to register " |
1306 | "dvb adapters on porta\n", | |
1307 | __func__); | |
1308 | } | |
1309 | } | |
1310 | ||
1311 | if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) { | |
c7e242ba | 1312 | if (saa7164_dvb_register(&dev->ports[SAA7164_PORT_TS2]) < 0) { |
443c1228 ST |
1313 | printk(KERN_ERR"%s() Failed to register " |
1314 | "dvb adapters on portb\n", | |
1315 | __func__); | |
1316 | } | |
1317 | } | |
1318 | ||
7615e434 | 1319 | if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) { |
c7e242ba | 1320 | if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC1]) < 0) { |
7615e434 ST |
1321 | printk(KERN_ERR"%s() Failed to register " |
1322 | "mpeg encoder\n", __func__); | |
1323 | } | |
1324 | } | |
1325 | ||
1326 | if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) { | |
c7e242ba | 1327 | if (saa7164_encoder_register(&dev->ports[SAA7164_PORT_ENC2]) < 0) { |
7615e434 ST |
1328 | printk(KERN_ERR"%s() Failed to register " |
1329 | "mpeg encoder\n", __func__); | |
1330 | } | |
1331 | } | |
1332 | ||
e8ce2f21 | 1333 | if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) { |
c7e242ba | 1334 | if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI1]) < 0) { |
e8ce2f21 ST |
1335 | printk(KERN_ERR"%s() Failed to register " |
1336 | "vbi device\n", __func__); | |
1337 | } | |
1338 | } | |
1339 | ||
1340 | if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) { | |
c7e242ba | 1341 | if (saa7164_vbi_register(&dev->ports[SAA7164_PORT_VBI2]) < 0) { |
e8ce2f21 ST |
1342 | printk(KERN_ERR"%s() Failed to register " |
1343 | "vbi device\n", __func__); | |
1344 | } | |
1345 | } | |
e48836b8 | 1346 | saa7164_api_set_debug(dev, fw_debug); |
e8ce2f21 | 1347 | |
0b62ceb0 ST |
1348 | if (fw_debug) { |
1349 | dev->kthread = kthread_run(saa7164_thread_function, dev, | |
1350 | "saa7164 debug"); | |
1351 | if (!dev->kthread) | |
1352 | printk(KERN_ERR "%s() Failed to create " | |
1353 | "debug kernel thread\n", __func__); | |
1354 | } | |
1355 | ||
443c1228 ST |
1356 | } /* != BOARD_UNKNOWN */ |
1357 | else | |
1358 | printk(KERN_ERR "%s() Unsupported board detected, " | |
1359 | "registering without firmware\n", __func__); | |
1360 | ||
b1912a85 | 1361 | dprintk(1, "%s() parameter debug = %d\n", __func__, saa_debug); |
2ceae8fd ST |
1362 | dprintk(1, "%s() parameter waitsecs = %d\n", __func__, waitsecs); |
1363 | ||
50bcb4ae | 1364 | fail_fw: |
443c1228 ST |
1365 | return 0; |
1366 | ||
1367 | fail_irq: | |
1368 | saa7164_dev_unregister(dev); | |
1369 | fail_free: | |
1370 | kfree(dev); | |
1371 | return err; | |
1372 | } | |
1373 | ||
1374 | static void saa7164_shutdown(struct saa7164_dev *dev) | |
1375 | { | |
1376 | dprintk(1, "%s()\n", __func__); | |
1377 | } | |
1378 | ||
4c62e976 | 1379 | static void saa7164_finidev(struct pci_dev *pci_dev) |
443c1228 ST |
1380 | { |
1381 | struct saa7164_dev *dev = pci_get_drvdata(pci_dev); | |
1382 | ||
0b62ceb0 ST |
1383 | if (dev->board != SAA7164_BOARD_UNKNOWN) { |
1384 | if (fw_debug && dev->kthread) { | |
1385 | kthread_stop(dev->kthread); | |
1386 | dev->kthread = NULL; | |
1387 | } | |
22760ed3 ST |
1388 | if (dev->firmwareloaded) |
1389 | saa7164_api_set_debug(dev, 0x00); | |
0b62ceb0 | 1390 | } |
e48836b8 | 1391 | |
c7e242ba MCC |
1392 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], |
1393 | &dev->ports[SAA7164_PORT_ENC1].irq_interval); | |
1394 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], | |
1395 | &dev->ports[SAA7164_PORT_ENC1].svc_interval); | |
1396 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], | |
1397 | &dev->ports[SAA7164_PORT_ENC1].irq_svc_interval); | |
1398 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], | |
1399 | &dev->ports[SAA7164_PORT_ENC1].read_interval); | |
1400 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_ENC1], | |
1401 | &dev->ports[SAA7164_PORT_ENC1].poll_interval); | |
1402 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI1], | |
1403 | &dev->ports[SAA7164_PORT_VBI1].read_interval); | |
1404 | saa7164_histogram_print(&dev->ports[SAA7164_PORT_VBI2], | |
1405 | &dev->ports[SAA7164_PORT_VBI2].poll_interval); | |
91d80189 | 1406 | |
443c1228 ST |
1407 | saa7164_shutdown(dev); |
1408 | ||
1409 | if (saa7164_boards[dev->board].porta == SAA7164_MPEG_DVB) | |
c7e242ba | 1410 | saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS1]); |
443c1228 ST |
1411 | |
1412 | if (saa7164_boards[dev->board].portb == SAA7164_MPEG_DVB) | |
c7e242ba | 1413 | saa7164_dvb_unregister(&dev->ports[SAA7164_PORT_TS2]); |
7615e434 ST |
1414 | |
1415 | if (saa7164_boards[dev->board].portc == SAA7164_MPEG_ENCODER) | |
c7e242ba | 1416 | saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC1]); |
7615e434 ST |
1417 | |
1418 | if (saa7164_boards[dev->board].portd == SAA7164_MPEG_ENCODER) | |
c7e242ba | 1419 | saa7164_encoder_unregister(&dev->ports[SAA7164_PORT_ENC2]); |
443c1228 | 1420 | |
e8ce2f21 | 1421 | if (saa7164_boards[dev->board].porte == SAA7164_MPEG_VBI) |
c7e242ba | 1422 | saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI1]); |
e8ce2f21 ST |
1423 | |
1424 | if (saa7164_boards[dev->board].portf == SAA7164_MPEG_VBI) | |
c7e242ba | 1425 | saa7164_vbi_unregister(&dev->ports[SAA7164_PORT_VBI2]); |
e8ce2f21 | 1426 | |
443c1228 ST |
1427 | saa7164_i2c_unregister(&dev->i2c_bus[0]); |
1428 | saa7164_i2c_unregister(&dev->i2c_bus[1]); | |
1429 | saa7164_i2c_unregister(&dev->i2c_bus[2]); | |
1430 | ||
1431 | pci_disable_device(pci_dev); | |
1432 | ||
1433 | /* unregister stuff */ | |
1434 | free_irq(pci_dev->irq, dev); | |
1435 | pci_set_drvdata(pci_dev, NULL); | |
1436 | ||
1437 | mutex_lock(&devlist); | |
1438 | list_del(&dev->devlist); | |
1439 | mutex_unlock(&devlist); | |
1440 | ||
1441 | saa7164_dev_unregister(dev); | |
1442 | kfree(dev); | |
1443 | } | |
1444 | ||
1445 | static struct pci_device_id saa7164_pci_tbl[] = { | |
1446 | { | |
1447 | /* SAA7164 */ | |
1448 | .vendor = 0x1131, | |
1449 | .device = 0x7164, | |
1450 | .subvendor = PCI_ANY_ID, | |
1451 | .subdevice = PCI_ANY_ID, | |
1452 | }, { | |
1453 | /* --- end of list --- */ | |
1454 | } | |
1455 | }; | |
1456 | MODULE_DEVICE_TABLE(pci, saa7164_pci_tbl); | |
1457 | ||
1458 | static struct pci_driver saa7164_pci_driver = { | |
1459 | .name = "saa7164", | |
1460 | .id_table = saa7164_pci_tbl, | |
1461 | .probe = saa7164_initdev, | |
4c62e976 | 1462 | .remove = saa7164_finidev, |
443c1228 ST |
1463 | /* TODO */ |
1464 | .suspend = NULL, | |
1465 | .resume = NULL, | |
1466 | }; | |
1467 | ||
9d440a08 | 1468 | static int __init saa7164_init(void) |
443c1228 ST |
1469 | { |
1470 | printk(KERN_INFO "saa7164 driver loaded\n"); | |
e48836b8 ST |
1471 | |
1472 | #ifdef CONFIG_PROC_FS | |
1473 | saa7164_proc_create(); | |
1474 | #endif | |
443c1228 ST |
1475 | return pci_register_driver(&saa7164_pci_driver); |
1476 | } | |
1477 | ||
9d440a08 | 1478 | static void __exit saa7164_fini(void) |
443c1228 | 1479 | { |
e48836b8 ST |
1480 | #ifdef CONFIG_PROC_FS |
1481 | remove_proc_entry("saa7164", NULL); | |
1482 | #endif | |
443c1228 ST |
1483 | pci_unregister_driver(&saa7164_pci_driver); |
1484 | } | |
1485 | ||
1486 | module_init(saa7164_init); | |
1487 | module_exit(saa7164_fini); | |
1488 |