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[mirror_ubuntu-hirsute-kernel.git] / drivers / media / pci / solo6x10 / solo6x10-v4l2-enc.c
CommitLineData
faa4fd2a 1/*
dcae5dac
HV
2 * Copyright (C) 2010-2013 Bluecherry, LLC <http://www.bluecherrydvr.com>
3 *
4 * Original author:
5 * Ben Collins <bcollins@ubuntu.com>
6 *
7 * Additional work by:
8 * John Brooks <john.brooks@bluecherry.net>
faa4fd2a
BC
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
14 *
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
faa4fd2a
BC
19 */
20
21#include <linux/kernel.h>
22#include <linux/module.h>
23#include <linux/kthread.h>
24#include <linux/freezer.h>
dcae5dac 25
faa4fd2a
BC
26#include <media/v4l2-ioctl.h>
27#include <media/v4l2-common.h>
94160497 28#include <media/v4l2-event.h>
382c31a9 29#include <media/videobuf2-dma-sg.h>
dcae5dac 30
ae69b22c 31#include "solo6x10.h"
dad7fab9 32#include "solo6x10-tw28.h"
b3c7d453 33#include "solo6x10-jpeg.h"
faa4fd2a 34
dcae5dac
HV
35#define MIN_VID_BUFFERS 2
36#define FRAME_BUF_SIZE (196 * 1024)
faa4fd2a 37#define MP4_QS 16
dcae5dac 38#define DMA_ALIGN 4096
faa4fd2a 39
dcae5dac
HV
40/* 6010 M4V */
41static unsigned char vop_6010_ntsc_d1[] = {
42 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x20,
43 0x02, 0x48, 0x1d, 0xc0, 0x00, 0x40, 0x00, 0x40,
44 0x00, 0x40, 0x00, 0x80, 0x00, 0x97, 0x53, 0x04,
45 0x1f, 0x4c, 0x58, 0x10, 0xf0, 0x71, 0x18, 0x3f,
46};
47
48static unsigned char vop_6010_ntsc_cif[] = {
49 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x20,
50 0x02, 0x48, 0x1d, 0xc0, 0x00, 0x40, 0x00, 0x40,
51 0x00, 0x40, 0x00, 0x80, 0x00, 0x97, 0x53, 0x04,
52 0x1f, 0x4c, 0x2c, 0x10, 0x78, 0x51, 0x18, 0x3f,
53};
54
55static unsigned char vop_6010_pal_d1[] = {
56 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x20,
57 0x02, 0x48, 0x15, 0xc0, 0x00, 0x40, 0x00, 0x40,
58 0x00, 0x40, 0x00, 0x80, 0x00, 0x97, 0x53, 0x04,
59 0x1f, 0x4c, 0x58, 0x11, 0x20, 0x71, 0x18, 0x3f,
60};
61
62static unsigned char vop_6010_pal_cif[] = {
63 0x00, 0x00, 0x01, 0x00, 0x00, 0x00, 0x01, 0x20,
64 0x02, 0x48, 0x15, 0xc0, 0x00, 0x40, 0x00, 0x40,
65 0x00, 0x40, 0x00, 0x80, 0x00, 0x97, 0x53, 0x04,
66 0x1f, 0x4c, 0x2c, 0x10, 0x90, 0x51, 0x18, 0x3f,
67};
68
69/* 6110 h.264 */
70static unsigned char vop_6110_ntsc_d1[] = {
71 0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x00, 0x1e,
72 0x9a, 0x74, 0x05, 0x81, 0xec, 0x80, 0x00, 0x00,
73 0x00, 0x01, 0x68, 0xce, 0x32, 0x28, 0x00, 0x00,
74};
75
76static unsigned char vop_6110_ntsc_cif[] = {
77 0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x00, 0x1e,
78 0x9a, 0x74, 0x0b, 0x0f, 0xc8, 0x00, 0x00, 0x00,
79 0x01, 0x68, 0xce, 0x32, 0x28, 0x00, 0x00, 0x00,
80};
81
82static unsigned char vop_6110_pal_d1[] = {
83 0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x00, 0x1e,
84 0x9a, 0x74, 0x05, 0x80, 0x93, 0x20, 0x00, 0x00,
85 0x00, 0x01, 0x68, 0xce, 0x32, 0x28, 0x00, 0x00,
86};
87
88static unsigned char vop_6110_pal_cif[] = {
89 0x00, 0x00, 0x00, 0x01, 0x67, 0x42, 0x00, 0x1e,
90 0x9a, 0x74, 0x0b, 0x04, 0xb2, 0x00, 0x00, 0x00,
91 0x01, 0x68, 0xce, 0x32, 0x28, 0x00, 0x00, 0x00,
faa4fd2a
BC
92};
93
4a61ad3c 94typedef __le32 vop_header[16];
dcae5dac
HV
95
96struct solo_enc_buf {
97 enum solo_enc_types type;
4a61ad3c 98 const vop_header *vh;
dcae5dac
HV
99 int motion;
100};
101
faa4fd2a
BC
102static int solo_is_motion_on(struct solo_enc_dev *solo_enc)
103{
decebabf 104 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a 105
dcae5dac
HV
106 return (solo_dev->motion_mask >> solo_enc->ch) & 1;
107}
108
109static int solo_motion_detected(struct solo_enc_dev *solo_enc)
110{
111 struct solo_dev *solo_dev = solo_enc->solo_dev;
112 unsigned long flags;
113 u32 ch_mask = 1 << solo_enc->ch;
114 int ret = 0;
115
116 spin_lock_irqsave(&solo_enc->motion_lock, flags);
117 if (solo_reg_read(solo_dev, SOLO_VI_MOT_STATUS) & ch_mask) {
118 solo_reg_write(solo_dev, SOLO_VI_MOT_CLEAR, ch_mask);
119 ret = 1;
120 }
121 spin_unlock_irqrestore(&solo_enc->motion_lock, flags);
122
123 return ret;
faa4fd2a
BC
124}
125
126static void solo_motion_toggle(struct solo_enc_dev *solo_enc, int on)
127{
decebabf 128 struct solo_dev *solo_dev = solo_enc->solo_dev;
dcae5dac
HV
129 u32 mask = 1 << solo_enc->ch;
130 unsigned long flags;
faa4fd2a 131
dcae5dac 132 spin_lock_irqsave(&solo_enc->motion_lock, flags);
faa4fd2a
BC
133
134 if (on)
dcae5dac 135 solo_dev->motion_mask |= mask;
faa4fd2a 136 else
dcae5dac 137 solo_dev->motion_mask &= ~mask;
faa4fd2a 138
dcae5dac 139 solo_reg_write(solo_dev, SOLO_VI_MOT_CLEAR, mask);
f62de9be 140
faa4fd2a
BC
141 solo_reg_write(solo_dev, SOLO_VI_MOT_ADR,
142 SOLO_VI_MOTION_EN(solo_dev->motion_mask) |
143 (SOLO_MOTION_EXT_ADDR(solo_dev) >> 16));
144
dcae5dac 145 spin_unlock_irqrestore(&solo_enc->motion_lock, flags);
faa4fd2a
BC
146}
147
4c211ed7 148void solo_update_mode(struct solo_enc_dev *solo_enc)
faa4fd2a 149{
decebabf 150 struct solo_dev *solo_dev = solo_enc->solo_dev;
dcae5dac
HV
151 int vop_len;
152 unsigned char *vop;
faa4fd2a
BC
153
154 solo_enc->interlaced = (solo_enc->mode & 0x08) ? 1 : 0;
155 solo_enc->bw_weight = max(solo_dev->fps / solo_enc->interval, 1);
156
dcae5dac 157 if (solo_enc->mode == SOLO_ENC_MODE_CIF) {
faa4fd2a
BC
158 solo_enc->width = solo_dev->video_hsize >> 1;
159 solo_enc->height = solo_dev->video_vsize;
dcae5dac
HV
160 if (solo_dev->type == SOLO_DEV_6110) {
161 if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
162 vop = vop_6110_ntsc_cif;
163 vop_len = sizeof(vop_6110_ntsc_cif);
164 } else {
165 vop = vop_6110_pal_cif;
166 vop_len = sizeof(vop_6110_pal_cif);
167 }
168 } else {
169 if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
170 vop = vop_6010_ntsc_cif;
171 vop_len = sizeof(vop_6010_ntsc_cif);
172 } else {
173 vop = vop_6010_pal_cif;
174 vop_len = sizeof(vop_6010_pal_cif);
175 }
176 }
177 } else {
faa4fd2a
BC
178 solo_enc->width = solo_dev->video_hsize;
179 solo_enc->height = solo_dev->video_vsize << 1;
180 solo_enc->bw_weight <<= 2;
dcae5dac
HV
181 if (solo_dev->type == SOLO_DEV_6110) {
182 if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
183 vop = vop_6110_ntsc_d1;
184 vop_len = sizeof(vop_6110_ntsc_d1);
185 } else {
186 vop = vop_6110_pal_d1;
187 vop_len = sizeof(vop_6110_pal_d1);
188 }
189 } else {
190 if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC) {
191 vop = vop_6010_ntsc_d1;
192 vop_len = sizeof(vop_6010_ntsc_d1);
193 } else {
194 vop = vop_6010_pal_d1;
195 vop_len = sizeof(vop_6010_pal_d1);
196 }
197 }
faa4fd2a 198 }
dcae5dac
HV
199
200 memcpy(solo_enc->vop, vop, vop_len);
201
202 /* Some fixups for 6010/M4V */
203 if (solo_dev->type == SOLO_DEV_6010) {
204 u16 fps = solo_dev->fps * 1000;
205 u16 interval = solo_enc->interval * 1000;
206
207 vop = solo_enc->vop;
208
209 /* Frame rate and interval */
210 vop[22] = fps >> 4;
211 vop[23] = ((fps << 4) & 0xf0) | 0x0c
212 | ((interval >> 13) & 0x3);
213 vop[24] = (interval >> 5) & 0xff;
214 vop[25] = ((interval << 3) & 0xf8) | 0x04;
215 }
216
217 solo_enc->vop_len = vop_len;
218
219 /* Now handle the jpeg header */
220 vop = solo_enc->jpeg_header;
221 vop[SOF0_START + 5] = 0xff & (solo_enc->height >> 8);
222 vop[SOF0_START + 6] = 0xff & solo_enc->height;
223 vop[SOF0_START + 7] = 0xff & (solo_enc->width >> 8);
224 vop[SOF0_START + 8] = 0xff & solo_enc->width;
225
226 memcpy(vop + DQT_START,
227 jpeg_dqt[solo_g_jpeg_qp(solo_dev, solo_enc->ch)], DQT_LEN);
faa4fd2a
BC
228}
229
382c31a9 230static int solo_enc_on(struct solo_enc_dev *solo_enc)
faa4fd2a 231{
faa4fd2a 232 u8 ch = solo_enc->ch;
decebabf 233 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a
BC
234 u8 interval;
235
faa4fd2a
BC
236 solo_update_mode(solo_enc);
237
382c31a9
HV
238 /* Make sure to do a bandwidth check */
239 if (solo_enc->bw_weight > solo_dev->enc_bw_remain)
240 return -EBUSY;
15513c12 241 solo_enc->sequence = 0;
316d9e84
HV
242 solo_enc->motion_last_state = false;
243 solo_enc->frames_since_last_motion = 0;
382c31a9 244 solo_dev->enc_bw_remain -= solo_enc->bw_weight;
faa4fd2a 245
a7eb931d 246 if (solo_enc->type == SOLO_ENC_TYPE_EXT)
faa4fd2a
BC
247 solo_reg_write(solo_dev, SOLO_CAP_CH_COMP_ENA_E(ch), 1);
248
faa4fd2a
BC
249 /* Disable all encoding for this channel */
250 solo_reg_write(solo_dev, SOLO_CAP_CH_SCALE(ch), 0);
251
252 /* Common for both std and ext encoding */
253 solo_reg_write(solo_dev, SOLO_VE_CH_INTL(ch),
254 solo_enc->interlaced ? 1 : 0);
255
256 if (solo_enc->interlaced)
257 interval = solo_enc->interval - 1;
258 else
259 interval = solo_enc->interval;
260
261 /* Standard encoding only */
262 solo_reg_write(solo_dev, SOLO_VE_CH_GOP(ch), solo_enc->gop);
263 solo_reg_write(solo_dev, SOLO_VE_CH_QP(ch), solo_enc->qp);
264 solo_reg_write(solo_dev, SOLO_CAP_CH_INTV(ch), interval);
265
266 /* Extended encoding only */
267 solo_reg_write(solo_dev, SOLO_VE_CH_GOP_E(ch), solo_enc->gop);
268 solo_reg_write(solo_dev, SOLO_VE_CH_QP_E(ch), solo_enc->qp);
269 solo_reg_write(solo_dev, SOLO_CAP_CH_INTV_E(ch), interval);
270
271 /* Enables the standard encoder */
272 solo_reg_write(solo_dev, SOLO_CAP_CH_SCALE(ch), solo_enc->mode);
273
faa4fd2a
BC
274 return 0;
275}
276
382c31a9 277static void solo_enc_off(struct solo_enc_dev *solo_enc)
f62de9be 278{
dcae5dac 279 struct solo_dev *solo_dev = solo_enc->solo_dev;
f62de9be 280
dcae5dac 281 solo_dev->enc_bw_remain += solo_enc->bw_weight;
f62de9be 282
dcae5dac
HV
283 solo_reg_write(solo_dev, SOLO_CAP_CH_SCALE(solo_enc->ch), 0);
284 solo_reg_write(solo_dev, SOLO_CAP_CH_COMP_ENA_E(solo_enc->ch), 0);
f62de9be
BC
285}
286
dcae5dac
HV
287static int enc_get_mpeg_dma(struct solo_dev *solo_dev, dma_addr_t dma,
288 unsigned int off, unsigned int size)
faa4fd2a
BC
289{
290 int ret;
291
292 if (off > SOLO_MP4E_EXT_SIZE(solo_dev))
293 return -EINVAL;
294
dcae5dac 295 /* Single shot */
f62de9be 296 if (off + size <= SOLO_MP4E_EXT_SIZE(solo_dev)) {
dcae5dac
HV
297 return solo_p2m_dma_t(solo_dev, 0, dma,
298 SOLO_MP4E_EXT_ADDR(solo_dev) + off, size,
299 0, 0);
f62de9be 300 }
faa4fd2a
BC
301
302 /* Buffer wrap */
dcae5dac 303 ret = solo_p2m_dma_t(solo_dev, 0, dma,
f62de9be 304 SOLO_MP4E_EXT_ADDR(solo_dev) + off,
dcae5dac 305 SOLO_MP4E_EXT_SIZE(solo_dev) - off, 0, 0);
faa4fd2a 306
dcae5dac
HV
307 if (!ret) {
308 ret = solo_p2m_dma_t(solo_dev, 0,
309 dma + SOLO_MP4E_EXT_SIZE(solo_dev) - off,
310 SOLO_MP4E_EXT_ADDR(solo_dev),
311 size + off - SOLO_MP4E_EXT_SIZE(solo_dev), 0, 0);
312 }
faa4fd2a
BC
313
314 return ret;
315}
316
dcae5dac
HV
317/* Build a descriptor queue out of an SG list and send it to the P2M for
318 * processing. */
a7eb931d 319static int solo_send_desc(struct solo_enc_dev *solo_enc, int skip,
22301247 320 struct sg_table *vbuf, int off, int size,
dcae5dac 321 unsigned int base, unsigned int base_size)
faa4fd2a 322{
a7eb931d 323 struct solo_dev *solo_dev = solo_enc->solo_dev;
dcae5dac
HV
324 struct scatterlist *sg;
325 int i;
faa4fd2a
BC
326 int ret;
327
dcae5dac 328 if (WARN_ON_ONCE(size > FRAME_BUF_SIZE))
faa4fd2a
BC
329 return -EINVAL;
330
a7eb931d 331 solo_enc->desc_count = 1;
dcae5dac 332
22301247 333 for_each_sg(vbuf->sgl, sg, vbuf->nents, i) {
dcae5dac
HV
334 struct solo_p2m_desc *desc;
335 dma_addr_t dma;
336 int len;
337 int left = base_size - off;
338
a7eb931d 339 desc = &solo_enc->desc_items[solo_enc->desc_count++];
dcae5dac
HV
340 dma = sg_dma_address(sg);
341 len = sg_dma_len(sg);
342
343 /* We assume this is smaller than the scatter size */
344 BUG_ON(skip >= len);
345 if (skip) {
346 len -= skip;
347 dma += skip;
348 size -= skip;
349 skip = 0;
350 }
faa4fd2a 351
dcae5dac 352 len = min(len, size);
faa4fd2a 353
dcae5dac
HV
354 if (len <= left) {
355 /* Single descriptor */
356 solo_p2m_fill_desc(desc, 0, dma, base + off,
357 len, 0, 0);
358 } else {
359 /* Buffer wrap */
360 /* XXX: Do these as separate DMA requests, to avoid
361 timeout errors triggered by awkwardly sized
362 descriptors. See
363 <https://github.com/bluecherrydvr/solo6x10/issues/8>
364 */
365 ret = solo_p2m_dma_t(solo_dev, 0, dma, base + off,
366 left, 0, 0);
367 if (ret)
368 return ret;
369
370 ret = solo_p2m_dma_t(solo_dev, 0, dma + left, base,
371 len - left, 0, 0);
372 if (ret)
373 return ret;
374
a7eb931d 375 solo_enc->desc_count--;
dcae5dac 376 }
faa4fd2a 377
dcae5dac
HV
378 size -= len;
379 if (size <= 0)
380 break;
f62de9be 381
dcae5dac
HV
382 off += len;
383 if (off >= base_size)
384 off -= base_size;
385
386 /* Because we may use two descriptors per loop */
a7eb931d
HV
387 if (solo_enc->desc_count >= (solo_enc->desc_nelts - 1)) {
388 ret = solo_p2m_dma_desc(solo_dev, solo_enc->desc_items,
389 solo_enc->desc_dma,
390 solo_enc->desc_count - 1);
dcae5dac
HV
391 if (ret)
392 return ret;
a7eb931d 393 solo_enc->desc_count = 1;
dcae5dac 394 }
f62de9be 395 }
c55564fd 396
a7eb931d 397 if (solo_enc->desc_count <= 1)
dcae5dac 398 return 0;
c55564fd 399
fa91783e
AO
400 return solo_p2m_dma_desc(solo_dev, solo_enc->desc_items,
401 solo_enc->desc_dma, solo_enc->desc_count - 1);
c55564fd
KH
402}
403
4a61ad3c
KH
404/* Extract values from VOP header - VE_STATUSxx */
405static inline int vop_interlaced(const vop_header *vh)
406{
407 return (__le32_to_cpu((*vh)[0]) >> 30) & 1;
408}
409
410static inline u8 vop_channel(const vop_header *vh)
411{
412 return (__le32_to_cpu((*vh)[0]) >> 24) & 0x1F;
413}
414
415static inline u8 vop_type(const vop_header *vh)
416{
417 return (__le32_to_cpu((*vh)[0]) >> 22) & 3;
418}
419
420static inline u32 vop_mpeg_size(const vop_header *vh)
421{
422 return __le32_to_cpu((*vh)[0]) & 0xFFFFF;
423}
424
425static inline u8 vop_hsize(const vop_header *vh)
426{
427 return (__le32_to_cpu((*vh)[1]) >> 8) & 0xFF;
428}
429
430static inline u8 vop_vsize(const vop_header *vh)
431{
432 return __le32_to_cpu((*vh)[1]) & 0xFF;
433}
434
435static inline u32 vop_mpeg_offset(const vop_header *vh)
436{
437 return __le32_to_cpu((*vh)[2]);
438}
439
440static inline u32 vop_jpeg_offset(const vop_header *vh)
441{
442 return __le32_to_cpu((*vh)[3]);
443}
444
445static inline u32 vop_jpeg_size(const vop_header *vh)
446{
447 return __le32_to_cpu((*vh)[4]) & 0xFFFFF;
448}
449
450static inline u32 vop_sec(const vop_header *vh)
451{
452 return __le32_to_cpu((*vh)[5]);
453}
454
455static inline u32 vop_usec(const vop_header *vh)
456{
457 return __le32_to_cpu((*vh)[6]);
458}
459
382c31a9 460static int solo_fill_jpeg(struct solo_enc_dev *solo_enc,
4a61ad3c 461 struct vb2_buffer *vb, const vop_header *vh)
908113d8 462{
dcae5dac 463 struct solo_dev *solo_dev = solo_enc->solo_dev;
22301247 464 struct sg_table *vbuf = vb2_dma_sg_plane_desc(vb, 0);
dcae5dac 465 int frame_size;
382c31a9 466 int ret;
908113d8 467
382c31a9 468 vb->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
908113d8 469
4a61ad3c 470 if (vb2_plane_size(vb, 0) < vop_jpeg_size(vh) + solo_enc->jpeg_len)
dcae5dac 471 return -EIO;
908113d8 472
0cb6dfd7 473 frame_size = ALIGN(vop_jpeg_size(vh) + solo_enc->jpeg_len, DMA_ALIGN);
4a61ad3c 474 vb2_set_plane_payload(vb, 0, vop_jpeg_size(vh) + solo_enc->jpeg_len);
382c31a9 475
39e30a22 476 /* may discard all previous data in vbuf->sgl */
c5b250ad
HV
477 if (!dma_map_sg(&solo_dev->pdev->dev, vbuf->sgl, vbuf->nents,
478 DMA_FROM_DEVICE))
479 return -ENOMEM;
4a61ad3c
KH
480 ret = solo_send_desc(solo_enc, solo_enc->jpeg_len, vbuf,
481 vop_jpeg_offset(vh) - SOLO_JPEG_EXT_ADDR(solo_dev),
482 frame_size, SOLO_JPEG_EXT_ADDR(solo_dev),
483 SOLO_JPEG_EXT_SIZE(solo_dev));
22301247 484 dma_unmap_sg(&solo_dev->pdev->dev, vbuf->sgl, vbuf->nents,
382c31a9 485 DMA_FROM_DEVICE);
39e30a22
KH
486
487 /* add the header only after dma_unmap_sg() */
488 sg_copy_from_buffer(vbuf->sgl, vbuf->nents,
489 solo_enc->jpeg_header, solo_enc->jpeg_len);
490
382c31a9 491 return ret;
908113d8
KH
492}
493
382c31a9 494static int solo_fill_mpeg(struct solo_enc_dev *solo_enc,
4a61ad3c 495 struct vb2_buffer *vb, const vop_header *vh)
faa4fd2a 496{
decebabf 497 struct solo_dev *solo_dev = solo_enc->solo_dev;
22301247 498 struct sg_table *vbuf = vb2_dma_sg_plane_desc(vb, 0);
dcae5dac 499 int frame_off, frame_size;
f62de9be 500 int skip = 0;
382c31a9 501 int ret;
faa4fd2a 502
4a61ad3c 503 if (vb2_plane_size(vb, 0) < vop_mpeg_size(vh))
dcae5dac 504 return -EIO;
faa4fd2a 505
dcae5dac 506 /* If this is a key frame, add extra header */
fa91783e
AO
507 vb->v4l2_buf.flags &= ~(V4L2_BUF_FLAG_KEYFRAME | V4L2_BUF_FLAG_PFRAME |
508 V4L2_BUF_FLAG_BFRAME);
4a61ad3c 509 if (!vop_type(vh)) {
dcae5dac 510 skip = solo_enc->vop_len;
382c31a9 511 vb->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
fa91783e
AO
512 vb2_set_plane_payload(vb, 0, vop_mpeg_size(vh) +
513 solo_enc->vop_len);
dcae5dac 514 } else {
382c31a9 515 vb->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
4a61ad3c 516 vb2_set_plane_payload(vb, 0, vop_mpeg_size(vh));
faa4fd2a
BC
517 }
518
519 /* Now get the actual mpeg payload */
fa91783e
AO
520 frame_off = (vop_mpeg_offset(vh) - SOLO_MP4E_EXT_ADDR(solo_dev) +
521 sizeof(*vh)) % SOLO_MP4E_EXT_SIZE(solo_dev);
0cb6dfd7 522 frame_size = ALIGN(vop_mpeg_size(vh) + skip, DMA_ALIGN);
f62de9be 523
39e30a22 524 /* may discard all previous data in vbuf->sgl */
c5b250ad
HV
525 if (!dma_map_sg(&solo_dev->pdev->dev, vbuf->sgl, vbuf->nents,
526 DMA_FROM_DEVICE))
527 return -ENOMEM;
382c31a9
HV
528 ret = solo_send_desc(solo_enc, skip, vbuf, frame_off, frame_size,
529 SOLO_MP4E_EXT_ADDR(solo_dev),
530 SOLO_MP4E_EXT_SIZE(solo_dev));
22301247 531 dma_unmap_sg(&solo_dev->pdev->dev, vbuf->sgl, vbuf->nents,
382c31a9 532 DMA_FROM_DEVICE);
39e30a22
KH
533
534 /* add the header only after dma_unmap_sg() */
535 if (!vop_type(vh))
536 sg_copy_from_buffer(vbuf->sgl, vbuf->nents,
537 solo_enc->vop, solo_enc->vop_len);
382c31a9 538 return ret;
faa4fd2a
BC
539}
540
a7eb931d 541static int solo_enc_fillbuf(struct solo_enc_dev *solo_enc,
382c31a9 542 struct vb2_buffer *vb, struct solo_enc_buf *enc_buf)
faa4fd2a 543{
4a61ad3c 544 const vop_header *vh = enc_buf->vh;
faa4fd2a 545 int ret;
f62de9be 546
16af690f
IL
547 switch (solo_enc->fmt) {
548 case V4L2_PIX_FMT_MPEG4:
549 case V4L2_PIX_FMT_H264:
382c31a9 550 ret = solo_fill_mpeg(solo_enc, vb, vh);
16af690f
IL
551 break;
552 default: /* V4L2_PIX_FMT_MJPEG */
382c31a9 553 ret = solo_fill_jpeg(solo_enc, vb, vh);
16af690f
IL
554 break;
555 }
faa4fd2a 556
382c31a9 557 if (!ret) {
316d9e84
HV
558 bool send_event = false;
559
15513c12 560 vb->v4l2_buf.sequence = solo_enc->sequence++;
4a61ad3c
KH
561 vb->v4l2_buf.timestamp.tv_sec = vop_sec(vh);
562 vb->v4l2_buf.timestamp.tv_usec = vop_usec(vh);
316d9e84
HV
563
564 /* Check for motion flags */
565 if (solo_is_motion_on(solo_enc)) {
566 /* It takes a few frames for the hardware to detect
567 * motion. Once it does it clears the motion detection
568 * register and it takes again a few frames before
569 * motion is seen. This means in practice that when the
570 * motion field is 1, it will go back to 0 for the next
571 * frame. This leads to motion detection event being
572 * sent all the time, which is not what we want.
573 * Instead wait a few frames before deciding that the
574 * motion has halted. After some experimentation it
575 * turns out that waiting for 5 frames works well.
576 */
577 if (enc_buf->motion == 0 &&
578 solo_enc->motion_last_state &&
579 solo_enc->frames_since_last_motion++ > 5)
580 send_event = true;
581 else if (enc_buf->motion) {
582 solo_enc->frames_since_last_motion = 0;
583 send_event = !solo_enc->motion_last_state;
584 }
585 }
586
587 if (send_event) {
588 struct v4l2_event ev = {
589 .type = V4L2_EVENT_MOTION_DET,
590 .u.motion_det = {
591 .flags = V4L2_EVENT_MD_FL_HAVE_FRAME_SEQ,
592 .frame_sequence = vb->v4l2_buf.sequence,
593 .region_mask = enc_buf->motion ? 1 : 0,
594 },
595 };
596
597 solo_enc->motion_last_state = enc_buf->motion;
598 solo_enc->frames_since_last_motion = 0;
599 v4l2_event_queue(solo_enc->vfd, &ev);
600 }
dcae5dac 601 }
faa4fd2a 602
382c31a9
HV
603 vb2_buffer_done(vb, ret ? VB2_BUF_STATE_ERROR : VB2_BUF_STATE_DONE);
604
dcae5dac 605 return ret;
faa4fd2a
BC
606}
607
dcae5dac
HV
608static void solo_enc_handle_one(struct solo_enc_dev *solo_enc,
609 struct solo_enc_buf *enc_buf)
faa4fd2a 610{
382c31a9 611 struct solo_vb2_buf *vb;
a7eb931d 612 unsigned long flags;
faa4fd2a 613
382c31a9 614 mutex_lock(&solo_enc->lock);
a7eb931d
HV
615 if (solo_enc->type != enc_buf->type)
616 goto unlock;
dcae5dac 617
a7eb931d 618 spin_lock_irqsave(&solo_enc->av_lock, flags);
382c31a9
HV
619 if (list_empty(&solo_enc->vidq_active)) {
620 spin_unlock_irqrestore(&solo_enc->av_lock, flags);
621 goto unlock;
622 }
fa91783e
AO
623 vb = list_first_entry(&solo_enc->vidq_active, struct solo_vb2_buf,
624 list);
382c31a9 625 list_del(&vb->list);
a7eb931d 626 spin_unlock_irqrestore(&solo_enc->av_lock, flags);
faa4fd2a 627
382c31a9 628 solo_enc_fillbuf(solo_enc, &vb->vb, enc_buf);
a7eb931d 629unlock:
382c31a9 630 mutex_unlock(&solo_enc->lock);
faa4fd2a
BC
631}
632
dcae5dac 633void solo_enc_v4l2_isr(struct solo_dev *solo_dev)
faa4fd2a 634{
dcae5dac 635 wake_up_interruptible_all(&solo_dev->ring_thread_wait);
faa4fd2a
BC
636}
637
dcae5dac 638static void solo_handle_ring(struct solo_dev *solo_dev)
faa4fd2a 639{
dcae5dac
HV
640 for (;;) {
641 struct solo_enc_dev *solo_enc;
642 struct solo_enc_buf enc_buf;
643 u32 mpeg_current, off;
644 u8 ch;
645 u8 cur_q;
646
647 /* Check if the hardware has any new ones in the queue */
648 cur_q = solo_reg_read(solo_dev, SOLO_VE_STATE(11)) & 0xff;
649 if (cur_q == solo_dev->enc_idx)
650 break;
faa4fd2a 651
faa4fd2a
BC
652 mpeg_current = solo_reg_read(solo_dev,
653 SOLO_VE_MPEG4_QUE(solo_dev->enc_idx));
faa4fd2a 654 solo_dev->enc_idx = (solo_dev->enc_idx + 1) % MP4_QS;
faa4fd2a 655
afabbe6d 656 ch = (mpeg_current >> 24) & 0x1f;
dcae5dac
HV
657 off = mpeg_current & 0x00ffffff;
658
afabbe6d 659 if (ch >= SOLO_MAX_CHANNELS) {
faa4fd2a 660 ch -= SOLO_MAX_CHANNELS;
dcae5dac 661 enc_buf.type = SOLO_ENC_TYPE_EXT;
faa4fd2a 662 } else
dcae5dac 663 enc_buf.type = SOLO_ENC_TYPE_STD;
faa4fd2a 664
dcae5dac
HV
665 solo_enc = solo_dev->v4l2_enc[ch];
666 if (solo_enc == NULL) {
667 dev_err(&solo_dev->pdev->dev,
668 "Got spurious packet for channel %d\n", ch);
faa4fd2a
BC
669 continue;
670 }
671
dcae5dac
HV
672 /* FAIL... */
673 if (enc_get_mpeg_dma(solo_dev, solo_dev->vh_dma, off,
4a61ad3c 674 sizeof(vop_header)))
faa4fd2a
BC
675 continue;
676
4a61ad3c 677 enc_buf.vh = solo_dev->vh_buf;
faa4fd2a 678
dcae5dac 679 /* Sanity check */
fa91783e
AO
680 if (vop_mpeg_offset(enc_buf.vh) !=
681 SOLO_MP4E_EXT_ADDR(solo_dev) + off)
dcae5dac
HV
682 continue;
683
684 if (solo_motion_detected(solo_enc))
685 enc_buf.motion = 1;
686 else
687 enc_buf.motion = 0;
688
689 solo_enc_handle_one(solo_enc, &enc_buf);
690 }
691}
faa4fd2a 692
dcae5dac
HV
693static int solo_ring_thread(void *data)
694{
695 struct solo_dev *solo_dev = data;
696 DECLARE_WAITQUEUE(wait, current);
faa4fd2a 697
dcae5dac
HV
698 set_freezable();
699 add_wait_queue(&solo_dev->ring_thread_wait, &wait);
faa4fd2a 700
dcae5dac
HV
701 for (;;) {
702 long timeout = schedule_timeout_interruptible(HZ);
1c6f3db0 703
dcae5dac
HV
704 if (timeout == -ERESTARTSYS || kthread_should_stop())
705 break;
dcae5dac 706 solo_handle_ring(solo_dev);
dcae5dac 707 try_to_freeze();
faa4fd2a
BC
708 }
709
dcae5dac
HV
710 remove_wait_queue(&solo_dev->ring_thread_wait, &wait);
711
712 return 0;
faa4fd2a
BC
713}
714
fa91783e
AO
715static int solo_enc_queue_setup(struct vb2_queue *q,
716 const struct v4l2_format *fmt,
717 unsigned int *num_buffers,
718 unsigned int *num_planes, unsigned int sizes[],
719 void *alloc_ctxs[])
faa4fd2a 720{
382c31a9
HV
721 sizes[0] = FRAME_BUF_SIZE;
722 *num_planes = 1;
faa4fd2a 723
382c31a9
HV
724 if (*num_buffers < MIN_VID_BUFFERS)
725 *num_buffers = MIN_VID_BUFFERS;
faa4fd2a
BC
726
727 return 0;
728}
729
382c31a9 730static void solo_enc_buf_queue(struct vb2_buffer *vb)
faa4fd2a 731{
382c31a9
HV
732 struct vb2_queue *vq = vb->vb2_queue;
733 struct solo_enc_dev *solo_enc = vb2_get_drv_priv(vq);
734 struct solo_vb2_buf *solo_vb =
735 container_of(vb, struct solo_vb2_buf, vb);
faa4fd2a 736
382c31a9
HV
737 spin_lock(&solo_enc->av_lock);
738 list_add_tail(&solo_vb->list, &solo_enc->vidq_active);
739 spin_unlock(&solo_enc->av_lock);
faa4fd2a
BC
740}
741
dcae5dac
HV
742static int solo_ring_start(struct solo_dev *solo_dev)
743{
dcae5dac
HV
744 solo_dev->ring_thread = kthread_run(solo_ring_thread, solo_dev,
745 SOLO6X10_NAME "_ring");
746 if (IS_ERR(solo_dev->ring_thread)) {
747 int err = PTR_ERR(solo_dev->ring_thread);
1c6f3db0 748
dcae5dac
HV
749 solo_dev->ring_thread = NULL;
750 return err;
751 }
752
753 solo_irq_on(solo_dev, SOLO_IRQ_ENCODER);
754
755 return 0;
756}
757
758static void solo_ring_stop(struct solo_dev *solo_dev)
759{
dcae5dac
HV
760 if (solo_dev->ring_thread) {
761 kthread_stop(solo_dev->ring_thread);
762 solo_dev->ring_thread = NULL;
763 }
764
765 solo_irq_off(solo_dev, SOLO_IRQ_ENCODER);
766}
767
382c31a9 768static int solo_enc_start_streaming(struct vb2_queue *q, unsigned int count)
faa4fd2a 769{
382c31a9 770 struct solo_enc_dev *solo_enc = vb2_get_drv_priv(q);
faa4fd2a 771
670390c2 772 return solo_enc_on(solo_enc);
faa4fd2a
BC
773}
774
e37559b2 775static void solo_enc_stop_streaming(struct vb2_queue *q)
faa4fd2a 776{
382c31a9 777 struct solo_enc_dev *solo_enc = vb2_get_drv_priv(q);
9ccd1809 778 unsigned long flags;
faa4fd2a 779
9ccd1809 780 spin_lock_irqsave(&solo_enc->av_lock, flags);
a7eb931d 781 solo_enc_off(solo_enc);
9ccd1809
AU
782 while (!list_empty(&solo_enc->vidq_active)) {
783 struct solo_vb2_buf *buf = list_entry(
784 solo_enc->vidq_active.next,
785 struct solo_vb2_buf, list);
786
787 list_del(&buf->list);
788 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
789 }
790 spin_unlock_irqrestore(&solo_enc->av_lock, flags);
faa4fd2a
BC
791}
792
382c31a9
HV
793static struct vb2_ops solo_enc_video_qops = {
794 .queue_setup = solo_enc_queue_setup,
795 .buf_queue = solo_enc_buf_queue,
796 .start_streaming = solo_enc_start_streaming,
797 .stop_streaming = solo_enc_stop_streaming,
798 .wait_prepare = vb2_ops_wait_prepare,
799 .wait_finish = vb2_ops_wait_finish,
800};
801
faa4fd2a
BC
802static int solo_enc_querycap(struct file *file, void *priv,
803 struct v4l2_capability *cap)
804{
a7eb931d 805 struct solo_enc_dev *solo_enc = video_drvdata(file);
decebabf 806 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a 807
decebabf
KH
808 strcpy(cap->driver, SOLO6X10_NAME);
809 snprintf(cap->card, sizeof(cap->card), "Softlogic 6x10 Enc %d",
faa4fd2a 810 solo_enc->ch);
20c5f492 811 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
faa4fd2a 812 pci_name(solo_dev->pdev));
20c5f492
HV
813 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE |
814 V4L2_CAP_READWRITE | V4L2_CAP_STREAMING;
815 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
faa4fd2a
BC
816 return 0;
817}
818
819static int solo_enc_enum_input(struct file *file, void *priv,
820 struct v4l2_input *input)
821{
a7eb931d 822 struct solo_enc_dev *solo_enc = video_drvdata(file);
decebabf 823 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a
BC
824
825 if (input->index)
826 return -EINVAL;
827
828 snprintf(input->name, sizeof(input->name), "Encoder %d",
829 solo_enc->ch + 1);
830 input->type = V4L2_INPUT_TYPE_CAMERA;
4c211ed7 831 input->std = solo_enc->vfd->tvnorms;
faa4fd2a
BC
832
833 if (!tw28_get_video_status(solo_dev, solo_enc->ch))
834 input->status = V4L2_IN_ST_NO_SIGNAL;
835
836 return 0;
837}
838
dcae5dac
HV
839static int solo_enc_set_input(struct file *file, void *priv,
840 unsigned int index)
faa4fd2a
BC
841{
842 if (index)
843 return -EINVAL;
844
845 return 0;
846}
847
848static int solo_enc_get_input(struct file *file, void *priv,
849 unsigned int *index)
850{
851 *index = 0;
852
853 return 0;
854}
855
856static int solo_enc_enum_fmt_cap(struct file *file, void *priv,
857 struct v4l2_fmtdesc *f)
858{
16af690f
IL
859 struct solo_enc_dev *solo_enc = video_drvdata(file);
860 int dev_type = solo_enc->solo_dev->type;
861
faa4fd2a
BC
862 switch (f->index) {
863 case 0:
16af690f
IL
864 switch (dev_type) {
865 case SOLO_DEV_6010:
866 f->pixelformat = V4L2_PIX_FMT_MPEG4;
867 strcpy(f->description, "MPEG-4 part 2");
868 break;
869 case SOLO_DEV_6110:
870 f->pixelformat = V4L2_PIX_FMT_H264;
871 strcpy(f->description, "H.264");
872 break;
873 }
faa4fd2a
BC
874 break;
875 case 1:
876 f->pixelformat = V4L2_PIX_FMT_MJPEG;
877 strcpy(f->description, "MJPEG");
878 break;
879 default:
880 return -EINVAL;
881 }
882
883 f->flags = V4L2_FMT_FLAG_COMPRESSED;
884
885 return 0;
886}
887
16af690f
IL
888static inline int solo_valid_pixfmt(u32 pixfmt, int dev_type)
889{
890 return (pixfmt == V4L2_PIX_FMT_H264 && dev_type == SOLO_DEV_6110)
891 || (pixfmt == V4L2_PIX_FMT_MPEG4 && dev_type == SOLO_DEV_6010)
892 || pixfmt == V4L2_PIX_FMT_MJPEG ? 0 : -EINVAL;
893}
894
faa4fd2a
BC
895static int solo_enc_try_fmt_cap(struct file *file, void *priv,
896 struct v4l2_format *f)
897{
a7eb931d 898 struct solo_enc_dev *solo_enc = video_drvdata(file);
decebabf 899 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a
BC
900 struct v4l2_pix_format *pix = &f->fmt.pix;
901
16af690f 902 if (solo_valid_pixfmt(pix->pixelformat, solo_dev->type))
faa4fd2a
BC
903 return -EINVAL;
904
98ab1c99
KH
905 if (pix->width < solo_dev->video_hsize ||
906 pix->height < solo_dev->video_vsize << 1) {
faa4fd2a
BC
907 /* Default to CIF 1/2 size */
908 pix->width = solo_dev->video_hsize >> 1;
909 pix->height = solo_dev->video_vsize;
98ab1c99
KH
910 } else {
911 /* Full frame */
912 pix->width = solo_dev->video_hsize;
913 pix->height = solo_dev->video_vsize << 1;
faa4fd2a
BC
914 }
915
016afda4
HV
916 switch (pix->field) {
917 case V4L2_FIELD_NONE:
918 case V4L2_FIELD_INTERLACED:
919 break;
920 case V4L2_FIELD_ANY:
921 default:
faa4fd2a 922 pix->field = V4L2_FIELD_INTERLACED;
016afda4
HV
923 break;
924 }
faa4fd2a
BC
925
926 /* Just set these */
927 pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
928 pix->sizeimage = FRAME_BUF_SIZE;
94160497 929 pix->bytesperline = 0;
016afda4 930 pix->priv = 0;
faa4fd2a
BC
931
932 return 0;
933}
934
935static int solo_enc_set_fmt_cap(struct file *file, void *priv,
936 struct v4l2_format *f)
937{
a7eb931d 938 struct solo_enc_dev *solo_enc = video_drvdata(file);
decebabf 939 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a
BC
940 struct v4l2_pix_format *pix = &f->fmt.pix;
941 int ret;
942
382c31a9
HV
943 if (vb2_is_busy(&solo_enc->vidq))
944 return -EBUSY;
faa4fd2a 945
afabbe6d 946 ret = solo_enc_try_fmt_cap(file, priv, f);
016afda4
HV
947 if (ret)
948 return ret;
949
faa4fd2a
BC
950 if (pix->width == solo_dev->video_hsize)
951 solo_enc->mode = SOLO_ENC_MODE_D1;
952 else
953 solo_enc->mode = SOLO_ENC_MODE_CIF;
954
955 /* This does not change the encoder at all */
a7eb931d 956 solo_enc->fmt = pix->pixelformat;
faa4fd2a 957
69996873
HV
958 /*
959 * More information is needed about these 'extended' types. As far
960 * as I can tell these are basically additional video streams with
961 * different MPEG encoding attributes that can run in parallel with
962 * the main stream. If so, then this should be implemented as a
963 * second video node. Abusing priv like this is certainly not the
964 * right approach.
faa4fd2a 965 if (pix->priv)
a7eb931d 966 solo_enc->type = SOLO_ENC_TYPE_EXT;
69996873 967 */
cdcfe40a 968 solo_update_mode(solo_enc);
dcae5dac 969 return 0;
faa4fd2a
BC
970}
971
972static int solo_enc_get_fmt_cap(struct file *file, void *priv,
973 struct v4l2_format *f)
974{
a7eb931d 975 struct solo_enc_dev *solo_enc = video_drvdata(file);
faa4fd2a
BC
976 struct v4l2_pix_format *pix = &f->fmt.pix;
977
978 pix->width = solo_enc->width;
979 pix->height = solo_enc->height;
a7eb931d 980 pix->pixelformat = solo_enc->fmt;
faa4fd2a
BC
981 pix->field = solo_enc->interlaced ? V4L2_FIELD_INTERLACED :
982 V4L2_FIELD_NONE;
983 pix->sizeimage = FRAME_BUF_SIZE;
984 pix->colorspace = V4L2_COLORSPACE_SMPTE170M;
016afda4 985 pix->priv = 0;
faa4fd2a
BC
986
987 return 0;
988}
989
4c211ed7 990static int solo_enc_g_std(struct file *file, void *priv, v4l2_std_id *i)
faa4fd2a 991{
4c211ed7
HV
992 struct solo_enc_dev *solo_enc = video_drvdata(file);
993 struct solo_dev *solo_dev = solo_enc->solo_dev;
994
995 if (solo_dev->video_type == SOLO_VO_FMT_TYPE_NTSC)
996 *i = V4L2_STD_NTSC_M;
997 else
998 *i = V4L2_STD_PAL;
faa4fd2a
BC
999 return 0;
1000}
1001
4c211ed7
HV
1002static int solo_enc_s_std(struct file *file, void *priv, v4l2_std_id std)
1003{
1004 struct solo_enc_dev *solo_enc = video_drvdata(file);
1005
429df502 1006 return solo_set_video_type(solo_enc->solo_dev, std & V4L2_STD_625_50);
4c211ed7
HV
1007}
1008
faa4fd2a
BC
1009static int solo_enum_framesizes(struct file *file, void *priv,
1010 struct v4l2_frmsizeenum *fsize)
1011{
a7eb931d
HV
1012 struct solo_enc_dev *solo_enc = video_drvdata(file);
1013 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a 1014
16af690f 1015 if (solo_valid_pixfmt(fsize->pixel_format, solo_dev->type))
faa4fd2a
BC
1016 return -EINVAL;
1017
1018 switch (fsize->index) {
1019 case 0:
1020 fsize->discrete.width = solo_dev->video_hsize >> 1;
1021 fsize->discrete.height = solo_dev->video_vsize;
1022 break;
1023 case 1:
1024 fsize->discrete.width = solo_dev->video_hsize;
1025 fsize->discrete.height = solo_dev->video_vsize << 1;
1026 break;
1027 default:
1028 return -EINVAL;
1029 }
1030
1031 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1032
1033 return 0;
1034}
1035
1036static int solo_enum_frameintervals(struct file *file, void *priv,
1037 struct v4l2_frmivalenum *fintv)
1038{
a7eb931d
HV
1039 struct solo_enc_dev *solo_enc = video_drvdata(file);
1040 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a 1041
16af690f 1042 if (solo_valid_pixfmt(fintv->pixel_format, solo_dev->type))
016afda4
HV
1043 return -EINVAL;
1044 if (fintv->index)
1045 return -EINVAL;
1046 if ((fintv->width != solo_dev->video_hsize >> 1 ||
1047 fintv->height != solo_dev->video_vsize) &&
1048 (fintv->width != solo_dev->video_hsize ||
1049 fintv->height != solo_dev->video_vsize << 1))
faa4fd2a
BC
1050 return -EINVAL;
1051
1052 fintv->type = V4L2_FRMIVAL_TYPE_STEPWISE;
1053
4c211ed7 1054 fintv->stepwise.min.numerator = 1;
016afda4 1055 fintv->stepwise.min.denominator = solo_dev->fps;
faa4fd2a 1056
4c211ed7 1057 fintv->stepwise.max.numerator = 15;
016afda4 1058 fintv->stepwise.max.denominator = solo_dev->fps;
faa4fd2a
BC
1059
1060 fintv->stepwise.step.numerator = 1;
4c211ed7 1061 fintv->stepwise.step.denominator = solo_dev->fps;
faa4fd2a
BC
1062
1063 return 0;
1064}
1065
1066static int solo_g_parm(struct file *file, void *priv,
1067 struct v4l2_streamparm *sp)
1068{
a7eb931d 1069 struct solo_enc_dev *solo_enc = video_drvdata(file);
faa4fd2a
BC
1070 struct v4l2_captureparm *cp = &sp->parm.capture;
1071
1072 cp->capability = V4L2_CAP_TIMEPERFRAME;
1073 cp->timeperframe.numerator = solo_enc->interval;
88107675 1074 cp->timeperframe.denominator = solo_enc->solo_dev->fps;
faa4fd2a
BC
1075 cp->capturemode = 0;
1076 /* XXX: Shouldn't we be able to get/set this from videobuf? */
1077 cp->readbuffers = 2;
1078
f62de9be 1079 return 0;
faa4fd2a
BC
1080}
1081
88107675
IL
1082static inline int calc_interval(u8 fps, u32 n, u32 d)
1083{
1084 if (!n || !d)
1085 return 1;
1086 if (d == fps)
1087 return n;
1088 n *= fps;
1089 return min(15U, n / d + (n % d >= (fps >> 1)));
1090}
1091
faa4fd2a
BC
1092static int solo_s_parm(struct file *file, void *priv,
1093 struct v4l2_streamparm *sp)
1094{
a7eb931d 1095 struct solo_enc_dev *solo_enc = video_drvdata(file);
88107675
IL
1096 struct v4l2_fract *t = &sp->parm.capture.timeperframe;
1097 u8 fps = solo_enc->solo_dev->fps;
faa4fd2a 1098
382c31a9 1099 if (vb2_is_streaming(&solo_enc->vidq))
faa4fd2a 1100 return -EBUSY;
faa4fd2a 1101
88107675 1102 solo_enc->interval = calc_interval(fps, t->numerator, t->denominator);
faa4fd2a 1103 solo_update_mode(solo_enc);
88107675 1104 return solo_g_parm(file, priv, sp);
faa4fd2a
BC
1105}
1106
c813bd3c 1107static int solo_s_ctrl(struct v4l2_ctrl *ctrl)
faa4fd2a 1108{
c813bd3c
HV
1109 struct solo_enc_dev *solo_enc =
1110 container_of(ctrl->handler, struct solo_enc_dev, hdl);
decebabf 1111 struct solo_dev *solo_dev = solo_enc->solo_dev;
faa4fd2a
BC
1112 int err;
1113
faa4fd2a
BC
1114 switch (ctrl->id) {
1115 case V4L2_CID_BRIGHTNESS:
1116 case V4L2_CID_CONTRAST:
1117 case V4L2_CID_SATURATION:
1118 case V4L2_CID_HUE:
1119 case V4L2_CID_SHARPNESS:
1120 return tw28_set_ctrl_val(solo_dev, ctrl->id, solo_enc->ch,
c813bd3c 1121 ctrl->val);
faa4fd2a 1122 case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
c813bd3c 1123 solo_enc->gop = ctrl->val;
63e9b45b
AU
1124 solo_reg_write(solo_dev, SOLO_VE_CH_GOP(solo_enc->ch), solo_enc->gop);
1125 solo_reg_write(solo_dev, SOLO_VE_CH_GOP_E(solo_enc->ch), solo_enc->gop);
c813bd3c 1126 return 0;
56981116
AU
1127 case V4L2_CID_MPEG_VIDEO_H264_MIN_QP:
1128 solo_enc->qp = ctrl->val;
63e9b45b
AU
1129 solo_reg_write(solo_dev, SOLO_VE_CH_QP(solo_enc->ch), solo_enc->qp);
1130 solo_reg_write(solo_dev, SOLO_VE_CH_QP_E(solo_enc->ch), solo_enc->qp);
56981116 1131 return 0;
4063a3c7
HV
1132 case V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD:
1133 solo_enc->motion_thresh = ctrl->val << 8;
f5df0b7f
HV
1134 if (!solo_enc->motion_global || !solo_enc->motion_enabled)
1135 return 0;
fa91783e 1136 return solo_set_motion_threshold(solo_dev, solo_enc->ch,
4063a3c7
HV
1137 solo_enc->motion_thresh);
1138 case V4L2_CID_DETECT_MD_MODE:
1139 solo_enc->motion_global = ctrl->val == V4L2_DETECT_MD_MODE_GLOBAL;
1140 solo_enc->motion_enabled = ctrl->val > V4L2_DETECT_MD_MODE_DISABLED;
f5df0b7f
HV
1141 if (ctrl->val) {
1142 if (solo_enc->motion_global)
0a128308 1143 err = solo_set_motion_threshold(solo_dev, solo_enc->ch,
4063a3c7 1144 solo_enc->motion_thresh);
f5df0b7f 1145 else
0a128308 1146 err = solo_set_motion_block(solo_dev, solo_enc->ch,
4063a3c7 1147 solo_enc->md_thresholds->p_cur.p_u16);
0a128308
HV
1148 if (err)
1149 return err;
dcae5dac 1150 }
c813bd3c
HV
1151 solo_motion_toggle(solo_enc, ctrl->val);
1152 return 0;
4063a3c7
HV
1153 case V4L2_CID_DETECT_MD_THRESHOLD_GRID:
1154 if (solo_enc->motion_enabled && !solo_enc->motion_global)
1155 return solo_set_motion_block(solo_dev, solo_enc->ch,
1156 solo_enc->md_thresholds->p_new.p_u16);
1157 break;
c813bd3c 1158 case V4L2_CID_OSD_TEXT:
2a9ec373 1159 strcpy(solo_enc->osd_text, ctrl->p_new.p_char);
0a128308 1160 return solo_osd_print(solo_enc);
faa4fd2a
BC
1161 default:
1162 return -EINVAL;
1163 }
1164
1165 return 0;
1166}
1167
316d9e84
HV
1168static int solo_subscribe_event(struct v4l2_fh *fh,
1169 const struct v4l2_event_subscription *sub)
1170{
1171
1172 switch (sub->type) {
1173 case V4L2_EVENT_CTRL:
1174 return v4l2_ctrl_subscribe_event(fh, sub);
1175 case V4L2_EVENT_MOTION_DET:
1176 /* Allow for up to 30 events (1 second for NTSC) to be
1177 * stored. */
1178 return v4l2_event_subscribe(fh, sub, 30, NULL);
1179 }
1180 return -EINVAL;
1181}
1182
faa4fd2a
BC
1183static const struct v4l2_file_operations solo_enc_fops = {
1184 .owner = THIS_MODULE,
382c31a9
HV
1185 .open = v4l2_fh_open,
1186 .release = vb2_fop_release,
1187 .read = vb2_fop_read,
1188 .poll = vb2_fop_poll,
1189 .mmap = vb2_fop_mmap,
1190 .unlocked_ioctl = video_ioctl2,
faa4fd2a
BC
1191};
1192
1193static const struct v4l2_ioctl_ops solo_enc_ioctl_ops = {
1194 .vidioc_querycap = solo_enc_querycap,
1195 .vidioc_s_std = solo_enc_s_std,
4c211ed7 1196 .vidioc_g_std = solo_enc_g_std,
faa4fd2a
BC
1197 /* Input callbacks */
1198 .vidioc_enum_input = solo_enc_enum_input,
1199 .vidioc_s_input = solo_enc_set_input,
1200 .vidioc_g_input = solo_enc_get_input,
1201 /* Video capture format callbacks */
1202 .vidioc_enum_fmt_vid_cap = solo_enc_enum_fmt_cap,
1203 .vidioc_try_fmt_vid_cap = solo_enc_try_fmt_cap,
1204 .vidioc_s_fmt_vid_cap = solo_enc_set_fmt_cap,
1205 .vidioc_g_fmt_vid_cap = solo_enc_get_fmt_cap,
1206 /* Streaming I/O */
382c31a9
HV
1207 .vidioc_reqbufs = vb2_ioctl_reqbufs,
1208 .vidioc_querybuf = vb2_ioctl_querybuf,
1209 .vidioc_qbuf = vb2_ioctl_qbuf,
1210 .vidioc_dqbuf = vb2_ioctl_dqbuf,
1211 .vidioc_streamon = vb2_ioctl_streamon,
1212 .vidioc_streamoff = vb2_ioctl_streamoff,
faa4fd2a
BC
1213 /* Frame size and interval */
1214 .vidioc_enum_framesizes = solo_enum_framesizes,
1215 .vidioc_enum_frameintervals = solo_enum_frameintervals,
1216 /* Video capture parameters */
1217 .vidioc_s_parm = solo_s_parm,
1218 .vidioc_g_parm = solo_g_parm,
94160497
HV
1219 /* Logging and events */
1220 .vidioc_log_status = v4l2_ctrl_log_status,
316d9e84 1221 .vidioc_subscribe_event = solo_subscribe_event,
94160497 1222 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
faa4fd2a
BC
1223};
1224
dcae5dac 1225static const struct video_device solo_enc_template = {
decebabf 1226 .name = SOLO6X10_NAME,
faa4fd2a
BC
1227 .fops = &solo_enc_fops,
1228 .ioctl_ops = &solo_enc_ioctl_ops,
1229 .minor = -1,
1230 .release = video_device_release,
4c211ed7 1231 .tvnorms = V4L2_STD_NTSC_M | V4L2_STD_PAL,
faa4fd2a
BC
1232};
1233
c813bd3c
HV
1234static const struct v4l2_ctrl_ops solo_ctrl_ops = {
1235 .s_ctrl = solo_s_ctrl,
1236};
1237
c813bd3c
HV
1238static const struct v4l2_ctrl_config solo_osd_text_ctrl = {
1239 .ops = &solo_ctrl_ops,
1240 .id = V4L2_CID_OSD_TEXT,
1241 .name = "OSD Text",
1242 .type = V4L2_CTRL_TYPE_STRING,
1243 .max = OSD_TEXT_MAX,
1244 .step = 1,
1245};
1246
4063a3c7
HV
1247/* Motion Detection Threshold matrix */
1248static const struct v4l2_ctrl_config solo_md_thresholds = {
1249 .ops = &solo_ctrl_ops,
1250 .id = V4L2_CID_DETECT_MD_THRESHOLD_GRID,
1251 .dims = { SOLO_MOTION_SZ, SOLO_MOTION_SZ },
1252 .def = SOLO_DEF_MOT_THRESH,
1253 .max = 65535,
1254 .step = 1,
1255};
1256
dcae5dac
HV
1257static struct solo_enc_dev *solo_enc_alloc(struct solo_dev *solo_dev,
1258 u8 ch, unsigned nr)
faa4fd2a
BC
1259{
1260 struct solo_enc_dev *solo_enc;
c813bd3c 1261 struct v4l2_ctrl_handler *hdl;
faa4fd2a
BC
1262 int ret;
1263
1264 solo_enc = kzalloc(sizeof(*solo_enc), GFP_KERNEL);
1265 if (!solo_enc)
1266 return ERR_PTR(-ENOMEM);
1267
c813bd3c
HV
1268 hdl = &solo_enc->hdl;
1269 v4l2_ctrl_handler_init(hdl, 10);
1270 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1271 V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
1272 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1273 V4L2_CID_CONTRAST, 0, 255, 1, 128);
1274 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1275 V4L2_CID_SATURATION, 0, 255, 1, 128);
1276 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1277 V4L2_CID_HUE, 0, 255, 1, 128);
1278 if (tw28_has_sharpness(solo_dev, ch))
1279 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1280 V4L2_CID_SHARPNESS, 0, 15, 1, 0);
c813bd3c
HV
1281 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1282 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 255, 1, solo_dev->fps);
56981116
AU
1283 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1284 V4L2_CID_MPEG_VIDEO_H264_MIN_QP, 0, 31, 1, SOLO_DEFAULT_QP);
4063a3c7
HV
1285 v4l2_ctrl_new_std_menu(hdl, &solo_ctrl_ops,
1286 V4L2_CID_DETECT_MD_MODE,
1287 V4L2_DETECT_MD_MODE_THRESHOLD_GRID, 0,
1288 V4L2_DETECT_MD_MODE_DISABLED);
1289 v4l2_ctrl_new_std(hdl, &solo_ctrl_ops,
1290 V4L2_CID_DETECT_MD_GLOBAL_THRESHOLD, 0, 0xff, 1,
1291 SOLO_DEF_MOT_THRESH >> 8);
c813bd3c 1292 v4l2_ctrl_new_custom(hdl, &solo_osd_text_ctrl, NULL);
4063a3c7
HV
1293 solo_enc->md_thresholds =
1294 v4l2_ctrl_new_custom(hdl, &solo_md_thresholds, NULL);
c813bd3c
HV
1295 if (hdl->error) {
1296 ret = hdl->error;
a7eb931d 1297 goto hdl_free;
faa4fd2a
BC
1298 }
1299
1300 solo_enc->solo_dev = solo_dev;
1301 solo_enc->ch = ch;
382c31a9 1302 mutex_init(&solo_enc->lock);
a7eb931d
HV
1303 spin_lock_init(&solo_enc->av_lock);
1304 INIT_LIST_HEAD(&solo_enc->vidq_active);
16af690f
IL
1305 solo_enc->fmt = (solo_dev->type == SOLO_DEV_6010) ?
1306 V4L2_PIX_FMT_MPEG4 : V4L2_PIX_FMT_H264;
a7eb931d 1307 solo_enc->type = SOLO_ENC_TYPE_STD;
faa4fd2a 1308
faa4fd2a 1309 solo_enc->qp = SOLO_DEFAULT_QP;
f62de9be 1310 solo_enc->gop = solo_dev->fps;
faa4fd2a
BC
1311 solo_enc->interval = 1;
1312 solo_enc->mode = SOLO_ENC_MODE_CIF;
f5df0b7f 1313 solo_enc->motion_global = true;
faa4fd2a 1314 solo_enc->motion_thresh = SOLO_DEF_MOT_THRESH;
382c31a9
HV
1315 solo_enc->vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1316 solo_enc->vidq.io_modes = VB2_MMAP | VB2_USERPTR | VB2_READ;
1317 solo_enc->vidq.ops = &solo_enc_video_qops;
1318 solo_enc->vidq.mem_ops = &vb2_dma_sg_memops;
1319 solo_enc->vidq.drv_priv = solo_enc;
1320 solo_enc->vidq.gfp_flags = __GFP_DMA32;
ade48681 1321 solo_enc->vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
382c31a9
HV
1322 solo_enc->vidq.buf_struct_size = sizeof(struct solo_vb2_buf);
1323 solo_enc->vidq.lock = &solo_enc->lock;
1324 ret = vb2_queue_init(&solo_enc->vidq);
1325 if (ret)
1326 goto hdl_free;
faa4fd2a 1327 solo_update_mode(solo_enc);
a7eb931d 1328
a7eb931d
HV
1329 spin_lock_init(&solo_enc->motion_lock);
1330
dcae5dac
HV
1331 /* Initialize this per encoder */
1332 solo_enc->jpeg_len = sizeof(jpeg_header);
1333 memcpy(solo_enc->jpeg_header, jpeg_header, solo_enc->jpeg_len);
faa4fd2a 1334
a7eb931d
HV
1335 solo_enc->desc_nelts = 32;
1336 solo_enc->desc_items = pci_alloc_consistent(solo_dev->pdev,
1337 sizeof(struct solo_p2m_desc) *
fa91783e
AO
1338 solo_enc->desc_nelts,
1339 &solo_enc->desc_dma);
a7eb931d
HV
1340 ret = -ENOMEM;
1341 if (solo_enc->desc_items == NULL)
1342 goto hdl_free;
1343
a7eb931d
HV
1344 solo_enc->vfd = video_device_alloc();
1345 if (!solo_enc->vfd)
1346 goto pci_free;
1347
1348 *solo_enc->vfd = solo_enc_template;
1349 solo_enc->vfd->v4l2_dev = &solo_dev->v4l2_dev;
1350 solo_enc->vfd->ctrl_handler = hdl;
382c31a9
HV
1351 solo_enc->vfd->queue = &solo_enc->vidq;
1352 solo_enc->vfd->lock = &solo_enc->lock;
a7eb931d
HV
1353 video_set_drvdata(solo_enc->vfd, solo_enc);
1354 ret = video_register_device(solo_enc->vfd, VFL_TYPE_GRABBER, nr);
1355 if (ret < 0)
1356 goto vdev_release;
1357
1358 snprintf(solo_enc->vfd->name, sizeof(solo_enc->vfd->name),
1359 "%s-enc (%i/%i)", SOLO6X10_NAME, solo_dev->vfd->num,
1360 solo_enc->vfd->num);
1361
faa4fd2a 1362 return solo_enc;
a7eb931d
HV
1363
1364vdev_release:
1365 video_device_release(solo_enc->vfd);
1366pci_free:
1367 pci_free_consistent(solo_enc->solo_dev->pdev,
1368 sizeof(struct solo_p2m_desc) * solo_enc->desc_nelts,
1369 solo_enc->desc_items, solo_enc->desc_dma);
1370hdl_free:
1371 v4l2_ctrl_handler_free(hdl);
1372 kfree(solo_enc);
1373 return ERR_PTR(ret);
faa4fd2a
BC
1374}
1375
1376static void solo_enc_free(struct solo_enc_dev *solo_enc)
1377{
1378 if (solo_enc == NULL)
1379 return;
1380
0cb2df38
AU
1381 pci_free_consistent(solo_enc->solo_dev->pdev,
1382 sizeof(struct solo_p2m_desc) * solo_enc->desc_nelts,
1383 solo_enc->desc_items, solo_enc->desc_dma);
faa4fd2a 1384 video_unregister_device(solo_enc->vfd);
c813bd3c 1385 v4l2_ctrl_handler_free(&solo_enc->hdl);
faa4fd2a
BC
1386 kfree(solo_enc);
1387}
1388
dcae5dac 1389int solo_enc_v4l2_init(struct solo_dev *solo_dev, unsigned nr)
faa4fd2a
BC
1390{
1391 int i;
1392
dcae5dac
HV
1393 init_waitqueue_head(&solo_dev->ring_thread_wait);
1394
4a61ad3c 1395 solo_dev->vh_size = sizeof(vop_header);
dcae5dac
HV
1396 solo_dev->vh_buf = pci_alloc_consistent(solo_dev->pdev,
1397 solo_dev->vh_size,
1398 &solo_dev->vh_dma);
1399 if (solo_dev->vh_buf == NULL)
1400 return -ENOMEM;
1401
faa4fd2a 1402 for (i = 0; i < solo_dev->nr_chans; i++) {
dcae5dac 1403 solo_dev->v4l2_enc[i] = solo_enc_alloc(solo_dev, i, nr);
faa4fd2a
BC
1404 if (IS_ERR(solo_dev->v4l2_enc[i]))
1405 break;
1406 }
1407
1408 if (i != solo_dev->nr_chans) {
1409 int ret = PTR_ERR(solo_dev->v4l2_enc[i]);
1c6f3db0 1410
faa4fd2a
BC
1411 while (i--)
1412 solo_enc_free(solo_dev->v4l2_enc[i]);
dcae5dac
HV
1413 pci_free_consistent(solo_dev->pdev, solo_dev->vh_size,
1414 solo_dev->vh_buf, solo_dev->vh_dma);
a7eb931d 1415 solo_dev->vh_buf = NULL;
faa4fd2a
BC
1416 return ret;
1417 }
1418
dcae5dac
HV
1419 if (solo_dev->type == SOLO_DEV_6010)
1420 solo_dev->enc_bw_remain = solo_dev->fps * 4 * 4;
1421 else
1422 solo_dev->enc_bw_remain = solo_dev->fps * 4 * 5;
faa4fd2a
BC
1423
1424 dev_info(&solo_dev->pdev->dev, "Encoders as /dev/video%d-%d\n",
1425 solo_dev->v4l2_enc[0]->vfd->num,
1426 solo_dev->v4l2_enc[solo_dev->nr_chans - 1]->vfd->num);
1427
670390c2 1428 return solo_ring_start(solo_dev);
faa4fd2a
BC
1429}
1430
decebabf 1431void solo_enc_v4l2_exit(struct solo_dev *solo_dev)
faa4fd2a
BC
1432{
1433 int i;
1434
670390c2
AU
1435 solo_ring_stop(solo_dev);
1436
faa4fd2a
BC
1437 for (i = 0; i < solo_dev->nr_chans; i++)
1438 solo_enc_free(solo_dev->v4l2_enc[i]);
dcae5dac 1439
a7eb931d
HV
1440 if (solo_dev->vh_buf)
1441 pci_free_consistent(solo_dev->pdev, solo_dev->vh_size,
dcae5dac 1442 solo_dev->vh_buf, solo_dev->vh_dma);
faa4fd2a 1443}