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[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / sta2x11 / sta2x11_vip.c
CommitLineData
efeb98b4
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1/*
2 * This is the driver for the STA2x11 Video Input Port.
3 *
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4 * Copyright (C) 2012 ST Microelectronics
5 * author: Federico Vaga <federico.vaga@gmail.com>
efeb98b4 6 * Copyright (C) 2010 WindRiver Systems, Inc.
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7 * authors: Andreas Kies <andreas.kies@windriver.com>
8 * Vlad Lungu <vlad.lungu@windriver.com>
efeb98b4
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9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms and conditions of the GNU General Public License,
12 * version 2, as published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope it will be useful, but WITHOUT
15 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
17 * more details.
18 *
19 * You should have received a copy of the GNU General Public License along with
20 * this program; if not, write to the Free Software Foundation, Inc.,
21 * 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
22 *
23 * The full GNU General Public License is included in this distribution in
24 * the file called "COPYING".
25 *
efeb98b4
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26 */
27
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/init.h>
efeb98b4 32#include <linux/videodev2.h>
efeb98b4 33#include <linux/kmod.h>
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34#include <linux/pci.h>
35#include <linux/interrupt.h>
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36#include <linux/io.h>
37#include <linux/gpio.h>
38#include <linux/i2c.h>
39#include <linux/delay.h>
40#include <media/v4l2-common.h>
41#include <media/v4l2-device.h>
8dc97ea2 42#include <media/v4l2-ctrls.h>
efeb98b4 43#include <media/v4l2-ioctl.h>
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44#include <media/v4l2-fh.h>
45#include <media/v4l2-event.h>
46#include <media/videobuf2-dma-contig.h>
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47
48#include "sta2x11_vip.h"
49
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50#define DRV_VERSION "1.3"
51
52#ifndef PCI_DEVICE_ID_STMICRO_VIP
53#define PCI_DEVICE_ID_STMICRO_VIP 0xCC0D
54#endif
55
56#define MAX_FRAMES 4
57
58/*Register offsets*/
59#define DVP_CTL 0x00
60#define DVP_TFO 0x04
61#define DVP_TFS 0x08
62#define DVP_BFO 0x0C
63#define DVP_BFS 0x10
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64#define DVP_VTP 0x14
65#define DVP_VBP 0x18
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66#define DVP_VMP 0x1C
67#define DVP_ITM 0x98
68#define DVP_ITS 0x9C
69#define DVP_STA 0xA0
70#define DVP_HLFLN 0xA8
71#define DVP_RGB 0xC0
72#define DVP_PKZ 0xF0
73
74/*Register fields*/
75#define DVP_CTL_ENA 0x00000001
76#define DVP_CTL_RST 0x80000000
77#define DVP_CTL_DIS (~0x00040001)
78
79#define DVP_IT_VSB 0x00000008
80#define DVP_IT_VST 0x00000010
81#define DVP_IT_FIFO 0x00000020
82
83#define DVP_HLFLN_SD 0x00000001
84
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85#define SAVE_COUNT 8
86#define AUX_COUNT 3
87#define IRQ_COUNT 1
88
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89
90struct vip_buffer {
2d700715 91 struct vb2_v4l2_buffer vb;
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92 struct list_head list;
93 dma_addr_t dma;
94};
2d700715 95static inline struct vip_buffer *to_vip_buffer(struct vb2_v4l2_buffer *vb2)
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96{
97 return container_of(vb2, struct vip_buffer, vb);
98}
99
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100/**
101 * struct sta2x11_vip - All internal data for one instance of device
102 * @v4l2_dev: device registered in v4l layer
103 * @video_dev: properties of our device
104 * @pdev: PCI device
105 * @adapter: contains I2C adapter information
106 * @register_save_area: All relevant register are saved here during suspend
107 * @decoder: contains information about video DAC
8dc97ea2 108 * @ctrl_hdl: handler for control framework
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109 * @format: pixel format, fixed UYVY
110 * @std: video standard (e.g. PAL/NTSC)
111 * @input: input line for video signal ( 0 or 1 )
efeb98b4 112 * @disabled: Device is in power down state
efeb98b4 113 * @slock: for excluse acces of registers
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114 * @vb_vidq: queue maintained by videobuf2 layer
115 * @buffer_list: list of buffer in use
116 * @sequence: sequence number of acquired buffer
117 * @active: current active buffer
118 * @lock: used in videobuf2 callback
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119 * @tcount: Number of top frames
120 * @bcount: Number of bottom frames
121 * @overflow: Number of FIFO overflows
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122 * @iomem: hardware base address
123 * @config: I2C and gpio config from platform
124 *
125 * All non-local data is accessed via this structure.
126 */
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127struct sta2x11_vip {
128 struct v4l2_device v4l2_dev;
4db4ca74 129 struct video_device video_dev;
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130 struct pci_dev *pdev;
131 struct i2c_adapter *adapter;
132 unsigned int register_save_area[IRQ_COUNT + SAVE_COUNT + AUX_COUNT];
133 struct v4l2_subdev *decoder;
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134 struct v4l2_ctrl_handler ctrl_hdl;
135
136
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137 struct v4l2_pix_format format;
138 v4l2_std_id std;
139 unsigned int input;
efeb98b4 140 int disabled;
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141 spinlock_t slock;
142
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143 struct vb2_queue vb_vidq;
144 struct list_head buffer_list;
145 unsigned int sequence;
146 struct vip_buffer *active; /* current active buffer */
147 spinlock_t lock; /* Used in videobuf2 callback */
148
149 /* Interrupt counters */
150 int tcount, bcount;
efeb98b4 151 int overflow;
8dc97ea2 152
87f4ebcd 153 void __iomem *iomem; /* I/O Memory */
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154 struct vip_config *config;
155};
156
157static const unsigned int registers_to_save[AUX_COUNT] = {
158 DVP_HLFLN, DVP_RGB, DVP_PKZ
159};
160
161static struct v4l2_pix_format formats_50[] = {
162 { /*PAL interlaced */
163 .width = 720,
164 .height = 576,
165 .pixelformat = V4L2_PIX_FMT_UYVY,
166 .field = V4L2_FIELD_INTERLACED,
167 .bytesperline = 720 * 2,
168 .sizeimage = 720 * 2 * 576,
169 .colorspace = V4L2_COLORSPACE_SMPTE170M},
170 { /*PAL top */
171 .width = 720,
172 .height = 288,
173 .pixelformat = V4L2_PIX_FMT_UYVY,
174 .field = V4L2_FIELD_TOP,
175 .bytesperline = 720 * 2,
176 .sizeimage = 720 * 2 * 288,
177 .colorspace = V4L2_COLORSPACE_SMPTE170M},
178 { /*PAL bottom */
179 .width = 720,
180 .height = 288,
181 .pixelformat = V4L2_PIX_FMT_UYVY,
182 .field = V4L2_FIELD_BOTTOM,
183 .bytesperline = 720 * 2,
184 .sizeimage = 720 * 2 * 288,
185 .colorspace = V4L2_COLORSPACE_SMPTE170M},
186
187};
188
189static struct v4l2_pix_format formats_60[] = {
190 { /*NTSC interlaced */
191 .width = 720,
192 .height = 480,
193 .pixelformat = V4L2_PIX_FMT_UYVY,
194 .field = V4L2_FIELD_INTERLACED,
195 .bytesperline = 720 * 2,
196 .sizeimage = 720 * 2 * 480,
197 .colorspace = V4L2_COLORSPACE_SMPTE170M},
198 { /*NTSC top */
199 .width = 720,
200 .height = 240,
201 .pixelformat = V4L2_PIX_FMT_UYVY,
202 .field = V4L2_FIELD_TOP,
203 .bytesperline = 720 * 2,
204 .sizeimage = 720 * 2 * 240,
205 .colorspace = V4L2_COLORSPACE_SMPTE170M},
206 { /*NTSC bottom */
207 .width = 720,
208 .height = 240,
209 .pixelformat = V4L2_PIX_FMT_UYVY,
210 .field = V4L2_FIELD_BOTTOM,
211 .bytesperline = 720 * 2,
212 .sizeimage = 720 * 2 * 240,
213 .colorspace = V4L2_COLORSPACE_SMPTE170M},
214};
215
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216/* Write VIP register */
217static inline void reg_write(struct sta2x11_vip *vip, unsigned int reg, u32 val)
efeb98b4 218{
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219 iowrite32((val), (vip->iomem)+(reg));
220}
221/* Read VIP register */
222static inline u32 reg_read(struct sta2x11_vip *vip, unsigned int reg)
efeb98b4 223{
8dc97ea2 224 return ioread32((vip->iomem)+(reg));
efeb98b4 225}
8dc97ea2
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226/* Start DMA acquisition */
227static void start_dma(struct sta2x11_vip *vip, struct vip_buffer *vip_buf)
efeb98b4 228{
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229 unsigned long offset = 0;
230
231 if (vip->format.field == V4L2_FIELD_INTERLACED)
232 offset = vip->format.width * 2;
efeb98b4 233
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234 spin_lock_irq(&vip->slock);
235 /* Enable acquisition */
236 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) | DVP_CTL_ENA);
237 /* Set Top and Bottom Field memory address */
238 reg_write(vip, DVP_VTP, (u32)vip_buf->dma);
239 reg_write(vip, DVP_VBP, (u32)vip_buf->dma + offset);
240 spin_unlock_irq(&vip->slock);
241}
efeb98b4 242
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243/* Fetch the next buffer to activate */
244static void vip_active_buf_next(struct sta2x11_vip *vip)
245{
246 /* Get the next buffer */
247 spin_lock(&vip->lock);
248 if (list_empty(&vip->buffer_list)) {/* No available buffer */
249 spin_unlock(&vip->lock);
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250 return;
251 }
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252 vip->active = list_first_entry(&vip->buffer_list,
253 struct vip_buffer,
254 list);
255 /* Reset Top and Bottom counter */
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256 vip->tcount = 0;
257 vip->bcount = 0;
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258 spin_unlock(&vip->lock);
259 if (vb2_is_streaming(&vip->vb_vidq)) { /* streaming is on */
260 start_dma(vip, vip->active); /* start dma capture */
261 }
262}
efeb98b4 263
efeb98b4 264
8dc97ea2 265/* Videobuf2 Operations */
df9ecb0c 266static int queue_setup(struct vb2_queue *vq,
8dc97ea2 267 unsigned int *nbuffers, unsigned int *nplanes,
36c0f8b3 268 unsigned int sizes[], struct device *alloc_devs[])
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269{
270 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 271
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272 if (!(*nbuffers) || *nbuffers < MAX_FRAMES)
273 *nbuffers = MAX_FRAMES;
efeb98b4 274
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275 *nplanes = 1;
276 sizes[0] = vip->format.sizeimage;
efeb98b4 277
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278 vip->sequence = 0;
279 vip->active = NULL;
280 vip->tcount = 0;
281 vip->bcount = 0;
efeb98b4 282
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283 return 0;
284};
285static int buffer_init(struct vb2_buffer *vb)
efeb98b4 286{
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287 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
288 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
efeb98b4 289
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290 vip_buf->dma = vb2_dma_contig_plane_dma_addr(vb, 0);
291 INIT_LIST_HEAD(&vip_buf->list);
292 return 0;
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293}
294
8dc97ea2 295static int buffer_prepare(struct vb2_buffer *vb)
efeb98b4 296{
2d700715 297 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 298 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 299 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
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300 unsigned long size;
301
302 size = vip->format.sizeimage;
303 if (vb2_plane_size(vb, 0) < size) {
304 v4l2_err(&vip->v4l2_dev, "buffer too small (%lu < %lu)\n",
305 vb2_plane_size(vb, 0), size);
306 return -EINVAL;
307 }
efeb98b4 308
2d700715 309 vb2_set_plane_payload(&vip_buf->vb.vb2_buf, 0, size);
efeb98b4 310
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311 return 0;
312}
313static void buffer_queue(struct vb2_buffer *vb)
314{
2d700715 315 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 316 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 317 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
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318
319 spin_lock(&vip->lock);
320 list_add_tail(&vip_buf->list, &vip->buffer_list);
321 if (!vip->active) { /* No active buffer, active the first one */
322 vip->active = list_first_entry(&vip->buffer_list,
323 struct vip_buffer,
324 list);
325 if (vb2_is_streaming(&vip->vb_vidq)) /* streaming is on */
326 start_dma(vip, vip_buf); /* start dma capture */
efeb98b4 327 }
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328 spin_unlock(&vip->lock);
329}
06470642 330static void buffer_finish(struct vb2_buffer *vb)
8dc97ea2 331{
2d700715 332 struct vb2_v4l2_buffer *vbuf = to_vb2_v4l2_buffer(vb);
8dc97ea2 333 struct sta2x11_vip *vip = vb2_get_drv_priv(vb->vb2_queue);
2d700715 334 struct vip_buffer *vip_buf = to_vip_buffer(vbuf);
efeb98b4 335
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336 /* Buffer handled, remove it from the list */
337 spin_lock(&vip->lock);
338 list_del_init(&vip_buf->list);
339 spin_unlock(&vip->lock);
efeb98b4 340
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341 if (vb2_is_streaming(vb->vb2_queue))
342 vip_active_buf_next(vip);
efeb98b4
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343}
344
8dc97ea2 345static int start_streaming(struct vb2_queue *vq, unsigned int count)
efeb98b4 346{
8dc97ea2 347 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
efeb98b4 348
efeb98b4 349 spin_lock_irq(&vip->slock);
8dc97ea2
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350 /* Enable interrupt VSYNC Top and Bottom*/
351 reg_write(vip, DVP_ITM, DVP_IT_VSB | DVP_IT_VST);
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352 spin_unlock_irq(&vip->slock);
353
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354 if (count)
355 start_dma(vip, vip->active);
efeb98b4 356
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357 return 0;
358}
359
8dc97ea2 360/* abort streaming and wait for last buffer */
e37559b2 361static void stop_streaming(struct vb2_queue *vq)
efeb98b4 362{
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363 struct sta2x11_vip *vip = vb2_get_drv_priv(vq);
364 struct vip_buffer *vip_buf, *node;
365
366 /* Disable acquisition */
367 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
368 /* Disable all interrupts */
369 reg_write(vip, DVP_ITM, 0);
370
371 /* Release all active buffers */
372 spin_lock(&vip->lock);
373 list_for_each_entry_safe(vip_buf, node, &vip->buffer_list, list) {
2d700715 374 vb2_buffer_done(&vip_buf->vb.vb2_buf, VB2_BUF_STATE_ERROR);
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375 list_del(&vip_buf->list);
376 }
377 spin_unlock(&vip->lock);
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378}
379
8b6fe20a 380static const struct vb2_ops vip_video_qops = {
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381 .queue_setup = queue_setup,
382 .buf_init = buffer_init,
383 .buf_prepare = buffer_prepare,
384 .buf_finish = buffer_finish,
385 .buf_queue = buffer_queue,
386 .start_streaming = start_streaming,
387 .stop_streaming = stop_streaming,
388};
efeb98b4 389
efeb98b4 390
8dc97ea2
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391/* File Operations */
392static const struct v4l2_file_operations vip_fops = {
393 .owner = THIS_MODULE,
394 .open = v4l2_fh_open,
395 .release = vb2_fop_release,
396 .unlocked_ioctl = video_ioctl2,
397 .read = vb2_fop_read,
398 .mmap = vb2_fop_mmap,
399 .poll = vb2_fop_poll
400};
efeb98b4 401
efeb98b4
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402
403/**
404 * vidioc_querycap - return capabilities of device
8dc97ea2 405 * @file: descriptor of device
efeb98b4
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406 * @cap: contains return values
407 *
408 * the capabilities of the device are returned
409 *
410 * return value: 0, no error.
411 */
412static int vidioc_querycap(struct file *file, void *priv,
413 struct v4l2_capability *cap)
414{
8dc97ea2 415 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 416
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417 strcpy(cap->driver, KBUILD_MODNAME);
418 strcpy(cap->card, KBUILD_MODNAME);
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419 snprintf(cap->bus_info, sizeof(cap->bus_info), "PCI:%s",
420 pci_name(vip->pdev));
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421 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
422 V4L2_CAP_STREAMING;
423 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
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424
425 return 0;
426}
427
428/**
429 * vidioc_s_std - set video standard
8dc97ea2 430 * @file: descriptor of device
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431 * @std: contains standard to be set
432 *
433 * the video standard is set
434 *
435 * return value: 0, no error.
436 *
437 * -EIO, no input signal detected
438 *
439 * other, returned from video DAC.
440 */
314527ac 441static int vidioc_s_std(struct file *file, void *priv, v4l2_std_id std)
efeb98b4 442{
8dc97ea2 443 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 444
7b9f31f3
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445 /*
446 * This is here for backwards compatibility only.
447 * The use of V4L2_STD_ALL to trigger a querystd is non-standard.
448 */
449 if (std == V4L2_STD_ALL) {
450 v4l2_subdev_call(vip->decoder, video, querystd, &std);
451 if (std == V4L2_STD_UNKNOWN)
efeb98b4 452 return -EIO;
efeb98b4
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453 }
454
7b9f31f3
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455 if (vip->std != std) {
456 vip->std = std;
314527ac 457 if (V4L2_STD_525_60 & std)
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458 vip->format = formats_60[0];
459 else
460 vip->format = formats_50[0];
461 }
462
8774bed9 463 return v4l2_subdev_call(vip->decoder, video, s_std, std);
efeb98b4
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464}
465
466/**
467 * vidioc_g_std - get video standard
8dc97ea2 468 * @file: descriptor of device
efeb98b4
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469 * @std: contains return values
470 *
471 * the current video standard is returned
472 *
473 * return value: 0, no error.
474 */
475static int vidioc_g_std(struct file *file, void *priv, v4l2_std_id *std)
476{
8dc97ea2 477 struct sta2x11_vip *vip = video_drvdata(file);
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478
479 *std = vip->std;
480 return 0;
481}
482
483/**
484 * vidioc_querystd - get possible video standards
8dc97ea2 485 * @file: descriptor of device
efeb98b4
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486 * @std: contains return values
487 *
488 * all possible video standards are returned
489 *
490 * return value: delivered by video DAC routine.
491 */
492static int vidioc_querystd(struct file *file, void *priv, v4l2_std_id *std)
493{
8dc97ea2 494 struct sta2x11_vip *vip = video_drvdata(file);
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495
496 return v4l2_subdev_call(vip->decoder, video, querystd, std);
efeb98b4
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497}
498
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499static int vidioc_enum_input(struct file *file, void *priv,
500 struct v4l2_input *inp)
501{
502 if (inp->index > 1)
503 return -EINVAL;
504
505 inp->type = V4L2_INPUT_TYPE_CAMERA;
506 inp->std = V4L2_STD_ALL;
507 sprintf(inp->name, "Camera %u", inp->index);
508
509 return 0;
510}
511
512/**
513 * vidioc_s_input - set input line
8dc97ea2 514 * @file: descriptor of device
efeb98b4
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515 * @i: new input line number
516 *
517 * the current active input line is set
518 *
519 * return value: 0, no error.
520 *
521 * -EINVAL, line number out of range
522 */
523static int vidioc_s_input(struct file *file, void *priv, unsigned int i)
524{
8dc97ea2 525 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
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526 int ret;
527
528 if (i > 1)
529 return -EINVAL;
530 ret = v4l2_subdev_call(vip->decoder, video, s_routing, i, 0, 0);
531
532 if (!ret)
533 vip->input = i;
534
535 return 0;
536}
537
538/**
539 * vidioc_g_input - return input line
8dc97ea2 540 * @file: descriptor of device
efeb98b4
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541 * @i: returned input line number
542 *
543 * the current active input line is returned
544 *
545 * return value: always 0.
546 */
547static int vidioc_g_input(struct file *file, void *priv, unsigned int *i)
548{
8dc97ea2 549 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
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550
551 *i = vip->input;
552 return 0;
553}
554
555/**
556 * vidioc_enum_fmt_vid_cap - return video capture format
efeb98b4
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557 * @f: returned format information
558 *
559 * returns name and format of video capture
560 * Only UYVY is supported by hardware.
561 *
562 * return value: always 0.
563 */
564static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
565 struct v4l2_fmtdesc *f)
566{
567
568 if (f->index != 0)
569 return -EINVAL;
570
571 strcpy(f->description, "4:2:2, packed, UYVY");
572 f->pixelformat = V4L2_PIX_FMT_UYVY;
573 f->flags = 0;
574 return 0;
575}
576
577/**
578 * vidioc_try_fmt_vid_cap - set video capture format
8dc97ea2 579 * @file: descriptor of device
efeb98b4
FV
580 * @f: new format
581 *
582 * new video format is set which includes width and
583 * field type. width is fixed to 720, no scaling.
584 * Only UYVY is supported by this hardware.
585 * the minimum height is 200, the maximum is 576 (PAL)
586 *
587 * return value: 0, no error
588 *
589 * -EINVAL, pixel or field format not supported
590 *
591 */
592static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
593 struct v4l2_format *f)
594{
8dc97ea2 595 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4
FV
596 int interlace_lim;
597
8dc97ea2
FV
598 if (V4L2_PIX_FMT_UYVY != f->fmt.pix.pixelformat) {
599 v4l2_warn(&vip->v4l2_dev, "Invalid format, only UYVY supported\n");
efeb98b4 600 return -EINVAL;
8dc97ea2 601 }
efeb98b4 602
6ae009a8 603 if (V4L2_STD_525_60 & vip->std)
efeb98b4
FV
604 interlace_lim = 240;
605 else
606 interlace_lim = 288;
607
608 switch (f->fmt.pix.field) {
8dc97ea2 609 default:
efeb98b4
FV
610 case V4L2_FIELD_ANY:
611 if (interlace_lim < f->fmt.pix.height)
612 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
613 else
614 f->fmt.pix.field = V4L2_FIELD_BOTTOM;
615 break;
616 case V4L2_FIELD_TOP:
617 case V4L2_FIELD_BOTTOM:
618 if (interlace_lim < f->fmt.pix.height)
619 f->fmt.pix.height = interlace_lim;
620 break;
621 case V4L2_FIELD_INTERLACED:
622 break;
efeb98b4
FV
623 }
624
8dc97ea2
FV
625 /* It is the only supported format */
626 f->fmt.pix.pixelformat = V4L2_PIX_FMT_UYVY;
efeb98b4
FV
627 f->fmt.pix.height &= ~1;
628 if (2 * interlace_lim < f->fmt.pix.height)
629 f->fmt.pix.height = 2 * interlace_lim;
630 if (200 > f->fmt.pix.height)
631 f->fmt.pix.height = 200;
632 f->fmt.pix.width = 720;
633 f->fmt.pix.bytesperline = f->fmt.pix.width * 2;
634 f->fmt.pix.sizeimage = f->fmt.pix.width * 2 * f->fmt.pix.height;
635 f->fmt.pix.colorspace = V4L2_COLORSPACE_SMPTE170M;
efeb98b4
FV
636 return 0;
637}
638
639/**
640 * vidioc_s_fmt_vid_cap - set current video format parameters
8dc97ea2 641 * @file: descriptor of device
efeb98b4
FV
642 * @f: returned format information
643 *
644 * set new capture format
645 * return value: 0, no error
646 *
647 * other, delivered by video DAC routine.
648 */
649static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
650 struct v4l2_format *f)
651{
8dc97ea2
FV
652 struct sta2x11_vip *vip = video_drvdata(file);
653 unsigned int t_stop, b_stop, pitch;
efeb98b4
FV
654 int ret;
655
656 ret = vidioc_try_fmt_vid_cap(file, priv, f);
657 if (ret)
658 return ret;
659
8dc97ea2
FV
660 if (vb2_is_busy(&vip->vb_vidq)) {
661 /* Can't change format during acquisition */
662 v4l2_err(&vip->v4l2_dev, "device busy\n");
663 return -EBUSY;
664 }
665 vip->format = f->fmt.pix;
666 switch (vip->format.field) {
667 case V4L2_FIELD_INTERLACED:
668 t_stop = ((vip->format.height / 2 - 1) << 16) |
669 (2 * vip->format.width - 1);
670 b_stop = t_stop;
671 pitch = 4 * vip->format.width;
672 break;
673 case V4L2_FIELD_TOP:
674 t_stop = ((vip->format.height - 1) << 16) |
675 (2 * vip->format.width - 1);
676 b_stop = (0 << 16) | (2 * vip->format.width - 1);
677 pitch = 2 * vip->format.width;
678 break;
679 case V4L2_FIELD_BOTTOM:
680 t_stop = (0 << 16) | (2 * vip->format.width - 1);
681 b_stop = (vip->format.height << 16) |
682 (2 * vip->format.width - 1);
683 pitch = 2 * vip->format.width;
684 break;
685 default:
686 v4l2_err(&vip->v4l2_dev, "unknown field format\n");
687 return -EINVAL;
688 }
689
690 spin_lock_irq(&vip->slock);
691 /* Y-X Top Field Offset */
692 reg_write(vip, DVP_TFO, 0);
693 /* Y-X Bottom Field Offset */
694 reg_write(vip, DVP_BFO, 0);
695 /* Y-X Top Field Stop*/
696 reg_write(vip, DVP_TFS, t_stop);
697 /* Y-X Bottom Field Stop */
698 reg_write(vip, DVP_BFS, b_stop);
699 /* Video Memory Pitch */
700 reg_write(vip, DVP_VMP, pitch);
701 spin_unlock_irq(&vip->slock);
702
efeb98b4
FV
703 return 0;
704}
705
706/**
707 * vidioc_g_fmt_vid_cap - get current video format parameters
8dc97ea2 708 * @file: descriptor of device
efeb98b4
FV
709 * @f: contains format information
710 *
711 * returns current video format parameters
712 *
713 * return value: 0, always successful
714 */
715static int vidioc_g_fmt_vid_cap(struct file *file, void *priv,
716 struct v4l2_format *f)
717{
8dc97ea2 718 struct sta2x11_vip *vip = video_drvdata(file);
efeb98b4 719
8dc97ea2 720 f->fmt.pix = vip->format;
efeb98b4 721
8dc97ea2 722 return 0;
efeb98b4
FV
723}
724
efeb98b4
FV
725static const struct v4l2_ioctl_ops vip_ioctl_ops = {
726 .vidioc_querycap = vidioc_querycap,
8dc97ea2
FV
727 /* FMT handling */
728 .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
729 .vidioc_g_fmt_vid_cap = vidioc_g_fmt_vid_cap,
730 .vidioc_s_fmt_vid_cap = vidioc_s_fmt_vid_cap,
731 .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
732 /* Buffer handlers */
733 .vidioc_create_bufs = vb2_ioctl_create_bufs,
734 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
735 .vidioc_reqbufs = vb2_ioctl_reqbufs,
736 .vidioc_querybuf = vb2_ioctl_querybuf,
737 .vidioc_qbuf = vb2_ioctl_qbuf,
738 .vidioc_dqbuf = vb2_ioctl_dqbuf,
739 /* Stream on/off */
740 .vidioc_streamon = vb2_ioctl_streamon,
741 .vidioc_streamoff = vb2_ioctl_streamoff,
742 /* Standard handling */
efeb98b4 743 .vidioc_g_std = vidioc_g_std,
8dc97ea2 744 .vidioc_s_std = vidioc_s_std,
efeb98b4 745 .vidioc_querystd = vidioc_querystd,
8dc97ea2 746 /* Input handling */
efeb98b4 747 .vidioc_enum_input = vidioc_enum_input,
efeb98b4 748 .vidioc_g_input = vidioc_g_input,
8dc97ea2
FV
749 .vidioc_s_input = vidioc_s_input,
750 /* Log status ioctl */
751 .vidioc_log_status = v4l2_ctrl_log_status,
752 /* Event handling */
753 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
754 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
efeb98b4
FV
755};
756
757static struct video_device video_dev_template = {
8dc97ea2 758 .name = KBUILD_MODNAME,
4db4ca74 759 .release = video_device_release_empty,
efeb98b4
FV
760 .fops = &vip_fops,
761 .ioctl_ops = &vip_ioctl_ops,
762 .tvnorms = V4L2_STD_ALL,
763};
764
765/**
766 * vip_irq - interrupt routine
767 * @irq: Number of interrupt ( not used, correct number is assumed )
768 * @vip: local data structure containing all information
769 *
770 * check for both frame interrupts set ( top and bottom ).
771 * check FIFO overflow, but limit number of log messages after open.
8dc97ea2 772 * signal a complete buffer if done
efeb98b4
FV
773 *
774 * return value: IRQ_NONE, interrupt was not generated by VIP
775 *
776 * IRQ_HANDLED, interrupt done.
777 */
778static irqreturn_t vip_irq(int irq, struct sta2x11_vip *vip)
779{
8dc97ea2 780 unsigned int status;
efeb98b4 781
8dc97ea2 782 status = reg_read(vip, DVP_ITS);
efeb98b4 783
8dc97ea2 784 if (!status) /* No interrupt to handle */
efeb98b4 785 return IRQ_NONE;
efeb98b4 786
8dc97ea2
FV
787 if (status & DVP_IT_FIFO)
788 if (vip->overflow++ > 5)
789 pr_info("VIP: fifo overflow\n");
efeb98b4 790
8dc97ea2 791 if ((status & DVP_IT_VST) && (status & DVP_IT_VSB)) {
efeb98b4
FV
792 /* this is bad, we are too slow, hope the condition is gone
793 * on the next frame */
efeb98b4
FV
794 return IRQ_HANDLED;
795 }
796
8dc97ea2
FV
797 if (status & DVP_IT_VST)
798 if ((++vip->tcount) < 2)
799 return IRQ_HANDLED;
800 if (status & DVP_IT_VSB) {
801 vip->bcount++;
802 return IRQ_HANDLED;
efeb98b4
FV
803 }
804
8dc97ea2
FV
805 if (vip->active) { /* Acquisition is over on this buffer */
806 /* Disable acquisition */
807 reg_write(vip, DVP_CTL, reg_read(vip, DVP_CTL) & ~DVP_CTL_ENA);
808 /* Remove the active buffer from the list */
d6dd645e 809 vip->active->vb.vb2_buf.timestamp = ktime_get_ns();
2d700715
JS
810 vip->active->vb.sequence = vip->sequence++;
811 vb2_buffer_done(&vip->active->vb.vb2_buf, VB2_BUF_STATE_DONE);
8dc97ea2 812 }
efeb98b4 813
8dc97ea2
FV
814 return IRQ_HANDLED;
815}
efeb98b4 816
8dc97ea2
FV
817static void sta2x11_vip_init_register(struct sta2x11_vip *vip)
818{
819 /* Register initialization */
820 spin_lock_irq(&vip->slock);
821 /* Clean interrupt */
822 reg_read(vip, DVP_ITS);
823 /* Enable Half Line per vertical */
824 reg_write(vip, DVP_HLFLN, DVP_HLFLN_SD);
825 /* Reset VIP control */
826 reg_write(vip, DVP_CTL, DVP_CTL_RST);
827 /* Clear VIP control */
828 reg_write(vip, DVP_CTL, 0);
829 spin_unlock_irq(&vip->slock);
830}
831static void sta2x11_vip_clear_register(struct sta2x11_vip *vip)
832{
833 spin_lock_irq(&vip->slock);
834 /* Disable interrupt */
835 reg_write(vip, DVP_ITM, 0);
836 /* Reset VIP Control */
837 reg_write(vip, DVP_CTL, DVP_CTL_RST);
838 /* Clear VIP Control */
839 reg_write(vip, DVP_CTL, 0);
840 /* Clean VIP Interrupt */
841 reg_read(vip, DVP_ITS);
842 spin_unlock_irq(&vip->slock);
843}
844static int sta2x11_vip_init_buffer(struct sta2x11_vip *vip)
845{
846 int err;
efeb98b4 847
8dc97ea2
FV
848 err = dma_set_coherent_mask(&vip->pdev->dev, DMA_BIT_MASK(29));
849 if (err) {
850 v4l2_err(&vip->v4l2_dev, "Cannot configure coherent mask");
851 return err;
efeb98b4 852 }
8dc97ea2
FV
853 memset(&vip->vb_vidq, 0, sizeof(struct vb2_queue));
854 vip->vb_vidq.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
855 vip->vb_vidq.io_modes = VB2_MMAP | VB2_READ;
856 vip->vb_vidq.drv_priv = vip;
857 vip->vb_vidq.buf_struct_size = sizeof(struct vip_buffer);
858 vip->vb_vidq.ops = &vip_video_qops;
859 vip->vb_vidq.mem_ops = &vb2_dma_contig_memops;
b59b100c 860 vip->vb_vidq.timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2bc46b3a 861 vip->vb_vidq.dev = &vip->pdev->dev;
8dc97ea2
FV
862 err = vb2_queue_init(&vip->vb_vidq);
863 if (err)
864 return err;
865 INIT_LIST_HEAD(&vip->buffer_list);
866 spin_lock_init(&vip->lock);
8dc97ea2
FV
867 return 0;
868}
2bc46b3a 869
8dc97ea2
FV
870static int sta2x11_vip_init_controls(struct sta2x11_vip *vip)
871{
872 /*
873 * Inititialize an empty control so VIP can inerithing controls
874 * from ADV7180
875 */
876 v4l2_ctrl_handler_init(&vip->ctrl_hdl, 0);
877
878 vip->v4l2_dev.ctrl_handler = &vip->ctrl_hdl;
879 if (vip->ctrl_hdl.error) {
880 int err = vip->ctrl_hdl.error;
881
882 v4l2_ctrl_handler_free(&vip->ctrl_hdl);
883 return err;
884 }
885
886 return 0;
efeb98b4
FV
887}
888
889/**
890 * vip_gpio_reserve - reserve gpio pin
891 * @dev: device
892 * @pin: GPIO pin number
893 * @dir: direction, input or output
894 * @name: GPIO pin name
895 *
896 */
897static int vip_gpio_reserve(struct device *dev, int pin, int dir,
898 const char *name)
899{
900 int ret;
901
902 if (pin == -1)
903 return 0;
904
905 ret = gpio_request(pin, name);
906 if (ret) {
907 dev_err(dev, "Failed to allocate pin %d (%s)\n", pin, name);
908 return ret;
909 }
910
911 ret = gpio_direction_output(pin, dir);
912 if (ret) {
913 dev_err(dev, "Failed to set direction for pin %d (%s)\n",
914 pin, name);
915 gpio_free(pin);
916 return ret;
917 }
918
919 ret = gpio_export(pin, false);
920 if (ret) {
921 dev_err(dev, "Failed to export pin %d (%s)\n", pin, name);
922 gpio_free(pin);
923 return ret;
924 }
925
926 return 0;
927}
928
929/**
930 * vip_gpio_release - release gpio pin
931 * @dev: device
932 * @pin: GPIO pin number
933 * @name: GPIO pin name
934 *
935 */
936static void vip_gpio_release(struct device *dev, int pin, const char *name)
937{
938 if (pin != -1) {
939 dev_dbg(dev, "releasing pin %d (%s)\n", pin, name);
940 gpio_unexport(pin);
941 gpio_free(pin);
942 }
943}
944
945/**
946 * sta2x11_vip_init_one - init one instance of video device
947 * @pdev: PCI device
948 * @ent: (not used)
949 *
950 * allocate reset pins for DAC.
951 * Reset video DAC, this is done via reset line.
952 * allocate memory for managing device
953 * request interrupt
954 * map IO region
955 * register device
956 * find and initialize video DAC
957 *
958 * return value: 0, no error
959 *
960 * -ENOMEM, no memory
961 *
962 * -ENODEV, device could not be detected or registered
963 */
4c62e976
GKH
964static int sta2x11_vip_init_one(struct pci_dev *pdev,
965 const struct pci_device_id *ent)
efeb98b4
FV
966{
967 int ret;
968 struct sta2x11_vip *vip;
969 struct vip_config *config;
970
8dc97ea2
FV
971 /* Check if hardware support 26-bit DMA */
972 if (dma_set_mask(&pdev->dev, DMA_BIT_MASK(26))) {
973 dev_err(&pdev->dev, "26-bit DMA addressing not available\n");
974 return -EINVAL;
975 }
976 /* Enable PCI */
efeb98b4
FV
977 ret = pci_enable_device(pdev);
978 if (ret)
979 return ret;
980
8dc97ea2 981 /* Get VIP platform data */
efeb98b4
FV
982 config = dev_get_platdata(&pdev->dev);
983 if (!config) {
984 dev_info(&pdev->dev, "VIP slot disabled\n");
985 ret = -EINVAL;
986 goto disable;
987 }
988
8dc97ea2 989 /* Power configuration */
efeb98b4
FV
990 ret = vip_gpio_reserve(&pdev->dev, config->pwr_pin, 0,
991 config->pwr_name);
992 if (ret)
993 goto disable;
994
995 if (config->reset_pin >= 0) {
996 ret = vip_gpio_reserve(&pdev->dev, config->reset_pin, 0,
997 config->reset_name);
998 if (ret) {
999 vip_gpio_release(&pdev->dev, config->pwr_pin,
1000 config->pwr_name);
1001 goto disable;
1002 }
1003 }
efeb98b4
FV
1004 if (config->pwr_pin != -1) {
1005 /* Datasheet says 5ms between PWR and RST */
1006 usleep_range(5000, 25000);
1007 ret = gpio_direction_output(config->pwr_pin, 1);
1008 }
1009
1010 if (config->reset_pin != -1) {
1011 /* Datasheet says 5ms between PWR and RST */
1012 usleep_range(5000, 25000);
1013 ret = gpio_direction_output(config->reset_pin, 1);
1014 }
1015 usleep_range(5000, 25000);
1016
8dc97ea2 1017 /* Allocate a new VIP instance */
efeb98b4
FV
1018 vip = kzalloc(sizeof(struct sta2x11_vip), GFP_KERNEL);
1019 if (!vip) {
1020 ret = -ENOMEM;
1021 goto release_gpios;
1022 }
efeb98b4
FV
1023 vip->pdev = pdev;
1024 vip->std = V4L2_STD_PAL;
1025 vip->format = formats_50[0];
1026 vip->config = config;
1027
8dc97ea2
FV
1028 ret = sta2x11_vip_init_controls(vip);
1029 if (ret)
1030 goto free_mem;
d017650b
WY
1031 ret = v4l2_device_register(&pdev->dev, &vip->v4l2_dev);
1032 if (ret)
efeb98b4
FV
1033 goto free_mem;
1034
1035 dev_dbg(&pdev->dev, "BAR #0 at 0x%lx 0x%lx irq %d\n",
1036 (unsigned long)pci_resource_start(pdev, 0),
1037 (unsigned long)pci_resource_len(pdev, 0), pdev->irq);
1038
1039 pci_set_master(pdev);
1040
8dc97ea2 1041 ret = pci_request_regions(pdev, KBUILD_MODNAME);
efeb98b4
FV
1042 if (ret)
1043 goto unreg;
1044
1045 vip->iomem = pci_iomap(pdev, 0, 0x100);
1046 if (!vip->iomem) {
8dc97ea2 1047 ret = -ENOMEM;
efeb98b4
FV
1048 goto release;
1049 }
1050
1051 pci_enable_msi(pdev);
1052
8dc97ea2
FV
1053 /* Initialize buffer */
1054 ret = sta2x11_vip_init_buffer(vip);
1055 if (ret)
1056 goto unmap;
1057
efeb98b4 1058 spin_lock_init(&vip->slock);
efeb98b4
FV
1059
1060 ret = request_irq(pdev->irq,
1061 (irq_handler_t) vip_irq,
8dc97ea2 1062 IRQF_SHARED, KBUILD_MODNAME, vip);
efeb98b4
FV
1063 if (ret) {
1064 dev_err(&pdev->dev, "request_irq failed\n");
1065 ret = -ENODEV;
8dc97ea2 1066 goto release_buf;
efeb98b4
FV
1067 }
1068
4db4ca74
HV
1069 /* Initialize and register video device */
1070 vip->video_dev = video_dev_template;
1071 vip->video_dev.v4l2_dev = &vip->v4l2_dev;
1072 vip->video_dev.queue = &vip->vb_vidq;
1073 video_set_drvdata(&vip->video_dev, vip);
efeb98b4 1074
4db4ca74 1075 ret = video_register_device(&vip->video_dev, VFL_TYPE_GRABBER, -1);
efeb98b4
FV
1076 if (ret)
1077 goto vrelease;
1078
8dc97ea2 1079 /* Get ADV7180 subdevice */
efeb98b4
FV
1080 vip->adapter = i2c_get_adapter(vip->config->i2c_id);
1081 if (!vip->adapter) {
1082 ret = -ENODEV;
1083 dev_err(&pdev->dev, "no I2C adapter found\n");
1084 goto vunreg;
1085 }
1086
1087 vip->decoder = v4l2_i2c_new_subdev(&vip->v4l2_dev, vip->adapter,
1088 "adv7180", vip->config->i2c_addr,
1089 NULL);
1090 if (!vip->decoder) {
1091 ret = -ENODEV;
1092 dev_err(&pdev->dev, "no decoder found\n");
1093 goto vunreg;
1094 }
1095
1096 i2c_put_adapter(vip->adapter);
efeb98b4
FV
1097 v4l2_subdev_call(vip->decoder, core, init, 0);
1098
8dc97ea2
FV
1099 sta2x11_vip_init_register(vip);
1100
1101 dev_info(&pdev->dev, "STA2X11 Video Input Port (VIP) loaded\n");
efeb98b4
FV
1102 return 0;
1103
1104vunreg:
4db4ca74 1105 video_set_drvdata(&vip->video_dev, NULL);
efeb98b4 1106vrelease:
4db4ca74 1107 video_unregister_device(&vip->video_dev);
efeb98b4 1108 free_irq(pdev->irq, vip);
8dc97ea2 1109release_buf:
efeb98b4
FV
1110 pci_disable_msi(pdev);
1111unmap:
8dc97ea2 1112 vb2_queue_release(&vip->vb_vidq);
efeb98b4 1113 pci_iounmap(pdev, vip->iomem);
efeb98b4
FV
1114release:
1115 pci_release_regions(pdev);
1116unreg:
1117 v4l2_device_unregister(&vip->v4l2_dev);
1118free_mem:
1119 kfree(vip);
1120release_gpios:
1121 vip_gpio_release(&pdev->dev, config->reset_pin, config->reset_name);
1122 vip_gpio_release(&pdev->dev, config->pwr_pin, config->pwr_name);
1123disable:
1124 /*
1125 * do not call pci_disable_device on sta2x11 because it break all
1126 * other Bus masters on this EP
1127 */
1128 return ret;
1129}
1130
1131/**
1132 * sta2x11_vip_remove_one - release device
1133 * @pdev: PCI device
1134 *
1135 * Undo everything done in .._init_one
1136 *
1137 * unregister video device
1138 * free interrupt
1139 * unmap ioadresses
1140 * free memory
1141 * free GPIO pins
1142 */
4c62e976 1143static void sta2x11_vip_remove_one(struct pci_dev *pdev)
efeb98b4
FV
1144{
1145 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1146 struct sta2x11_vip *vip =
1147 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1148
8dc97ea2
FV
1149 sta2x11_vip_clear_register(vip);
1150
4db4ca74
HV
1151 video_set_drvdata(&vip->video_dev, NULL);
1152 video_unregister_device(&vip->video_dev);
efeb98b4
FV
1153 free_irq(pdev->irq, vip);
1154 pci_disable_msi(pdev);
8dc97ea2 1155 vb2_queue_release(&vip->vb_vidq);
efeb98b4
FV
1156 pci_iounmap(pdev, vip->iomem);
1157 pci_release_regions(pdev);
1158
1159 v4l2_device_unregister(&vip->v4l2_dev);
efeb98b4
FV
1160
1161 vip_gpio_release(&pdev->dev, vip->config->pwr_pin,
1162 vip->config->pwr_name);
1163 vip_gpio_release(&pdev->dev, vip->config->reset_pin,
1164 vip->config->reset_name);
1165
1166 kfree(vip);
1167 /*
1168 * do not call pci_disable_device on sta2x11 because it break all
1169 * other Bus masters on this EP
1170 */
1171}
1172
1173#ifdef CONFIG_PM
1174
1175/**
1176 * sta2x11_vip_suspend - set device into power save mode
1177 * @pdev: PCI device
1178 * @state: new state of device
1179 *
1180 * all relevant registers are saved and an attempt to set a new state is made.
1181 *
1182 * return value: 0 always indicate success,
1183 * even if device could not be disabled. (workaround for hardware problem)
efeb98b4
FV
1184 */
1185static int sta2x11_vip_suspend(struct pci_dev *pdev, pm_message_t state)
1186{
1187 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1188 struct sta2x11_vip *vip =
1189 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1190 unsigned long flags;
1191 int i;
1192
1193 spin_lock_irqsave(&vip->slock, flags);
8dc97ea2
FV
1194 vip->register_save_area[0] = reg_read(vip, DVP_CTL);
1195 reg_write(vip, DVP_CTL, vip->register_save_area[0] & DVP_CTL_DIS);
1196 vip->register_save_area[SAVE_COUNT] = reg_read(vip, DVP_ITM);
1197 reg_write(vip, DVP_ITM, 0);
efeb98b4 1198 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1199 vip->register_save_area[i] = reg_read(vip, 4 * i);
efeb98b4
FV
1200 for (i = 0; i < AUX_COUNT; i++)
1201 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i] =
8dc97ea2 1202 reg_read(vip, registers_to_save[i]);
efeb98b4
FV
1203 spin_unlock_irqrestore(&vip->slock, flags);
1204 /* save pci state */
1205 pci_save_state(pdev);
1206 if (pci_set_power_state(pdev, pci_choose_state(pdev, state))) {
1207 /*
1208 * do not call pci_disable_device on sta2x11 because it
1209 * break all other Bus masters on this EP
1210 */
1211 vip->disabled = 1;
1212 }
1213
1214 pr_info("VIP: suspend\n");
1215 return 0;
1216}
1217
1218/**
1219 * sta2x11_vip_resume - resume device operation
1220 * @pdev : PCI device
1221 *
1222 * re-enable device, set PCI state to powered and restore registers.
1223 * resume normal device operation afterwards.
1224 *
1225 * return value: 0, no error.
1226 *
1227 * other, could not set device to power on state.
1228 */
1229static int sta2x11_vip_resume(struct pci_dev *pdev)
1230{
1231 struct v4l2_device *v4l2_dev = pci_get_drvdata(pdev);
1232 struct sta2x11_vip *vip =
1233 container_of(v4l2_dev, struct sta2x11_vip, v4l2_dev);
1234 unsigned long flags;
1235 int ret, i;
1236
1237 pr_info("VIP: resume\n");
1238 /* restore pci state */
1239 if (vip->disabled) {
1240 ret = pci_enable_device(pdev);
1241 if (ret) {
8dc97ea2 1242 pr_warn("VIP: Can't enable device.\n");
efeb98b4
FV
1243 return ret;
1244 }
1245 vip->disabled = 0;
1246 }
1247 ret = pci_set_power_state(pdev, PCI_D0);
1248 if (ret) {
1249 /*
1250 * do not call pci_disable_device on sta2x11 because it
1251 * break all other Bus masters on this EP
1252 */
8dc97ea2 1253 pr_warn("VIP: Can't enable device.\n");
efeb98b4
FV
1254 vip->disabled = 1;
1255 return ret;
1256 }
1257
1258 pci_restore_state(pdev);
1259
1260 spin_lock_irqsave(&vip->slock, flags);
1261 for (i = 1; i < SAVE_COUNT; i++)
8dc97ea2 1262 reg_write(vip, 4 * i, vip->register_save_area[i]);
efeb98b4 1263 for (i = 0; i < AUX_COUNT; i++)
8dc97ea2 1264 reg_write(vip, registers_to_save[i],
efeb98b4 1265 vip->register_save_area[SAVE_COUNT + IRQ_COUNT + i]);
8dc97ea2
FV
1266 reg_write(vip, DVP_CTL, vip->register_save_area[0]);
1267 reg_write(vip, DVP_ITM, vip->register_save_area[SAVE_COUNT]);
efeb98b4
FV
1268 spin_unlock_irqrestore(&vip->slock, flags);
1269 return 0;
1270}
1271
1272#endif
1273
f1b84d36 1274static const struct pci_device_id sta2x11_vip_pci_tbl[] = {
efeb98b4
FV
1275 {PCI_DEVICE(PCI_VENDOR_ID_STMICRO, PCI_DEVICE_ID_STMICRO_VIP)},
1276 {0,}
1277};
1278
1279static struct pci_driver sta2x11_vip_driver = {
8dc97ea2 1280 .name = KBUILD_MODNAME,
efeb98b4 1281 .probe = sta2x11_vip_init_one,
4c62e976 1282 .remove = sta2x11_vip_remove_one,
efeb98b4
FV
1283 .id_table = sta2x11_vip_pci_tbl,
1284#ifdef CONFIG_PM
1285 .suspend = sta2x11_vip_suspend,
1286 .resume = sta2x11_vip_resume,
1287#endif
1288};
1289
1290static int __init sta2x11_vip_init_module(void)
1291{
1292 return pci_register_driver(&sta2x11_vip_driver);
1293}
1294
1295static void __exit sta2x11_vip_exit_module(void)
1296{
1297 pci_unregister_driver(&sta2x11_vip_driver);
1298}
1299
1300#ifdef MODULE
1301module_init(sta2x11_vip_init_module);
1302module_exit(sta2x11_vip_exit_module);
1303#else
1304late_initcall_sync(sta2x11_vip_init_module);
1305#endif
1306
1307MODULE_DESCRIPTION("STA2X11 Video Input Port driver");
1308MODULE_AUTHOR("Wind River");
1309MODULE_LICENSE("GPL v2");
1310MODULE_SUPPORTED_DEVICE("sta2x11 video input");
1311MODULE_VERSION(DRV_VERSION);
1312MODULE_DEVICE_TABLE(pci, sta2x11_vip_pci_tbl);