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Commit | Line | Data |
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a0c7056f | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
1da177e4 LT |
2 | /* |
3 | * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB) | |
4 | * av7110.c: initialization and demux stuff | |
5 | * | |
6 | * Copyright (C) 1999-2002 Ralph Metzler | |
7 | * & Marcus Metzler for convergence integrated media GmbH | |
8 | * | |
9 | * originally based on code by: | |
10 | * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de> | |
11 | * | |
991ce92f | 12 | * the project's page is at https://linuxtv.org |
1da177e4 LT |
13 | */ |
14 | ||
15 | ||
1da177e4 LT |
16 | #include <linux/module.h> |
17 | #include <linux/kmod.h> | |
18 | #include <linux/delay.h> | |
19 | #include <linux/fs.h> | |
20 | #include <linux/timer.h> | |
21 | #include <linux/poll.h> | |
1da177e4 LT |
22 | |
23 | #include <linux/kernel.h> | |
1da177e4 LT |
24 | #include <linux/sched.h> |
25 | #include <linux/types.h> | |
26 | #include <linux/fcntl.h> | |
27 | #include <linux/interrupt.h> | |
28 | #include <linux/string.h> | |
29 | #include <linux/pci.h> | |
30 | #include <linux/vmalloc.h> | |
31 | #include <linux/firmware.h> | |
32 | #include <linux/crc32.h> | |
33 | #include <linux/i2c.h> | |
8eec1429 | 34 | #include <linux/kthread.h> |
5a0e3ad6 | 35 | #include <linux/slab.h> |
3e085629 | 36 | #include <asm/unaligned.h> |
1a651a00 | 37 | #include <asm/byteorder.h> |
1da177e4 | 38 | |
1da177e4 LT |
39 | |
40 | #include <linux/dvb/frontend.h> | |
41 | ||
fada1935 | 42 | #include <media/dvb_frontend.h> |
1da177e4 LT |
43 | |
44 | #include "ttpci-eeprom.h" | |
45 | #include "av7110.h" | |
46 | #include "av7110_hw.h" | |
47 | #include "av7110_av.h" | |
48 | #include "av7110_ca.h" | |
49 | #include "av7110_ipack.h" | |
50 | ||
db5d91eb OE |
51 | #include "bsbe1.h" |
52 | #include "lnbp21.h" | |
265366e8 | 53 | #include "bsru6.h" |
db5d91eb | 54 | |
1da177e4 LT |
55 | #define TS_WIDTH 376 |
56 | #define TS_HEIGHT 512 | |
57 | #define TS_BUFLEN (TS_WIDTH*TS_HEIGHT) | |
58 | #define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE) | |
59 | ||
60 | ||
61 | int av7110_debug; | |
62 | ||
63 | static int vidmode = CVBS_RGB_OUT; | |
64 | static int pids_off; | |
65 | static int adac = DVB_ADAC_TI; | |
66 | static int hw_sections; | |
67 | static int rgb_on; | |
68 | static int volume = 255; | |
a5ed425c | 69 | static int budgetpatch; |
4caba426 OE |
70 | static int wss_cfg_4_3 = 0x4008; |
71 | static int wss_cfg_16_9 = 0x0007; | |
2f03ee8e | 72 | static int tv_standard; |
9e615eac | 73 | static int full_ts; |
1da177e4 LT |
74 | |
75 | module_param_named(debug, av7110_debug, int, 0644); | |
76 | MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)"); | |
77 | module_param(vidmode, int, 0444); | |
78 | MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC"); | |
79 | module_param(pids_off, int, 0444); | |
80 | MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed"); | |
81 | module_param(adac, int, 0444); | |
82 | MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)"); | |
83 | module_param(hw_sections, int, 0444); | |
84 | MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware"); | |
85 | module_param(rgb_on, int, 0444); | |
008e6ff9 | 86 | MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control signal on SCART pin 16 to switch SCART video mode from CVBS to RGB"); |
1da177e4 LT |
87 | module_param(volume, int, 0444); |
88 | MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)"); | |
89 | module_param(budgetpatch, int, 0444); | |
90 | MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)"); | |
9e615eac OE |
91 | module_param(full_ts, int, 0444); |
92 | MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable"); | |
4caba426 OE |
93 | module_param(wss_cfg_4_3, int, 0444); |
94 | MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data"); | |
95 | module_param(wss_cfg_16_9, int, 0444); | |
96 | MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data"); | |
2f03ee8e | 97 | module_param(tv_standard, int, 0444); |
98 | MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC"); | |
1da177e4 | 99 | |
78e92006 JG |
100 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
101 | ||
1da177e4 | 102 | static void restart_feeds(struct av7110 *av7110); |
9e615eac OE |
103 | static int budget_start_feed(struct dvb_demux_feed *feed); |
104 | static int budget_stop_feed(struct dvb_demux_feed *feed); | |
1da177e4 | 105 | |
a5ed425c | 106 | static int av7110_num; |
1da177e4 LT |
107 | |
108 | #define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \ | |
109 | {\ | |
110 | if (fe_func != NULL) { \ | |
111 | av7110_copy = fe_func; \ | |
112 | fe_func = av7110_func; \ | |
113 | } \ | |
114 | } | |
115 | ||
116 | ||
117 | static void init_av7110_av(struct av7110 *av7110) | |
118 | { | |
ce18a223 | 119 | int ret; |
1da177e4 LT |
120 | struct saa7146_dev *dev = av7110->dev; |
121 | ||
122 | /* set internal volume control to maximum */ | |
123 | av7110->adac_type = DVB_ADAC_TI; | |
ce18a223 | 124 | ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); |
7a2fa90f | 125 | if (ret < 0) |
ce18a223 | 126 | printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret); |
1da177e4 | 127 | |
defd574e OE |
128 | ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType, |
129 | 1, (u16) av7110->display_ar); | |
130 | if (ret < 0) | |
131 | printk("dvb-ttpci: unable to set aspect ratio\n"); | |
132 | ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType, | |
133 | 1, av7110->display_panscan); | |
134 | if (ret < 0) | |
135 | printk("dvb-ttpci: unable to set pan scan\n"); | |
136 | ||
4caba426 OE |
137 | ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3); |
138 | if (ret < 0) | |
139 | printk("dvb-ttpci: unable to configure 4:3 wss\n"); | |
140 | ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9); | |
141 | if (ret < 0) | |
142 | printk("dvb-ttpci: unable to configure 16:9 wss\n"); | |
143 | ||
ce18a223 | 144 | ret = av7710_set_video_mode(av7110, vidmode); |
7a2fa90f | 145 | if (ret < 0) |
ce18a223 | 146 | printk("dvb-ttpci:cannot set video mode:%d\n",ret); |
1da177e4 LT |
147 | |
148 | /* handle different card types */ | |
149 | /* remaining inits according to card and frontend type */ | |
150 | av7110->analog_tuner_flags = 0; | |
151 | av7110->current_input = 0; | |
61391e04 | 152 | if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a) |
1c13b95c | 153 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on |
61391e04 | 154 | if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) { |
1da177e4 | 155 | printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n", |
fdc53a6d | 156 | av7110->dvb_adapter.num); |
1da177e4 LT |
157 | av7110->adac_type = DVB_ADAC_CRYSTAL; |
158 | i2c_writereg(av7110, 0x20, 0x01, 0xd2); | |
159 | i2c_writereg(av7110, 0x20, 0x02, 0x49); | |
160 | i2c_writereg(av7110, 0x20, 0x03, 0x00); | |
161 | i2c_writereg(av7110, 0x20, 0x04, 0x00); | |
162 | ||
163 | /** | |
164 | * some special handling for the Siemens DVB-C cards... | |
165 | */ | |
166 | } else if (0 == av7110_init_analog_module(av7110)) { | |
167 | /* done. */ | |
168 | } | |
169 | else if (dev->pci->subsystem_vendor == 0x110a) { | |
170 | printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n", | |
fdc53a6d | 171 | av7110->dvb_adapter.num); |
1da177e4 LT |
172 | av7110->adac_type = DVB_ADAC_NONE; |
173 | } | |
174 | else { | |
175 | av7110->adac_type = adac; | |
176 | printk("dvb-ttpci: adac type set to %d @ card %d\n", | |
1c13b95c | 177 | av7110->adac_type, av7110->dvb_adapter.num); |
1da177e4 LT |
178 | } |
179 | ||
1c13b95c | 180 | if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) { |
1da177e4 | 181 | // switch DVB SCART on |
ce18a223 | 182 | ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0); |
7a2fa90f | 183 | if (ret < 0) |
ce18a223 WR |
184 | printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret); |
185 | ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1); | |
7a2fa90f | 186 | if (ret < 0) |
ce18a223 | 187 | printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret); |
1da177e4 | 188 | if (rgb_on && |
6af4ee10 KH |
189 | ((av7110->dev->pci->subsystem_vendor == 0x110a) || |
190 | (av7110->dev->pci->subsystem_vendor == 0x13c2)) && | |
191 | (av7110->dev->pci->subsystem_device == 0x0000)) { | |
1da177e4 LT |
192 | saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16 |
193 | //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8 | |
194 | } | |
195 | } | |
196 | ||
60edb137 OE |
197 | if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e) |
198 | av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on | |
199 | ||
ce18a223 | 200 | ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right); |
7a2fa90f | 201 | if (ret < 0) |
ce18a223 | 202 | printk("dvb-ttpci:cannot set volume :%d\n",ret); |
1da177e4 LT |
203 | } |
204 | ||
205 | static void recover_arm(struct av7110 *av7110) | |
206 | { | |
207 | dprintk(4, "%p\n",av7110); | |
208 | ||
209 | av7110_bootarm(av7110); | |
210 | msleep(100); | |
1da177e4 | 211 | |
66190a27 | 212 | init_av7110_av(av7110); |
1da177e4 | 213 | |
66190a27 OE |
214 | /* card-specific recovery */ |
215 | if (av7110->recover) | |
216 | av7110->recover(av7110); | |
217 | ||
218 | restart_feeds(av7110); | |
ee820a64 | 219 | |
b250392f | 220 | #if IS_ENABLED(CONFIG_DVB_AV7110_IR) |
ee820a64 OE |
221 | av7110_check_ir_config(av7110, true); |
222 | #endif | |
1da177e4 LT |
223 | } |
224 | ||
225 | static void av7110_arm_sync(struct av7110 *av7110) | |
226 | { | |
8eec1429 HP |
227 | if (av7110->arm_thread) |
228 | kthread_stop(av7110->arm_thread); | |
1da177e4 | 229 | |
8eec1429 | 230 | av7110->arm_thread = NULL; |
1da177e4 LT |
231 | } |
232 | ||
233 | static int arm_thread(void *data) | |
234 | { | |
235 | struct av7110 *av7110 = data; | |
236 | u16 newloops = 0; | |
237 | int timeout; | |
238 | ||
239 | dprintk(4, "%p\n",av7110); | |
240 | ||
1da177e4 LT |
241 | for (;;) { |
242 | timeout = wait_event_interruptible_timeout(av7110->arm_wait, | |
8eec1429 HP |
243 | kthread_should_stop(), 5 * HZ); |
244 | ||
245 | if (-ERESTARTSYS == timeout || kthread_should_stop()) { | |
1da177e4 LT |
246 | /* got signal or told to quit*/ |
247 | break; | |
248 | } | |
249 | ||
250 | if (!av7110->arm_ready) | |
251 | continue; | |
252 | ||
b250392f | 253 | #if IS_ENABLED(CONFIG_DVB_AV7110_IR) |
ee820a64 OE |
254 | av7110_check_ir_config(av7110, false); |
255 | #endif | |
256 | ||
3593cab5 | 257 | if (mutex_lock_interruptible(&av7110->dcomlock)) |
1da177e4 | 258 | break; |
1da177e4 | 259 | newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2); |
3593cab5 | 260 | mutex_unlock(&av7110->dcomlock); |
1da177e4 | 261 | |
66190a27 | 262 | if (newloops == av7110->arm_loops || av7110->arm_errors > 3) { |
1da177e4 | 263 | printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n", |
fdc53a6d | 264 | av7110->dvb_adapter.num); |
1da177e4 | 265 | |
66190a27 | 266 | recover_arm(av7110); |
1da177e4 | 267 | |
3593cab5 | 268 | if (mutex_lock_interruptible(&av7110->dcomlock)) |
1da177e4 | 269 | break; |
1da177e4 | 270 | newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1; |
3593cab5 | 271 | mutex_unlock(&av7110->dcomlock); |
1da177e4 LT |
272 | } |
273 | av7110->arm_loops = newloops; | |
66190a27 | 274 | av7110->arm_errors = 0; |
1da177e4 LT |
275 | } |
276 | ||
1da177e4 LT |
277 | return 0; |
278 | } | |
279 | ||
280 | ||
1da177e4 LT |
281 | /**************************************************************************** |
282 | * IRQ handling | |
283 | ****************************************************************************/ | |
284 | ||
285 | static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len, | |
286 | u8 *buffer2, size_t buffer2_len, | |
287 | struct dvb_demux_filter *dvbdmxfilter, | |
1da177e4 LT |
288 | struct av7110 *av7110) |
289 | { | |
290 | if (!dvbdmxfilter->feed->demux->dmx.frontend) | |
291 | return 0; | |
292 | if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE) | |
293 | return 0; | |
294 | ||
295 | switch (dvbdmxfilter->type) { | |
296 | case DMX_TYPE_SEC: | |
297 | if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len) | |
298 | return 0; | |
299 | if (dvbdmxfilter->doneq) { | |
300 | struct dmx_section_filter *filter = &dvbdmxfilter->filter; | |
301 | int i; | |
302 | u8 xor, neq = 0; | |
303 | ||
304 | for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) { | |
305 | xor = filter->filter_value[i] ^ buffer1[i]; | |
306 | neq |= dvbdmxfilter->maskandnotmode[i] & xor; | |
307 | } | |
308 | if (!neq) | |
309 | return 0; | |
310 | } | |
311 | return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len, | |
312 | buffer2, buffer2_len, | |
fdbeb962 | 313 | &dvbdmxfilter->filter, NULL); |
1da177e4 LT |
314 | case DMX_TYPE_TS: |
315 | if (!(dvbdmxfilter->feed->ts_type & TS_PACKET)) | |
316 | return 0; | |
317 | if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY) | |
318 | return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len, | |
319 | buffer2, buffer2_len, | |
fdbeb962 MCC |
320 | &dvbdmxfilter->feed->feed.ts, |
321 | NULL); | |
1da177e4 LT |
322 | else |
323 | av7110_p2t_write(buffer1, buffer1_len, | |
324 | dvbdmxfilter->feed->pid, | |
325 | &av7110->p2t_filter[dvbdmxfilter->index]); | |
c087fe3e | 326 | return 0; |
1da177e4 LT |
327 | default: |
328 | return 0; | |
329 | } | |
330 | } | |
331 | ||
332 | ||
333 | //#define DEBUG_TIMING | |
334 | static inline void print_time(char *s) | |
335 | { | |
336 | #ifdef DEBUG_TIMING | |
fe365285 AB |
337 | struct timespec64 ts; |
338 | ktime_get_real_ts64(&ts); | |
339 | printk("%s: %lld.%09ld\n", s, (s64)ts.tv_sec, ts.tv_nsec); | |
1da177e4 LT |
340 | #endif |
341 | } | |
342 | ||
343 | #define DEBI_READ 0 | |
344 | #define DEBI_WRITE 1 | |
345 | static inline void start_debi_dma(struct av7110 *av7110, int dir, | |
346 | unsigned long addr, unsigned int len) | |
347 | { | |
348 | dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len); | |
349 | if (saa7146_wait_for_debi_done(av7110->dev, 0)) { | |
3ca7fc84 | 350 | printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__); |
1da177e4 LT |
351 | return; |
352 | } | |
353 | ||
354 | SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */ | |
355 | SAA7146_IER_ENABLE(av7110->dev, MASK_19); | |
356 | if (len < 5) | |
357 | len = 5; /* we want a real DEBI DMA */ | |
358 | if (dir == DEBI_WRITE) | |
359 | iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3); | |
360 | else | |
361 | irdebi(av7110, DEBISWAB, addr, 0, len); | |
362 | } | |
363 | ||
d45b9b8a | 364 | static void debiirq(unsigned long cookie) |
1da177e4 | 365 | { |
d45b9b8a | 366 | struct av7110 *av7110 = (struct av7110 *)cookie; |
1da177e4 LT |
367 | int type = av7110->debitype; |
368 | int handle = (type >> 8) & 0x1f; | |
369 | unsigned int xfer = 0; | |
370 | ||
371 | print_time("debi"); | |
372 | dprintk(4, "type 0x%04x\n", type); | |
373 | ||
374 | if (type == -1) { | |
375 | printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n", | |
376 | jiffies, saa7146_read(av7110->dev, PSR), | |
377 | saa7146_read(av7110->dev, SSR)); | |
378 | goto debi_done; | |
379 | } | |
380 | av7110->debitype = -1; | |
381 | ||
382 | switch (type & 0xff) { | |
383 | ||
384 | case DATA_TS_RECORD: | |
385 | dvb_dmx_swfilter_packets(&av7110->demux, | |
386 | (const u8 *) av7110->debi_virt, | |
387 | av7110->debilen / 188); | |
388 | xfer = RX_BUFF; | |
389 | break; | |
390 | ||
391 | case DATA_PES_RECORD: | |
392 | if (av7110->demux.recording) | |
393 | av7110_record_cb(&av7110->p2t[handle], | |
394 | (u8 *) av7110->debi_virt, | |
395 | av7110->debilen); | |
396 | xfer = RX_BUFF; | |
397 | break; | |
398 | ||
399 | case DATA_IPMPE: | |
400 | case DATA_FSECTION: | |
401 | case DATA_PIPING: | |
402 | if (av7110->handle2filter[handle]) | |
403 | DvbDmxFilterCallback((u8 *)av7110->debi_virt, | |
404 | av7110->debilen, NULL, 0, | |
405 | av7110->handle2filter[handle], | |
2f684b23 | 406 | av7110); |
1da177e4 LT |
407 | xfer = RX_BUFF; |
408 | break; | |
409 | ||
410 | case DATA_CI_GET: | |
411 | { | |
412 | u8 *data = av7110->debi_virt; | |
413 | ||
414 | if ((data[0] < 2) && data[2] == 0xff) { | |
415 | int flags = 0; | |
416 | if (data[5] > 0) | |
417 | flags |= CA_CI_MODULE_PRESENT; | |
418 | if (data[5] > 5) | |
419 | flags |= CA_CI_MODULE_READY; | |
420 | av7110->ci_slot[data[0]].flags = flags; | |
421 | } else | |
422 | ci_get_data(&av7110->ci_rbuffer, | |
423 | av7110->debi_virt, | |
424 | av7110->debilen); | |
425 | xfer = RX_BUFF; | |
426 | break; | |
427 | } | |
428 | ||
429 | case DATA_COMMON_INTERFACE: | |
430 | CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen); | |
1da177e4 LT |
431 | xfer = RX_BUFF; |
432 | break; | |
433 | ||
434 | case DATA_DEBUG_MESSAGE: | |
435 | ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0; | |
436 | printk("%s\n", (s8 *) av7110->debi_virt); | |
437 | xfer = RX_BUFF; | |
438 | break; | |
439 | ||
440 | case DATA_CI_PUT: | |
441 | dprintk(4, "debi DATA_CI_PUT\n"); | |
c087fe3e MCC |
442 | xfer = TX_BUFF; |
443 | break; | |
1da177e4 LT |
444 | case DATA_MPEG_PLAY: |
445 | dprintk(4, "debi DATA_MPEG_PLAY\n"); | |
c087fe3e MCC |
446 | xfer = TX_BUFF; |
447 | break; | |
1da177e4 LT |
448 | case DATA_BMP_LOAD: |
449 | dprintk(4, "debi DATA_BMP_LOAD\n"); | |
450 | xfer = TX_BUFF; | |
451 | break; | |
452 | default: | |
453 | break; | |
454 | } | |
455 | debi_done: | |
456 | spin_lock(&av7110->debilock); | |
457 | if (xfer) | |
458 | iwdebi(av7110, DEBINOSWAP, xfer, 0, 2); | |
459 | ARM_ClearMailBox(av7110); | |
460 | spin_unlock(&av7110->debilock); | |
461 | } | |
462 | ||
463 | /* irq from av7110 firmware writing the mailbox register in the DPRAM */ | |
d45b9b8a | 464 | static void gpioirq(unsigned long cookie) |
1da177e4 | 465 | { |
d45b9b8a | 466 | struct av7110 *av7110 = (struct av7110 *)cookie; |
1da177e4 LT |
467 | u32 rxbuf, txbuf; |
468 | int len; | |
469 | ||
470 | if (av7110->debitype != -1) | |
471 | /* we shouldn't get any irq while a debi xfer is running */ | |
472 | printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n", | |
473 | jiffies, saa7146_read(av7110->dev, PSR), | |
474 | saa7146_read(av7110->dev, SSR)); | |
475 | ||
476 | if (saa7146_wait_for_debi_done(av7110->dev, 0)) { | |
3ca7fc84 | 477 | printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__); |
1da177e4 LT |
478 | BUG(); /* maybe we should try resetting the debi? */ |
479 | } | |
480 | ||
481 | spin_lock(&av7110->debilock); | |
482 | ARM_ClearIrq(av7110); | |
483 | ||
484 | /* see what the av7110 wants */ | |
485 | av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2); | |
486 | av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
487 | rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2); | |
488 | txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
489 | len = (av7110->debilen + 3) & ~3; | |
490 | ||
491 | print_time("gpio"); | |
492 | dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen); | |
493 | ||
494 | switch (av7110->debitype & 0xff) { | |
495 | ||
496 | case DATA_TS_PLAY: | |
497 | case DATA_PES_PLAY: | |
498 | break; | |
499 | ||
500 | case DATA_MPEG_VIDEO_EVENT: | |
501 | { | |
502 | u32 h_ar; | |
503 | struct video_event event; | |
504 | ||
505 | av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2); | |
506 | h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2); | |
507 | ||
508 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
509 | iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2); | |
510 | ||
511 | av7110->video_size.h = h_ar & 0xfff; | |
1da177e4 LT |
512 | |
513 | event.type = VIDEO_EVENT_SIZE_CHANGED; | |
514 | event.u.size.w = av7110->video_size.w; | |
515 | event.u.size.h = av7110->video_size.h; | |
516 | switch ((h_ar >> 12) & 0xf) | |
517 | { | |
518 | case 3: | |
519 | av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9; | |
520 | event.u.size.aspect_ratio = VIDEO_FORMAT_16_9; | |
521 | av7110->videostate.video_format = VIDEO_FORMAT_16_9; | |
522 | break; | |
523 | case 4: | |
524 | av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1; | |
525 | event.u.size.aspect_ratio = VIDEO_FORMAT_221_1; | |
526 | av7110->videostate.video_format = VIDEO_FORMAT_221_1; | |
527 | break; | |
528 | default: | |
529 | av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3; | |
530 | event.u.size.aspect_ratio = VIDEO_FORMAT_4_3; | |
531 | av7110->videostate.video_format = VIDEO_FORMAT_4_3; | |
532 | } | |
66190a27 OE |
533 | |
534 | dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n", | |
535 | av7110->video_size.w, av7110->video_size.h, | |
536 | av7110->video_size.aspect_ratio); | |
537 | ||
1da177e4 LT |
538 | dvb_video_add_event(av7110, &event); |
539 | break; | |
540 | } | |
541 | ||
542 | case DATA_CI_PUT: | |
543 | { | |
544 | int avail; | |
545 | struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer; | |
546 | ||
547 | avail = dvb_ringbuffer_avail(cibuf); | |
548 | if (avail <= 2) { | |
549 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
550 | iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2); | |
551 | iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
552 | break; | |
553 | } | |
554 | len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8; | |
555 | len |= DVB_RINGBUFFER_PEEK(cibuf, 1); | |
556 | if (avail < len + 2) { | |
557 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
558 | iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2); | |
559 | iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
560 | break; | |
561 | } | |
562 | DVB_RINGBUFFER_SKIP(cibuf, 2); | |
563 | ||
b0ba0e3a | 564 | dvb_ringbuffer_read(cibuf, av7110->debi_virt, len); |
1da177e4 LT |
565 | |
566 | iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2); | |
567 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2); | |
568 | dprintk(8, "DMA: CI\n"); | |
569 | start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len); | |
570 | spin_unlock(&av7110->debilock); | |
571 | wake_up(&cibuf->queue); | |
572 | return; | |
573 | } | |
574 | ||
575 | case DATA_MPEG_PLAY: | |
576 | if (!av7110->playing) { | |
577 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
578 | iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2); | |
579 | iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
580 | break; | |
581 | } | |
582 | len = 0; | |
583 | if (av7110->debitype & 0x100) { | |
584 | spin_lock(&av7110->aout.lock); | |
585 | len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048); | |
586 | spin_unlock(&av7110->aout.lock); | |
587 | } | |
588 | if (len <= 0 && (av7110->debitype & 0x200) | |
589 | &&av7110->videostate.play_state != VIDEO_FREEZED) { | |
590 | spin_lock(&av7110->avout.lock); | |
591 | len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048); | |
592 | spin_unlock(&av7110->avout.lock); | |
593 | } | |
594 | if (len <= 0) { | |
595 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
596 | iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2); | |
597 | iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
598 | break; | |
599 | } | |
600 | dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len); | |
601 | iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2); | |
602 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2); | |
603 | dprintk(8, "DMA: MPEG_PLAY\n"); | |
604 | start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len); | |
605 | spin_unlock(&av7110->debilock); | |
606 | return; | |
607 | ||
608 | case DATA_BMP_LOAD: | |
609 | len = av7110->debilen; | |
610 | dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len); | |
611 | if (!len) { | |
612 | av7110->bmp_state = BMP_LOADED; | |
613 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2); | |
614 | iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2); | |
615 | iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2); | |
616 | wake_up(&av7110->bmpq); | |
617 | dprintk(8, "gpio DATA_BMP_LOAD done\n"); | |
618 | break; | |
619 | } | |
620 | if (len > av7110->bmplen) | |
621 | len = av7110->bmplen; | |
622 | if (len > 2 * 1024) | |
623 | len = 2 * 1024; | |
624 | iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2); | |
625 | iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2); | |
626 | memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len); | |
627 | av7110->bmpp += len; | |
628 | av7110->bmplen -= len; | |
629 | dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len); | |
630 | start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len); | |
631 | spin_unlock(&av7110->debilock); | |
632 | return; | |
633 | ||
634 | case DATA_CI_GET: | |
635 | case DATA_COMMON_INTERFACE: | |
636 | case DATA_FSECTION: | |
637 | case DATA_IPMPE: | |
638 | case DATA_PIPING: | |
639 | if (!len || len > 4 * 1024) { | |
640 | iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2); | |
641 | break; | |
642 | } | |
643 | /* fall through */ | |
644 | ||
645 | case DATA_TS_RECORD: | |
646 | case DATA_PES_RECORD: | |
647 | dprintk(8, "DMA: TS_REC etc.\n"); | |
648 | start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len); | |
649 | spin_unlock(&av7110->debilock); | |
650 | return; | |
651 | ||
652 | case DATA_DEBUG_MESSAGE: | |
653 | if (!len || len > 0xff) { | |
654 | iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2); | |
655 | break; | |
656 | } | |
657 | start_debi_dma(av7110, DEBI_READ, Reserved, len); | |
658 | spin_unlock(&av7110->debilock); | |
659 | return; | |
660 | ||
661 | case DATA_IRCOMMAND: | |
ee820a64 OE |
662 | if (av7110->ir.ir_handler) |
663 | av7110->ir.ir_handler(av7110, | |
03388ae3 | 664 | swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4))); |
1da177e4 LT |
665 | iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2); |
666 | break; | |
667 | ||
668 | default: | |
669 | printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n", | |
670 | av7110->debitype, av7110->debilen); | |
671 | break; | |
672 | } | |
673 | av7110->debitype = -1; | |
674 | ARM_ClearMailBox(av7110); | |
675 | spin_unlock(&av7110->debilock); | |
676 | } | |
677 | ||
678 | ||
679 | #ifdef CONFIG_DVB_AV7110_OSD | |
16ef8def | 680 | static int dvb_osd_ioctl(struct file *file, |
1da177e4 LT |
681 | unsigned int cmd, void *parg) |
682 | { | |
d9bdf772 TK |
683 | struct dvb_device *dvbdev = file->private_data; |
684 | struct av7110 *av7110 = dvbdev->priv; | |
1da177e4 LT |
685 | |
686 | dprintk(4, "%p\n", av7110); | |
687 | ||
688 | if (cmd == OSD_SEND_CMD) | |
689 | return av7110_osd_cmd(av7110, (osd_cmd_t *) parg); | |
690 | if (cmd == OSD_GET_CAPABILITY) | |
691 | return av7110_osd_capability(av7110, (osd_cap_t *) parg); | |
692 | ||
693 | return -EINVAL; | |
694 | } | |
695 | ||
696 | ||
784e29d2 | 697 | static const struct file_operations dvb_osd_fops = { |
1da177e4 | 698 | .owner = THIS_MODULE, |
16ef8def | 699 | .unlocked_ioctl = dvb_generic_ioctl, |
1da177e4 LT |
700 | .open = dvb_generic_open, |
701 | .release = dvb_generic_release, | |
6038f373 | 702 | .llseek = noop_llseek, |
1da177e4 LT |
703 | }; |
704 | ||
705 | static struct dvb_device dvbdev_osd = { | |
706 | .priv = NULL, | |
707 | .users = 1, | |
708 | .writers = 1, | |
709 | .fops = &dvb_osd_fops, | |
710 | .kernel_ioctl = dvb_osd_ioctl, | |
711 | }; | |
712 | #endif /* CONFIG_DVB_AV7110_OSD */ | |
713 | ||
714 | ||
715 | static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, | |
716 | u16 subpid, u16 pcrpid) | |
717 | { | |
47f36920 DWF |
718 | u16 aflags = 0; |
719 | ||
1da177e4 LT |
720 | dprintk(4, "%p\n", av7110); |
721 | ||
722 | if (vpid == 0x1fff || apid == 0x1fff || | |
723 | ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) { | |
724 | vpid = apid = ttpid = subpid = pcrpid = 0; | |
725 | av7110->pids[DMX_PES_VIDEO] = 0; | |
726 | av7110->pids[DMX_PES_AUDIO] = 0; | |
727 | av7110->pids[DMX_PES_TELETEXT] = 0; | |
728 | av7110->pids[DMX_PES_PCR] = 0; | |
729 | } | |
730 | ||
47f36920 DWF |
731 | if (av7110->audiostate.bypass_mode) |
732 | aflags |= 0x8000; | |
733 | ||
734 | return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6, | |
735 | pcrpid, vpid, apid, ttpid, subpid, aflags); | |
1da177e4 LT |
736 | } |
737 | ||
ce18a223 | 738 | int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid, |
1da177e4 LT |
739 | u16 subpid, u16 pcrpid) |
740 | { | |
ce18a223 | 741 | int ret = 0; |
1da177e4 LT |
742 | dprintk(4, "%p\n", av7110); |
743 | ||
3593cab5 | 744 | if (mutex_lock_interruptible(&av7110->pid_mutex)) |
ce18a223 | 745 | return -ERESTARTSYS; |
1da177e4 LT |
746 | |
747 | if (!(vpid & 0x8000)) | |
748 | av7110->pids[DMX_PES_VIDEO] = vpid; | |
749 | if (!(apid & 0x8000)) | |
750 | av7110->pids[DMX_PES_AUDIO] = apid; | |
751 | if (!(ttpid & 0x8000)) | |
752 | av7110->pids[DMX_PES_TELETEXT] = ttpid; | |
753 | if (!(pcrpid & 0x8000)) | |
754 | av7110->pids[DMX_PES_PCR] = pcrpid; | |
755 | ||
756 | av7110->pids[DMX_PES_SUBTITLE] = 0; | |
757 | ||
758 | if (av7110->fe_synced) { | |
759 | pcrpid = av7110->pids[DMX_PES_PCR]; | |
ce18a223 | 760 | ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid); |
1da177e4 LT |
761 | } |
762 | ||
3593cab5 | 763 | mutex_unlock(&av7110->pid_mutex); |
ce18a223 | 764 | return ret; |
1da177e4 LT |
765 | } |
766 | ||
767 | ||
768 | /****************************************************************************** | |
769 | * hardware filter functions | |
770 | ******************************************************************************/ | |
771 | ||
772 | static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter) | |
773 | { | |
774 | struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed; | |
d9bdf772 | 775 | struct av7110 *av7110 = dvbdmxfeed->demux->priv; |
1da177e4 LT |
776 | u16 buf[20]; |
777 | int ret, i; | |
778 | u16 handle; | |
779 | // u16 mode = 0x0320; | |
780 | u16 mode = 0xb96a; | |
781 | ||
782 | dprintk(4, "%p\n", av7110); | |
783 | ||
9e615eac OE |
784 | if (av7110->full_ts) |
785 | return 0; | |
786 | ||
1da177e4 LT |
787 | if (dvbdmxfilter->type == DMX_TYPE_SEC) { |
788 | if (hw_sections) { | |
789 | buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) | | |
790 | dvbdmxfilter->maskandmode[0]; | |
791 | for (i = 3; i < 18; i++) | |
792 | buf[i + 4 - 2] = | |
793 | (dvbdmxfilter->filter.filter_value[i] << 8) | | |
794 | dvbdmxfilter->maskandmode[i]; | |
795 | mode = 4; | |
796 | } | |
797 | } else if ((dvbdmxfeed->ts_type & TS_PACKET) && | |
798 | !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) { | |
799 | av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed); | |
800 | } | |
801 | ||
802 | buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter; | |
803 | buf[1] = 16; | |
804 | buf[2] = dvbdmxfeed->pid; | |
805 | buf[3] = mode; | |
806 | ||
807 | ret = av7110_fw_request(av7110, buf, 20, &handle, 1); | |
808 | if (ret != 0 || handle >= 32) { | |
008e6ff9 | 809 | printk(KERN_ERR "dvb-ttpci: %s error buf %04x %04x %04x %04x ret %d handle %04x\n", |
3ca7fc84 | 810 | __func__, buf[0], buf[1], buf[2], buf[3], |
1da177e4 LT |
811 | ret, handle); |
812 | dvbdmxfilter->hw_handle = 0xffff; | |
ce18a223 WR |
813 | if (!ret) |
814 | ret = -1; | |
815 | return ret; | |
1da177e4 LT |
816 | } |
817 | ||
818 | av7110->handle2filter[handle] = dvbdmxfilter; | |
819 | dvbdmxfilter->hw_handle = handle; | |
820 | ||
821 | return ret; | |
822 | } | |
823 | ||
824 | static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter) | |
825 | { | |
d9bdf772 | 826 | struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv; |
1da177e4 LT |
827 | u16 buf[3]; |
828 | u16 answ[2]; | |
829 | int ret; | |
830 | u16 handle; | |
831 | ||
832 | dprintk(4, "%p\n", av7110); | |
833 | ||
9e615eac OE |
834 | if (av7110->full_ts) |
835 | return 0; | |
836 | ||
1da177e4 LT |
837 | handle = dvbdmxfilter->hw_handle; |
838 | if (handle >= 32) { | |
839 | printk("%s tried to stop invalid filter %04x, filter type = %x\n", | |
3ca7fc84 | 840 | __func__, handle, dvbdmxfilter->type); |
ce18a223 | 841 | return -EINVAL; |
1da177e4 LT |
842 | } |
843 | ||
844 | av7110->handle2filter[handle] = NULL; | |
845 | ||
846 | buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter; | |
847 | buf[1] = 1; | |
848 | buf[2] = handle; | |
849 | ret = av7110_fw_request(av7110, buf, 3, answ, 2); | |
850 | if (ret != 0 || answ[1] != handle) { | |
008e6ff9 | 851 | printk(KERN_ERR "dvb-ttpci: %s error cmd %04x %04x %04x ret %x resp %04x %04x pid %d\n", |
3ca7fc84 | 852 | __func__, buf[0], buf[1], buf[2], ret, |
1da177e4 | 853 | answ[0], answ[1], dvbdmxfilter->feed->pid); |
ce18a223 WR |
854 | if (!ret) |
855 | ret = -1; | |
1da177e4 LT |
856 | } |
857 | return ret; | |
858 | } | |
859 | ||
860 | ||
ce18a223 | 861 | static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed) |
1da177e4 LT |
862 | { |
863 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | |
d9bdf772 | 864 | struct av7110 *av7110 = dvbdmx->priv; |
1da177e4 LT |
865 | u16 *pid = dvbdmx->pids, npids[5]; |
866 | int i; | |
ce18a223 | 867 | int ret = 0; |
1da177e4 LT |
868 | |
869 | dprintk(4, "%p\n", av7110); | |
870 | ||
871 | npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff; | |
872 | i = dvbdmxfeed->pes_type; | |
873 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; | |
874 | if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) { | |
875 | npids[i] = 0; | |
ce18a223 WR |
876 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); |
877 | if (!ret) | |
878 | ret = StartHWFilter(dvbdmxfeed->filter); | |
879 | return ret; | |
880 | } | |
881 | if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) { | |
882 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | |
883 | if (ret) | |
884 | return ret; | |
1da177e4 | 885 | } |
1da177e4 LT |
886 | |
887 | if (dvbdmxfeed->pes_type < 2 && npids[0]) | |
888 | if (av7110->fe_synced) | |
ce18a223 WR |
889 | { |
890 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | |
891 | if (ret) | |
892 | return ret; | |
893 | } | |
1da177e4 | 894 | |
9e615eac | 895 | if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) { |
1da177e4 | 896 | if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000)) |
ce18a223 | 897 | ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed); |
1da177e4 | 898 | if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000)) |
ce18a223 | 899 | ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed); |
1da177e4 | 900 | } |
ce18a223 | 901 | return ret; |
1da177e4 LT |
902 | } |
903 | ||
ce18a223 | 904 | static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed) |
1da177e4 LT |
905 | { |
906 | struct dvb_demux *dvbdmx = dvbdmxfeed->demux; | |
d9bdf772 | 907 | struct av7110 *av7110 = dvbdmx->priv; |
1da177e4 LT |
908 | u16 *pid = dvbdmx->pids, npids[5]; |
909 | int i; | |
910 | ||
ce18a223 WR |
911 | int ret = 0; |
912 | ||
1da177e4 LT |
913 | dprintk(4, "%p\n", av7110); |
914 | ||
915 | if (dvbdmxfeed->pes_type <= 1) { | |
ce18a223 WR |
916 | ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO); |
917 | if (ret) | |
918 | return ret; | |
1da177e4 LT |
919 | if (!av7110->rec_mode) |
920 | dvbdmx->recording = 0; | |
921 | if (!av7110->playing) | |
922 | dvbdmx->playing = 0; | |
923 | } | |
924 | npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff; | |
925 | i = dvbdmxfeed->pes_type; | |
926 | switch (i) { | |
927 | case 2: //teletext | |
928 | if (dvbdmxfeed->ts_type & TS_PACKET) | |
ce18a223 | 929 | ret = StopHWFilter(dvbdmxfeed->filter); |
1da177e4 LT |
930 | npids[2] = 0; |
931 | break; | |
932 | case 0: | |
933 | case 1: | |
934 | case 4: | |
935 | if (!pids_off) | |
ce18a223 | 936 | return 0; |
1da177e4 LT |
937 | npids[i] = (pid[i]&0x8000) ? 0 : pid[i]; |
938 | break; | |
939 | } | |
ce18a223 WR |
940 | if (!ret) |
941 | ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]); | |
942 | return ret; | |
1da177e4 LT |
943 | } |
944 | ||
945 | static int av7110_start_feed(struct dvb_demux_feed *feed) | |
946 | { | |
947 | struct dvb_demux *demux = feed->demux; | |
948 | struct av7110 *av7110 = demux->priv; | |
ce18a223 | 949 | int ret = 0; |
1da177e4 LT |
950 | |
951 | dprintk(4, "%p\n", av7110); | |
952 | ||
953 | if (!demux->dmx.frontend) | |
954 | return -EINVAL; | |
955 | ||
9e615eac | 956 | if (!av7110->full_ts && feed->pid > 0x1fff) |
1da177e4 LT |
957 | return -EINVAL; |
958 | ||
959 | if (feed->type == DMX_TYPE_TS) { | |
960 | if ((feed->ts_type & TS_DECODER) && | |
fde04ab9 | 961 | (feed->pes_type <= DMX_PES_PCR)) { |
1da177e4 LT |
962 | switch (demux->dmx.frontend->source) { |
963 | case DMX_MEMORY_FE: | |
964 | if (feed->ts_type & TS_DECODER) | |
965 | if (feed->pes_type < 2 && | |
966 | !(demux->pids[0] & 0x8000) && | |
967 | !(demux->pids[1] & 0x8000)) { | |
968 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout); | |
969 | dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout); | |
ce18a223 WR |
970 | ret = av7110_av_start_play(av7110,RP_AV); |
971 | if (!ret) | |
972 | demux->playing = 1; | |
1da177e4 LT |
973 | } |
974 | break; | |
975 | default: | |
ce18a223 | 976 | ret = dvb_feed_start_pid(feed); |
1da177e4 LT |
977 | break; |
978 | } | |
979 | } else if ((feed->ts_type & TS_PACKET) && | |
980 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) { | |
ce18a223 | 981 | ret = StartHWFilter(feed->filter); |
1da177e4 LT |
982 | } |
983 | } | |
984 | ||
9e615eac OE |
985 | if (av7110->full_ts) { |
986 | budget_start_feed(feed); | |
987 | return ret; | |
988 | } | |
989 | ||
990 | if (feed->type == DMX_TYPE_SEC) { | |
1da177e4 LT |
991 | int i; |
992 | ||
993 | for (i = 0; i < demux->filternum; i++) { | |
994 | if (demux->filter[i].state != DMX_STATE_READY) | |
995 | continue; | |
996 | if (demux->filter[i].type != DMX_TYPE_SEC) | |
997 | continue; | |
998 | if (demux->filter[i].filter.parent != &feed->feed.sec) | |
999 | continue; | |
1000 | demux->filter[i].state = DMX_STATE_GO; | |
ce18a223 WR |
1001 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) { |
1002 | ret = StartHWFilter(&demux->filter[i]); | |
1003 | if (ret) | |
1004 | break; | |
1005 | } | |
1da177e4 LT |
1006 | } |
1007 | } | |
1008 | ||
ce18a223 | 1009 | return ret; |
1da177e4 LT |
1010 | } |
1011 | ||
1012 | ||
1013 | static int av7110_stop_feed(struct dvb_demux_feed *feed) | |
1014 | { | |
1015 | struct dvb_demux *demux = feed->demux; | |
1016 | struct av7110 *av7110 = demux->priv; | |
12ba0504 | 1017 | int i, rc, ret = 0; |
1da177e4 LT |
1018 | dprintk(4, "%p\n", av7110); |
1019 | ||
1020 | if (feed->type == DMX_TYPE_TS) { | |
1021 | if (feed->ts_type & TS_DECODER) { | |
fde04ab9 | 1022 | if (feed->pes_type >= DMX_PES_OTHER || |
1da177e4 LT |
1023 | !demux->pesfilter[feed->pes_type]) |
1024 | return -EINVAL; | |
1025 | demux->pids[feed->pes_type] |= 0x8000; | |
1026 | demux->pesfilter[feed->pes_type] = NULL; | |
1027 | } | |
1028 | if (feed->ts_type & TS_DECODER && | |
fde04ab9 | 1029 | feed->pes_type < DMX_PES_OTHER) { |
ce18a223 | 1030 | ret = dvb_feed_stop_pid(feed); |
1da177e4 LT |
1031 | } else |
1032 | if ((feed->ts_type & TS_PACKET) && | |
1033 | (demux->dmx.frontend->source != DMX_MEMORY_FE)) | |
ce18a223 | 1034 | ret = StopHWFilter(feed->filter); |
1da177e4 LT |
1035 | } |
1036 | ||
9e615eac OE |
1037 | if (av7110->full_ts) { |
1038 | budget_stop_feed(feed); | |
1039 | return ret; | |
1040 | } | |
1041 | ||
1042 | if (feed->type == DMX_TYPE_SEC) { | |
12ba0504 | 1043 | for (i = 0; i<demux->filternum; i++) { |
1da177e4 LT |
1044 | if (demux->filter[i].state == DMX_STATE_GO && |
1045 | demux->filter[i].filter.parent == &feed->feed.sec) { | |
1046 | demux->filter[i].state = DMX_STATE_READY; | |
ce18a223 | 1047 | if (demux->dmx.frontend->source != DMX_MEMORY_FE) { |
12ba0504 JS |
1048 | rc = StopHWFilter(&demux->filter[i]); |
1049 | if (!ret) | |
1050 | ret = rc; | |
1051 | /* keep going, stop as many filters as possible */ | |
ce18a223 | 1052 | } |
12ba0504 | 1053 | } |
1da177e4 LT |
1054 | } |
1055 | } | |
1056 | ||
ce18a223 | 1057 | return ret; |
1da177e4 LT |
1058 | } |
1059 | ||
1060 | ||
1061 | static void restart_feeds(struct av7110 *av7110) | |
1062 | { | |
1063 | struct dvb_demux *dvbdmx = &av7110->demux; | |
1064 | struct dvb_demux_feed *feed; | |
1065 | int mode; | |
9e615eac | 1066 | int feeding; |
66190a27 | 1067 | int i, j; |
1da177e4 LT |
1068 | |
1069 | dprintk(4, "%p\n", av7110); | |
1070 | ||
1071 | mode = av7110->playing; | |
1072 | av7110->playing = 0; | |
1073 | av7110->rec_mode = 0; | |
1074 | ||
9e615eac OE |
1075 | feeding = av7110->feeding1; /* full_ts mod */ |
1076 | ||
66190a27 | 1077 | for (i = 0; i < dvbdmx->feednum; i++) { |
1da177e4 | 1078 | feed = &dvbdmx->feed[i]; |
66190a27 OE |
1079 | if (feed->state == DMX_STATE_GO) { |
1080 | if (feed->type == DMX_TYPE_SEC) { | |
1081 | for (j = 0; j < dvbdmx->filternum; j++) { | |
1082 | if (dvbdmx->filter[j].type != DMX_TYPE_SEC) | |
1083 | continue; | |
1084 | if (dvbdmx->filter[j].filter.parent != &feed->feed.sec) | |
1085 | continue; | |
1086 | if (dvbdmx->filter[j].state == DMX_STATE_GO) | |
1087 | dvbdmx->filter[j].state = DMX_STATE_READY; | |
1088 | } | |
1089 | } | |
1da177e4 | 1090 | av7110_start_feed(feed); |
66190a27 | 1091 | } |
1da177e4 LT |
1092 | } |
1093 | ||
9e615eac OE |
1094 | av7110->feeding1 = feeding; /* full_ts mod */ |
1095 | ||
1da177e4 LT |
1096 | if (mode) |
1097 | av7110_av_start_play(av7110, mode); | |
1098 | } | |
1099 | ||
1100 | static int dvb_get_stc(struct dmx_demux *demux, unsigned int num, | |
1101 | uint64_t *stc, unsigned int *base) | |
1102 | { | |
1103 | int ret; | |
1104 | u16 fwstc[4]; | |
1105 | u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC); | |
1106 | struct dvb_demux *dvbdemux; | |
1107 | struct av7110 *av7110; | |
1108 | ||
1109 | /* pointer casting paranoia... */ | |
ae24601b | 1110 | BUG_ON(!demux); |
d9bdf772 | 1111 | dvbdemux = demux->priv; |
ae24601b | 1112 | BUG_ON(!dvbdemux); |
d9bdf772 | 1113 | av7110 = dvbdemux->priv; |
1da177e4 LT |
1114 | |
1115 | dprintk(4, "%p\n", av7110); | |
1116 | ||
1117 | if (num != 0) | |
1118 | return -EINVAL; | |
1119 | ||
1120 | ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4); | |
1121 | if (ret) { | |
3ca7fc84 | 1122 | printk(KERN_ERR "%s: av7110_fw_request error\n", __func__); |
ce18a223 | 1123 | return ret; |
1da177e4 LT |
1124 | } |
1125 | dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n", | |
1126 | fwstc[0], fwstc[1], fwstc[2], fwstc[3]); | |
1127 | ||
1128 | *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) | | |
1129 | (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]); | |
1130 | *base = 1; | |
1131 | ||
1132 | dprintk(4, "stc = %lu\n", (unsigned long)*stc); | |
1133 | ||
1134 | return 0; | |
1135 | } | |
1136 | ||
1137 | ||
1138 | /****************************************************************************** | |
1139 | * SEC device file operations | |
1140 | ******************************************************************************/ | |
1141 | ||
1142 | ||
0df289a2 | 1143 | static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone) |
1da177e4 | 1144 | { |
d9bdf772 | 1145 | struct av7110* av7110 = fe->dvb->priv; |
1da177e4 LT |
1146 | |
1147 | switch (tone) { | |
1148 | case SEC_TONE_ON: | |
ce18a223 | 1149 | return Set22K(av7110, 1); |
1da177e4 LT |
1150 | |
1151 | case SEC_TONE_OFF: | |
ce18a223 | 1152 | return Set22K(av7110, 0); |
1da177e4 LT |
1153 | |
1154 | default: | |
1155 | return -EINVAL; | |
1156 | } | |
1da177e4 LT |
1157 | } |
1158 | ||
1159 | static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe, | |
1160 | struct dvb_diseqc_master_cmd* cmd) | |
1161 | { | |
1162 | struct av7110* av7110 = fe->dvb->priv; | |
1163 | ||
ce18a223 | 1164 | return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1); |
1da177e4 LT |
1165 | } |
1166 | ||
1167 | static int av7110_diseqc_send_burst(struct dvb_frontend* fe, | |
0df289a2 | 1168 | enum fe_sec_mini_cmd minicmd) |
1da177e4 LT |
1169 | { |
1170 | struct av7110* av7110 = fe->dvb->priv; | |
1171 | ||
ce18a223 | 1172 | return av7110_diseqc_send(av7110, 0, NULL, minicmd); |
1da177e4 LT |
1173 | } |
1174 | ||
1175 | /* simplified code from budget-core.c */ | |
1176 | static int stop_ts_capture(struct av7110 *budget) | |
1177 | { | |
1178 | dprintk(2, "budget: %p\n", budget); | |
1179 | ||
1180 | if (--budget->feeding1) | |
1181 | return budget->feeding1; | |
1182 | saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */ | |
1183 | SAA7146_IER_DISABLE(budget->dev, MASK_10); | |
1184 | SAA7146_ISR_CLEAR(budget->dev, MASK_10); | |
1185 | return 0; | |
1186 | } | |
1187 | ||
1188 | static int start_ts_capture(struct av7110 *budget) | |
1189 | { | |
e5b30145 HV |
1190 | unsigned y; |
1191 | ||
1da177e4 LT |
1192 | dprintk(2, "budget: %p\n", budget); |
1193 | ||
1194 | if (budget->feeding1) | |
1195 | return ++budget->feeding1; | |
e5b30145 HV |
1196 | for (y = 0; y < TS_HEIGHT; y++) |
1197 | memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH); | |
1da177e4 | 1198 | budget->ttbp = 0; |
9e615eac | 1199 | SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */ |
1da177e4 LT |
1200 | SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */ |
1201 | saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */ | |
1202 | return ++budget->feeding1; | |
1203 | } | |
1204 | ||
1205 | static int budget_start_feed(struct dvb_demux_feed *feed) | |
1206 | { | |
1207 | struct dvb_demux *demux = feed->demux; | |
d9bdf772 | 1208 | struct av7110 *budget = demux->priv; |
1da177e4 LT |
1209 | int status; |
1210 | ||
1211 | dprintk(2, "av7110: %p\n", budget); | |
1212 | ||
1213 | spin_lock(&budget->feedlock1); | |
2c53275c | 1214 | feed->pusi_seen = false; /* have a clean section start */ |
1da177e4 LT |
1215 | status = start_ts_capture(budget); |
1216 | spin_unlock(&budget->feedlock1); | |
1217 | return status; | |
1218 | } | |
1219 | ||
1220 | static int budget_stop_feed(struct dvb_demux_feed *feed) | |
1221 | { | |
1222 | struct dvb_demux *demux = feed->demux; | |
d9bdf772 | 1223 | struct av7110 *budget = demux->priv; |
1da177e4 LT |
1224 | int status; |
1225 | ||
1226 | dprintk(2, "budget: %p\n", budget); | |
1227 | ||
1228 | spin_lock(&budget->feedlock1); | |
1229 | status = stop_ts_capture(budget); | |
1230 | spin_unlock(&budget->feedlock1); | |
1231 | return status; | |
1232 | } | |
1233 | ||
d45b9b8a | 1234 | static void vpeirq(unsigned long cookie) |
1da177e4 | 1235 | { |
d45b9b8a | 1236 | struct av7110 *budget = (struct av7110 *)cookie; |
1da177e4 LT |
1237 | u8 *mem = (u8 *) (budget->grabbing); |
1238 | u32 olddma = budget->ttbp; | |
1239 | u32 newdma = saa7146_read(budget->dev, PCI_VDP3); | |
9e615eac | 1240 | struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1; |
1da177e4 | 1241 | |
1da177e4 LT |
1242 | /* nearest lower position divisible by 188 */ |
1243 | newdma -= newdma % 188; | |
1244 | ||
1245 | if (newdma >= TS_BUFLEN) | |
1246 | return; | |
1247 | ||
1248 | budget->ttbp = newdma; | |
1249 | ||
1250 | if (!budget->feeding1 || (newdma == olddma)) | |
1251 | return; | |
1252 | ||
87c3019d JB |
1253 | /* Ensure streamed PCI data is synced to CPU */ |
1254 | pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE); | |
1255 | ||
1da177e4 LT |
1256 | #if 0 |
1257 | /* track rps1 activity */ | |
1258 | printk("vpeirq: %02x Event Counter 1 0x%04x\n", | |
1259 | mem[olddma], | |
1260 | saa7146_read(budget->dev, EC1R) & 0x3fff); | |
1261 | #endif | |
1262 | ||
1263 | if (newdma > olddma) | |
1264 | /* no wraparound, dump olddma..newdma */ | |
9e615eac | 1265 | dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188); |
1da177e4 LT |
1266 | else { |
1267 | /* wraparound, dump olddma..buflen and 0..newdma */ | |
9e615eac OE |
1268 | dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188); |
1269 | dvb_dmx_swfilter_packets(demux, mem, newdma / 188); | |
1da177e4 LT |
1270 | } |
1271 | } | |
1272 | ||
1273 | static int av7110_register(struct av7110 *av7110) | |
1274 | { | |
1275 | int ret, i; | |
1276 | struct dvb_demux *dvbdemux = &av7110->demux; | |
1277 | struct dvb_demux *dvbdemux1 = &av7110->demux1; | |
1278 | ||
1279 | dprintk(4, "%p\n", av7110); | |
1280 | ||
1281 | if (av7110->registered) | |
1282 | return -1; | |
1283 | ||
1284 | av7110->registered = 1; | |
1285 | ||
1286 | dvbdemux->priv = (void *) av7110; | |
1287 | ||
1288 | for (i = 0; i < 32; i++) | |
1289 | av7110->handle2filter[i] = NULL; | |
1290 | ||
9e615eac OE |
1291 | dvbdemux->filternum = (av7110->full_ts) ? 256 : 32; |
1292 | dvbdemux->feednum = (av7110->full_ts) ? 256 : 32; | |
1da177e4 LT |
1293 | dvbdemux->start_feed = av7110_start_feed; |
1294 | dvbdemux->stop_feed = av7110_stop_feed; | |
1295 | dvbdemux->write_to_decoder = av7110_write_to_decoder; | |
1296 | dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
1297 | DMX_MEMORY_BASED_FILTERING); | |
1298 | ||
1299 | dvb_dmx_init(&av7110->demux); | |
1300 | av7110->demux.dmx.get_stc = dvb_get_stc; | |
1301 | ||
9e615eac | 1302 | av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32; |
1da177e4 LT |
1303 | av7110->dmxdev.demux = &dvbdemux->dmx; |
1304 | av7110->dmxdev.capabilities = 0; | |
1305 | ||
fdc53a6d | 1306 | dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter); |
1da177e4 LT |
1307 | |
1308 | av7110->hw_frontend.source = DMX_FRONTEND_0; | |
1309 | ||
1310 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend); | |
1311 | ||
1312 | if (ret < 0) | |
1313 | return ret; | |
1314 | ||
1315 | av7110->mem_frontend.source = DMX_MEMORY_FE; | |
1316 | ||
1317 | ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend); | |
1318 | ||
1319 | if (ret < 0) | |
1320 | return ret; | |
1321 | ||
1322 | ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, | |
1323 | &av7110->hw_frontend); | |
1324 | if (ret < 0) | |
1325 | return ret; | |
1326 | ||
1327 | av7110_av_register(av7110); | |
1328 | av7110_ca_register(av7110); | |
1329 | ||
1330 | #ifdef CONFIG_DVB_AV7110_OSD | |
fdc53a6d | 1331 | dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev, |
df2f94e5 | 1332 | &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0); |
1da177e4 LT |
1333 | #endif |
1334 | ||
fdc53a6d | 1335 | dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx); |
1da177e4 LT |
1336 | |
1337 | if (budgetpatch) { | |
1338 | /* initialize software demux1 without its own frontend | |
1339 | * demux1 hardware is connected to frontend0 of demux0 | |
1340 | */ | |
1341 | dvbdemux1->priv = (void *) av7110; | |
1342 | ||
1343 | dvbdemux1->filternum = 256; | |
1344 | dvbdemux1->feednum = 256; | |
1345 | dvbdemux1->start_feed = budget_start_feed; | |
1346 | dvbdemux1->stop_feed = budget_stop_feed; | |
1347 | dvbdemux1->write_to_decoder = NULL; | |
1348 | ||
1349 | dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING | | |
1350 | DMX_MEMORY_BASED_FILTERING); | |
1351 | ||
1352 | dvb_dmx_init(&av7110->demux1); | |
1353 | ||
1354 | av7110->dmxdev1.filternum = 256; | |
1355 | av7110->dmxdev1.demux = &dvbdemux1->dmx; | |
1356 | av7110->dmxdev1.capabilities = 0; | |
1357 | ||
fdc53a6d | 1358 | dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter); |
1da177e4 | 1359 | |
fdc53a6d | 1360 | dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx); |
1da177e4 LT |
1361 | printk("dvb-ttpci: additional demux1 for budget-patch registered\n"); |
1362 | } | |
1363 | return 0; | |
1364 | } | |
1365 | ||
1366 | ||
1367 | static void dvb_unregister(struct av7110 *av7110) | |
1368 | { | |
1369 | struct dvb_demux *dvbdemux = &av7110->demux; | |
1370 | struct dvb_demux *dvbdemux1 = &av7110->demux1; | |
1371 | ||
1372 | dprintk(4, "%p\n", av7110); | |
1373 | ||
1374 | if (!av7110->registered) | |
1375 | return; | |
1376 | ||
1377 | if (budgetpatch) { | |
1378 | dvb_net_release(&av7110->dvb_net1); | |
1379 | dvbdemux->dmx.close(&dvbdemux1->dmx); | |
1380 | dvb_dmxdev_release(&av7110->dmxdev1); | |
1381 | dvb_dmx_release(&av7110->demux1); | |
1382 | } | |
1383 | ||
1384 | dvb_net_release(&av7110->dvb_net); | |
1385 | ||
1386 | dvbdemux->dmx.close(&dvbdemux->dmx); | |
1387 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend); | |
1388 | dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend); | |
1389 | ||
1390 | dvb_dmxdev_release(&av7110->dmxdev); | |
1391 | dvb_dmx_release(&av7110->demux); | |
1392 | ||
2bfe031d | 1393 | if (av7110->fe != NULL) { |
1da177e4 | 1394 | dvb_unregister_frontend(av7110->fe); |
f52a838b | 1395 | dvb_frontend_detach(av7110->fe); |
2bfe031d | 1396 | } |
1da177e4 LT |
1397 | dvb_unregister_device(av7110->osd_dev); |
1398 | av7110_av_unregister(av7110); | |
1399 | av7110_ca_unregister(av7110); | |
1400 | } | |
1401 | ||
1402 | ||
1403 | /**************************************************************************** | |
1404 | * I2C client commands | |
1405 | ****************************************************************************/ | |
1406 | ||
1407 | int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val) | |
1408 | { | |
1409 | u8 msg[2] = { reg, val }; | |
1410 | struct i2c_msg msgs; | |
1411 | ||
1412 | msgs.flags = 0; | |
1413 | msgs.addr = id / 2; | |
1414 | msgs.len = 2; | |
1415 | msgs.buf = msg; | |
1416 | return i2c_transfer(&av7110->i2c_adap, &msgs, 1); | |
1417 | } | |
1418 | ||
1da177e4 LT |
1419 | u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg) |
1420 | { | |
1421 | u8 mm1[] = {0x00}; | |
1422 | u8 mm2[] = {0x00}; | |
1423 | struct i2c_msg msgs[2]; | |
1424 | ||
1425 | msgs[0].flags = 0; | |
1426 | msgs[1].flags = I2C_M_RD; | |
1427 | msgs[0].addr = msgs[1].addr = id / 2; | |
1428 | mm1[0] = reg; | |
1429 | msgs[0].len = 1; msgs[1].len = 1; | |
1430 | msgs[0].buf = mm1; msgs[1].buf = mm2; | |
1431 | i2c_transfer(&av7110->i2c_adap, msgs, 2); | |
1432 | ||
1433 | return mm2[0]; | |
1434 | } | |
1da177e4 LT |
1435 | |
1436 | /**************************************************************************** | |
1437 | * INITIALIZATION | |
1438 | ****************************************************************************/ | |
1439 | ||
1440 | ||
1441 | static int check_firmware(struct av7110* av7110) | |
1442 | { | |
1443 | u32 crc = 0, len = 0; | |
1444 | unsigned char *ptr; | |
1445 | ||
1446 | /* check for firmware magic */ | |
1447 | ptr = av7110->bin_fw; | |
1448 | if (ptr[0] != 'A' || ptr[1] != 'V' || | |
1449 | ptr[2] != 'F' || ptr[3] != 'W') { | |
1450 | printk("dvb-ttpci: this is not an av7110 firmware\n"); | |
1451 | return -EINVAL; | |
1452 | } | |
1453 | ptr += 4; | |
1454 | ||
1455 | /* check dpram file */ | |
3e085629 | 1456 | crc = get_unaligned_be32(ptr); |
1da177e4 | 1457 | ptr += 4; |
3e085629 | 1458 | len = get_unaligned_be32(ptr); |
1da177e4 LT |
1459 | ptr += 4; |
1460 | if (len >= 512) { | |
be787ace | 1461 | printk("dvb-ttpci: dpram file is way too big.\n"); |
1da177e4 LT |
1462 | return -EINVAL; |
1463 | } | |
1464 | if (crc != crc32_le(0, ptr, len)) { | |
1465 | printk("dvb-ttpci: crc32 of dpram file does not match.\n"); | |
1466 | return -EINVAL; | |
1467 | } | |
1468 | av7110->bin_dpram = ptr; | |
1469 | av7110->size_dpram = len; | |
1470 | ptr += len; | |
1471 | ||
1472 | /* check root file */ | |
3e085629 | 1473 | crc = get_unaligned_be32(ptr); |
1da177e4 | 1474 | ptr += 4; |
3e085629 | 1475 | len = get_unaligned_be32(ptr); |
1da177e4 LT |
1476 | ptr += 4; |
1477 | ||
1478 | if (len <= 200000 || len >= 300000 || | |
1479 | len > ((av7110->bin_fw + av7110->size_fw) - ptr)) { | |
1480 | printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len); | |
1481 | return -EINVAL; | |
1482 | } | |
1483 | if( crc != crc32_le(0, ptr, len)) { | |
1484 | printk("dvb-ttpci: crc32 of root file does not match.\n"); | |
1485 | return -EINVAL; | |
1486 | } | |
1487 | av7110->bin_root = ptr; | |
1488 | av7110->size_root = len; | |
1489 | return 0; | |
1490 | } | |
1491 | ||
1da177e4 LT |
1492 | static void put_firmware(struct av7110* av7110) |
1493 | { | |
1494 | vfree(av7110->bin_fw); | |
1495 | } | |
1496 | ||
1497 | static int get_firmware(struct av7110* av7110) | |
1498 | { | |
1499 | int ret; | |
1500 | const struct firmware *fw; | |
1501 | ||
1502 | /* request the av7110 firmware, this will block until someone uploads it */ | |
1503 | ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev); | |
1504 | if (ret) { | |
1505 | if (ret == -ENOENT) { | |
008e6ff9 MCC |
1506 | printk(KERN_ERR "dvb-ttpci: could not load firmware, file not found: dvb-ttpci-01.fw\n"); |
1507 | printk(KERN_ERR "dvb-ttpci: usually this should be in /usr/lib/hotplug/firmware or /lib/firmware\n"); | |
1508 | printk(KERN_ERR "dvb-ttpci: and can be downloaded from https://linuxtv.org/download/dvb/firmware/\n"); | |
1da177e4 | 1509 | } else |
008e6ff9 MCC |
1510 | printk(KERN_ERR "dvb-ttpci: cannot request firmware (error %i)\n", |
1511 | ret); | |
1da177e4 LT |
1512 | return -EINVAL; |
1513 | } | |
1514 | ||
1515 | if (fw->size <= 200000) { | |
1516 | printk("dvb-ttpci: this firmware is way too small.\n"); | |
1517 | release_firmware(fw); | |
1518 | return -EINVAL; | |
1519 | } | |
1520 | ||
1521 | /* check if the firmware is available */ | |
d9bf2c03 | 1522 | av7110->bin_fw = vmalloc(fw->size); |
1da177e4 LT |
1523 | if (NULL == av7110->bin_fw) { |
1524 | dprintk(1, "out of memory\n"); | |
1525 | release_firmware(fw); | |
1526 | return -ENOMEM; | |
1527 | } | |
1528 | ||
1529 | memcpy(av7110->bin_fw, fw->data, fw->size); | |
1530 | av7110->size_fw = fw->size; | |
1531 | if ((ret = check_firmware(av7110))) | |
1532 | vfree(av7110->bin_fw); | |
1533 | ||
1534 | release_firmware(fw); | |
1535 | return ret; | |
1536 | } | |
1da177e4 | 1537 | |
14d24d14 | 1538 | static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1539 | { |
e439aedf | 1540 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
d9bdf772 | 1541 | struct av7110* av7110 = fe->dvb->priv; |
1da177e4 LT |
1542 | u8 pwr = 0; |
1543 | u8 buf[4]; | |
1544 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; | |
e439aedf | 1545 | u32 div = (p->frequency + 479500) / 125; |
1da177e4 | 1546 | |
e439aedf MCC |
1547 | if (p->frequency > 2000000) |
1548 | pwr = 3; | |
1549 | else if (p->frequency > 1800000) | |
1550 | pwr = 2; | |
1551 | else if (p->frequency > 1600000) | |
1552 | pwr = 1; | |
1553 | else if (p->frequency > 1200000) | |
1554 | pwr = 0; | |
1555 | else if (p->frequency >= 1100000) | |
1556 | pwr = 1; | |
1557 | else | |
1558 | pwr = 2; | |
1da177e4 LT |
1559 | |
1560 | buf[0] = (div >> 8) & 0x7f; | |
1561 | buf[1] = div & 0xff; | |
1562 | buf[2] = ((div & 0x18000) >> 10) | 0x95; | |
1563 | buf[3] = (pwr << 6) | 0x30; | |
1564 | ||
9101e622 | 1565 | // NOTE: since we're using a prescaler of 2, we set the |
1da177e4 LT |
1566 | // divisor frequency to 62.5kHz and divide by 125 above |
1567 | ||
dea74869 PB |
1568 | if (fe->ops.i2c_gate_ctrl) |
1569 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1570 | if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) |
1571 | return -EIO; | |
1572 | return 0; | |
1573 | } | |
1574 | ||
1575 | static struct ves1x93_config alps_bsrv2_config = { | |
1576 | .demod_address = 0x08, | |
1577 | .xin = 90100000UL, | |
1578 | .invert_pwm = 0, | |
1da177e4 LT |
1579 | }; |
1580 | ||
14d24d14 | 1581 | static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1582 | { |
e439aedf | 1583 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
1584 | struct av7110* av7110 = fe->dvb->priv; |
1585 | u32 div; | |
1586 | u8 data[4]; | |
1587 | struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1588 | ||
e439aedf | 1589 | div = (p->frequency + 35937500 + 31250) / 62500; |
1da177e4 LT |
1590 | |
1591 | data[0] = (div >> 8) & 0x7f; | |
1592 | data[1] = div & 0xff; | |
1593 | data[2] = 0x85 | ((div >> 10) & 0x60); | |
e439aedf | 1594 | data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81); |
1da177e4 | 1595 | |
dea74869 PB |
1596 | if (fe->ops.i2c_gate_ctrl) |
1597 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1598 | if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) |
1599 | return -EIO; | |
1600 | return 0; | |
1601 | } | |
1602 | ||
1603 | static struct ves1820_config alps_tdbe2_config = { | |
1604 | .demod_address = 0x09, | |
1605 | .xin = 57840000UL, | |
1606 | .invert = 1, | |
1607 | .selagc = VES1820_SELAGC_SIGNAMPERR, | |
1da177e4 LT |
1608 | }; |
1609 | ||
1610 | ||
1611 | ||
1612 | ||
14d24d14 | 1613 | static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1614 | { |
e439aedf | 1615 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
1616 | struct av7110* av7110 = fe->dvb->priv; |
1617 | u32 div; | |
1618 | u8 data[4]; | |
1619 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1620 | ||
e439aedf | 1621 | div = p->frequency / 125; |
1da177e4 LT |
1622 | data[0] = (div >> 8) & 0x7f; |
1623 | data[1] = div & 0xff; | |
1624 | data[2] = 0x8e; | |
1625 | data[3] = 0x00; | |
1626 | ||
dea74869 PB |
1627 | if (fe->ops.i2c_gate_ctrl) |
1628 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1629 | if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) |
1630 | return -EIO; | |
1631 | return 0; | |
1632 | } | |
1633 | ||
1634 | static struct tda8083_config grundig_29504_451_config = { | |
1635 | .demod_address = 0x68, | |
1da177e4 LT |
1636 | }; |
1637 | ||
1638 | ||
1639 | ||
14d24d14 | 1640 | static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1641 | { |
e439aedf | 1642 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
9101e622 | 1643 | struct av7110* av7110 = fe->dvb->priv; |
1da177e4 | 1644 | u32 div; |
e439aedf | 1645 | u32 f = p->frequency; |
1da177e4 LT |
1646 | u8 data[4]; |
1647 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1648 | ||
1649 | div = (f + 36125000 + 31250) / 62500; | |
1650 | ||
1651 | data[0] = (div >> 8) & 0x7f; | |
1652 | data[1] = div & 0xff; | |
1653 | data[2] = 0x8e; | |
1654 | data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34); | |
1655 | ||
dea74869 PB |
1656 | if (fe->ops.i2c_gate_ctrl) |
1657 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1658 | if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) |
1659 | return -EIO; | |
1660 | return 0; | |
1661 | } | |
1662 | ||
1663 | static struct ves1820_config philips_cd1516_config = { | |
1664 | .demod_address = 0x09, | |
1665 | .xin = 57840000UL, | |
1666 | .invert = 1, | |
1667 | .selagc = VES1820_SELAGC_SIGNAMPERR, | |
1da177e4 LT |
1668 | }; |
1669 | ||
1670 | ||
1671 | ||
14d24d14 | 1672 | static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1673 | { |
e439aedf | 1674 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
1675 | struct av7110* av7110 = fe->dvb->priv; |
1676 | u32 div, pwr; | |
1677 | u8 data[4]; | |
1678 | struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1679 | ||
e439aedf | 1680 | div = (p->frequency + 36200000) / 166666; |
1da177e4 | 1681 | |
e439aedf | 1682 | if (p->frequency <= 782000000) |
1da177e4 LT |
1683 | pwr = 1; |
1684 | else | |
1685 | pwr = 2; | |
1686 | ||
1687 | data[0] = (div >> 8) & 0x7f; | |
1688 | data[1] = div & 0xff; | |
1689 | data[2] = 0x85; | |
1690 | data[3] = pwr << 6; | |
1691 | ||
dea74869 PB |
1692 | if (fe->ops.i2c_gate_ctrl) |
1693 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1694 | if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) |
1695 | return -EIO; | |
1696 | return 0; | |
1697 | } | |
1698 | ||
1699 | static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name) | |
1700 | { | |
b168e810 | 1701 | #if IS_ENABLED(CONFIG_DVB_SP8870) |
d9bdf772 | 1702 | struct av7110* av7110 = fe->dvb->priv; |
1da177e4 LT |
1703 | |
1704 | return request_firmware(fw, name, &av7110->dev->pci->dev); | |
d98821e2 OE |
1705 | #else |
1706 | return -EINVAL; | |
1707 | #endif | |
1da177e4 LT |
1708 | } |
1709 | ||
3defe84a | 1710 | static const struct sp8870_config alps_tdlb7_config = { |
1da177e4 LT |
1711 | |
1712 | .demod_address = 0x71, | |
1da177e4 LT |
1713 | .request_firmware = alps_tdlb7_request_firmware, |
1714 | }; | |
1715 | ||
1716 | ||
dc27a169 AQ |
1717 | static u8 nexusca_stv0297_inittab[] = { |
1718 | 0x80, 0x01, | |
1719 | 0x80, 0x00, | |
1720 | 0x81, 0x01, | |
1721 | 0x81, 0x00, | |
1722 | 0x00, 0x09, | |
1723 | 0x01, 0x69, | |
1724 | 0x03, 0x00, | |
1725 | 0x04, 0x00, | |
1726 | 0x07, 0x00, | |
1727 | 0x08, 0x00, | |
1728 | 0x20, 0x00, | |
1729 | 0x21, 0x40, | |
1730 | 0x22, 0x00, | |
1731 | 0x23, 0x00, | |
1732 | 0x24, 0x40, | |
1733 | 0x25, 0x88, | |
1734 | 0x30, 0xff, | |
1735 | 0x31, 0x00, | |
1736 | 0x32, 0xff, | |
1737 | 0x33, 0x00, | |
1738 | 0x34, 0x50, | |
1739 | 0x35, 0x7f, | |
1740 | 0x36, 0x00, | |
1741 | 0x37, 0x20, | |
1742 | 0x38, 0x00, | |
1743 | 0x40, 0x1c, | |
1744 | 0x41, 0xff, | |
1745 | 0x42, 0x29, | |
1746 | 0x43, 0x00, | |
1747 | 0x44, 0xff, | |
1748 | 0x45, 0x00, | |
1749 | 0x46, 0x00, | |
1750 | 0x49, 0x04, | |
1751 | 0x4a, 0x00, | |
1752 | 0x4b, 0x7b, | |
1753 | 0x52, 0x30, | |
1754 | 0x55, 0xae, | |
1755 | 0x56, 0x47, | |
1756 | 0x57, 0xe1, | |
1757 | 0x58, 0x3a, | |
1758 | 0x5a, 0x1e, | |
1759 | 0x5b, 0x34, | |
1760 | 0x60, 0x00, | |
1761 | 0x63, 0x00, | |
1762 | 0x64, 0x00, | |
1763 | 0x65, 0x00, | |
1764 | 0x66, 0x00, | |
1765 | 0x67, 0x00, | |
1766 | 0x68, 0x00, | |
1767 | 0x69, 0x00, | |
1768 | 0x6a, 0x02, | |
1769 | 0x6b, 0x00, | |
1770 | 0x70, 0xff, | |
1771 | 0x71, 0x00, | |
1772 | 0x72, 0x00, | |
1773 | 0x73, 0x00, | |
1774 | 0x74, 0x0c, | |
1775 | 0x80, 0x00, | |
1776 | 0x81, 0x00, | |
1777 | 0x82, 0x00, | |
1778 | 0x83, 0x00, | |
1779 | 0x84, 0x04, | |
1780 | 0x85, 0x80, | |
1781 | 0x86, 0x24, | |
1782 | 0x87, 0x78, | |
1783 | 0x88, 0x10, | |
1784 | 0x89, 0x00, | |
1785 | 0x90, 0x01, | |
1786 | 0x91, 0x01, | |
1787 | 0xa0, 0x04, | |
1788 | 0xa1, 0x00, | |
1789 | 0xa2, 0x00, | |
1790 | 0xb0, 0x91, | |
1791 | 0xb1, 0x0b, | |
1792 | 0xc0, 0x53, | |
1793 | 0xc1, 0x70, | |
1794 | 0xc2, 0x12, | |
1795 | 0xd0, 0x00, | |
1796 | 0xd1, 0x00, | |
1797 | 0xd2, 0x00, | |
1798 | 0xd3, 0x00, | |
1799 | 0xd4, 0x00, | |
1800 | 0xd5, 0x00, | |
1801 | 0xde, 0x00, | |
1802 | 0xdf, 0x00, | |
1803 | 0x61, 0x49, | |
1804 | 0x62, 0x0b, | |
1805 | 0x53, 0x08, | |
1806 | 0x59, 0x08, | |
1807 | 0xff, 0xff, | |
1808 | }; | |
1da177e4 | 1809 | |
14d24d14 | 1810 | static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1811 | { |
e439aedf | 1812 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
1813 | struct av7110* av7110 = fe->dvb->priv; |
1814 | u32 div; | |
1815 | u8 data[4]; | |
1816 | struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1817 | struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 }; | |
1818 | int i; | |
1819 | ||
e439aedf | 1820 | div = (p->frequency + 36150000 + 31250) / 62500; |
1da177e4 LT |
1821 | |
1822 | data[0] = (div >> 8) & 0x7f; | |
1823 | data[1] = div & 0xff; | |
1824 | data[2] = 0xce; | |
1825 | ||
e439aedf | 1826 | if (p->frequency < 45000000) |
1da177e4 | 1827 | return -EINVAL; |
e439aedf | 1828 | else if (p->frequency < 137000000) |
1da177e4 | 1829 | data[3] = 0x01; |
e439aedf | 1830 | else if (p->frequency < 403000000) |
1da177e4 | 1831 | data[3] = 0x02; |
e439aedf | 1832 | else if (p->frequency < 860000000) |
1da177e4 LT |
1833 | data[3] = 0x04; |
1834 | else | |
1835 | return -EINVAL; | |
1836 | ||
dea74869 PB |
1837 | if (fe->ops.i2c_gate_ctrl) |
1838 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1839 | if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) { |
1840 | printk("nexusca: pll transfer failed!\n"); | |
1841 | return -EIO; | |
1842 | } | |
1843 | ||
1844 | // wait for PLL lock | |
1845 | for(i = 0; i < 20; i++) { | |
dea74869 PB |
1846 | if (fe->ops.i2c_gate_ctrl) |
1847 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1848 | if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1) |
1849 | if (data[0] & 0x40) break; | |
1850 | msleep(10); | |
1851 | } | |
1852 | ||
1853 | return 0; | |
1854 | } | |
1855 | ||
1856 | static struct stv0297_config nexusca_stv0297_config = { | |
1857 | ||
1858 | .demod_address = 0x1C, | |
dc27a169 | 1859 | .inittab = nexusca_stv0297_inittab, |
1da177e4 | 1860 | .invert = 1, |
b8d4c235 | 1861 | .stop_during_read = 1, |
1da177e4 LT |
1862 | }; |
1863 | ||
1864 | ||
1865 | ||
14d24d14 | 1866 | static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 1867 | { |
e439aedf | 1868 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
d9bdf772 | 1869 | struct av7110* av7110 = fe->dvb->priv; |
1da177e4 LT |
1870 | u32 div; |
1871 | u8 cfg, cpump, band_select; | |
1872 | u8 data[4]; | |
1873 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | |
1874 | ||
e439aedf | 1875 | div = (36125000 + p->frequency) / 166666; |
1da177e4 LT |
1876 | |
1877 | cfg = 0x88; | |
1878 | ||
e439aedf MCC |
1879 | if (p->frequency < 175000000) |
1880 | cpump = 2; | |
1881 | else if (p->frequency < 390000000) | |
1882 | cpump = 1; | |
1883 | else if (p->frequency < 470000000) | |
1884 | cpump = 2; | |
1885 | else if (p->frequency < 750000000) | |
1886 | cpump = 1; | |
1887 | else | |
1888 | cpump = 3; | |
1da177e4 | 1889 | |
e439aedf MCC |
1890 | if (p->frequency < 175000000) |
1891 | band_select = 0x0e; | |
1892 | else if (p->frequency < 470000000) | |
1893 | band_select = 0x05; | |
1894 | else | |
1895 | band_select = 0x03; | |
1da177e4 LT |
1896 | |
1897 | data[0] = (div >> 8) & 0x7f; | |
1898 | data[1] = div & 0xff; | |
1899 | data[2] = ((div >> 10) & 0x60) | cfg; | |
1900 | data[3] = (cpump << 6) | band_select; | |
1901 | ||
dea74869 PB |
1902 | if (fe->ops.i2c_gate_ctrl) |
1903 | fe->ops.i2c_gate_ctrl(fe, 1); | |
1da177e4 LT |
1904 | if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO; |
1905 | return 0; | |
1906 | } | |
1907 | ||
1908 | static struct l64781_config grundig_29504_401_config = { | |
1909 | .demod_address = 0x55, | |
1da177e4 LT |
1910 | }; |
1911 | ||
1912 | ||
1913 | ||
0df289a2 | 1914 | static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status) |
1da177e4 | 1915 | { |
ce18a223 | 1916 | int ret = 0; |
1da177e4 LT |
1917 | int synced = (status & FE_HAS_LOCK) ? 1 : 0; |
1918 | ||
1919 | av7110->fe_status = status; | |
1920 | ||
1921 | if (av7110->fe_synced == synced) | |
ce18a223 | 1922 | return 0; |
1da177e4 | 1923 | |
14500d4a OE |
1924 | if (av7110->playing) { |
1925 | av7110->fe_synced = synced; | |
ce18a223 | 1926 | return 0; |
14500d4a | 1927 | } |
1da177e4 | 1928 | |
3593cab5 | 1929 | if (mutex_lock_interruptible(&av7110->pid_mutex)) |
ce18a223 | 1930 | return -ERESTARTSYS; |
1da177e4 | 1931 | |
34612157 | 1932 | if (synced) { |
ce18a223 | 1933 | ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO], |
1da177e4 LT |
1934 | av7110->pids[DMX_PES_AUDIO], |
1935 | av7110->pids[DMX_PES_TELETEXT], 0, | |
1936 | av7110->pids[DMX_PES_PCR]); | |
ce18a223 WR |
1937 | if (!ret) |
1938 | ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0); | |
1da177e4 | 1939 | } else { |
ce18a223 WR |
1940 | ret = SetPIDs(av7110, 0, 0, 0, 0, 0); |
1941 | if (!ret) { | |
1942 | ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0); | |
1943 | if (!ret) | |
1944 | ret = av7110_wait_msgstate(av7110, GPMQBusy); | |
1945 | } | |
1da177e4 LT |
1946 | } |
1947 | ||
34612157 OE |
1948 | if (!ret) |
1949 | av7110->fe_synced = synced; | |
1950 | ||
3593cab5 | 1951 | mutex_unlock(&av7110->pid_mutex); |
ce18a223 | 1952 | return ret; |
1da177e4 LT |
1953 | } |
1954 | ||
b5c7cfd1 | 1955 | static int av7110_fe_set_frontend(struct dvb_frontend *fe) |
1da177e4 LT |
1956 | { |
1957 | struct av7110* av7110 = fe->dvb->priv; | |
ce18a223 WR |
1958 | |
1959 | int ret = av7110_fe_lock_fix(av7110, 0); | |
b5c7cfd1 MCC |
1960 | if (!ret) |
1961 | ret = av7110->fe_set_frontend(fe); | |
1962 | ||
ce18a223 | 1963 | return ret; |
1da177e4 LT |
1964 | } |
1965 | ||
1966 | static int av7110_fe_init(struct dvb_frontend* fe) | |
1967 | { | |
1968 | struct av7110* av7110 = fe->dvb->priv; | |
1969 | ||
ce18a223 WR |
1970 | int ret = av7110_fe_lock_fix(av7110, 0); |
1971 | if (!ret) | |
1972 | ret = av7110->fe_init(fe); | |
1973 | return ret; | |
1da177e4 LT |
1974 | } |
1975 | ||
0df289a2 MCC |
1976 | static int av7110_fe_read_status(struct dvb_frontend *fe, |
1977 | enum fe_status *status) | |
1da177e4 LT |
1978 | { |
1979 | struct av7110* av7110 = fe->dvb->priv; | |
1da177e4 LT |
1980 | |
1981 | /* call the real implementation */ | |
ce18a223 WR |
1982 | int ret = av7110->fe_read_status(fe, status); |
1983 | if (!ret) | |
1984 | if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK)) | |
1985 | ret = av7110_fe_lock_fix(av7110, *status); | |
1986 | return ret; | |
1da177e4 LT |
1987 | } |
1988 | ||
1989 | static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe) | |
1990 | { | |
1991 | struct av7110* av7110 = fe->dvb->priv; | |
1992 | ||
ce18a223 WR |
1993 | int ret = av7110_fe_lock_fix(av7110, 0); |
1994 | if (!ret) | |
1995 | ret = av7110->fe_diseqc_reset_overload(fe); | |
1996 | return ret; | |
1da177e4 LT |
1997 | } |
1998 | ||
1999 | static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe, | |
2000 | struct dvb_diseqc_master_cmd* cmd) | |
2001 | { | |
2002 | struct av7110* av7110 = fe->dvb->priv; | |
2003 | ||
ce18a223 | 2004 | int ret = av7110_fe_lock_fix(av7110, 0); |
66190a27 OE |
2005 | if (!ret) { |
2006 | av7110->saved_master_cmd = *cmd; | |
ce18a223 | 2007 | ret = av7110->fe_diseqc_send_master_cmd(fe, cmd); |
66190a27 | 2008 | } |
ce18a223 | 2009 | return ret; |
1da177e4 LT |
2010 | } |
2011 | ||
0df289a2 MCC |
2012 | static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe, |
2013 | enum fe_sec_mini_cmd minicmd) | |
1da177e4 LT |
2014 | { |
2015 | struct av7110* av7110 = fe->dvb->priv; | |
2016 | ||
ce18a223 | 2017 | int ret = av7110_fe_lock_fix(av7110, 0); |
66190a27 OE |
2018 | if (!ret) { |
2019 | av7110->saved_minicmd = minicmd; | |
ce18a223 | 2020 | ret = av7110->fe_diseqc_send_burst(fe, minicmd); |
66190a27 | 2021 | } |
ce18a223 | 2022 | return ret; |
1da177e4 LT |
2023 | } |
2024 | ||
0df289a2 MCC |
2025 | static int av7110_fe_set_tone(struct dvb_frontend *fe, |
2026 | enum fe_sec_tone_mode tone) | |
1da177e4 LT |
2027 | { |
2028 | struct av7110* av7110 = fe->dvb->priv; | |
2029 | ||
ce18a223 | 2030 | int ret = av7110_fe_lock_fix(av7110, 0); |
66190a27 OE |
2031 | if (!ret) { |
2032 | av7110->saved_tone = tone; | |
ce18a223 | 2033 | ret = av7110->fe_set_tone(fe, tone); |
66190a27 | 2034 | } |
ce18a223 | 2035 | return ret; |
1da177e4 LT |
2036 | } |
2037 | ||
0df289a2 MCC |
2038 | static int av7110_fe_set_voltage(struct dvb_frontend *fe, |
2039 | enum fe_sec_voltage voltage) | |
1da177e4 LT |
2040 | { |
2041 | struct av7110* av7110 = fe->dvb->priv; | |
2042 | ||
ce18a223 | 2043 | int ret = av7110_fe_lock_fix(av7110, 0); |
66190a27 OE |
2044 | if (!ret) { |
2045 | av7110->saved_voltage = voltage; | |
ce18a223 | 2046 | ret = av7110->fe_set_voltage(fe, voltage); |
66190a27 | 2047 | } |
ce18a223 | 2048 | return ret; |
1da177e4 LT |
2049 | } |
2050 | ||
400b7083 | 2051 | static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned long cmd) |
1da177e4 LT |
2052 | { |
2053 | struct av7110* av7110 = fe->dvb->priv; | |
2054 | ||
ce18a223 WR |
2055 | int ret = av7110_fe_lock_fix(av7110, 0); |
2056 | if (!ret) | |
2057 | ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd); | |
2058 | return ret; | |
1da177e4 LT |
2059 | } |
2060 | ||
66190a27 OE |
2061 | static void dvb_s_recover(struct av7110* av7110) |
2062 | { | |
2063 | av7110_fe_init(av7110->fe); | |
2064 | ||
2065 | av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage); | |
2066 | if (av7110->saved_master_cmd.msg_len) { | |
2067 | msleep(20); | |
2068 | av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd); | |
2069 | } | |
2070 | msleep(20); | |
2071 | av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd); | |
2072 | msleep(20); | |
2073 | av7110_fe_set_tone(av7110->fe, av7110->saved_tone); | |
2074 | ||
b5c7cfd1 | 2075 | av7110_fe_set_frontend(av7110->fe); |
66190a27 OE |
2076 | } |
2077 | ||
1da177e4 LT |
2078 | static u8 read_pwm(struct av7110* av7110) |
2079 | { | |
2080 | u8 b = 0xff; | |
2081 | u8 pwm; | |
2082 | struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 }, | |
2083 | { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} }; | |
2084 | ||
9101e622 | 2085 | if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff)) |
1da177e4 LT |
2086 | pwm = 0x48; |
2087 | ||
2088 | return pwm; | |
2089 | } | |
2090 | ||
2091 | static int frontend_init(struct av7110 *av7110) | |
2092 | { | |
2093 | int ret; | |
2094 | ||
2095 | if (av7110->dev->pci->subsystem_vendor == 0x110a) { | |
2096 | switch(av7110->dev->pci->subsystem_device) { | |
2097 | case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??)) | |
2bfe031d | 2098 | av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, |
1da177e4 | 2099 | &av7110->i2c_adap, read_pwm(av7110)); |
6b3ccab7 | 2100 | if (av7110->fe) { |
dea74869 | 2101 | av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params; |
6b3ccab7 | 2102 | } |
1da177e4 LT |
2103 | break; |
2104 | } | |
2105 | ||
2106 | } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) { | |
2107 | switch(av7110->dev->pci->subsystem_device) { | |
2108 | case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X | |
2109 | case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X | |
2110 | case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE | |
2111 | ||
2112 | // try the ALPS BSRV2 first of all | |
2bfe031d | 2113 | av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap); |
1da177e4 | 2114 | if (av7110->fe) { |
dea74869 PB |
2115 | av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params; |
2116 | av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; | |
2117 | av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst; | |
2118 | av7110->fe->ops.set_tone = av7110_set_tone; | |
66190a27 | 2119 | av7110->recover = dvb_s_recover; |
1da177e4 LT |
2120 | break; |
2121 | } | |
2122 | ||
2123 | // try the ALPS BSRU6 now | |
2bfe031d | 2124 | av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap); |
1da177e4 | 2125 | if (av7110->fe) { |
dea74869 | 2126 | av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params; |
fa006d86 AQ |
2127 | av7110->fe->tuner_priv = &av7110->i2c_adap; |
2128 | ||
dea74869 PB |
2129 | av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; |
2130 | av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst; | |
2131 | av7110->fe->ops.set_tone = av7110_set_tone; | |
66190a27 | 2132 | av7110->recover = dvb_s_recover; |
1da177e4 LT |
2133 | break; |
2134 | } | |
2135 | ||
2136 | // Try the grundig 29504-451 | |
2bfe031d | 2137 | av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap); |
1da177e4 | 2138 | if (av7110->fe) { |
dea74869 PB |
2139 | av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params; |
2140 | av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; | |
2141 | av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst; | |
2142 | av7110->fe->ops.set_tone = av7110_set_tone; | |
66190a27 | 2143 | av7110->recover = dvb_s_recover; |
1da177e4 LT |
2144 | break; |
2145 | } | |
2146 | ||
2147 | /* Try DVB-C cards */ | |
2148 | switch(av7110->dev->pci->subsystem_device) { | |
2149 | case 0x0000: | |
2150 | /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */ | |
2bfe031d | 2151 | av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap, |
1da177e4 | 2152 | read_pwm(av7110)); |
6b3ccab7 | 2153 | if (av7110->fe) { |
dea74869 | 2154 | av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params; |
6b3ccab7 | 2155 | } |
1da177e4 LT |
2156 | break; |
2157 | case 0x0003: | |
f3688fc8 | 2158 | /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */ |
2bfe031d | 2159 | av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, |
1da177e4 | 2160 | read_pwm(av7110)); |
6b3ccab7 | 2161 | if (av7110->fe) { |
dea74869 | 2162 | av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params; |
6b3ccab7 | 2163 | } |
1da177e4 LT |
2164 | break; |
2165 | } | |
2166 | break; | |
2167 | ||
2168 | case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X | |
d4c71d7a MCC |
2169 | { |
2170 | struct dvb_frontend *fe; | |
2171 | ||
8d90ee5e | 2172 | // try ALPS TDLB7 first, then Grundig 29504-401 |
d4c71d7a MCC |
2173 | fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap); |
2174 | if (fe) { | |
2175 | fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params; | |
2176 | av7110->fe = fe; | |
8d90ee5e | 2177 | break; |
6b3ccab7 | 2178 | } |
d4c71d7a MCC |
2179 | } |
2180 | /* fall-thru */ | |
8d90ee5e OE |
2181 | |
2182 | case 0x0008: // Hauppauge/TT DVB-T | |
2183 | // Grundig 29504-401 | |
2184 | av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap); | |
2185 | if (av7110->fe) | |
2186 | av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params; | |
1da177e4 LT |
2187 | break; |
2188 | ||
2189 | case 0x0002: // Hauppauge/TT DVB-C premium rev2.X | |
2190 | ||
2bfe031d | 2191 | av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110)); |
6b3ccab7 | 2192 | if (av7110->fe) { |
dea74869 | 2193 | av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params; |
6b3ccab7 | 2194 | } |
1da177e4 LT |
2195 | break; |
2196 | ||
8bd6301c OE |
2197 | case 0x0004: // Galaxis DVB-S rev1.3 |
2198 | /* ALPS BSRV2 */ | |
2bfe031d | 2199 | av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap); |
8bd6301c | 2200 | if (av7110->fe) { |
dea74869 PB |
2201 | av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params; |
2202 | av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; | |
2203 | av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst; | |
2204 | av7110->fe->ops.set_tone = av7110_set_tone; | |
8bd6301c OE |
2205 | av7110->recover = dvb_s_recover; |
2206 | } | |
2207 | break; | |
2208 | ||
1da177e4 LT |
2209 | case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */ |
2210 | /* Grundig 29504-451 */ | |
2bfe031d | 2211 | av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap); |
1da177e4 | 2212 | if (av7110->fe) { |
dea74869 PB |
2213 | av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params; |
2214 | av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd; | |
2215 | av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst; | |
2216 | av7110->fe->ops.set_tone = av7110_set_tone; | |
66190a27 | 2217 | av7110->recover = dvb_s_recover; |
1da177e4 LT |
2218 | } |
2219 | break; | |
2220 | ||
1da177e4 LT |
2221 | case 0x000A: // Hauppauge/TT Nexus-CA rev1.X |
2222 | ||
2bfe031d | 2223 | av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap); |
1da177e4 | 2224 | if (av7110->fe) { |
dea74869 | 2225 | av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params; |
fa006d86 | 2226 | |
1da177e4 | 2227 | /* set TDA9819 into DVB mode */ |
6a857747 MS |
2228 | saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD) |
2229 | saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF) | |
1da177e4 LT |
2230 | |
2231 | /* tuner on this needs a slower i2c bus speed */ | |
2232 | av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240; | |
2233 | break; | |
2234 | } | |
3dfaebda JS |
2235 | break; |
2236 | ||
2237 | case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */ | |
2238 | /* ALPS BSBE1 */ | |
2bfe031d | 2239 | av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap); |
eb3daf3c | 2240 | if (av7110->fe) { |
dea74869 | 2241 | av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params; |
fa006d86 AQ |
2242 | av7110->fe->tuner_priv = &av7110->i2c_adap; |
2243 | ||
2bfe031d | 2244 | if (dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0) == NULL) { |
db5d91eb | 2245 | printk("dvb-ttpci: LNBP21 not found!\n"); |
dea74869 PB |
2246 | if (av7110->fe->ops.release) |
2247 | av7110->fe->ops.release(av7110->fe); | |
db5d91eb OE |
2248 | av7110->fe = NULL; |
2249 | } else { | |
dea74869 | 2250 | av7110->fe->ops.dishnetwork_send_legacy_command = NULL; |
db5d91eb OE |
2251 | av7110->recover = dvb_s_recover; |
2252 | } | |
eb3daf3c | 2253 | } |
3dfaebda | 2254 | break; |
1da177e4 LT |
2255 | } |
2256 | } | |
2257 | ||
2258 | if (!av7110->fe) { | |
2259 | /* FIXME: propagate the failure code from the lower layers */ | |
2260 | ret = -ENOMEM; | |
29e66a6c | 2261 | printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n", |
1da177e4 LT |
2262 | av7110->dev->pci->vendor, |
2263 | av7110->dev->pci->device, | |
2264 | av7110->dev->pci->subsystem_vendor, | |
2265 | av7110->dev->pci->subsystem_device); | |
2266 | } else { | |
dea74869 PB |
2267 | FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init); |
2268 | FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status); | |
2269 | FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload); | |
2270 | FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd); | |
2271 | FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst); | |
2272 | FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone); | |
8f40a9f5 | 2273 | FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage); |
dea74869 | 2274 | FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command); |
b5c7cfd1 | 2275 | FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend); |
1da177e4 | 2276 | |
fdc53a6d | 2277 | ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe); |
1da177e4 LT |
2278 | if (ret < 0) { |
2279 | printk("av7110: Frontend registration failed!\n"); | |
f52a838b | 2280 | dvb_frontend_detach(av7110->fe); |
1da177e4 LT |
2281 | av7110->fe = NULL; |
2282 | } | |
2283 | } | |
2284 | return ret; | |
2285 | } | |
2286 | ||
2287 | /* Budgetpatch note: | |
2288 | * Original hardware design by Roberto Deza: | |
2289 | * There is a DVB_Wiki at | |
991ce92f | 2290 | * https://linuxtv.org |
1da177e4 LT |
2291 | * |
2292 | * New software triggering design by Emard that works on | |
2293 | * original Roberto Deza's hardware: | |
2294 | * | |
2295 | * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin. | |
2296 | * GPIO3 is in budget-patch hardware connectd to port B VSYNC | |
2297 | * HS is an internal event of 7146, accessible with RPS | |
2298 | * and temporarily raised high every n lines | |
2299 | * (n in defined in the RPS_THRESH1 counter threshold) | |
2300 | * I think HS is raised high on the beginning of the n-th line | |
2301 | * and remains high until this n-th line that triggered | |
16790554 | 2302 | * it is completely received. When the reception of n-th line |
1da177e4 LT |
2303 | * ends, HS is lowered. |
2304 | * | |
2305 | * To transmit data over DMA, 7146 needs changing state at | |
2306 | * port B VSYNC pin. Any changing of port B VSYNC will | |
2307 | * cause some DMA data transfer, with more or less packets loss. | |
2308 | * It depends on the phase and frequency of VSYNC and | |
2309 | * the way of 7146 is instructed to trigger on port B (defined | |
2310 | * in DD1_INIT register, 3rd nibble from the right valid | |
2311 | * numbers are 0-7, see datasheet) | |
2312 | * | |
2313 | * The correct triggering can minimize packet loss, | |
2314 | * dvbtraffic should give this stable bandwidths: | |
2315 | * 22k transponder = 33814 kbit/s | |
2316 | * 27.5k transponder = 38045 kbit/s | |
2317 | * by experiment it is found that the best results | |
2318 | * (stable bandwidths and almost no packet loss) | |
2319 | * are obtained using DD1_INIT triggering number 2 | |
2320 | * (Va at rising edge of VS Fa = HS x VS-failing forced toggle) | |
2321 | * and a VSYNC phase that occurs in the middle of DMA transfer | |
2322 | * (about byte 188*512=96256 in the DMA window). | |
2323 | * | |
2324 | * Phase of HS is still not clear to me how to control, | |
2325 | * It just happens to be so. It can be seen if one enables | |
2326 | * RPS_IRQ and print Event Counter 1 in vpeirq(). Every | |
2327 | * time RPS_INTERRUPT is called, the Event Counter 1 will | |
2328 | * increment. That's how the 7146 is programmed to do event | |
2329 | * counting in this budget-patch.c | |
2330 | * I *think* HPS setting has something to do with the phase | |
25985edc | 2331 | * of HS but I can't be 100% sure in that. |
1da177e4 LT |
2332 | * |
2333 | * hardware debug note: a working budget card (including budget patch) | |
2334 | * with vpeirq() interrupt setup in mode "0x90" (every 64K) will | |
2335 | * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes | |
16790554 | 2336 | * and that means 3*25=75 Hz of interrupt frequency, as seen by |
1da177e4 LT |
2337 | * watch cat /proc/interrupts |
2338 | * | |
2339 | * If this frequency is 3x lower (and data received in the DMA | |
2340 | * buffer don't start with 0x47, but in the middle of packets, | |
2341 | * whose lengths appear to be like 188 292 188 104 etc. | |
2342 | * this means VSYNC line is not connected in the hardware. | |
2343 | * (check soldering pcb and pins) | |
2344 | * The same behaviour of missing VSYNC can be duplicated on budget | |
16790554 | 2345 | * cards, by setting DD1_INIT trigger mode 7 in 3rd nibble. |
1da177e4 | 2346 | */ |
4c62e976 GKH |
2347 | static int av7110_attach(struct saa7146_dev* dev, |
2348 | struct saa7146_pci_extension_data *pci_ext) | |
1da177e4 LT |
2349 | { |
2350 | const int length = TS_WIDTH * TS_HEIGHT; | |
2351 | struct pci_dev *pdev = dev->pci; | |
2352 | struct av7110 *av7110; | |
8eec1429 | 2353 | struct task_struct *thread; |
1da177e4 LT |
2354 | int ret, count = 0; |
2355 | ||
2356 | dprintk(4, "dev: %p\n", dev); | |
2357 | ||
9101e622 MCC |
2358 | /* Set RPS_IRQ to 1 to track rps1 activity. |
2359 | * Enabling this won't send any interrupt to PC CPU. | |
2360 | */ | |
1da177e4 LT |
2361 | #define RPS_IRQ 0 |
2362 | ||
2363 | if (budgetpatch == 1) { | |
2364 | budgetpatch = 0; | |
2365 | /* autodetect the presence of budget patch | |
2366 | * this only works if saa7146 has been recently | |
2367 | * reset with with MASK_31 to MC1 | |
2368 | * | |
2369 | * will wait for VBI_B event (vertical blank at port B) | |
2370 | * and will reset GPIO3 after VBI_B is detected. | |
2371 | * (GPIO3 should be raised high by CPU to | |
2372 | * test if GPIO3 will generate vertical blank signal | |
2373 | * in budget patch GPIO3 is connected to VSYNC_B | |
2374 | */ | |
2375 | ||
2376 | /* RESET SAA7146 */ | |
2377 | saa7146_write(dev, MC1, MASK_31); | |
2378 | /* autodetection success seems to be time-dependend after reset */ | |
2379 | ||
2380 | /* Fix VSYNC level */ | |
2381 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
2382 | /* set vsync_b triggering */ | |
2383 | saa7146_write(dev, DD1_STREAM_B, 0); | |
2384 | /* port B VSYNC at rising edge */ | |
2385 | saa7146_write(dev, DD1_INIT, 0x00000200); | |
2386 | saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI | |
2387 | saa7146_write(dev, MC2, | |
2388 | 1 * (MASK_08 | MASK_24) | // BRS control | |
2389 | 0 * (MASK_09 | MASK_25) | // a | |
2390 | 1 * (MASK_10 | MASK_26) | // b | |
2391 | 0 * (MASK_06 | MASK_22) | // HPS_CTRL1 | |
2392 | 0 * (MASK_05 | MASK_21) | // HPS_CTRL2 | |
2393 | 0 * (MASK_01 | MASK_15) // DEBI | |
2394 | ); | |
2395 | ||
2396 | /* start writing RPS1 code from beginning */ | |
2397 | count = 0; | |
2398 | /* Disable RPS1 */ | |
2399 | saa7146_write(dev, MC1, MASK_29); | |
2400 | /* RPS1 timeout disable */ | |
2401 | saa7146_write(dev, RPS_TOV1, 0); | |
153755a7 AV |
2402 | WRITE_RPS1(CMD_PAUSE | EVT_VBI_B); |
2403 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); | |
2404 | WRITE_RPS1(GPIO3_MSK); | |
2405 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); | |
1da177e4 LT |
2406 | #if RPS_IRQ |
2407 | /* issue RPS1 interrupt to increment counter */ | |
153755a7 | 2408 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 | 2409 | #endif |
153755a7 | 2410 | WRITE_RPS1(CMD_STOP); |
1da177e4 | 2411 | /* Jump to begin of RPS program as safety measure (p37) */ |
153755a7 AV |
2412 | WRITE_RPS1(CMD_JUMP); |
2413 | WRITE_RPS1(dev->d_rps1.dma_handle); | |
1da177e4 LT |
2414 | |
2415 | #if RPS_IRQ | |
2416 | /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) | |
2417 | * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled | |
2418 | * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called | |
2419 | */ | |
2420 | saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); | |
af901ca1 | 2421 | /* set event counter 1 threshold to maximum allowed value (rEC p55) */ |
1da177e4 LT |
2422 | saa7146_write(dev, ECT1R, 0x3fff ); |
2423 | #endif | |
2424 | /* Set RPS1 Address register to point to RPS code (r108 p42) */ | |
2425 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
2426 | /* Enable RPS1, (rFC p33) */ | |
2427 | saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); | |
2428 | ||
2429 | mdelay(10); | |
2430 | /* now send VSYNC_B to rps1 by rising GPIO3 */ | |
2431 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
2432 | mdelay(10); | |
2433 | /* if rps1 responded by lowering the GPIO3, | |
2434 | * then we have budgetpatch hardware | |
2435 | */ | |
2436 | if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) { | |
2437 | budgetpatch = 1; | |
2438 | printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n"); | |
2439 | } | |
2440 | /* Disable RPS1 */ | |
2441 | saa7146_write(dev, MC1, ( MASK_29 )); | |
2442 | #if RPS_IRQ | |
2443 | printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff ); | |
2444 | #endif | |
2445 | } | |
2446 | ||
2447 | /* prepare the av7110 device struct */ | |
7408187d | 2448 | av7110 = kzalloc(sizeof(struct av7110), GFP_KERNEL); |
1da177e4 LT |
2449 | if (!av7110) { |
2450 | dprintk(1, "out of memory\n"); | |
2451 | return -ENOMEM; | |
2452 | } | |
2453 | ||
1da177e4 LT |
2454 | av7110->card_name = (char*) pci_ext->ext_priv; |
2455 | av7110->dev = dev; | |
2456 | dev->ext_priv = av7110; | |
2457 | ||
2458 | ret = get_firmware(av7110); | |
2459 | if (ret < 0) | |
2460 | goto err_kfree_0; | |
2461 | ||
2462 | ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name, | |
78e92006 | 2463 | THIS_MODULE, &dev->pci->dev, adapter_nr); |
1da177e4 LT |
2464 | if (ret < 0) |
2465 | goto err_put_firmware_1; | |
2466 | ||
2467 | /* the Siemens DVB needs this if you want to have the i2c chips | |
2468 | get recognized before the main driver is fully loaded */ | |
2469 | saa7146_write(dev, GPIO_CTRL, 0x500000); | |
2470 | ||
c0decac1 MCC |
2471 | strscpy(av7110->i2c_adap.name, pci_ext->ext_priv, |
2472 | sizeof(av7110->i2c_adap.name)); | |
1da177e4 LT |
2473 | |
2474 | saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */ | |
2475 | ||
2476 | ret = i2c_add_adapter(&av7110->i2c_adap); | |
2477 | if (ret < 0) | |
2478 | goto err_dvb_unregister_adapter_2; | |
2479 | ||
2480 | ttpci_eeprom_parse_mac(&av7110->i2c_adap, | |
fdc53a6d | 2481 | av7110->dvb_adapter.proposed_mac); |
1da177e4 LT |
2482 | ret = -ENOMEM; |
2483 | ||
9e615eac OE |
2484 | /* full-ts mod? */ |
2485 | if (full_ts) | |
2486 | av7110->full_ts = true; | |
2487 | ||
2488 | /* check for full-ts flag in eeprom */ | |
2489 | if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) { | |
2490 | u8 flags = i2c_readreg(av7110, 0xaa, 2); | |
2491 | if (flags != 0xff && (flags & 0x01)) | |
2492 | av7110->full_ts = true; | |
2493 | } | |
2494 | ||
2495 | if (av7110->full_ts) { | |
2496 | printk(KERN_INFO "dvb-ttpci: full-ts mode enabled for saa7146 port B\n"); | |
2497 | spin_lock_init(&av7110->feedlock1); | |
2498 | av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length, | |
2499 | &av7110->pt); | |
2500 | if (!av7110->grabbing) | |
2501 | goto err_i2c_del_3; | |
2502 | ||
2503 | saa7146_write(dev, DD1_STREAM_B, 0x00000000); | |
2504 | saa7146_write(dev, MC2, (MASK_10 | MASK_26)); | |
2505 | ||
2506 | saa7146_write(dev, DD1_INIT, 0x00000600); | |
2507 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
2508 | ||
2509 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
2510 | saa7146_write(dev, MC2, MASK_08 | MASK_24); | |
2511 | ||
2512 | /* dma3 */ | |
2513 | saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000)); | |
2514 | saa7146_write(dev, BASE_ODD3, 0); | |
2515 | saa7146_write(dev, BASE_EVEN3, 0); | |
2516 | saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); | |
2517 | saa7146_write(dev, PITCH3, TS_WIDTH); | |
2518 | saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); | |
2519 | saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); | |
2520 | saa7146_write(dev, MC2, MASK_04 | MASK_20); | |
2521 | ||
2522 | tasklet_init(&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110); | |
2523 | ||
2524 | } else if (budgetpatch) { | |
1da177e4 LT |
2525 | spin_lock_init(&av7110->feedlock1); |
2526 | av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length, | |
2527 | &av7110->pt); | |
2528 | if (!av7110->grabbing) | |
2529 | goto err_i2c_del_3; | |
2530 | ||
2531 | saa7146_write(dev, PCI_BT_V1, 0x1c1f101f); | |
2532 | saa7146_write(dev, BCS_CTRL, 0x80400040); | |
2533 | /* set dd1 stream a & b */ | |
2534 | saa7146_write(dev, DD1_STREAM_B, 0x00000000); | |
2535 | saa7146_write(dev, DD1_INIT, 0x03000200); | |
2536 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
2537 | saa7146_write(dev, BRS_CTRL, 0x60000000); | |
2538 | saa7146_write(dev, BASE_ODD3, 0); | |
2539 | saa7146_write(dev, BASE_EVEN3, 0); | |
2540 | saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT); | |
2541 | saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90); | |
2542 | ||
2543 | saa7146_write(dev, PITCH3, TS_WIDTH); | |
2544 | saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH); | |
2545 | ||
2546 | /* upload all */ | |
2547 | saa7146_write(dev, MC2, 0x077c077c); | |
2548 | saa7146_write(dev, GPIO_CTRL, 0x000000); | |
2549 | #if RPS_IRQ | |
2550 | /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) | |
2551 | * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled | |
2552 | * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called | |
2553 | */ | |
2554 | saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); | |
af901ca1 | 2555 | /* set event counter 1 threshold to maximum allowed value (rEC p55) */ |
1da177e4 LT |
2556 | saa7146_write(dev, ECT1R, 0x3fff ); |
2557 | #endif | |
2558 | /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */ | |
2559 | count = 0; | |
2560 | ||
2561 | /* Wait Source Line Counter Threshold (p36) */ | |
153755a7 | 2562 | WRITE_RPS1(CMD_PAUSE | EVT_HS); |
1da177e4 | 2563 | /* Set GPIO3=1 (p42) */ |
153755a7 AV |
2564 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
2565 | WRITE_RPS1(GPIO3_MSK); | |
2566 | WRITE_RPS1(SAA7146_GPIO_OUTHI<<24); | |
1da177e4 LT |
2567 | #if RPS_IRQ |
2568 | /* issue RPS1 interrupt */ | |
153755a7 | 2569 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 LT |
2570 | #endif |
2571 | /* Wait reset Source Line Counter Threshold (p36) */ | |
153755a7 | 2572 | WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS); |
1da177e4 | 2573 | /* Set GPIO3=0 (p42) */ |
153755a7 AV |
2574 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
2575 | WRITE_RPS1(GPIO3_MSK); | |
2576 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); | |
1da177e4 LT |
2577 | #if RPS_IRQ |
2578 | /* issue RPS1 interrupt */ | |
153755a7 | 2579 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 LT |
2580 | #endif |
2581 | /* Jump to begin of RPS program (p37) */ | |
153755a7 AV |
2582 | WRITE_RPS1(CMD_JUMP); |
2583 | WRITE_RPS1(dev->d_rps1.dma_handle); | |
1da177e4 LT |
2584 | |
2585 | /* Fix VSYNC level */ | |
2586 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
2587 | /* Set RPS1 Address register to point to RPS code (r108 p42) */ | |
2588 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
2589 | /* Set Source Line Counter Threshold, using BRS (rCC p43) | |
2590 | * It generates HS event every TS_HEIGHT lines | |
2591 | * this is related to TS_WIDTH set in register | |
2592 | * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits | |
2593 | * are set to TS_WIDTH bytes (TS_WIDTH=2*188), | |
2594 | * then RPS_THRESH1 should be set to trigger | |
2595 | * every TS_HEIGHT (512) lines. | |
2596 | */ | |
2597 | saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 ); | |
2598 | ||
2599 | /* Enable RPS1 (rFC p33) */ | |
2600 | saa7146_write(dev, MC1, (MASK_13 | MASK_29)); | |
2601 | ||
2602 | /* end of budgetpatch register initialization */ | |
2603 | tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110); | |
2604 | } else { | |
2605 | saa7146_write(dev, PCI_BT_V1, 0x1c00101f); | |
2606 | saa7146_write(dev, BCS_CTRL, 0x80400040); | |
2607 | ||
2608 | /* set dd1 stream a & b */ | |
2609 | saa7146_write(dev, DD1_STREAM_B, 0x00000000); | |
2610 | saa7146_write(dev, DD1_INIT, 0x03000000); | |
2611 | saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26)); | |
2612 | ||
2613 | /* upload all */ | |
2614 | saa7146_write(dev, MC2, 0x077c077c); | |
2615 | saa7146_write(dev, GPIO_CTRL, 0x000000); | |
2616 | } | |
2617 | ||
2618 | tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110); | |
2619 | tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110); | |
2620 | ||
3593cab5 | 2621 | mutex_init(&av7110->pid_mutex); |
1da177e4 LT |
2622 | |
2623 | /* locks for data transfers from/to AV7110 */ | |
2624 | spin_lock_init(&av7110->debilock); | |
3593cab5 | 2625 | mutex_init(&av7110->dcomlock); |
1da177e4 LT |
2626 | av7110->debitype = -1; |
2627 | ||
2628 | /* default OSD window */ | |
2629 | av7110->osdwin = 1; | |
3593cab5 | 2630 | mutex_init(&av7110->osd_mutex); |
1da177e4 | 2631 | |
2f03ee8e | 2632 | /* TV standard */ |
58a44040 MS |
2633 | av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC |
2634 | : AV7110_VIDEO_MODE_PAL; | |
2f03ee8e | 2635 | |
1da177e4 LT |
2636 | /* ARM "watchdog" */ |
2637 | init_waitqueue_head(&av7110->arm_wait); | |
2638 | av7110->arm_thread = NULL; | |
2639 | ||
2640 | /* allocate and init buffers */ | |
2641 | av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus); | |
2642 | if (!av7110->debi_virt) | |
2643 | goto err_saa71466_vfree_4; | |
2644 | ||
2645 | ||
2646 | av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS); | |
2647 | if (!av7110->iobuf) | |
2648 | goto err_pci_free_5; | |
2649 | ||
2650 | ret = av7110_av_init(av7110); | |
2651 | if (ret < 0) | |
2652 | goto err_iobuf_vfree_6; | |
2653 | ||
2654 | /* init BMP buffer */ | |
2655 | av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN; | |
2656 | init_waitqueue_head(&av7110->bmpq); | |
2657 | ||
2658 | ret = av7110_ca_init(av7110); | |
2659 | if (ret < 0) | |
2660 | goto err_av7110_av_exit_7; | |
2661 | ||
2662 | /* load firmware into AV7110 cards */ | |
2663 | ret = av7110_bootarm(av7110); | |
2664 | if (ret < 0) | |
2665 | goto err_av7110_ca_exit_8; | |
2666 | ||
2667 | ret = av7110_firmversion(av7110); | |
2668 | if (ret < 0) | |
2669 | goto err_stop_arm_9; | |
2670 | ||
2671 | if (FW_VERSION(av7110->arm_app)<0x2501) | |
008e6ff9 MCC |
2672 | printk(KERN_WARNING |
2673 | "dvb-ttpci: Warning, firmware version 0x%04x is too old. System might be unstable!\n", | |
2674 | FW_VERSION(av7110->arm_app)); | |
1da177e4 | 2675 | |
8eec1429 HP |
2676 | thread = kthread_run(arm_thread, (void *) av7110, "arm_mon"); |
2677 | if (IS_ERR(thread)) { | |
2678 | ret = PTR_ERR(thread); | |
1da177e4 | 2679 | goto err_stop_arm_9; |
8eec1429 HP |
2680 | } |
2681 | av7110->arm_thread = thread; | |
1da177e4 LT |
2682 | |
2683 | /* set initial volume in mixer struct */ | |
2684 | av7110->mixer.volume_left = volume; | |
2685 | av7110->mixer.volume_right = volume; | |
2686 | ||
1da177e4 LT |
2687 | ret = av7110_register(av7110); |
2688 | if (ret < 0) | |
2689 | goto err_arm_thread_stop_10; | |
2690 | ||
defd574e OE |
2691 | init_av7110_av(av7110); |
2692 | ||
1da177e4 LT |
2693 | /* special case DVB-C: these cards have an analog tuner |
2694 | plus need some special handling, so we have separate | |
2695 | saa7146_ext_vv data for these... */ | |
2696 | ret = av7110_init_v4l(av7110); | |
2697 | if (ret < 0) | |
2698 | goto err_av7110_unregister_11; | |
2699 | ||
fdc53a6d | 2700 | av7110->dvb_adapter.priv = av7110; |
1da177e4 LT |
2701 | ret = frontend_init(av7110); |
2702 | if (ret < 0) | |
2703 | goto err_av7110_exit_v4l_12; | |
2704 | ||
30ad64b8 NS |
2705 | mutex_init(&av7110->ioctl_mutex); |
2706 | ||
b250392f | 2707 | #if IS_ENABLED(CONFIG_DVB_AV7110_IR) |
03388ae3 | 2708 | av7110_ir_init(av7110); |
1da177e4 LT |
2709 | #endif |
2710 | printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num); | |
2711 | av7110_num++; | |
2712 | out: | |
2713 | return ret; | |
2714 | ||
2715 | err_av7110_exit_v4l_12: | |
2716 | av7110_exit_v4l(av7110); | |
2717 | err_av7110_unregister_11: | |
2718 | dvb_unregister(av7110); | |
2719 | err_arm_thread_stop_10: | |
2720 | av7110_arm_sync(av7110); | |
2721 | err_stop_arm_9: | |
2722 | /* Nothing to do. Rejoice. */ | |
2723 | err_av7110_ca_exit_8: | |
2724 | av7110_ca_exit(av7110); | |
2725 | err_av7110_av_exit_7: | |
2726 | av7110_av_exit(av7110); | |
2727 | err_iobuf_vfree_6: | |
2728 | vfree(av7110->iobuf); | |
2729 | err_pci_free_5: | |
2730 | pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus); | |
2731 | err_saa71466_vfree_4: | |
87c3019d JB |
2732 | if (av7110->grabbing) |
2733 | saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt); | |
1da177e4 LT |
2734 | err_i2c_del_3: |
2735 | i2c_del_adapter(&av7110->i2c_adap); | |
2736 | err_dvb_unregister_adapter_2: | |
fdc53a6d | 2737 | dvb_unregister_adapter(&av7110->dvb_adapter); |
1da177e4 LT |
2738 | err_put_firmware_1: |
2739 | put_firmware(av7110); | |
2740 | err_kfree_0: | |
2741 | kfree(av7110); | |
2742 | goto out; | |
2743 | } | |
2744 | ||
4c62e976 | 2745 | static int av7110_detach(struct saa7146_dev* saa) |
1da177e4 LT |
2746 | { |
2747 | struct av7110 *av7110 = saa->ext_priv; | |
2748 | dprintk(4, "%p\n", av7110); | |
2749 | ||
b250392f | 2750 | #if IS_ENABLED(CONFIG_DVB_AV7110_IR) |
03388ae3 OE |
2751 | av7110_ir_exit(av7110); |
2752 | #endif | |
9e615eac OE |
2753 | if (budgetpatch || av7110->full_ts) { |
2754 | if (budgetpatch) { | |
2755 | /* Disable RPS1 */ | |
2756 | saa7146_write(saa, MC1, MASK_29); | |
2757 | /* VSYNC LOW (inactive) */ | |
2758 | saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO); | |
2759 | } | |
1da177e4 LT |
2760 | saa7146_write(saa, MC1, MASK_20); /* DMA3 off */ |
2761 | SAA7146_IER_DISABLE(saa, MASK_10); | |
2762 | SAA7146_ISR_CLEAR(saa, MASK_10); | |
2763 | msleep(50); | |
2764 | tasklet_kill(&av7110->vpe_tasklet); | |
87c3019d | 2765 | saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt); |
1da177e4 LT |
2766 | } |
2767 | av7110_exit_v4l(av7110); | |
2768 | ||
2769 | av7110_arm_sync(av7110); | |
2770 | ||
2771 | tasklet_kill(&av7110->debi_tasklet); | |
2772 | tasklet_kill(&av7110->gpio_tasklet); | |
2773 | ||
2774 | dvb_unregister(av7110); | |
2775 | ||
2776 | SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03); | |
2777 | SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03); | |
2778 | ||
2779 | av7110_ca_exit(av7110); | |
2780 | av7110_av_exit(av7110); | |
2781 | ||
2782 | vfree(av7110->iobuf); | |
2783 | pci_free_consistent(saa->pci, 8192, av7110->debi_virt, | |
2784 | av7110->debi_bus); | |
2785 | ||
2786 | i2c_del_adapter(&av7110->i2c_adap); | |
2787 | ||
fdc53a6d | 2788 | dvb_unregister_adapter (&av7110->dvb_adapter); |
1da177e4 LT |
2789 | |
2790 | av7110_num--; | |
2791 | ||
2792 | put_firmware(av7110); | |
2793 | ||
2794 | kfree(av7110); | |
2795 | ||
2796 | saa->ext_priv = NULL; | |
2797 | ||
2798 | return 0; | |
2799 | } | |
2800 | ||
2801 | ||
2802 | static void av7110_irq(struct saa7146_dev* dev, u32 *isr) | |
2803 | { | |
2804 | struct av7110 *av7110 = dev->ext_priv; | |
2805 | ||
2806 | //print_time("av7110_irq"); | |
2807 | ||
2808 | /* Note: Don't try to handle the DEBI error irq (MASK_18), in | |
2809 | * intel mode the timeout is asserted all the time... | |
2810 | */ | |
2811 | ||
2812 | if (*isr & MASK_19) { | |
2813 | //printk("av7110_irq: DEBI\n"); | |
2814 | /* Note 1: The DEBI irq is level triggered: We must enable it | |
2815 | * only after we started a DMA xfer, and disable it here | |
2816 | * immediately, or it will be signalled all the time while | |
2817 | * DEBI is idle. | |
2818 | * Note 2: You would think that an irq which is masked is | |
2819 | * not signalled by the hardware. Not so for the SAA7146: | |
2820 | * An irq is signalled as long as the corresponding bit | |
2821 | * in the ISR is set, and disabling irqs just prevents the | |
2822 | * hardware from setting the ISR bit. This means a) that we | |
2823 | * must clear the ISR *after* disabling the irq (which is why | |
2824 | * we must do it here even though saa7146_core did it already), | |
2825 | * and b) that if we were to disable an edge triggered irq | |
2826 | * (like the gpio irqs sadly are) temporarily we would likely | |
2827 | * loose some. This sucks :-( | |
2828 | */ | |
2829 | SAA7146_IER_DISABLE(av7110->dev, MASK_19); | |
2830 | SAA7146_ISR_CLEAR(av7110->dev, MASK_19); | |
2831 | tasklet_schedule(&av7110->debi_tasklet); | |
2832 | } | |
2833 | ||
2834 | if (*isr & MASK_03) { | |
2835 | //printk("av7110_irq: GPIO\n"); | |
2836 | tasklet_schedule(&av7110->gpio_tasklet); | |
2837 | } | |
2838 | ||
9e615eac | 2839 | if (*isr & MASK_10) |
1da177e4 LT |
2840 | tasklet_schedule(&av7110->vpe_tasklet); |
2841 | } | |
2842 | ||
2843 | ||
da517164 | 2844 | static struct saa7146_extension av7110_extension_driver; |
1da177e4 LT |
2845 | |
2846 | #define MAKE_AV7110_INFO(x_var,x_name) \ | |
2847 | static struct saa7146_pci_extension_data x_var = { \ | |
2848 | .ext_priv = x_name, \ | |
da517164 | 2849 | .ext = &av7110_extension_driver } |
1da177e4 | 2850 | |
6af4ee10 | 2851 | MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C"); |
1da177e4 LT |
2852 | MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X"); |
2853 | MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X"); | |
2854 | MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X"); | |
2855 | MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X"); | |
3dfaebda | 2856 | MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3"); |
1da177e4 LT |
2857 | MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE"); |
2858 | MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T"); | |
2859 | MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C"); | |
2860 | MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6"); | |
8bd6301c | 2861 | MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3"); |
1da177e4 | 2862 | |
cd142f43 | 2863 | static const struct pci_device_id pci_tbl[] = { |
6af4ee10 KH |
2864 | MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000), |
2865 | MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000), | |
2866 | MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001), | |
2867 | MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002), | |
2868 | MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003), | |
8bd6301c | 2869 | MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004), |
6af4ee10 KH |
2870 | MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006), |
2871 | MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008), | |
2872 | MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a), | |
2873 | MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e), | |
2874 | MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002), | |
1da177e4 | 2875 | |
1da177e4 LT |
2876 | /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1 |
2877 | /* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v???? | |
2878 | ||
2879 | { | |
2880 | .vendor = 0, | |
2881 | } | |
2882 | }; | |
2883 | ||
2884 | MODULE_DEVICE_TABLE(pci, pci_tbl); | |
2885 | ||
2886 | ||
da517164 | 2887 | static struct saa7146_extension av7110_extension_driver = { |
62929252 | 2888 | .name = "av7110", |
00c4cc67 | 2889 | .flags = SAA7146_USE_I2C_IRQ, |
1da177e4 LT |
2890 | |
2891 | .module = THIS_MODULE, | |
2892 | .pci_tbl = &pci_tbl[0], | |
2893 | .attach = av7110_attach, | |
4c62e976 | 2894 | .detach = av7110_detach, |
1da177e4 LT |
2895 | |
2896 | .irq_mask = MASK_19 | MASK_03 | MASK_10, | |
2897 | .irq_func = av7110_irq, | |
2898 | }; | |
2899 | ||
2900 | ||
2901 | static int __init av7110_init(void) | |
2902 | { | |
29a8d979 | 2903 | return saa7146_register_extension(&av7110_extension_driver); |
1da177e4 LT |
2904 | } |
2905 | ||
2906 | ||
2907 | static void __exit av7110_exit(void) | |
2908 | { | |
da517164 | 2909 | saa7146_unregister_extension(&av7110_extension_driver); |
1da177e4 LT |
2910 | } |
2911 | ||
2912 | module_init(av7110_init); | |
2913 | module_exit(av7110_exit); | |
2914 | ||
008e6ff9 | 2915 | MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by Siemens, Technotrend, Hauppauge"); |
1da177e4 LT |
2916 | MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others"); |
2917 | MODULE_LICENSE("GPL"); |