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Merge tag 'media/v4.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mchehab...
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / pci / ttpci / av7110.c
CommitLineData
1da177e4
LT		 1/*
2 * driver for the SAA7146 based AV110 cards (like the Fujitsu-Siemens DVB)
3 * av7110.c: initialization and demux stuff
4 *
5 * Copyright (C) 1999-2002 Ralph Metzler
6 * & Marcus Metzler for convergence integrated media GmbH
7 *
8 * originally based on code by:
9 * Copyright (C) 1998,1999 Christian Theiss <mistert@rz.fh-augsburg.de>
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version 2
14 * of the License, or (at your option) any later version.
15 *
16 *
17 * This program is distributed in the hope that it will be useful,
18 * but WITHOUT ANY WARRANTY; without even the implied warranty of
19 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
20 * GNU General Public License for more details.
21 *
bcb63314
SA		 22 * To obtain the license, point your browser to
23 * http://www.gnu.org/copyleft/gpl.html
1da177e4
LT		 24 *
25 *
991ce92f 26 * the project's page is at https://linuxtv.org
1da177e4
LT		 27 */
28
29
1da177e4
LT		 30#include <linux/module.h>
31#include <linux/kmod.h>
32#include <linux/delay.h>
33#include <linux/fs.h>
34#include <linux/timer.h>
35#include <linux/poll.h>
1da177e4
LT		 36
37#include <linux/kernel.h>
1da177e4
LT		 38#include <linux/sched.h>
39#include <linux/types.h>
40#include <linux/fcntl.h>
41#include <linux/interrupt.h>
42#include <linux/string.h>
43#include <linux/pci.h>
44#include <linux/vmalloc.h>
45#include <linux/firmware.h>
46#include <linux/crc32.h>
47#include <linux/i2c.h>
8eec1429 48#include <linux/kthread.h>
5a0e3ad6 49#include <linux/slab.h>
3e085629 50#include <asm/unaligned.h>
1a651a00 51#include <asm/byteorder.h>
1da177e4 52
1da177e4
LT		 53
54#include <linux/dvb/frontend.h>
55
56#include "dvb_frontend.h"
57
58#include "ttpci-eeprom.h"
59#include "av7110.h"
60#include "av7110_hw.h"
61#include "av7110_av.h"
62#include "av7110_ca.h"
63#include "av7110_ipack.h"
64
db5d91eb
OE		 65#include "bsbe1.h"
66#include "lnbp21.h"
265366e8 67#include "bsru6.h"
db5d91eb 68
1da177e4
LT		 69#define TS_WIDTH 376
70#define TS_HEIGHT 512
71#define TS_BUFLEN (TS_WIDTH*TS_HEIGHT)
72#define TS_MAX_PACKETS (TS_BUFLEN/TS_SIZE)
73
74
75int av7110_debug;
76
77static int vidmode = CVBS_RGB_OUT;
78static int pids_off;
79static int adac = DVB_ADAC_TI;
80static int hw_sections;
81static int rgb_on;
82static int volume = 255;
a5ed425c 83static int budgetpatch;
4caba426
OE		 84static int wss_cfg_4_3 = 0x4008;
85static int wss_cfg_16_9 = 0x0007;
2f03ee8e 86static int tv_standard;
9e615eac 87static int full_ts;
1da177e4
LT		 88
89module_param_named(debug, av7110_debug, int, 0644);
90MODULE_PARM_DESC(debug, "debug level (bitmask, default 0)");
91module_param(vidmode, int, 0444);
92MODULE_PARM_DESC(vidmode,"analog video out: 0 off, 1 CVBS+RGB (default), 2 CVBS+YC, 3 YC");
93module_param(pids_off, int, 0444);
94MODULE_PARM_DESC(pids_off,"clear video/audio/PCR PID filters when demux is closed");
95module_param(adac, int, 0444);
96MODULE_PARM_DESC(adac,"audio DAC type: 0 TI, 1 CRYSTAL, 2 MSP (use if autodetection fails)");
97module_param(hw_sections, int, 0444);
98MODULE_PARM_DESC(hw_sections, "0 use software section filter, 1 use hardware");
99module_param(rgb_on, int, 0444);
008e6ff9 100MODULE_PARM_DESC(rgb_on, "For Siemens DVB-C cards only: Enable RGB control signal on SCART pin 16 to switch SCART video mode from CVBS to RGB");
1da177e4
LT		 101module_param(volume, int, 0444);
102MODULE_PARM_DESC(volume, "initial volume: default 255 (range 0-255)");
103module_param(budgetpatch, int, 0444);
104MODULE_PARM_DESC(budgetpatch, "use budget-patch hardware modification: default 0 (0 no, 1 autodetect, 2 always)");
9e615eac
OE		 105module_param(full_ts, int, 0444);
106MODULE_PARM_DESC(full_ts, "enable code for full-ts hardware modification: 0 disable (default), 1 enable");
4caba426
OE		 107module_param(wss_cfg_4_3, int, 0444);
108MODULE_PARM_DESC(wss_cfg_4_3, "WSS 4:3 - default 0x4008 - bit 15: disable, 14: burst mode, 13..0: wss data");
109module_param(wss_cfg_16_9, int, 0444);
110MODULE_PARM_DESC(wss_cfg_16_9, "WSS 16:9 - default 0x0007 - bit 15: disable, 14: burst mode, 13..0: wss data");
2f03ee8e 111module_param(tv_standard, int, 0444);
112MODULE_PARM_DESC(tv_standard, "TV standard: 0 PAL (default), 1 NTSC");
1da177e4 113
78e92006
JG		 114DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
115
1da177e4 116static void restart_feeds(struct av7110 *av7110);
9e615eac
OE		 117static int budget_start_feed(struct dvb_demux_feed *feed);
118static int budget_stop_feed(struct dvb_demux_feed *feed);
1da177e4 119
a5ed425c 120static int av7110_num;
1da177e4
LT		 121
122#define FE_FUNC_OVERRIDE(fe_func, av7110_copy, av7110_func) \
123{\
124 if (fe_func != NULL) { \
125 av7110_copy = fe_func; \
126 fe_func = av7110_func; \
127 } \
128}
129
130
131static void init_av7110_av(struct av7110 *av7110)
132{
ce18a223 133 int ret;
1da177e4
LT		 134 struct saa7146_dev *dev = av7110->dev;
135
136 /* set internal volume control to maximum */
137 av7110->adac_type = DVB_ADAC_TI;
ce18a223 138 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 139 if (ret < 0)
ce18a223 140 printk("dvb-ttpci:cannot set internal volume to maximum:%d\n",ret);
1da177e4 141
defd574e
OE		 142 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetMonitorType,
143 1, (u16) av7110->display_ar);
144 if (ret < 0)
145 printk("dvb-ttpci: unable to set aspect ratio\n");
146 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetPanScanType,
147 1, av7110->display_panscan);
148 if (ret < 0)
149 printk("dvb-ttpci: unable to set pan scan\n");
150
4caba426
OE		 151 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 2, wss_cfg_4_3);
152 if (ret < 0)
153 printk("dvb-ttpci: unable to configure 4:3 wss\n");
154 ret = av7110_fw_cmd(av7110, COMTYPE_ENCODER, SetWSSConfig, 2, 3, wss_cfg_16_9);
155 if (ret < 0)
156 printk("dvb-ttpci: unable to configure 16:9 wss\n");
157
ce18a223 158 ret = av7710_set_video_mode(av7110, vidmode);
7a2fa90f 159 if (ret < 0)
ce18a223 160 printk("dvb-ttpci:cannot set video mode:%d\n",ret);
1da177e4
LT		 161
162 /* handle different card types */
163 /* remaining inits according to card and frontend type */
164 av7110->analog_tuner_flags = 0;
165 av7110->current_input = 0;
61391e04 166 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000a)
1c13b95c 167 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 0); // SPDIF on
61391e04 168 if (i2c_writereg(av7110, 0x20, 0x00, 0x00) == 1) {
1da177e4 169 printk ("dvb-ttpci: Crystal audio DAC @ card %d detected\n",
fdc53a6d 170 av7110->dvb_adapter.num);
1da177e4
LT		 171 av7110->adac_type = DVB_ADAC_CRYSTAL;
172 i2c_writereg(av7110, 0x20, 0x01, 0xd2);
173 i2c_writereg(av7110, 0x20, 0x02, 0x49);
174 i2c_writereg(av7110, 0x20, 0x03, 0x00);
175 i2c_writereg(av7110, 0x20, 0x04, 0x00);
176
177 /**
178 * some special handling for the Siemens DVB-C cards...
179 */
180 } else if (0 == av7110_init_analog_module(av7110)) {
181 /* done. */
182 }
183 else if (dev->pci->subsystem_vendor == 0x110a) {
184 printk("dvb-ttpci: DVB-C w/o analog module @ card %d detected\n",
fdc53a6d 185 av7110->dvb_adapter.num);
1da177e4
LT		 186 av7110->adac_type = DVB_ADAC_NONE;
187 }
188 else {
189 av7110->adac_type = adac;
190 printk("dvb-ttpci: adac type set to %d @ card %d\n",
1c13b95c 191 av7110->adac_type, av7110->dvb_adapter.num);
1da177e4
LT		 192 }
193
1c13b95c 194 if (av7110->adac_type == DVB_ADAC_NONE || av7110->adac_type == DVB_ADAC_MSP34x0) {
1da177e4 195 // switch DVB SCART on
ce18a223 196 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, MainSwitch, 1, 0);
7a2fa90f 197 if (ret < 0)
ce18a223
WR		 198 printk("dvb-ttpci:cannot switch on SCART(Main):%d\n",ret);
199 ret = av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, ADSwitch, 1, 1);
7a2fa90f 200 if (ret < 0)
ce18a223 201 printk("dvb-ttpci:cannot switch on SCART(AD):%d\n",ret);
1da177e4 202 if (rgb_on &&
6af4ee10
KH		 203 ((av7110->dev->pci->subsystem_vendor == 0x110a) ||
204 (av7110->dev->pci->subsystem_vendor == 0x13c2)) &&
205 (av7110->dev->pci->subsystem_device == 0x0000)) {
1da177e4
LT		 206 saa7146_setgpio(dev, 1, SAA7146_GPIO_OUTHI); // RGB on, SCART pin 16
207 //saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); // SCARTpin 8
208 }
209 }
210
60edb137
OE		 211 if (dev->pci->subsystem_vendor == 0x13c2 && dev->pci->subsystem_device == 0x000e)
212 av7110_fw_cmd(av7110, COMTYPE_AUDIODAC, SpdifSwitch, 1, 0); // SPDIF on
213
ce18a223 214 ret = av7110_set_volume(av7110, av7110->mixer.volume_left, av7110->mixer.volume_right);
7a2fa90f 215 if (ret < 0)
ce18a223 216 printk("dvb-ttpci:cannot set volume :%d\n",ret);
1da177e4
LT		 217}
218
219static void recover_arm(struct av7110 *av7110)
220{
221 dprintk(4, "%p\n",av7110);
222
223 av7110_bootarm(av7110);
224 msleep(100);
1da177e4 225
66190a27 226 init_av7110_av(av7110);
1da177e4 227
66190a27
OE		 228 /* card-specific recovery */
229 if (av7110->recover)
230 av7110->recover(av7110);
231
232 restart_feeds(av7110);
ee820a64 233
b250392f 234#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
ee820a64
OE		 235 av7110_check_ir_config(av7110, true);
236#endif
1da177e4
LT		 237}
238
239static void av7110_arm_sync(struct av7110 *av7110)
240{
8eec1429
HP		 241 if (av7110->arm_thread)
242 kthread_stop(av7110->arm_thread);
1da177e4 243
8eec1429 244 av7110->arm_thread = NULL;
1da177e4
LT		 245}
246
247static int arm_thread(void *data)
248{
249 struct av7110 *av7110 = data;
250 u16 newloops = 0;
251 int timeout;
252
253 dprintk(4, "%p\n",av7110);
254
1da177e4
LT		 255 for (;;) {
256 timeout = wait_event_interruptible_timeout(av7110->arm_wait,
8eec1429
HP		 257 kthread_should_stop(), 5 * HZ);
258
259 if (-ERESTARTSYS == timeout || kthread_should_stop()) {
1da177e4
LT		 260 /* got signal or told to quit*/
261 break;
262 }
263
264 if (!av7110->arm_ready)
265 continue;
266
b250392f 267#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
ee820a64
OE		 268 av7110_check_ir_config(av7110, false);
269#endif
270
3593cab5 271 if (mutex_lock_interruptible(&av7110->dcomlock))
1da177e4 272 break;
1da177e4 273 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2);
3593cab5 274 mutex_unlock(&av7110->dcomlock);
1da177e4 275
66190a27 276 if (newloops == av7110->arm_loops || av7110->arm_errors > 3) {
1da177e4 277 printk(KERN_ERR "dvb-ttpci: ARM crashed @ card %d\n",
fdc53a6d 278 av7110->dvb_adapter.num);
1da177e4 279
66190a27 280 recover_arm(av7110);
1da177e4 281
3593cab5 282 if (mutex_lock_interruptible(&av7110->dcomlock))
1da177e4 283 break;
1da177e4 284 newloops = rdebi(av7110, DEBINOSWAP, STATUS_LOOPS, 0, 2) - 1;
3593cab5 285 mutex_unlock(&av7110->dcomlock);
1da177e4
LT		 286 }
287 av7110->arm_loops = newloops;
66190a27 288 av7110->arm_errors = 0;
1da177e4
LT		 289 }
290
1da177e4
LT		 291 return 0;
292}
293
294
1da177e4
LT		 295/****************************************************************************
296 * IRQ handling
297 ****************************************************************************/
298
299static int DvbDmxFilterCallback(u8 *buffer1, size_t buffer1_len,
300 u8 *buffer2, size_t buffer2_len,
301 struct dvb_demux_filter *dvbdmxfilter,
1da177e4
LT		 302 struct av7110 *av7110)
303{
304 if (!dvbdmxfilter->feed->demux->dmx.frontend)
305 return 0;
306 if (dvbdmxfilter->feed->demux->dmx.frontend->source == DMX_MEMORY_FE)
307 return 0;
308
309 switch (dvbdmxfilter->type) {
310 case DMX_TYPE_SEC:
311 if ((((buffer1[1] << 8) | buffer1[2]) & 0xfff) + 3 != buffer1_len)
312 return 0;
313 if (dvbdmxfilter->doneq) {
314 struct dmx_section_filter *filter = &dvbdmxfilter->filter;
315 int i;
316 u8 xor, neq = 0;
317
318 for (i = 0; i < DVB_DEMUX_MASK_MAX; i++) {
319 xor = filter->filter_value[i] ^ buffer1[i];
320 neq |= dvbdmxfilter->maskandnotmode[i] & xor;
321 }
322 if (!neq)
323 return 0;
324 }
325 return dvbdmxfilter->feed->cb.sec(buffer1, buffer1_len,
326 buffer2, buffer2_len,
2f684b23 327 &dvbdmxfilter->filter);
1da177e4
LT		 328 case DMX_TYPE_TS:
329 if (!(dvbdmxfilter->feed->ts_type & TS_PACKET))
330 return 0;
331 if (dvbdmxfilter->feed->ts_type & TS_PAYLOAD_ONLY)
332 return dvbdmxfilter->feed->cb.ts(buffer1, buffer1_len,
333 buffer2, buffer2_len,
2f684b23 334 &dvbdmxfilter->feed->feed.ts);
1da177e4
LT		 335 else
336 av7110_p2t_write(buffer1, buffer1_len,
337 dvbdmxfilter->feed->pid,
338 &av7110->p2t_filter[dvbdmxfilter->index]);
339 default:
340 return 0;
341 }
342}
343
344
345//#define DEBUG_TIMING
346static inline void print_time(char *s)
347{
348#ifdef DEBUG_TIMING
349 struct timeval tv;
350 do_gettimeofday(&tv);
351 printk("%s: %d.%d\n", s, (int)tv.tv_sec, (int)tv.tv_usec);
352#endif
353}
354
355#define DEBI_READ 0
356#define DEBI_WRITE 1
357static inline void start_debi_dma(struct av7110 *av7110, int dir,
358 unsigned long addr, unsigned int len)
359{
360 dprintk(8, "%c %08lx %u\n", dir == DEBI_READ ? 'R' : 'W', addr, len);
361 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
3ca7fc84 362 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
1da177e4
LT		 363 return;
364 }
365
366 SAA7146_ISR_CLEAR(av7110->dev, MASK_19); /* for good measure */
367 SAA7146_IER_ENABLE(av7110->dev, MASK_19);
368 if (len < 5)
369 len = 5; /* we want a real DEBI DMA */
370 if (dir == DEBI_WRITE)
371 iwdebi(av7110, DEBISWAB, addr, 0, (len + 3) & ~3);
372 else
373 irdebi(av7110, DEBISWAB, addr, 0, len);
374}
375
d45b9b8a 376static void debiirq(unsigned long cookie)
1da177e4 377{
d45b9b8a 378 struct av7110 *av7110 = (struct av7110 *)cookie;
1da177e4
LT		 379 int type = av7110->debitype;
380 int handle = (type >> 8) & 0x1f;
381 unsigned int xfer = 0;
382
383 print_time("debi");
384 dprintk(4, "type 0x%04x\n", type);
385
386 if (type == -1) {
387 printk("DEBI irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
388 jiffies, saa7146_read(av7110->dev, PSR),
389 saa7146_read(av7110->dev, SSR));
390 goto debi_done;
391 }
392 av7110->debitype = -1;
393
394 switch (type & 0xff) {
395
396 case DATA_TS_RECORD:
397 dvb_dmx_swfilter_packets(&av7110->demux,
398 (const u8 *) av7110->debi_virt,
399 av7110->debilen / 188);
400 xfer = RX_BUFF;
401 break;
402
403 case DATA_PES_RECORD:
404 if (av7110->demux.recording)
405 av7110_record_cb(&av7110->p2t[handle],
406 (u8 *) av7110->debi_virt,
407 av7110->debilen);
408 xfer = RX_BUFF;
409 break;
410
411 case DATA_IPMPE:
412 case DATA_FSECTION:
413 case DATA_PIPING:
414 if (av7110->handle2filter[handle])
415 DvbDmxFilterCallback((u8 *)av7110->debi_virt,
416 av7110->debilen, NULL, 0,
417 av7110->handle2filter[handle],
2f684b23 418 av7110);
1da177e4
LT		 419 xfer = RX_BUFF;
420 break;
421
422 case DATA_CI_GET:
423 {
424 u8 *data = av7110->debi_virt;
425
426 if ((data[0] < 2) && data[2] == 0xff) {
427 int flags = 0;
428 if (data[5] > 0)
429 flags |= CA_CI_MODULE_PRESENT;
430 if (data[5] > 5)
431 flags |= CA_CI_MODULE_READY;
432 av7110->ci_slot[data[0]].flags = flags;
433 } else
434 ci_get_data(&av7110->ci_rbuffer,
435 av7110->debi_virt,
436 av7110->debilen);
437 xfer = RX_BUFF;
438 break;
439 }
440
441 case DATA_COMMON_INTERFACE:
442 CI_handle(av7110, (u8 *)av7110->debi_virt, av7110->debilen);
1da177e4
LT		 443 xfer = RX_BUFF;
444 break;
445
446 case DATA_DEBUG_MESSAGE:
447 ((s8*)av7110->debi_virt)[Reserved_SIZE - 1] = 0;
448 printk("%s\n", (s8 *) av7110->debi_virt);
449 xfer = RX_BUFF;
450 break;
451
452 case DATA_CI_PUT:
453 dprintk(4, "debi DATA_CI_PUT\n");
454 case DATA_MPEG_PLAY:
455 dprintk(4, "debi DATA_MPEG_PLAY\n");
456 case DATA_BMP_LOAD:
457 dprintk(4, "debi DATA_BMP_LOAD\n");
458 xfer = TX_BUFF;
459 break;
460 default:
461 break;
462 }
463debi_done:
464 spin_lock(&av7110->debilock);
465 if (xfer)
466 iwdebi(av7110, DEBINOSWAP, xfer, 0, 2);
467 ARM_ClearMailBox(av7110);
468 spin_unlock(&av7110->debilock);
469}
470
471/* irq from av7110 firmware writing the mailbox register in the DPRAM */
d45b9b8a 472static void gpioirq(unsigned long cookie)
1da177e4 473{
d45b9b8a 474 struct av7110 *av7110 = (struct av7110 *)cookie;
1da177e4
LT		 475 u32 rxbuf, txbuf;
476 int len;
477
478 if (av7110->debitype != -1)
479 /* we shouldn't get any irq while a debi xfer is running */
480 printk("dvb-ttpci: GPIO0 irq oops @ %ld, psr:0x%08x, ssr:0x%08x\n",
481 jiffies, saa7146_read(av7110->dev, PSR),
482 saa7146_read(av7110->dev, SSR));
483
484 if (saa7146_wait_for_debi_done(av7110->dev, 0)) {
3ca7fc84 485 printk(KERN_ERR "%s: saa7146_wait_for_debi_done timed out\n", __func__);
1da177e4
LT		 486 BUG(); /* maybe we should try resetting the debi? */
487 }
488
489 spin_lock(&av7110->debilock);
490 ARM_ClearIrq(av7110);
491
492 /* see what the av7110 wants */
493 av7110->debitype = irdebi(av7110, DEBINOSWAP, IRQ_STATE, 0, 2);
494 av7110->debilen = irdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
495 rxbuf = irdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
496 txbuf = irdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
497 len = (av7110->debilen + 3) & ~3;
498
499 print_time("gpio");
500 dprintk(8, "GPIO0 irq 0x%04x %d\n", av7110->debitype, av7110->debilen);
501
502 switch (av7110->debitype & 0xff) {
503
504 case DATA_TS_PLAY:
505 case DATA_PES_PLAY:
506 break;
507
508 case DATA_MPEG_VIDEO_EVENT:
509 {
510 u32 h_ar;
511 struct video_event event;
512
513 av7110->video_size.w = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_WIDTH, 0, 2);
514 h_ar = irdebi(av7110, DEBINOSWAP, STATUS_MPEG_HEIGHT_AR, 0, 2);
515
516 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
517 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
518
519 av7110->video_size.h = h_ar & 0xfff;
1da177e4
LT		 520
521 event.type = VIDEO_EVENT_SIZE_CHANGED;
522 event.u.size.w = av7110->video_size.w;
523 event.u.size.h = av7110->video_size.h;
524 switch ((h_ar >> 12) & 0xf)
525 {
526 case 3:
527 av7110->video_size.aspect_ratio = VIDEO_FORMAT_16_9;
528 event.u.size.aspect_ratio = VIDEO_FORMAT_16_9;
529 av7110->videostate.video_format = VIDEO_FORMAT_16_9;
530 break;
531 case 4:
532 av7110->video_size.aspect_ratio = VIDEO_FORMAT_221_1;
533 event.u.size.aspect_ratio = VIDEO_FORMAT_221_1;
534 av7110->videostate.video_format = VIDEO_FORMAT_221_1;
535 break;
536 default:
537 av7110->video_size.aspect_ratio = VIDEO_FORMAT_4_3;
538 event.u.size.aspect_ratio = VIDEO_FORMAT_4_3;
539 av7110->videostate.video_format = VIDEO_FORMAT_4_3;
540 }
66190a27
OE		 541
542 dprintk(8, "GPIO0 irq: DATA_MPEG_VIDEO_EVENT: w/h/ar = %u/%u/%u\n",
543 av7110->video_size.w, av7110->video_size.h,
544 av7110->video_size.aspect_ratio);
545
1da177e4
LT		 546 dvb_video_add_event(av7110, &event);
547 break;
548 }
549
550 case DATA_CI_PUT:
551 {
552 int avail;
553 struct dvb_ringbuffer *cibuf = &av7110->ci_wbuffer;
554
555 avail = dvb_ringbuffer_avail(cibuf);
556 if (avail <= 2) {
557 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
558 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
559 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
560 break;
561 }
562 len = DVB_RINGBUFFER_PEEK(cibuf, 0) << 8;
563 len |= DVB_RINGBUFFER_PEEK(cibuf, 1);
564 if (avail < len + 2) {
565 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
566 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
567 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
568 break;
569 }
570 DVB_RINGBUFFER_SKIP(cibuf, 2);
571
b0ba0e3a 572 dvb_ringbuffer_read(cibuf, av7110->debi_virt, len);
1da177e4
LT		 573
574 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
575 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
576 dprintk(8, "DMA: CI\n");
577 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
578 spin_unlock(&av7110->debilock);
579 wake_up(&cibuf->queue);
580 return;
581 }
582
583 case DATA_MPEG_PLAY:
584 if (!av7110->playing) {
585 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
586 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
587 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
588 break;
589 }
590 len = 0;
591 if (av7110->debitype & 0x100) {
592 spin_lock(&av7110->aout.lock);
593 len = av7110_pes_play(av7110->debi_virt, &av7110->aout, 2048);
594 spin_unlock(&av7110->aout.lock);
595 }
596 if (len <= 0 && (av7110->debitype & 0x200)
597 &&av7110->videostate.play_state != VIDEO_FREEZED) {
598 spin_lock(&av7110->avout.lock);
599 len = av7110_pes_play(av7110->debi_virt, &av7110->avout, 2048);
600 spin_unlock(&av7110->avout.lock);
601 }
602 if (len <= 0) {
603 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
604 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
605 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
606 break;
607 }
608 dprintk(8, "GPIO0 PES_PLAY len=%04x\n", len);
609 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
610 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
611 dprintk(8, "DMA: MPEG_PLAY\n");
612 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE + txbuf, len);
613 spin_unlock(&av7110->debilock);
614 return;
615
616 case DATA_BMP_LOAD:
617 len = av7110->debilen;
618 dprintk(8, "gpio DATA_BMP_LOAD len %d\n", len);
619 if (!len) {
620 av7110->bmp_state = BMP_LOADED;
621 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, 0, 2);
622 iwdebi(av7110, DEBINOSWAP, TX_LEN, 0, 2);
623 iwdebi(av7110, DEBINOSWAP, TX_BUFF, 0, 2);
624 wake_up(&av7110->bmpq);
625 dprintk(8, "gpio DATA_BMP_LOAD done\n");
626 break;
627 }
628 if (len > av7110->bmplen)
629 len = av7110->bmplen;
630 if (len > 2 * 1024)
631 len = 2 * 1024;
632 iwdebi(av7110, DEBINOSWAP, TX_LEN, len, 2);
633 iwdebi(av7110, DEBINOSWAP, IRQ_STATE_EXT, len, 2);
634 memcpy(av7110->debi_virt, av7110->bmpbuf+av7110->bmpp, len);
635 av7110->bmpp += len;
636 av7110->bmplen -= len;
637 dprintk(8, "gpio DATA_BMP_LOAD DMA len %d\n", len);
638 start_debi_dma(av7110, DEBI_WRITE, DPRAM_BASE+txbuf, len);
639 spin_unlock(&av7110->debilock);
640 return;
641
642 case DATA_CI_GET:
643 case DATA_COMMON_INTERFACE:
644 case DATA_FSECTION:
645 case DATA_IPMPE:
646 case DATA_PIPING:
647 if (!len || len > 4 * 1024) {
648 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
649 break;
650 }
651 /* fall through */
652
653 case DATA_TS_RECORD:
654 case DATA_PES_RECORD:
655 dprintk(8, "DMA: TS_REC etc.\n");
656 start_debi_dma(av7110, DEBI_READ, DPRAM_BASE+rxbuf, len);
657 spin_unlock(&av7110->debilock);
658 return;
659
660 case DATA_DEBUG_MESSAGE:
661 if (!len || len > 0xff) {
662 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
663 break;
664 }
665 start_debi_dma(av7110, DEBI_READ, Reserved, len);
666 spin_unlock(&av7110->debilock);
667 return;
668
669 case DATA_IRCOMMAND:
ee820a64
OE		 670 if (av7110->ir.ir_handler)
671 av7110->ir.ir_handler(av7110,
03388ae3 672 swahw32(irdebi(av7110, DEBINOSWAP, Reserved, 0, 4)));
1da177e4
LT		 673 iwdebi(av7110, DEBINOSWAP, RX_BUFF, 0, 2);
674 break;
675
676 default:
677 printk("dvb-ttpci: gpioirq unknown type=%d len=%d\n",
678 av7110->debitype, av7110->debilen);
679 break;
680 }
681 av7110->debitype = -1;
682 ARM_ClearMailBox(av7110);
683 spin_unlock(&av7110->debilock);
684}
685
686
687#ifdef CONFIG_DVB_AV7110_OSD
16ef8def 688static int dvb_osd_ioctl(struct file *file,
1da177e4
LT		 689 unsigned int cmd, void *parg)
690{
d9bdf772
TK		 691 struct dvb_device *dvbdev = file->private_data;
692 struct av7110 *av7110 = dvbdev->priv;
1da177e4
LT		 693
694 dprintk(4, "%p\n", av7110);
695
696 if (cmd == OSD_SEND_CMD)
697 return av7110_osd_cmd(av7110, (osd_cmd_t *) parg);
698 if (cmd == OSD_GET_CAPABILITY)
699 return av7110_osd_capability(av7110, (osd_cap_t *) parg);
700
701 return -EINVAL;
702}
703
704
784e29d2 705static const struct file_operations dvb_osd_fops = {
1da177e4 706 .owner = THIS_MODULE,
16ef8def 707 .unlocked_ioctl = dvb_generic_ioctl,
1da177e4
LT		 708 .open = dvb_generic_open,
709 .release = dvb_generic_release,
6038f373 710 .llseek = noop_llseek,
1da177e4
LT		 711};
712
713static struct dvb_device dvbdev_osd = {
714 .priv = NULL,
715 .users = 1,
716 .writers = 1,
717 .fops = &dvb_osd_fops,
718 .kernel_ioctl = dvb_osd_ioctl,
719};
720#endif /* CONFIG_DVB_AV7110_OSD */
721
722
723static inline int SetPIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
724 u16 subpid, u16 pcrpid)
725{
47f36920
DWF		 726 u16 aflags = 0;
727
1da177e4
LT		 728 dprintk(4, "%p\n", av7110);
729
730 if (vpid == 0x1fff || apid == 0x1fff ||
731 ttpid == 0x1fff || subpid == 0x1fff || pcrpid == 0x1fff) {
732 vpid = apid = ttpid = subpid = pcrpid = 0;
733 av7110->pids[DMX_PES_VIDEO] = 0;
734 av7110->pids[DMX_PES_AUDIO] = 0;
735 av7110->pids[DMX_PES_TELETEXT] = 0;
736 av7110->pids[DMX_PES_PCR] = 0;
737 }
738
47f36920
DWF		 739 if (av7110->audiostate.bypass_mode)
740 aflags |= 0x8000;
741
742 return av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, MultiPID, 6,
743 pcrpid, vpid, apid, ttpid, subpid, aflags);
1da177e4
LT		 744}
745
ce18a223 746int ChangePIDs(struct av7110 *av7110, u16 vpid, u16 apid, u16 ttpid,
1da177e4
LT		 747 u16 subpid, u16 pcrpid)
748{
ce18a223 749 int ret = 0;
1da177e4
LT		 750 dprintk(4, "%p\n", av7110);
751
3593cab5 752 if (mutex_lock_interruptible(&av7110->pid_mutex))
ce18a223 753 return -ERESTARTSYS;
1da177e4
LT		 754
755 if (!(vpid & 0x8000))
756 av7110->pids[DMX_PES_VIDEO] = vpid;
757 if (!(apid & 0x8000))
758 av7110->pids[DMX_PES_AUDIO] = apid;
759 if (!(ttpid & 0x8000))
760 av7110->pids[DMX_PES_TELETEXT] = ttpid;
761 if (!(pcrpid & 0x8000))
762 av7110->pids[DMX_PES_PCR] = pcrpid;
763
764 av7110->pids[DMX_PES_SUBTITLE] = 0;
765
766 if (av7110->fe_synced) {
767 pcrpid = av7110->pids[DMX_PES_PCR];
ce18a223 768 ret = SetPIDs(av7110, vpid, apid, ttpid, subpid, pcrpid);
1da177e4
LT		 769 }
770
3593cab5 771 mutex_unlock(&av7110->pid_mutex);
ce18a223 772 return ret;
1da177e4
LT		 773}
774
775
776/******************************************************************************
777 * hardware filter functions
778 ******************************************************************************/
779
780static int StartHWFilter(struct dvb_demux_filter *dvbdmxfilter)
781{
782 struct dvb_demux_feed *dvbdmxfeed = dvbdmxfilter->feed;
d9bdf772 783 struct av7110 *av7110 = dvbdmxfeed->demux->priv;
1da177e4
LT		 784 u16 buf[20];
785 int ret, i;
786 u16 handle;
787// u16 mode = 0x0320;
788 u16 mode = 0xb96a;
789
790 dprintk(4, "%p\n", av7110);
791
9e615eac
OE		 792 if (av7110->full_ts)
793 return 0;
794
1da177e4
LT		 795 if (dvbdmxfilter->type == DMX_TYPE_SEC) {
796 if (hw_sections) {
797 buf[4] = (dvbdmxfilter->filter.filter_value[0] << 8) |
798 dvbdmxfilter->maskandmode[0];
799 for (i = 3; i < 18; i++)
800 buf[i + 4 - 2] =
801 (dvbdmxfilter->filter.filter_value[i] << 8) |
802 dvbdmxfilter->maskandmode[i];
803 mode = 4;
804 }
805 } else if ((dvbdmxfeed->ts_type & TS_PACKET) &&
806 !(dvbdmxfeed->ts_type & TS_PAYLOAD_ONLY)) {
807 av7110_p2t_init(&av7110->p2t_filter[dvbdmxfilter->index], dvbdmxfeed);
808 }
809
810 buf[0] = (COMTYPE_PID_FILTER << 8) + AddPIDFilter;
811 buf[1] = 16;
812 buf[2] = dvbdmxfeed->pid;
813 buf[3] = mode;
814
815 ret = av7110_fw_request(av7110, buf, 20, &handle, 1);
816 if (ret != 0 || handle >= 32) {
008e6ff9 817 printk(KERN_ERR "dvb-ttpci: %s error buf %04x %04x %04x %04x ret %d handle %04x\n",
3ca7fc84 818 __func__, buf[0], buf[1], buf[2], buf[3],
1da177e4
LT		 819 ret, handle);
820 dvbdmxfilter->hw_handle = 0xffff;
ce18a223
WR		 821 if (!ret)
822 ret = -1;
823 return ret;
1da177e4
LT		 824 }
825
826 av7110->handle2filter[handle] = dvbdmxfilter;
827 dvbdmxfilter->hw_handle = handle;
828
829 return ret;
830}
831
832static int StopHWFilter(struct dvb_demux_filter *dvbdmxfilter)
833{
d9bdf772 834 struct av7110 *av7110 = dvbdmxfilter->feed->demux->priv;
1da177e4
LT		 835 u16 buf[3];
836 u16 answ[2];
837 int ret;
838 u16 handle;
839
840 dprintk(4, "%p\n", av7110);
841
9e615eac
OE		 842 if (av7110->full_ts)
843 return 0;
844
1da177e4
LT		 845 handle = dvbdmxfilter->hw_handle;
846 if (handle >= 32) {
847 printk("%s tried to stop invalid filter %04x, filter type = %x\n",
3ca7fc84 848 __func__, handle, dvbdmxfilter->type);
ce18a223 849 return -EINVAL;
1da177e4
LT		 850 }
851
852 av7110->handle2filter[handle] = NULL;
853
854 buf[0] = (COMTYPE_PID_FILTER << 8) + DelPIDFilter;
855 buf[1] = 1;
856 buf[2] = handle;
857 ret = av7110_fw_request(av7110, buf, 3, answ, 2);
858 if (ret != 0 || answ[1] != handle) {
008e6ff9 859 printk(KERN_ERR "dvb-ttpci: %s error cmd %04x %04x %04x ret %x resp %04x %04x pid %d\n",
3ca7fc84 860 __func__, buf[0], buf[1], buf[2], ret,
1da177e4 861 answ[0], answ[1], dvbdmxfilter->feed->pid);
ce18a223
WR		 862 if (!ret)
863 ret = -1;
1da177e4
LT		 864 }
865 return ret;
866}
867
868
ce18a223 869static int dvb_feed_start_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 870{
871 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
d9bdf772 872 struct av7110 *av7110 = dvbdmx->priv;
1da177e4
LT		 873 u16 *pid = dvbdmx->pids, npids[5];
874 int i;
ce18a223 875 int ret = 0;
1da177e4
LT		 876
877 dprintk(4, "%p\n", av7110);
878
879 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
880 i = dvbdmxfeed->pes_type;
881 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
882 if ((i == 2) && npids[i] && (dvbdmxfeed->ts_type & TS_PACKET)) {
883 npids[i] = 0;
ce18a223
WR		 884 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
885 if (!ret)
886 ret = StartHWFilter(dvbdmxfeed->filter);
887 return ret;
888 }
889 if (dvbdmxfeed->pes_type <= 2 || dvbdmxfeed->pes_type == 4) {
890 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
891 if (ret)
892 return ret;
1da177e4 893 }
1da177e4
LT		 894
895 if (dvbdmxfeed->pes_type < 2 && npids[0])
896 if (av7110->fe_synced)
ce18a223
WR		 897 {
898 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
899 if (ret)
900 return ret;
901 }
1da177e4 902
9e615eac 903 if ((dvbdmxfeed->ts_type & TS_PACKET) && !av7110->full_ts) {
1da177e4 904 if (dvbdmxfeed->pes_type == 0 && !(dvbdmx->pids[0] & 0x8000))
ce18a223 905 ret = av7110_av_start_record(av7110, RP_AUDIO, dvbdmxfeed);
1da177e4 906 if (dvbdmxfeed->pes_type == 1 && !(dvbdmx->pids[1] & 0x8000))
ce18a223 907 ret = av7110_av_start_record(av7110, RP_VIDEO, dvbdmxfeed);
1da177e4 908 }
ce18a223 909 return ret;
1da177e4
LT		 910}
911
ce18a223 912static int dvb_feed_stop_pid(struct dvb_demux_feed *dvbdmxfeed)
1da177e4
LT		 913{
914 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
d9bdf772 915 struct av7110 *av7110 = dvbdmx->priv;
1da177e4
LT		 916 u16 *pid = dvbdmx->pids, npids[5];
917 int i;
918
ce18a223
WR		 919 int ret = 0;
920
1da177e4
LT		 921 dprintk(4, "%p\n", av7110);
922
923 if (dvbdmxfeed->pes_type <= 1) {
ce18a223
WR		 924 ret = av7110_av_stop(av7110, dvbdmxfeed->pes_type ? RP_VIDEO : RP_AUDIO);
925 if (ret)
926 return ret;
1da177e4
LT		 927 if (!av7110->rec_mode)
928 dvbdmx->recording = 0;
929 if (!av7110->playing)
930 dvbdmx->playing = 0;
931 }
932 npids[0] = npids[1] = npids[2] = npids[3] = npids[4] = 0xffff;
933 i = dvbdmxfeed->pes_type;
934 switch (i) {
935 case 2: //teletext
936 if (dvbdmxfeed->ts_type & TS_PACKET)
ce18a223 937 ret = StopHWFilter(dvbdmxfeed->filter);
1da177e4
LT		 938 npids[2] = 0;
939 break;
940 case 0:
941 case 1:
942 case 4:
943 if (!pids_off)
ce18a223 944 return 0;
1da177e4
LT		 945 npids[i] = (pid[i]&0x8000) ? 0 : pid[i];
946 break;
947 }
ce18a223
WR		 948 if (!ret)
949 ret = ChangePIDs(av7110, npids[1], npids[0], npids[2], npids[3], npids[4]);
950 return ret;
1da177e4
LT		 951}
952
953static int av7110_start_feed(struct dvb_demux_feed *feed)
954{
955 struct dvb_demux *demux = feed->demux;
956 struct av7110 *av7110 = demux->priv;
ce18a223 957 int ret = 0;
1da177e4
LT		 958
959 dprintk(4, "%p\n", av7110);
960
961 if (!demux->dmx.frontend)
962 return -EINVAL;
963
9e615eac 964 if (!av7110->full_ts && feed->pid > 0x1fff)
1da177e4
LT		 965 return -EINVAL;
966
967 if (feed->type == DMX_TYPE_TS) {
968 if ((feed->ts_type & TS_DECODER) &&
fde04ab9 969 (feed->pes_type <= DMX_PES_PCR)) {
1da177e4
LT		 970 switch (demux->dmx.frontend->source) {
971 case DMX_MEMORY_FE:
972 if (feed->ts_type & TS_DECODER)
973 if (feed->pes_type < 2 &&
974 !(demux->pids[0] & 0x8000) &&
975 !(demux->pids[1] & 0x8000)) {
976 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->avout);
977 dvb_ringbuffer_flush_spinlock_wakeup(&av7110->aout);
ce18a223
WR		 978 ret = av7110_av_start_play(av7110,RP_AV);
979 if (!ret)
980 demux->playing = 1;
1da177e4
LT		 981 }
982 break;
983 default:
ce18a223 984 ret = dvb_feed_start_pid(feed);
1da177e4
LT		 985 break;
986 }
987 } else if ((feed->ts_type & TS_PACKET) &&
988 (demux->dmx.frontend->source != DMX_MEMORY_FE)) {
ce18a223 989 ret = StartHWFilter(feed->filter);
1da177e4
LT		 990 }
991 }
992
9e615eac
OE		 993 if (av7110->full_ts) {
994 budget_start_feed(feed);
995 return ret;
996 }
997
998 if (feed->type == DMX_TYPE_SEC) {
1da177e4
LT		 999 int i;
1000
1001 for (i = 0; i < demux->filternum; i++) {
1002 if (demux->filter[i].state != DMX_STATE_READY)
1003 continue;
1004 if (demux->filter[i].type != DMX_TYPE_SEC)
1005 continue;
1006 if (demux->filter[i].filter.parent != &feed->feed.sec)
1007 continue;
1008 demux->filter[i].state = DMX_STATE_GO;
ce18a223
WR		 1009 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
1010 ret = StartHWFilter(&demux->filter[i]);
1011 if (ret)
1012 break;
1013 }
1da177e4
LT		 1014 }
1015 }
1016
ce18a223 1017 return ret;
1da177e4
LT		 1018}
1019
1020
1021static int av7110_stop_feed(struct dvb_demux_feed *feed)
1022{
1023 struct dvb_demux *demux = feed->demux;
1024 struct av7110 *av7110 = demux->priv;
12ba0504 1025 int i, rc, ret = 0;
1da177e4
LT		 1026 dprintk(4, "%p\n", av7110);
1027
1028 if (feed->type == DMX_TYPE_TS) {
1029 if (feed->ts_type & TS_DECODER) {
fde04ab9 1030 if (feed->pes_type >= DMX_PES_OTHER ||
1da177e4
LT		 1031 !demux->pesfilter[feed->pes_type])
1032 return -EINVAL;
1033 demux->pids[feed->pes_type] |= 0x8000;
1034 demux->pesfilter[feed->pes_type] = NULL;
1035 }
1036 if (feed->ts_type & TS_DECODER &&
fde04ab9 1037 feed->pes_type < DMX_PES_OTHER) {
ce18a223 1038 ret = dvb_feed_stop_pid(feed);
1da177e4
LT		 1039 } else
1040 if ((feed->ts_type & TS_PACKET) &&
1041 (demux->dmx.frontend->source != DMX_MEMORY_FE))
ce18a223 1042 ret = StopHWFilter(feed->filter);
1da177e4
LT		 1043 }
1044
9e615eac
OE		 1045 if (av7110->full_ts) {
1046 budget_stop_feed(feed);
1047 return ret;
1048 }
1049
1050 if (feed->type == DMX_TYPE_SEC) {
12ba0504 1051 for (i = 0; i<demux->filternum; i++) {
1da177e4
LT		 1052 if (demux->filter[i].state == DMX_STATE_GO &&
1053 demux->filter[i].filter.parent == &feed->feed.sec) {
1054 demux->filter[i].state = DMX_STATE_READY;
ce18a223 1055 if (demux->dmx.frontend->source != DMX_MEMORY_FE) {
12ba0504
JS		 1056 rc = StopHWFilter(&demux->filter[i]);
1057 if (!ret)
1058 ret = rc;
1059 /* keep going, stop as many filters as possible */
ce18a223 1060 }
12ba0504 1061 }
1da177e4
LT		 1062 }
1063 }
1064
ce18a223 1065 return ret;
1da177e4
LT		 1066}
1067
1068
1069static void restart_feeds(struct av7110 *av7110)
1070{
1071 struct dvb_demux *dvbdmx = &av7110->demux;
1072 struct dvb_demux_feed *feed;
1073 int mode;
9e615eac 1074 int feeding;
66190a27 1075 int i, j;
1da177e4
LT		 1076
1077 dprintk(4, "%p\n", av7110);
1078
1079 mode = av7110->playing;
1080 av7110->playing = 0;
1081 av7110->rec_mode = 0;
1082
9e615eac
OE		 1083 feeding = av7110->feeding1; /* full_ts mod */
1084
66190a27 1085 for (i = 0; i < dvbdmx->feednum; i++) {
1da177e4 1086 feed = &dvbdmx->feed[i];
66190a27
OE		 1087 if (feed->state == DMX_STATE_GO) {
1088 if (feed->type == DMX_TYPE_SEC) {
1089 for (j = 0; j < dvbdmx->filternum; j++) {
1090 if (dvbdmx->filter[j].type != DMX_TYPE_SEC)
1091 continue;
1092 if (dvbdmx->filter[j].filter.parent != &feed->feed.sec)
1093 continue;
1094 if (dvbdmx->filter[j].state == DMX_STATE_GO)
1095 dvbdmx->filter[j].state = DMX_STATE_READY;
1096 }
1097 }
1da177e4 1098 av7110_start_feed(feed);
66190a27 1099 }
1da177e4
LT		 1100 }
1101
9e615eac
OE		 1102 av7110->feeding1 = feeding; /* full_ts mod */
1103
1da177e4
LT		 1104 if (mode)
1105 av7110_av_start_play(av7110, mode);
1106}
1107
1108static int dvb_get_stc(struct dmx_demux *demux, unsigned int num,
1109 uint64_t *stc, unsigned int *base)
1110{
1111 int ret;
1112 u16 fwstc[4];
1113 u16 tag = ((COMTYPE_REQUEST << 8) + ReqSTC);
1114 struct dvb_demux *dvbdemux;
1115 struct av7110 *av7110;
1116
1117 /* pointer casting paranoia... */
ae24601b 1118 BUG_ON(!demux);
d9bdf772 1119 dvbdemux = demux->priv;
ae24601b 1120 BUG_ON(!dvbdemux);
d9bdf772 1121 av7110 = dvbdemux->priv;
1da177e4
LT		 1122
1123 dprintk(4, "%p\n", av7110);
1124
1125 if (num != 0)
1126 return -EINVAL;
1127
1128 ret = av7110_fw_request(av7110, &tag, 0, fwstc, 4);
1129 if (ret) {
3ca7fc84 1130 printk(KERN_ERR "%s: av7110_fw_request error\n", __func__);
ce18a223 1131 return ret;
1da177e4
LT		 1132 }
1133 dprintk(2, "fwstc = %04hx %04hx %04hx %04hx\n",
1134 fwstc[0], fwstc[1], fwstc[2], fwstc[3]);
1135
1136 *stc = (((uint64_t) ((fwstc[3] & 0x8000) >> 15)) << 32) |
1137 (((uint64_t) fwstc[1]) << 16) | ((uint64_t) fwstc[0]);
1138 *base = 1;
1139
1140 dprintk(4, "stc = %lu\n", (unsigned long)*stc);
1141
1142 return 0;
1143}
1144
1145
1146/******************************************************************************
1147 * SEC device file operations
1148 ******************************************************************************/
1149
1150
0df289a2 1151static int av7110_set_tone(struct dvb_frontend *fe, enum fe_sec_tone_mode tone)
1da177e4 1152{
d9bdf772 1153 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1154
1155 switch (tone) {
1156 case SEC_TONE_ON:
ce18a223 1157 return Set22K(av7110, 1);
1da177e4
LT		 1158
1159 case SEC_TONE_OFF:
ce18a223 1160 return Set22K(av7110, 0);
1da177e4
LT		 1161
1162 default:
1163 return -EINVAL;
1164 }
1da177e4
LT		 1165}
1166
1167static int av7110_diseqc_send_master_cmd(struct dvb_frontend* fe,
1168 struct dvb_diseqc_master_cmd* cmd)
1169{
1170 struct av7110* av7110 = fe->dvb->priv;
1171
ce18a223 1172 return av7110_diseqc_send(av7110, cmd->msg_len, cmd->msg, -1);
1da177e4
LT		 1173}
1174
1175static int av7110_diseqc_send_burst(struct dvb_frontend* fe,
0df289a2 1176 enum fe_sec_mini_cmd minicmd)
1da177e4
LT		 1177{
1178 struct av7110* av7110 = fe->dvb->priv;
1179
ce18a223 1180 return av7110_diseqc_send(av7110, 0, NULL, minicmd);
1da177e4
LT		 1181}
1182
1183/* simplified code from budget-core.c */
1184static int stop_ts_capture(struct av7110 *budget)
1185{
1186 dprintk(2, "budget: %p\n", budget);
1187
1188 if (--budget->feeding1)
1189 return budget->feeding1;
1190 saa7146_write(budget->dev, MC1, MASK_20); /* DMA3 off */
1191 SAA7146_IER_DISABLE(budget->dev, MASK_10);
1192 SAA7146_ISR_CLEAR(budget->dev, MASK_10);
1193 return 0;
1194}
1195
1196static int start_ts_capture(struct av7110 *budget)
1197{
e5b30145
HV		 1198 unsigned y;
1199
1da177e4
LT		 1200 dprintk(2, "budget: %p\n", budget);
1201
1202 if (budget->feeding1)
1203 return ++budget->feeding1;
e5b30145
HV		 1204 for (y = 0; y < TS_HEIGHT; y++)
1205 memset(budget->grabbing + y * TS_WIDTH, 0x00, TS_WIDTH);
1da177e4 1206 budget->ttbp = 0;
9e615eac 1207 SAA7146_ISR_CLEAR(budget->dev, MASK_10); /* VPE */
1da177e4
LT		 1208 SAA7146_IER_ENABLE(budget->dev, MASK_10); /* VPE */
1209 saa7146_write(budget->dev, MC1, (MASK_04 | MASK_20)); /* DMA3 on */
1210 return ++budget->feeding1;
1211}
1212
1213static int budget_start_feed(struct dvb_demux_feed *feed)
1214{
1215 struct dvb_demux *demux = feed->demux;
d9bdf772 1216 struct av7110 *budget = demux->priv;
1da177e4
LT		 1217 int status;
1218
1219 dprintk(2, "av7110: %p\n", budget);
1220
1221 spin_lock(&budget->feedlock1);
1222 feed->pusi_seen = 0; /* have a clean section start */
1223 status = start_ts_capture(budget);
1224 spin_unlock(&budget->feedlock1);
1225 return status;
1226}
1227
1228static int budget_stop_feed(struct dvb_demux_feed *feed)
1229{
1230 struct dvb_demux *demux = feed->demux;
d9bdf772 1231 struct av7110 *budget = demux->priv;
1da177e4
LT		 1232 int status;
1233
1234 dprintk(2, "budget: %p\n", budget);
1235
1236 spin_lock(&budget->feedlock1);
1237 status = stop_ts_capture(budget);
1238 spin_unlock(&budget->feedlock1);
1239 return status;
1240}
1241
d45b9b8a 1242static void vpeirq(unsigned long cookie)
1da177e4 1243{
d45b9b8a 1244 struct av7110 *budget = (struct av7110 *)cookie;
1da177e4
LT		 1245 u8 *mem = (u8 *) (budget->grabbing);
1246 u32 olddma = budget->ttbp;
1247 u32 newdma = saa7146_read(budget->dev, PCI_VDP3);
9e615eac 1248 struct dvb_demux *demux = budget->full_ts ? &budget->demux : &budget->demux1;
1da177e4 1249
1da177e4
LT		 1250 /* nearest lower position divisible by 188 */
1251 newdma -= newdma % 188;
1252
1253 if (newdma >= TS_BUFLEN)
1254 return;
1255
1256 budget->ttbp = newdma;
1257
1258 if (!budget->feeding1 || (newdma == olddma))
1259 return;
1260
87c3019d
JB		 1261 /* Ensure streamed PCI data is synced to CPU */
1262 pci_dma_sync_sg_for_cpu(budget->dev->pci, budget->pt.slist, budget->pt.nents, PCI_DMA_FROMDEVICE);
1263
1da177e4
LT		 1264#if 0
1265 /* track rps1 activity */
1266 printk("vpeirq: %02x Event Counter 1 0x%04x\n",
1267 mem[olddma],
1268 saa7146_read(budget->dev, EC1R) & 0x3fff);
1269#endif
1270
1271 if (newdma > olddma)
1272 /* no wraparound, dump olddma..newdma */
9e615eac 1273 dvb_dmx_swfilter_packets(demux, mem + olddma, (newdma - olddma) / 188);
1da177e4
LT		 1274 else {
1275 /* wraparound, dump olddma..buflen and 0..newdma */
9e615eac
OE		 1276 dvb_dmx_swfilter_packets(demux, mem + olddma, (TS_BUFLEN - olddma) / 188);
1277 dvb_dmx_swfilter_packets(demux, mem, newdma / 188);
1da177e4
LT		 1278 }
1279}
1280
1281static int av7110_register(struct av7110 *av7110)
1282{
1283 int ret, i;
1284 struct dvb_demux *dvbdemux = &av7110->demux;
1285 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1286
1287 dprintk(4, "%p\n", av7110);
1288
1289 if (av7110->registered)
1290 return -1;
1291
1292 av7110->registered = 1;
1293
1294 dvbdemux->priv = (void *) av7110;
1295
1296 for (i = 0; i < 32; i++)
1297 av7110->handle2filter[i] = NULL;
1298
9e615eac
OE		 1299 dvbdemux->filternum = (av7110->full_ts) ? 256 : 32;
1300 dvbdemux->feednum = (av7110->full_ts) ? 256 : 32;
1da177e4
LT		 1301 dvbdemux->start_feed = av7110_start_feed;
1302 dvbdemux->stop_feed = av7110_stop_feed;
1303 dvbdemux->write_to_decoder = av7110_write_to_decoder;
1304 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1305 DMX_MEMORY_BASED_FILTERING);
1306
1307 dvb_dmx_init(&av7110->demux);
1308 av7110->demux.dmx.get_stc = dvb_get_stc;
1309
9e615eac 1310 av7110->dmxdev.filternum = (av7110->full_ts) ? 256 : 32;
1da177e4
LT		 1311 av7110->dmxdev.demux = &dvbdemux->dmx;
1312 av7110->dmxdev.capabilities = 0;
1313
fdc53a6d 1314 dvb_dmxdev_init(&av7110->dmxdev, &av7110->dvb_adapter);
1da177e4
LT		 1315
1316 av7110->hw_frontend.source = DMX_FRONTEND_0;
1317
1318 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1319
1320 if (ret < 0)
1321 return ret;
1322
1323 av7110->mem_frontend.source = DMX_MEMORY_FE;
1324
1325 ret = dvbdemux->dmx.add_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1326
1327 if (ret < 0)
1328 return ret;
1329
1330 ret = dvbdemux->dmx.connect_frontend(&dvbdemux->dmx,
1331 &av7110->hw_frontend);
1332 if (ret < 0)
1333 return ret;
1334
1335 av7110_av_register(av7110);
1336 av7110_ca_register(av7110);
1337
1338#ifdef CONFIG_DVB_AV7110_OSD
fdc53a6d 1339 dvb_register_device(&av7110->dvb_adapter, &av7110->osd_dev,
df2f94e5 1340 &dvbdev_osd, av7110, DVB_DEVICE_OSD, 0);
1da177e4
LT		 1341#endif
1342
fdc53a6d 1343 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net, &dvbdemux->dmx);
1da177e4
LT		 1344
1345 if (budgetpatch) {
1346 /* initialize software demux1 without its own frontend
1347 * demux1 hardware is connected to frontend0 of demux0
1348 */
1349 dvbdemux1->priv = (void *) av7110;
1350
1351 dvbdemux1->filternum = 256;
1352 dvbdemux1->feednum = 256;
1353 dvbdemux1->start_feed = budget_start_feed;
1354 dvbdemux1->stop_feed = budget_stop_feed;
1355 dvbdemux1->write_to_decoder = NULL;
1356
1357 dvbdemux1->dmx.capabilities = (DMX_TS_FILTERING | DMX_SECTION_FILTERING |
1358 DMX_MEMORY_BASED_FILTERING);
1359
1360 dvb_dmx_init(&av7110->demux1);
1361
1362 av7110->dmxdev1.filternum = 256;
1363 av7110->dmxdev1.demux = &dvbdemux1->dmx;
1364 av7110->dmxdev1.capabilities = 0;
1365
fdc53a6d 1366 dvb_dmxdev_init(&av7110->dmxdev1, &av7110->dvb_adapter);
1da177e4 1367
fdc53a6d 1368 dvb_net_init(&av7110->dvb_adapter, &av7110->dvb_net1, &dvbdemux1->dmx);
1da177e4
LT		 1369 printk("dvb-ttpci: additional demux1 for budget-patch registered\n");
1370 }
1371 return 0;
1372}
1373
1374
1375static void dvb_unregister(struct av7110 *av7110)
1376{
1377 struct dvb_demux *dvbdemux = &av7110->demux;
1378 struct dvb_demux *dvbdemux1 = &av7110->demux1;
1379
1380 dprintk(4, "%p\n", av7110);
1381
1382 if (!av7110->registered)
1383 return;
1384
1385 if (budgetpatch) {
1386 dvb_net_release(&av7110->dvb_net1);
1387 dvbdemux->dmx.close(&dvbdemux1->dmx);
1388 dvb_dmxdev_release(&av7110->dmxdev1);
1389 dvb_dmx_release(&av7110->demux1);
1390 }
1391
1392 dvb_net_release(&av7110->dvb_net);
1393
1394 dvbdemux->dmx.close(&dvbdemux->dmx);
1395 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->hw_frontend);
1396 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx, &av7110->mem_frontend);
1397
1398 dvb_dmxdev_release(&av7110->dmxdev);
1399 dvb_dmx_release(&av7110->demux);
1400
2bfe031d 1401 if (av7110->fe != NULL) {
1da177e4 1402 dvb_unregister_frontend(av7110->fe);
f52a838b 1403 dvb_frontend_detach(av7110->fe);
2bfe031d 1404 }
1da177e4
LT		 1405 dvb_unregister_device(av7110->osd_dev);
1406 av7110_av_unregister(av7110);
1407 av7110_ca_unregister(av7110);
1408}
1409
1410
1411/****************************************************************************
1412 * I2C client commands
1413 ****************************************************************************/
1414
1415int i2c_writereg(struct av7110 *av7110, u8 id, u8 reg, u8 val)
1416{
1417 u8 msg[2] = { reg, val };
1418 struct i2c_msg msgs;
1419
1420 msgs.flags = 0;
1421 msgs.addr = id / 2;
1422 msgs.len = 2;
1423 msgs.buf = msg;
1424 return i2c_transfer(&av7110->i2c_adap, &msgs, 1);
1425}
1426
1da177e4
LT		 1427u8 i2c_readreg(struct av7110 *av7110, u8 id, u8 reg)
1428{
1429 u8 mm1[] = {0x00};
1430 u8 mm2[] = {0x00};
1431 struct i2c_msg msgs[2];
1432
1433 msgs[0].flags = 0;
1434 msgs[1].flags = I2C_M_RD;
1435 msgs[0].addr = msgs[1].addr = id / 2;
1436 mm1[0] = reg;
1437 msgs[0].len = 1; msgs[1].len = 1;
1438 msgs[0].buf = mm1; msgs[1].buf = mm2;
1439 i2c_transfer(&av7110->i2c_adap, msgs, 2);
1440
1441 return mm2[0];
1442}
1da177e4
LT		 1443
1444/****************************************************************************
1445 * INITIALIZATION
1446 ****************************************************************************/
1447
1448
1449static int check_firmware(struct av7110* av7110)
1450{
1451 u32 crc = 0, len = 0;
1452 unsigned char *ptr;
1453
1454 /* check for firmware magic */
1455 ptr = av7110->bin_fw;
1456 if (ptr[0] != 'A' || ptr[1] != 'V' ||
1457 ptr[2] != 'F' || ptr[3] != 'W') {
1458 printk("dvb-ttpci: this is not an av7110 firmware\n");
1459 return -EINVAL;
1460 }
1461 ptr += 4;
1462
1463 /* check dpram file */
3e085629 1464 crc = get_unaligned_be32(ptr);
1da177e4 1465 ptr += 4;
3e085629 1466 len = get_unaligned_be32(ptr);
1da177e4
LT		 1467 ptr += 4;
1468 if (len >= 512) {
be787ace 1469 printk("dvb-ttpci: dpram file is way too big.\n");
1da177e4
LT		 1470 return -EINVAL;
1471 }
1472 if (crc != crc32_le(0, ptr, len)) {
1473 printk("dvb-ttpci: crc32 of dpram file does not match.\n");
1474 return -EINVAL;
1475 }
1476 av7110->bin_dpram = ptr;
1477 av7110->size_dpram = len;
1478 ptr += len;
1479
1480 /* check root file */
3e085629 1481 crc = get_unaligned_be32(ptr);
1da177e4 1482 ptr += 4;
3e085629 1483 len = get_unaligned_be32(ptr);
1da177e4
LT		 1484 ptr += 4;
1485
1486 if (len <= 200000 || len >= 300000 ||
1487 len > ((av7110->bin_fw + av7110->size_fw) - ptr)) {
1488 printk("dvb-ttpci: root file has strange size (%d). aborting.\n", len);
1489 return -EINVAL;
1490 }
1491 if( crc != crc32_le(0, ptr, len)) {
1492 printk("dvb-ttpci: crc32 of root file does not match.\n");
1493 return -EINVAL;
1494 }
1495 av7110->bin_root = ptr;
1496 av7110->size_root = len;
1497 return 0;
1498}
1499
1da177e4
LT		 1500static void put_firmware(struct av7110* av7110)
1501{
1502 vfree(av7110->bin_fw);
1503}
1504
1505static int get_firmware(struct av7110* av7110)
1506{
1507 int ret;
1508 const struct firmware *fw;
1509
1510 /* request the av7110 firmware, this will block until someone uploads it */
1511 ret = request_firmware(&fw, "dvb-ttpci-01.fw", &av7110->dev->pci->dev);
1512 if (ret) {
1513 if (ret == -ENOENT) {
008e6ff9
MCC		 1514 printk(KERN_ERR "dvb-ttpci: could not load firmware, file not found: dvb-ttpci-01.fw\n");
1515 printk(KERN_ERR "dvb-ttpci: usually this should be in /usr/lib/hotplug/firmware or /lib/firmware\n");
1516 printk(KERN_ERR "dvb-ttpci: and can be downloaded from https://linuxtv.org/download/dvb/firmware/\n");
1da177e4 1517 } else
008e6ff9
MCC		 1518 printk(KERN_ERR "dvb-ttpci: cannot request firmware (error %i)\n",
1519 ret);
1da177e4
LT		 1520 return -EINVAL;
1521 }
1522
1523 if (fw->size <= 200000) {
1524 printk("dvb-ttpci: this firmware is way too small.\n");
1525 release_firmware(fw);
1526 return -EINVAL;
1527 }
1528
1529 /* check if the firmware is available */
d9bf2c03 1530 av7110->bin_fw = vmalloc(fw->size);
1da177e4
LT		 1531 if (NULL == av7110->bin_fw) {
1532 dprintk(1, "out of memory\n");
1533 release_firmware(fw);
1534 return -ENOMEM;
1535 }
1536
1537 memcpy(av7110->bin_fw, fw->data, fw->size);
1538 av7110->size_fw = fw->size;
1539 if ((ret = check_firmware(av7110)))
1540 vfree(av7110->bin_fw);
1541
1542 release_firmware(fw);
1543 return ret;
1544}
1da177e4 1545
14d24d14 1546static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1547{
e439aedf 1548 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
d9bdf772 1549 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1550 u8 pwr = 0;
1551 u8 buf[4];
1552 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) };
e439aedf 1553 u32 div = (p->frequency + 479500) / 125;
1da177e4 1554
e439aedf
MCC		 1555 if (p->frequency > 2000000)
1556 pwr = 3;
1557 else if (p->frequency > 1800000)
1558 pwr = 2;
1559 else if (p->frequency > 1600000)
1560 pwr = 1;
1561 else if (p->frequency > 1200000)
1562 pwr = 0;
1563 else if (p->frequency >= 1100000)
1564 pwr = 1;
1565 else
1566 pwr = 2;
1da177e4
LT		 1567
1568 buf[0] = (div >> 8) & 0x7f;
1569 buf[1] = div & 0xff;
1570 buf[2] = ((div & 0x18000) >> 10) | 0x95;
1571 buf[3] = (pwr << 6) | 0x30;
1572
9101e622 1573 // NOTE: since we're using a prescaler of 2, we set the
1da177e4
LT		 1574 // divisor frequency to 62.5kHz and divide by 125 above
1575
dea74869
PB		 1576 if (fe->ops.i2c_gate_ctrl)
1577 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1578 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1)
1579 return -EIO;
1580 return 0;
1581}
1582
1583static struct ves1x93_config alps_bsrv2_config = {
1584 .demod_address = 0x08,
1585 .xin = 90100000UL,
1586 .invert_pwm = 0,
1da177e4
LT		 1587};
1588
14d24d14 1589static int alps_tdbe2_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1590{
e439aedf 1591 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT		 1592 struct av7110* av7110 = fe->dvb->priv;
1593 u32 div;
1594 u8 data[4];
1595 struct i2c_msg msg = { .addr = 0x62, .flags = 0, .buf = data, .len = sizeof(data) };
1596
e439aedf 1597 div = (p->frequency + 35937500 + 31250) / 62500;
1da177e4
LT		 1598
1599 data[0] = (div >> 8) & 0x7f;
1600 data[1] = div & 0xff;
1601 data[2] = 0x85 | ((div >> 10) & 0x60);
e439aedf 1602 data[3] = (p->frequency < 174000000 ? 0x88 : p->frequency < 470000000 ? 0x84 : 0x81);
1da177e4 1603
dea74869
PB		 1604 if (fe->ops.i2c_gate_ctrl)
1605 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1606 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1607 return -EIO;
1608 return 0;
1609}
1610
1611static struct ves1820_config alps_tdbe2_config = {
1612 .demod_address = 0x09,
1613 .xin = 57840000UL,
1614 .invert = 1,
1615 .selagc = VES1820_SELAGC_SIGNAMPERR,
1da177e4
LT		 1616};
1617
1618
1619
1620
14d24d14 1621static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1622{
e439aedf 1623 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT		 1624 struct av7110* av7110 = fe->dvb->priv;
1625 u32 div;
1626 u8 data[4];
1627 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1628
e439aedf 1629 div = p->frequency / 125;
1da177e4
LT		 1630 data[0] = (div >> 8) & 0x7f;
1631 data[1] = div & 0xff;
1632 data[2] = 0x8e;
1633 data[3] = 0x00;
1634
dea74869
PB		 1635 if (fe->ops.i2c_gate_ctrl)
1636 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1637 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1638 return -EIO;
1639 return 0;
1640}
1641
1642static struct tda8083_config grundig_29504_451_config = {
1643 .demod_address = 0x68,
1da177e4
LT		 1644};
1645
1646
1647
14d24d14 1648static int philips_cd1516_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1649{
e439aedf 1650 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
9101e622 1651 struct av7110* av7110 = fe->dvb->priv;
1da177e4 1652 u32 div;
e439aedf 1653 u32 f = p->frequency;
1da177e4
LT		 1654 u8 data[4];
1655 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1656
1657 div = (f + 36125000 + 31250) / 62500;
1658
1659 data[0] = (div >> 8) & 0x7f;
1660 data[1] = div & 0xff;
1661 data[2] = 0x8e;
1662 data[3] = (f < 174000000 ? 0xa1 : f < 470000000 ? 0x92 : 0x34);
1663
dea74869
PB		 1664 if (fe->ops.i2c_gate_ctrl)
1665 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1666 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1667 return -EIO;
1668 return 0;
1669}
1670
1671static struct ves1820_config philips_cd1516_config = {
1672 .demod_address = 0x09,
1673 .xin = 57840000UL,
1674 .invert = 1,
1675 .selagc = VES1820_SELAGC_SIGNAMPERR,
1da177e4
LT		 1676};
1677
1678
1679
14d24d14 1680static int alps_tdlb7_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1681{
e439aedf 1682 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT		 1683 struct av7110* av7110 = fe->dvb->priv;
1684 u32 div, pwr;
1685 u8 data[4];
1686 struct i2c_msg msg = { .addr = 0x60, .flags = 0, .buf = data, .len = sizeof(data) };
1687
e439aedf 1688 div = (p->frequency + 36200000) / 166666;
1da177e4 1689
e439aedf 1690 if (p->frequency <= 782000000)
1da177e4
LT		 1691 pwr = 1;
1692 else
1693 pwr = 2;
1694
1695 data[0] = (div >> 8) & 0x7f;
1696 data[1] = div & 0xff;
1697 data[2] = 0x85;
1698 data[3] = pwr << 6;
1699
dea74869
PB		 1700 if (fe->ops.i2c_gate_ctrl)
1701 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1702 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1)
1703 return -EIO;
1704 return 0;
1705}
1706
1707static int alps_tdlb7_request_firmware(struct dvb_frontend* fe, const struct firmware **fw, char* name)
1708{
b168e810 1709#if IS_ENABLED(CONFIG_DVB_SP8870)
d9bdf772 1710 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1711
1712 return request_firmware(fw, name, &av7110->dev->pci->dev);
d98821e2
OE		 1713#else
1714 return -EINVAL;
1715#endif
1da177e4
LT		 1716}
1717
3defe84a 1718static const struct sp8870_config alps_tdlb7_config = {
1da177e4
LT		 1719
1720 .demod_address = 0x71,
1da177e4
LT		 1721 .request_firmware = alps_tdlb7_request_firmware,
1722};
1723
1724
dc27a169
AQ		 1725static u8 nexusca_stv0297_inittab[] = {
1726 0x80, 0x01,
1727 0x80, 0x00,
1728 0x81, 0x01,
1729 0x81, 0x00,
1730 0x00, 0x09,
1731 0x01, 0x69,
1732 0x03, 0x00,
1733 0x04, 0x00,
1734 0x07, 0x00,
1735 0x08, 0x00,
1736 0x20, 0x00,
1737 0x21, 0x40,
1738 0x22, 0x00,
1739 0x23, 0x00,
1740 0x24, 0x40,
1741 0x25, 0x88,
1742 0x30, 0xff,
1743 0x31, 0x00,
1744 0x32, 0xff,
1745 0x33, 0x00,
1746 0x34, 0x50,
1747 0x35, 0x7f,
1748 0x36, 0x00,
1749 0x37, 0x20,
1750 0x38, 0x00,
1751 0x40, 0x1c,
1752 0x41, 0xff,
1753 0x42, 0x29,
1754 0x43, 0x00,
1755 0x44, 0xff,
1756 0x45, 0x00,
1757 0x46, 0x00,
1758 0x49, 0x04,
1759 0x4a, 0x00,
1760 0x4b, 0x7b,
1761 0x52, 0x30,
1762 0x55, 0xae,
1763 0x56, 0x47,
1764 0x57, 0xe1,
1765 0x58, 0x3a,
1766 0x5a, 0x1e,
1767 0x5b, 0x34,
1768 0x60, 0x00,
1769 0x63, 0x00,
1770 0x64, 0x00,
1771 0x65, 0x00,
1772 0x66, 0x00,
1773 0x67, 0x00,
1774 0x68, 0x00,
1775 0x69, 0x00,
1776 0x6a, 0x02,
1777 0x6b, 0x00,
1778 0x70, 0xff,
1779 0x71, 0x00,
1780 0x72, 0x00,
1781 0x73, 0x00,
1782 0x74, 0x0c,
1783 0x80, 0x00,
1784 0x81, 0x00,
1785 0x82, 0x00,
1786 0x83, 0x00,
1787 0x84, 0x04,
1788 0x85, 0x80,
1789 0x86, 0x24,
1790 0x87, 0x78,
1791 0x88, 0x10,
1792 0x89, 0x00,
1793 0x90, 0x01,
1794 0x91, 0x01,
1795 0xa0, 0x04,
1796 0xa1, 0x00,
1797 0xa2, 0x00,
1798 0xb0, 0x91,
1799 0xb1, 0x0b,
1800 0xc0, 0x53,
1801 0xc1, 0x70,
1802 0xc2, 0x12,
1803 0xd0, 0x00,
1804 0xd1, 0x00,
1805 0xd2, 0x00,
1806 0xd3, 0x00,
1807 0xd4, 0x00,
1808 0xd5, 0x00,
1809 0xde, 0x00,
1810 0xdf, 0x00,
1811 0x61, 0x49,
1812 0x62, 0x0b,
1813 0x53, 0x08,
1814 0x59, 0x08,
1815 0xff, 0xff,
1816};
1da177e4 1817
14d24d14 1818static int nexusca_stv0297_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1819{
e439aedf 1820 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
1da177e4
LT		 1821 struct av7110* av7110 = fe->dvb->priv;
1822 u32 div;
1823 u8 data[4];
1824 struct i2c_msg msg = { .addr = 0x63, .flags = 0, .buf = data, .len = sizeof(data) };
1825 struct i2c_msg readmsg = { .addr = 0x63, .flags = I2C_M_RD, .buf = data, .len = 1 };
1826 int i;
1827
e439aedf 1828 div = (p->frequency + 36150000 + 31250) / 62500;
1da177e4
LT		 1829
1830 data[0] = (div >> 8) & 0x7f;
1831 data[1] = div & 0xff;
1832 data[2] = 0xce;
1833
e439aedf 1834 if (p->frequency < 45000000)
1da177e4 1835 return -EINVAL;
e439aedf 1836 else if (p->frequency < 137000000)
1da177e4 1837 data[3] = 0x01;
e439aedf 1838 else if (p->frequency < 403000000)
1da177e4 1839 data[3] = 0x02;
e439aedf 1840 else if (p->frequency < 860000000)
1da177e4
LT		 1841 data[3] = 0x04;
1842 else
1843 return -EINVAL;
1844
dea74869
PB		 1845 if (fe->ops.i2c_gate_ctrl)
1846 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1847 if (i2c_transfer(&av7110->i2c_adap, &msg, 1) != 1) {
1848 printk("nexusca: pll transfer failed!\n");
1849 return -EIO;
1850 }
1851
1852 // wait for PLL lock
1853 for(i = 0; i < 20; i++) {
dea74869
PB		 1854 if (fe->ops.i2c_gate_ctrl)
1855 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1856 if (i2c_transfer(&av7110->i2c_adap, &readmsg, 1) == 1)
1857 if (data[0] & 0x40) break;
1858 msleep(10);
1859 }
1860
1861 return 0;
1862}
1863
1864static struct stv0297_config nexusca_stv0297_config = {
1865
1866 .demod_address = 0x1C,
dc27a169 1867 .inittab = nexusca_stv0297_inittab,
1da177e4 1868 .invert = 1,
b8d4c235 1869 .stop_during_read = 1,
1da177e4
LT		 1870};
1871
1872
1873
14d24d14 1874static int grundig_29504_401_tuner_set_params(struct dvb_frontend *fe)
1da177e4 1875{
e439aedf 1876 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
d9bdf772 1877 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1878 u32 div;
1879 u8 cfg, cpump, band_select;
1880 u8 data[4];
1881 struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) };
1882
e439aedf 1883 div = (36125000 + p->frequency) / 166666;
1da177e4
LT		 1884
1885 cfg = 0x88;
1886
e439aedf
MCC		 1887 if (p->frequency < 175000000)
1888 cpump = 2;
1889 else if (p->frequency < 390000000)
1890 cpump = 1;
1891 else if (p->frequency < 470000000)
1892 cpump = 2;
1893 else if (p->frequency < 750000000)
1894 cpump = 1;
1895 else
1896 cpump = 3;
1da177e4 1897
e439aedf
MCC		 1898 if (p->frequency < 175000000)
1899 band_select = 0x0e;
1900 else if (p->frequency < 470000000)
1901 band_select = 0x05;
1902 else
1903 band_select = 0x03;
1da177e4
LT		 1904
1905 data[0] = (div >> 8) & 0x7f;
1906 data[1] = div & 0xff;
1907 data[2] = ((div >> 10) & 0x60) | cfg;
1908 data[3] = (cpump << 6) | band_select;
1909
dea74869
PB		 1910 if (fe->ops.i2c_gate_ctrl)
1911 fe->ops.i2c_gate_ctrl(fe, 1);
1da177e4
LT		 1912 if (i2c_transfer (&av7110->i2c_adap, &msg, 1) != 1) return -EIO;
1913 return 0;
1914}
1915
1916static struct l64781_config grundig_29504_401_config = {
1917 .demod_address = 0x55,
1da177e4
LT		 1918};
1919
1920
1921
0df289a2 1922static int av7110_fe_lock_fix(struct av7110 *av7110, enum fe_status status)
1da177e4 1923{
ce18a223 1924 int ret = 0;
1da177e4
LT		 1925 int synced = (status & FE_HAS_LOCK) ? 1 : 0;
1926
1927 av7110->fe_status = status;
1928
1929 if (av7110->fe_synced == synced)
ce18a223 1930 return 0;
1da177e4 1931
14500d4a
OE		 1932 if (av7110->playing) {
1933 av7110->fe_synced = synced;
ce18a223 1934 return 0;
14500d4a 1935 }
1da177e4 1936
3593cab5 1937 if (mutex_lock_interruptible(&av7110->pid_mutex))
ce18a223 1938 return -ERESTARTSYS;
1da177e4 1939
34612157 1940 if (synced) {
ce18a223 1941 ret = SetPIDs(av7110, av7110->pids[DMX_PES_VIDEO],
1da177e4
LT		 1942 av7110->pids[DMX_PES_AUDIO],
1943 av7110->pids[DMX_PES_TELETEXT], 0,
1944 av7110->pids[DMX_PES_PCR]);
ce18a223
WR		 1945 if (!ret)
1946 ret = av7110_fw_cmd(av7110, COMTYPE_PIDFILTER, Scan, 0);
1da177e4 1947 } else {
ce18a223
WR		 1948 ret = SetPIDs(av7110, 0, 0, 0, 0, 0);
1949 if (!ret) {
1950 ret = av7110_fw_cmd(av7110, COMTYPE_PID_FILTER, FlushTSQueue, 0);
1951 if (!ret)
1952 ret = av7110_wait_msgstate(av7110, GPMQBusy);
1953 }
1da177e4
LT		 1954 }
1955
34612157
OE		 1956 if (!ret)
1957 av7110->fe_synced = synced;
1958
3593cab5 1959 mutex_unlock(&av7110->pid_mutex);
ce18a223 1960 return ret;
1da177e4
LT		 1961}
1962
b5c7cfd1 1963static int av7110_fe_set_frontend(struct dvb_frontend *fe)
1da177e4
LT		 1964{
1965 struct av7110* av7110 = fe->dvb->priv;
ce18a223
WR		 1966
1967 int ret = av7110_fe_lock_fix(av7110, 0);
b5c7cfd1
MCC		 1968 if (!ret)
1969 ret = av7110->fe_set_frontend(fe);
1970
ce18a223 1971 return ret;
1da177e4
LT		 1972}
1973
1974static int av7110_fe_init(struct dvb_frontend* fe)
1975{
1976 struct av7110* av7110 = fe->dvb->priv;
1977
ce18a223
WR		 1978 int ret = av7110_fe_lock_fix(av7110, 0);
1979 if (!ret)
1980 ret = av7110->fe_init(fe);
1981 return ret;
1da177e4
LT		 1982}
1983
0df289a2
MCC		 1984static int av7110_fe_read_status(struct dvb_frontend *fe,
1985 enum fe_status *status)
1da177e4
LT		 1986{
1987 struct av7110* av7110 = fe->dvb->priv;
1da177e4
LT		 1988
1989 /* call the real implementation */
ce18a223
WR		 1990 int ret = av7110->fe_read_status(fe, status);
1991 if (!ret)
1992 if (((*status ^ av7110->fe_status) & FE_HAS_LOCK) && (*status & FE_HAS_LOCK))
1993 ret = av7110_fe_lock_fix(av7110, *status);
1994 return ret;
1da177e4
LT		 1995}
1996
1997static int av7110_fe_diseqc_reset_overload(struct dvb_frontend* fe)
1998{
1999 struct av7110* av7110 = fe->dvb->priv;
2000
ce18a223
WR		 2001 int ret = av7110_fe_lock_fix(av7110, 0);
2002 if (!ret)
2003 ret = av7110->fe_diseqc_reset_overload(fe);
2004 return ret;
1da177e4
LT		 2005}
2006
2007static int av7110_fe_diseqc_send_master_cmd(struct dvb_frontend* fe,
2008 struct dvb_diseqc_master_cmd* cmd)
2009{
2010 struct av7110* av7110 = fe->dvb->priv;
2011
ce18a223 2012 int ret = av7110_fe_lock_fix(av7110, 0);
66190a27
OE		 2013 if (!ret) {
2014 av7110->saved_master_cmd = *cmd;
ce18a223 2015 ret = av7110->fe_diseqc_send_master_cmd(fe, cmd);
66190a27 2016 }
ce18a223 2017 return ret;
1da177e4
LT		 2018}
2019
0df289a2
MCC		 2020static int av7110_fe_diseqc_send_burst(struct dvb_frontend *fe,
2021 enum fe_sec_mini_cmd minicmd)
1da177e4
LT		 2022{
2023 struct av7110* av7110 = fe->dvb->priv;
2024
ce18a223 2025 int ret = av7110_fe_lock_fix(av7110, 0);
66190a27
OE		 2026 if (!ret) {
2027 av7110->saved_minicmd = minicmd;
ce18a223 2028 ret = av7110->fe_diseqc_send_burst(fe, minicmd);
66190a27 2029 }
ce18a223 2030 return ret;
1da177e4
LT		 2031}
2032
0df289a2
MCC		 2033static int av7110_fe_set_tone(struct dvb_frontend *fe,
2034 enum fe_sec_tone_mode tone)
1da177e4
LT		 2035{
2036 struct av7110* av7110 = fe->dvb->priv;
2037
ce18a223 2038 int ret = av7110_fe_lock_fix(av7110, 0);
66190a27
OE		 2039 if (!ret) {
2040 av7110->saved_tone = tone;
ce18a223 2041 ret = av7110->fe_set_tone(fe, tone);
66190a27 2042 }
ce18a223 2043 return ret;
1da177e4
LT		 2044}
2045
0df289a2
MCC		 2046static int av7110_fe_set_voltage(struct dvb_frontend *fe,
2047 enum fe_sec_voltage voltage)
1da177e4
LT		 2048{
2049 struct av7110* av7110 = fe->dvb->priv;
2050
ce18a223 2051 int ret = av7110_fe_lock_fix(av7110, 0);
66190a27
OE		 2052 if (!ret) {
2053 av7110->saved_voltage = voltage;
ce18a223 2054 ret = av7110->fe_set_voltage(fe, voltage);
66190a27 2055 }
ce18a223 2056 return ret;
1da177e4
LT		 2057}
2058
400b7083 2059static int av7110_fe_dishnetwork_send_legacy_command(struct dvb_frontend* fe, unsigned long cmd)
1da177e4
LT		 2060{
2061 struct av7110* av7110 = fe->dvb->priv;
2062
ce18a223
WR		 2063 int ret = av7110_fe_lock_fix(av7110, 0);
2064 if (!ret)
2065 ret = av7110->fe_dishnetwork_send_legacy_command(fe, cmd);
2066 return ret;
1da177e4
LT		 2067}
2068
66190a27
OE		 2069static void dvb_s_recover(struct av7110* av7110)
2070{
2071 av7110_fe_init(av7110->fe);
2072
2073 av7110_fe_set_voltage(av7110->fe, av7110->saved_voltage);
2074 if (av7110->saved_master_cmd.msg_len) {
2075 msleep(20);
2076 av7110_fe_diseqc_send_master_cmd(av7110->fe, &av7110->saved_master_cmd);
2077 }
2078 msleep(20);
2079 av7110_fe_diseqc_send_burst(av7110->fe, av7110->saved_minicmd);
2080 msleep(20);
2081 av7110_fe_set_tone(av7110->fe, av7110->saved_tone);
2082
b5c7cfd1 2083 av7110_fe_set_frontend(av7110->fe);
66190a27
OE		 2084}
2085
1da177e4
LT		 2086static u8 read_pwm(struct av7110* av7110)
2087{
2088 u8 b = 0xff;
2089 u8 pwm;
2090 struct i2c_msg msg[] = { { .addr = 0x50,.flags = 0,.buf = &b,.len = 1 },
2091 { .addr = 0x50,.flags = I2C_M_RD,.buf = &pwm,.len = 1} };
2092
9101e622 2093 if ((i2c_transfer(&av7110->i2c_adap, msg, 2) != 2) || (pwm == 0xff))
1da177e4
LT		 2094 pwm = 0x48;
2095
2096 return pwm;
2097}
2098
2099static int frontend_init(struct av7110 *av7110)
2100{
2101 int ret;
2102
2103 if (av7110->dev->pci->subsystem_vendor == 0x110a) {
2104 switch(av7110->dev->pci->subsystem_device) {
2105 case 0x0000: // Fujitsu/Siemens DVB-Cable (ves1820/Philips CD1516(??))
2bfe031d 2106 av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config,
1da177e4 2107 &av7110->i2c_adap, read_pwm(av7110));
6b3ccab7 2108 if (av7110->fe) {
dea74869 2109 av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
6b3ccab7 2110 }
1da177e4
LT		 2111 break;
2112 }
2113
2114 } else if (av7110->dev->pci->subsystem_vendor == 0x13c2) {
2115 switch(av7110->dev->pci->subsystem_device) {
2116 case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X
2117 case 0x0003: // Hauppauge/TT WinTV Nexus-S Rev 2.X
2118 case 0x1002: // Hauppauge/TT WinTV DVB-S rev1.3SE
2119
2120 // try the ALPS BSRV2 first of all
2bfe031d 2121 av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
1da177e4 2122 if (av7110->fe) {
dea74869
PB		 2123 av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
2124 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2125 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2126 av7110->fe->ops.set_tone = av7110_set_tone;
66190a27 2127 av7110->recover = dvb_s_recover;
1da177e4
LT		 2128 break;
2129 }
2130
2131 // try the ALPS BSRU6 now
2bfe031d 2132 av7110->fe = dvb_attach(stv0299_attach, &alps_bsru6_config, &av7110->i2c_adap);
1da177e4 2133 if (av7110->fe) {
dea74869 2134 av7110->fe->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params;
fa006d86
AQ		 2135 av7110->fe->tuner_priv = &av7110->i2c_adap;
2136
dea74869
PB		 2137 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2138 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2139 av7110->fe->ops.set_tone = av7110_set_tone;
66190a27 2140 av7110->recover = dvb_s_recover;
1da177e4
LT		 2141 break;
2142 }
2143
2144 // Try the grundig 29504-451
2bfe031d 2145 av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
1da177e4 2146 if (av7110->fe) {
dea74869
PB		 2147 av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
2148 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2149 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2150 av7110->fe->ops.set_tone = av7110_set_tone;
66190a27 2151 av7110->recover = dvb_s_recover;
1da177e4
LT		 2152 break;
2153 }
2154
2155 /* Try DVB-C cards */
2156 switch(av7110->dev->pci->subsystem_device) {
2157 case 0x0000:
2158 /* Siemens DVB-C (full-length card) VES1820/Philips CD1516 */
2bfe031d 2159 av7110->fe = dvb_attach(ves1820_attach, &philips_cd1516_config, &av7110->i2c_adap,
1da177e4 2160 read_pwm(av7110));
6b3ccab7 2161 if (av7110->fe) {
dea74869 2162 av7110->fe->ops.tuner_ops.set_params = philips_cd1516_tuner_set_params;
6b3ccab7 2163 }
1da177e4
LT		 2164 break;
2165 case 0x0003:
f3688fc8 2166 /* Hauppauge DVB-C 2.1 VES1820/ALPS TDBE2 */
2bfe031d 2167 av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap,
1da177e4 2168 read_pwm(av7110));
6b3ccab7 2169 if (av7110->fe) {
dea74869 2170 av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
6b3ccab7 2171 }
1da177e4
LT		 2172 break;
2173 }
2174 break;
2175
2176 case 0x0001: // Hauppauge/TT Nexus-T premium rev1.X
d4c71d7a
MCC		 2177 {
2178 struct dvb_frontend *fe;
2179
8d90ee5e 2180 // try ALPS TDLB7 first, then Grundig 29504-401
d4c71d7a
MCC		 2181 fe = dvb_attach(sp8870_attach, &alps_tdlb7_config, &av7110->i2c_adap);
2182 if (fe) {
2183 fe->ops.tuner_ops.set_params = alps_tdlb7_tuner_set_params;
2184 av7110->fe = fe;
8d90ee5e 2185 break;
6b3ccab7 2186 }
d4c71d7a
MCC		 2187 }
2188 /* fall-thru */
8d90ee5e
OE		 2189
2190 case 0x0008: // Hauppauge/TT DVB-T
2191 // Grundig 29504-401
2192 av7110->fe = dvb_attach(l64781_attach, &grundig_29504_401_config, &av7110->i2c_adap);
2193 if (av7110->fe)
2194 av7110->fe->ops.tuner_ops.set_params = grundig_29504_401_tuner_set_params;
1da177e4
LT		 2195 break;
2196
2197 case 0x0002: // Hauppauge/TT DVB-C premium rev2.X
2198
2bfe031d 2199 av7110->fe = dvb_attach(ves1820_attach, &alps_tdbe2_config, &av7110->i2c_adap, read_pwm(av7110));
6b3ccab7 2200 if (av7110->fe) {
dea74869 2201 av7110->fe->ops.tuner_ops.set_params = alps_tdbe2_tuner_set_params;
6b3ccab7 2202 }
1da177e4
LT		 2203 break;
2204
8bd6301c
OE		 2205 case 0x0004: // Galaxis DVB-S rev1.3
2206 /* ALPS BSRV2 */
2bfe031d 2207 av7110->fe = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &av7110->i2c_adap);
8bd6301c 2208 if (av7110->fe) {
dea74869
PB		 2209 av7110->fe->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params;
2210 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2211 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2212 av7110->fe->ops.set_tone = av7110_set_tone;
8bd6301c
OE		 2213 av7110->recover = dvb_s_recover;
2214 }
2215 break;
2216
1da177e4
LT		 2217 case 0x0006: /* Fujitsu-Siemens DVB-S rev 1.6 */
2218 /* Grundig 29504-451 */
2bfe031d 2219 av7110->fe = dvb_attach(tda8083_attach, &grundig_29504_451_config, &av7110->i2c_adap);
1da177e4 2220 if (av7110->fe) {
dea74869
PB		 2221 av7110->fe->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params;
2222 av7110->fe->ops.diseqc_send_master_cmd = av7110_diseqc_send_master_cmd;
2223 av7110->fe->ops.diseqc_send_burst = av7110_diseqc_send_burst;
2224 av7110->fe->ops.set_tone = av7110_set_tone;
66190a27 2225 av7110->recover = dvb_s_recover;
1da177e4
LT		 2226 }
2227 break;
2228
1da177e4
LT		 2229 case 0x000A: // Hauppauge/TT Nexus-CA rev1.X
2230
2bfe031d 2231 av7110->fe = dvb_attach(stv0297_attach, &nexusca_stv0297_config, &av7110->i2c_adap);
1da177e4 2232 if (av7110->fe) {
dea74869 2233 av7110->fe->ops.tuner_ops.set_params = nexusca_stv0297_tuner_set_params;
fa006d86 2234
1da177e4 2235 /* set TDA9819 into DVB mode */
6a857747
MS		 2236 saa7146_setgpio(av7110->dev, 1, SAA7146_GPIO_OUTLO); // TDA9819 pin9(STD)
2237 saa7146_setgpio(av7110->dev, 3, SAA7146_GPIO_OUTLO); // TDA9819 pin30(VIF)
1da177e4
LT		 2238
2239 /* tuner on this needs a slower i2c bus speed */
2240 av7110->dev->i2c_bitrate = SAA7146_I2C_BUS_BIT_RATE_240;
2241 break;
2242 }
3dfaebda
JS		 2243 break;
2244
2245 case 0x000E: /* Hauppauge/TT Nexus-S rev 2.3 */
2246 /* ALPS BSBE1 */
2bfe031d 2247 av7110->fe = dvb_attach(stv0299_attach, &alps_bsbe1_config, &av7110->i2c_adap);
eb3daf3c 2248 if (av7110->fe) {
dea74869 2249 av7110->fe->ops.tuner_ops.set_params = alps_bsbe1_tuner_set_params;
fa006d86
AQ		 2250 av7110->fe->tuner_priv = &av7110->i2c_adap;
2251
2bfe031d 2252 if (dvb_attach(lnbp21_attach, av7110->fe, &av7110->i2c_adap, 0, 0) == NULL) {
db5d91eb 2253 printk("dvb-ttpci: LNBP21 not found!\n");
dea74869
PB		 2254 if (av7110->fe->ops.release)
2255 av7110->fe->ops.release(av7110->fe);
db5d91eb
OE		 2256 av7110->fe = NULL;
2257 } else {
dea74869 2258 av7110->fe->ops.dishnetwork_send_legacy_command = NULL;
db5d91eb
OE		 2259 av7110->recover = dvb_s_recover;
2260 }
eb3daf3c 2261 }
3dfaebda 2262 break;
1da177e4
LT		 2263 }
2264 }
2265
2266 if (!av7110->fe) {
2267 /* FIXME: propagate the failure code from the lower layers */
2268 ret = -ENOMEM;
29e66a6c 2269 printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n",
1da177e4
LT		 2270 av7110->dev->pci->vendor,
2271 av7110->dev->pci->device,
2272 av7110->dev->pci->subsystem_vendor,
2273 av7110->dev->pci->subsystem_device);
2274 } else {
dea74869
PB		 2275 FE_FUNC_OVERRIDE(av7110->fe->ops.init, av7110->fe_init, av7110_fe_init);
2276 FE_FUNC_OVERRIDE(av7110->fe->ops.read_status, av7110->fe_read_status, av7110_fe_read_status);
2277 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_reset_overload, av7110->fe_diseqc_reset_overload, av7110_fe_diseqc_reset_overload);
2278 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_master_cmd, av7110->fe_diseqc_send_master_cmd, av7110_fe_diseqc_send_master_cmd);
2279 FE_FUNC_OVERRIDE(av7110->fe->ops.diseqc_send_burst, av7110->fe_diseqc_send_burst, av7110_fe_diseqc_send_burst);
2280 FE_FUNC_OVERRIDE(av7110->fe->ops.set_tone, av7110->fe_set_tone, av7110_fe_set_tone);
8f40a9f5 2281 FE_FUNC_OVERRIDE(av7110->fe->ops.set_voltage, av7110->fe_set_voltage, av7110_fe_set_voltage);
dea74869 2282 FE_FUNC_OVERRIDE(av7110->fe->ops.dishnetwork_send_legacy_command, av7110->fe_dishnetwork_send_legacy_command, av7110_fe_dishnetwork_send_legacy_command);
b5c7cfd1 2283 FE_FUNC_OVERRIDE(av7110->fe->ops.set_frontend, av7110->fe_set_frontend, av7110_fe_set_frontend);
1da177e4 2284
fdc53a6d 2285 ret = dvb_register_frontend(&av7110->dvb_adapter, av7110->fe);
1da177e4
LT		 2286 if (ret < 0) {
2287 printk("av7110: Frontend registration failed!\n");
f52a838b 2288 dvb_frontend_detach(av7110->fe);
1da177e4
LT		 2289 av7110->fe = NULL;
2290 }
2291 }
2292 return ret;
2293}
2294
2295/* Budgetpatch note:
2296 * Original hardware design by Roberto Deza:
2297 * There is a DVB_Wiki at
991ce92f 2298 * https://linuxtv.org
1da177e4
LT		 2299 *
2300 * New software triggering design by Emard that works on
2301 * original Roberto Deza's hardware:
2302 *
2303 * rps1 code for budgetpatch will copy internal HS event to GPIO3 pin.
2304 * GPIO3 is in budget-patch hardware connectd to port B VSYNC
2305 * HS is an internal event of 7146, accessible with RPS
2306 * and temporarily raised high every n lines
2307 * (n in defined in the RPS_THRESH1 counter threshold)
2308 * I think HS is raised high on the beginning of the n-th line
2309 * and remains high until this n-th line that triggered
2310 * it is completely received. When the receiption of n-th line
2311 * ends, HS is lowered.
2312 *
2313 * To transmit data over DMA, 7146 needs changing state at
2314 * port B VSYNC pin. Any changing of port B VSYNC will
2315 * cause some DMA data transfer, with more or less packets loss.
2316 * It depends on the phase and frequency of VSYNC and
2317 * the way of 7146 is instructed to trigger on port B (defined
2318 * in DD1_INIT register, 3rd nibble from the right valid
2319 * numbers are 0-7, see datasheet)
2320 *
2321 * The correct triggering can minimize packet loss,
2322 * dvbtraffic should give this stable bandwidths:
2323 * 22k transponder = 33814 kbit/s
2324 * 27.5k transponder = 38045 kbit/s
2325 * by experiment it is found that the best results
2326 * (stable bandwidths and almost no packet loss)
2327 * are obtained using DD1_INIT triggering number 2
2328 * (Va at rising edge of VS Fa = HS x VS-failing forced toggle)
2329 * and a VSYNC phase that occurs in the middle of DMA transfer
2330 * (about byte 188*512=96256 in the DMA window).
2331 *
2332 * Phase of HS is still not clear to me how to control,
2333 * It just happens to be so. It can be seen if one enables
2334 * RPS_IRQ and print Event Counter 1 in vpeirq(). Every
2335 * time RPS_INTERRUPT is called, the Event Counter 1 will
2336 * increment. That's how the 7146 is programmed to do event
2337 * counting in this budget-patch.c
2338 * I *think* HPS setting has something to do with the phase
25985edc 2339 * of HS but I can't be 100% sure in that.
1da177e4
LT		 2340 *
2341 * hardware debug note: a working budget card (including budget patch)
2342 * with vpeirq() interrupt setup in mode "0x90" (every 64K) will
2343 * generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes
2344 * and that means 3*25=75 Hz of interrupt freqency, as seen by
2345 * watch cat /proc/interrupts
2346 *
2347 * If this frequency is 3x lower (and data received in the DMA
2348 * buffer don't start with 0x47, but in the middle of packets,
2349 * whose lengths appear to be like 188 292 188 104 etc.
2350 * this means VSYNC line is not connected in the hardware.
2351 * (check soldering pcb and pins)
2352 * The same behaviour of missing VSYNC can be duplicated on budget
2353 * cards, by seting DD1_INIT trigger mode 7 in 3rd nibble.
2354 */
4c62e976
GKH		 2355static int av7110_attach(struct saa7146_dev* dev,
2356 struct saa7146_pci_extension_data *pci_ext)
1da177e4
LT		 2357{
2358 const int length = TS_WIDTH * TS_HEIGHT;
2359 struct pci_dev *pdev = dev->pci;
2360 struct av7110 *av7110;
8eec1429 2361 struct task_struct *thread;
1da177e4
LT		 2362 int ret, count = 0;
2363
2364 dprintk(4, "dev: %p\n", dev);
2365
9101e622
MCC		 2366 /* Set RPS_IRQ to 1 to track rps1 activity.
2367 * Enabling this won't send any interrupt to PC CPU.
2368 */
1da177e4
LT		 2369#define RPS_IRQ 0
2370
2371 if (budgetpatch == 1) {
2372 budgetpatch = 0;
2373 /* autodetect the presence of budget patch
2374 * this only works if saa7146 has been recently
2375 * reset with with MASK_31 to MC1
2376 *
2377 * will wait for VBI_B event (vertical blank at port B)
2378 * and will reset GPIO3 after VBI_B is detected.
2379 * (GPIO3 should be raised high by CPU to
2380 * test if GPIO3 will generate vertical blank signal
2381 * in budget patch GPIO3 is connected to VSYNC_B
2382 */
2383
2384 /* RESET SAA7146 */
2385 saa7146_write(dev, MC1, MASK_31);
2386 /* autodetection success seems to be time-dependend after reset */
2387
2388 /* Fix VSYNC level */
2389 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2390 /* set vsync_b triggering */
2391 saa7146_write(dev, DD1_STREAM_B, 0);
2392 /* port B VSYNC at rising edge */
2393 saa7146_write(dev, DD1_INIT, 0x00000200);
2394 saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI
2395 saa7146_write(dev, MC2,
2396 1 * (MASK_08 | MASK_24) | // BRS control
2397 0 * (MASK_09 | MASK_25) | // a
2398 1 * (MASK_10 | MASK_26) | // b
2399 0 * (MASK_06 | MASK_22) | // HPS_CTRL1
2400 0 * (MASK_05 | MASK_21) | // HPS_CTRL2
2401 0 * (MASK_01 | MASK_15) // DEBI
2402 );
2403
2404 /* start writing RPS1 code from beginning */
2405 count = 0;
2406 /* Disable RPS1 */
2407 saa7146_write(dev, MC1, MASK_29);
2408 /* RPS1 timeout disable */
2409 saa7146_write(dev, RPS_TOV1, 0);
153755a7
AV		 2410 WRITE_RPS1(CMD_PAUSE | EVT_VBI_B);
2411 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2412 WRITE_RPS1(GPIO3_MSK);
2413 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4
LT		 2414#if RPS_IRQ
2415 /* issue RPS1 interrupt to increment counter */
153755a7 2416 WRITE_RPS1(CMD_INTERRUPT);
1da177e4 2417#endif
153755a7 2418 WRITE_RPS1(CMD_STOP);
1da177e4 2419 /* Jump to begin of RPS program as safety measure (p37) */
153755a7
AV		 2420 WRITE_RPS1(CMD_JUMP);
2421 WRITE_RPS1(dev->d_rps1.dma_handle);
1da177e4
LT		 2422
2423#if RPS_IRQ
2424 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2425 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2426 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2427 */
2428 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
af901ca1 2429 /* set event counter 1 threshold to maximum allowed value (rEC p55) */
1da177e4
LT		 2430 saa7146_write(dev, ECT1R, 0x3fff );
2431#endif
2432 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2433 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2434 /* Enable RPS1, (rFC p33) */
2435 saa7146_write(dev, MC1, (MASK_13 | MASK_29 ));
2436
2437 mdelay(10);
2438 /* now send VSYNC_B to rps1 by rising GPIO3 */
2439 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI);
2440 mdelay(10);
2441 /* if rps1 responded by lowering the GPIO3,
2442 * then we have budgetpatch hardware
2443 */
2444 if ((saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) {
2445 budgetpatch = 1;
2446 printk("dvb-ttpci: BUDGET-PATCH DETECTED.\n");
2447 }
2448 /* Disable RPS1 */
2449 saa7146_write(dev, MC1, ( MASK_29 ));
2450#if RPS_IRQ
2451 printk("dvb-ttpci: Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff );
2452#endif
2453 }
2454
2455 /* prepare the av7110 device struct */
7408187d 2456 av7110 = kzalloc(sizeof(struct av7110), GFP_KERNEL);
1da177e4
LT		 2457 if (!av7110) {
2458 dprintk(1, "out of memory\n");
2459 return -ENOMEM;
2460 }
2461
1da177e4
LT		 2462 av7110->card_name = (char*) pci_ext->ext_priv;
2463 av7110->dev = dev;
2464 dev->ext_priv = av7110;
2465
2466 ret = get_firmware(av7110);
2467 if (ret < 0)
2468 goto err_kfree_0;
2469
2470 ret = dvb_register_adapter(&av7110->dvb_adapter, av7110->card_name,
78e92006 2471 THIS_MODULE, &dev->pci->dev, adapter_nr);
1da177e4
LT		 2472 if (ret < 0)
2473 goto err_put_firmware_1;
2474
2475 /* the Siemens DVB needs this if you want to have the i2c chips
2476 get recognized before the main driver is fully loaded */
2477 saa7146_write(dev, GPIO_CTRL, 0x500000);
2478
1da177e4
LT		 2479 strlcpy(av7110->i2c_adap.name, pci_ext->ext_priv, sizeof(av7110->i2c_adap.name));
2480
2481 saa7146_i2c_adapter_prepare(dev, &av7110->i2c_adap, SAA7146_I2C_BUS_BIT_RATE_120); /* 275 kHz */
2482
2483 ret = i2c_add_adapter(&av7110->i2c_adap);
2484 if (ret < 0)
2485 goto err_dvb_unregister_adapter_2;
2486
2487 ttpci_eeprom_parse_mac(&av7110->i2c_adap,
fdc53a6d 2488 av7110->dvb_adapter.proposed_mac);
1da177e4
LT		 2489 ret = -ENOMEM;
2490
9e615eac
OE		 2491 /* full-ts mod? */
2492 if (full_ts)
2493 av7110->full_ts = true;
2494
2495 /* check for full-ts flag in eeprom */
2496 if (i2c_readreg(av7110, 0xaa, 0) == 0x4f && i2c_readreg(av7110, 0xaa, 1) == 0x45) {
2497 u8 flags = i2c_readreg(av7110, 0xaa, 2);
2498 if (flags != 0xff && (flags & 0x01))
2499 av7110->full_ts = true;
2500 }
2501
2502 if (av7110->full_ts) {
2503 printk(KERN_INFO "dvb-ttpci: full-ts mode enabled for saa7146 port B\n");
2504 spin_lock_init(&av7110->feedlock1);
2505 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2506 &av7110->pt);
2507 if (!av7110->grabbing)
2508 goto err_i2c_del_3;
2509
2510 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2511 saa7146_write(dev, MC2, (MASK_10 | MASK_26));
2512
2513 saa7146_write(dev, DD1_INIT, 0x00000600);
2514 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2515
2516 saa7146_write(dev, BRS_CTRL, 0x60000000);
2517 saa7146_write(dev, MC2, MASK_08 | MASK_24);
2518
2519 /* dma3 */
2520 saa7146_write(dev, PCI_BT_V1, 0x001c0000 | (saa7146_read(dev, PCI_BT_V1) & ~0x001f0000));
2521 saa7146_write(dev, BASE_ODD3, 0);
2522 saa7146_write(dev, BASE_EVEN3, 0);
2523 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2524 saa7146_write(dev, PITCH3, TS_WIDTH);
2525 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2526 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2527 saa7146_write(dev, MC2, MASK_04 | MASK_20);
2528
2529 tasklet_init(&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2530
2531 } else if (budgetpatch) {
1da177e4
LT		 2532 spin_lock_init(&av7110->feedlock1);
2533 av7110->grabbing = saa7146_vmalloc_build_pgtable(pdev, length,
2534 &av7110->pt);
2535 if (!av7110->grabbing)
2536 goto err_i2c_del_3;
2537
2538 saa7146_write(dev, PCI_BT_V1, 0x1c1f101f);
2539 saa7146_write(dev, BCS_CTRL, 0x80400040);
2540 /* set dd1 stream a & b */
2541 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2542 saa7146_write(dev, DD1_INIT, 0x03000200);
2543 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2544 saa7146_write(dev, BRS_CTRL, 0x60000000);
2545 saa7146_write(dev, BASE_ODD3, 0);
2546 saa7146_write(dev, BASE_EVEN3, 0);
2547 saa7146_write(dev, PROT_ADDR3, TS_WIDTH * TS_HEIGHT);
2548 saa7146_write(dev, BASE_PAGE3, av7110->pt.dma | ME1 | 0x90);
2549
2550 saa7146_write(dev, PITCH3, TS_WIDTH);
2551 saa7146_write(dev, NUM_LINE_BYTE3, (TS_HEIGHT << 16) | TS_WIDTH);
2552
2553 /* upload all */
2554 saa7146_write(dev, MC2, 0x077c077c);
2555 saa7146_write(dev, GPIO_CTRL, 0x000000);
2556#if RPS_IRQ
2557 /* set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53)
2558 * use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled
2559 * use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called
2560 */
2561 saa7146_write(dev, EC1SSR, (0x03<<2) | 3 );
af901ca1 2562 /* set event counter 1 threshold to maximum allowed value (rEC p55) */
1da177e4
LT		 2563 saa7146_write(dev, ECT1R, 0x3fff );
2564#endif
2565 /* Setup BUDGETPATCH MAIN RPS1 "program" (p35) */
2566 count = 0;
2567
2568 /* Wait Source Line Counter Threshold (p36) */
153755a7 2569 WRITE_RPS1(CMD_PAUSE | EVT_HS);
1da177e4 2570 /* Set GPIO3=1 (p42) */
153755a7
AV		 2571 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2572 WRITE_RPS1(GPIO3_MSK);
2573 WRITE_RPS1(SAA7146_GPIO_OUTHI<<24);
1da177e4
LT		 2574#if RPS_IRQ
2575 /* issue RPS1 interrupt */
153755a7 2576 WRITE_RPS1(CMD_INTERRUPT);
1da177e4
LT		 2577#endif
2578 /* Wait reset Source Line Counter Threshold (p36) */
153755a7 2579 WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS);
1da177e4 2580 /* Set GPIO3=0 (p42) */
153755a7
AV		 2581 WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2));
2582 WRITE_RPS1(GPIO3_MSK);
2583 WRITE_RPS1(SAA7146_GPIO_OUTLO<<24);
1da177e4
LT		 2584#if RPS_IRQ
2585 /* issue RPS1 interrupt */
153755a7 2586 WRITE_RPS1(CMD_INTERRUPT);
1da177e4
LT		 2587#endif
2588 /* Jump to begin of RPS program (p37) */
153755a7
AV		 2589 WRITE_RPS1(CMD_JUMP);
2590 WRITE_RPS1(dev->d_rps1.dma_handle);
1da177e4
LT		 2591
2592 /* Fix VSYNC level */
2593 saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO);
2594 /* Set RPS1 Address register to point to RPS code (r108 p42) */
2595 saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle);
2596 /* Set Source Line Counter Threshold, using BRS (rCC p43)
2597 * It generates HS event every TS_HEIGHT lines
2598 * this is related to TS_WIDTH set in register
2599 * NUM_LINE_BYTE3. If NUM_LINE_BYTE low 16 bits
2600 * are set to TS_WIDTH bytes (TS_WIDTH=2*188),
2601 * then RPS_THRESH1 should be set to trigger
2602 * every TS_HEIGHT (512) lines.
2603 */
2604 saa7146_write(dev, RPS_THRESH1, (TS_HEIGHT*1) | MASK_12 );
2605
2606 /* Enable RPS1 (rFC p33) */
2607 saa7146_write(dev, MC1, (MASK_13 | MASK_29));
2608
2609 /* end of budgetpatch register initialization */
2610 tasklet_init (&av7110->vpe_tasklet, vpeirq, (unsigned long) av7110);
2611 } else {
2612 saa7146_write(dev, PCI_BT_V1, 0x1c00101f);
2613 saa7146_write(dev, BCS_CTRL, 0x80400040);
2614
2615 /* set dd1 stream a & b */
2616 saa7146_write(dev, DD1_STREAM_B, 0x00000000);
2617 saa7146_write(dev, DD1_INIT, 0x03000000);
2618 saa7146_write(dev, MC2, (MASK_09 | MASK_25 | MASK_10 | MASK_26));
2619
2620 /* upload all */
2621 saa7146_write(dev, MC2, 0x077c077c);
2622 saa7146_write(dev, GPIO_CTRL, 0x000000);
2623 }
2624
2625 tasklet_init (&av7110->debi_tasklet, debiirq, (unsigned long) av7110);
2626 tasklet_init (&av7110->gpio_tasklet, gpioirq, (unsigned long) av7110);
2627
3593cab5 2628 mutex_init(&av7110->pid_mutex);
1da177e4
LT		 2629
2630 /* locks for data transfers from/to AV7110 */
2631 spin_lock_init(&av7110->debilock);
3593cab5 2632 mutex_init(&av7110->dcomlock);
1da177e4
LT		 2633 av7110->debitype = -1;
2634
2635 /* default OSD window */
2636 av7110->osdwin = 1;
3593cab5 2637 mutex_init(&av7110->osd_mutex);
1da177e4 2638
2f03ee8e 2639 /* TV standard */
58a44040
MS		 2640 av7110->vidmode = tv_standard == 1 ? AV7110_VIDEO_MODE_NTSC
2641 : AV7110_VIDEO_MODE_PAL;
2f03ee8e 2642
1da177e4
LT		 2643 /* ARM "watchdog" */
2644 init_waitqueue_head(&av7110->arm_wait);
2645 av7110->arm_thread = NULL;
2646
2647 /* allocate and init buffers */
2648 av7110->debi_virt = pci_alloc_consistent(pdev, 8192, &av7110->debi_bus);
2649 if (!av7110->debi_virt)
2650 goto err_saa71466_vfree_4;
2651
2652
2653 av7110->iobuf = vmalloc(AVOUTLEN+AOUTLEN+BMPLEN+4*IPACKS);
2654 if (!av7110->iobuf)
2655 goto err_pci_free_5;
2656
2657 ret = av7110_av_init(av7110);
2658 if (ret < 0)
2659 goto err_iobuf_vfree_6;
2660
2661 /* init BMP buffer */
2662 av7110->bmpbuf = av7110->iobuf+AVOUTLEN+AOUTLEN;
2663 init_waitqueue_head(&av7110->bmpq);
2664
2665 ret = av7110_ca_init(av7110);
2666 if (ret < 0)
2667 goto err_av7110_av_exit_7;
2668
2669 /* load firmware into AV7110 cards */
2670 ret = av7110_bootarm(av7110);
2671 if (ret < 0)
2672 goto err_av7110_ca_exit_8;
2673
2674 ret = av7110_firmversion(av7110);
2675 if (ret < 0)
2676 goto err_stop_arm_9;
2677
2678 if (FW_VERSION(av7110->arm_app)<0x2501)
008e6ff9
MCC		 2679 printk(KERN_WARNING
2680 "dvb-ttpci: Warning, firmware version 0x%04x is too old. System might be unstable!\n",
2681 FW_VERSION(av7110->arm_app));
1da177e4 2682
8eec1429
HP		 2683 thread = kthread_run(arm_thread, (void *) av7110, "arm_mon");
2684 if (IS_ERR(thread)) {
2685 ret = PTR_ERR(thread);
1da177e4 2686 goto err_stop_arm_9;
8eec1429
HP		 2687 }
2688 av7110->arm_thread = thread;
1da177e4
LT		 2689
2690 /* set initial volume in mixer struct */
2691 av7110->mixer.volume_left = volume;
2692 av7110->mixer.volume_right = volume;
2693
1da177e4
LT		 2694 ret = av7110_register(av7110);
2695 if (ret < 0)
2696 goto err_arm_thread_stop_10;
2697
defd574e
OE		 2698 init_av7110_av(av7110);
2699
1da177e4
LT		 2700 /* special case DVB-C: these cards have an analog tuner
2701 plus need some special handling, so we have separate
2702 saa7146_ext_vv data for these... */
2703 ret = av7110_init_v4l(av7110);
2704 if (ret < 0)
2705 goto err_av7110_unregister_11;
2706
fdc53a6d 2707 av7110->dvb_adapter.priv = av7110;
1da177e4
LT		 2708 ret = frontend_init(av7110);
2709 if (ret < 0)
2710 goto err_av7110_exit_v4l_12;
2711
30ad64b8
NS		 2712 mutex_init(&av7110->ioctl_mutex);
2713
b250392f 2714#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
03388ae3 2715 av7110_ir_init(av7110);
1da177e4
LT		 2716#endif
2717 printk(KERN_INFO "dvb-ttpci: found av7110-%d.\n", av7110_num);
2718 av7110_num++;
2719out:
2720 return ret;
2721
2722err_av7110_exit_v4l_12:
2723 av7110_exit_v4l(av7110);
2724err_av7110_unregister_11:
2725 dvb_unregister(av7110);
2726err_arm_thread_stop_10:
2727 av7110_arm_sync(av7110);
2728err_stop_arm_9:
2729 /* Nothing to do. Rejoice. */
2730err_av7110_ca_exit_8:
2731 av7110_ca_exit(av7110);
2732err_av7110_av_exit_7:
2733 av7110_av_exit(av7110);
2734err_iobuf_vfree_6:
2735 vfree(av7110->iobuf);
2736err_pci_free_5:
2737 pci_free_consistent(pdev, 8192, av7110->debi_virt, av7110->debi_bus);
2738err_saa71466_vfree_4:
87c3019d
JB		 2739 if (av7110->grabbing)
2740 saa7146_vfree_destroy_pgtable(pdev, av7110->grabbing, &av7110->pt);
1da177e4
LT		 2741err_i2c_del_3:
2742 i2c_del_adapter(&av7110->i2c_adap);
2743err_dvb_unregister_adapter_2:
fdc53a6d 2744 dvb_unregister_adapter(&av7110->dvb_adapter);
1da177e4
LT		 2745err_put_firmware_1:
2746 put_firmware(av7110);
2747err_kfree_0:
2748 kfree(av7110);
2749 goto out;
2750}
2751
4c62e976 2752static int av7110_detach(struct saa7146_dev* saa)
1da177e4
LT		 2753{
2754 struct av7110 *av7110 = saa->ext_priv;
2755 dprintk(4, "%p\n", av7110);
2756
b250392f 2757#if IS_ENABLED(CONFIG_DVB_AV7110_IR)
03388ae3
OE		 2758 av7110_ir_exit(av7110);
2759#endif
9e615eac
OE		 2760 if (budgetpatch || av7110->full_ts) {
2761 if (budgetpatch) {
2762 /* Disable RPS1 */
2763 saa7146_write(saa, MC1, MASK_29);
2764 /* VSYNC LOW (inactive) */
2765 saa7146_setgpio(saa, 3, SAA7146_GPIO_OUTLO);
2766 }
1da177e4
LT		 2767 saa7146_write(saa, MC1, MASK_20); /* DMA3 off */
2768 SAA7146_IER_DISABLE(saa, MASK_10);
2769 SAA7146_ISR_CLEAR(saa, MASK_10);
2770 msleep(50);
2771 tasklet_kill(&av7110->vpe_tasklet);
87c3019d 2772 saa7146_vfree_destroy_pgtable(saa->pci, av7110->grabbing, &av7110->pt);
1da177e4
LT		 2773 }
2774 av7110_exit_v4l(av7110);
2775
2776 av7110_arm_sync(av7110);
2777
2778 tasklet_kill(&av7110->debi_tasklet);
2779 tasklet_kill(&av7110->gpio_tasklet);
2780
2781 dvb_unregister(av7110);
2782
2783 SAA7146_IER_DISABLE(saa, MASK_19 | MASK_03);
2784 SAA7146_ISR_CLEAR(saa, MASK_19 | MASK_03);
2785
2786 av7110_ca_exit(av7110);
2787 av7110_av_exit(av7110);
2788
2789 vfree(av7110->iobuf);
2790 pci_free_consistent(saa->pci, 8192, av7110->debi_virt,
2791 av7110->debi_bus);
2792
2793 i2c_del_adapter(&av7110->i2c_adap);
2794
fdc53a6d 2795 dvb_unregister_adapter (&av7110->dvb_adapter);
1da177e4
LT		 2796
2797 av7110_num--;
2798
2799 put_firmware(av7110);
2800
2801 kfree(av7110);
2802
2803 saa->ext_priv = NULL;
2804
2805 return 0;
2806}
2807
2808
2809static void av7110_irq(struct saa7146_dev* dev, u32 *isr)
2810{
2811 struct av7110 *av7110 = dev->ext_priv;
2812
2813 //print_time("av7110_irq");
2814
2815 /* Note: Don't try to handle the DEBI error irq (MASK_18), in
2816 * intel mode the timeout is asserted all the time...
2817 */
2818
2819 if (*isr & MASK_19) {
2820 //printk("av7110_irq: DEBI\n");
2821 /* Note 1: The DEBI irq is level triggered: We must enable it
2822 * only after we started a DMA xfer, and disable it here
2823 * immediately, or it will be signalled all the time while
2824 * DEBI is idle.
2825 * Note 2: You would think that an irq which is masked is
2826 * not signalled by the hardware. Not so for the SAA7146:
2827 * An irq is signalled as long as the corresponding bit
2828 * in the ISR is set, and disabling irqs just prevents the
2829 * hardware from setting the ISR bit. This means a) that we
2830 * must clear the ISR *after* disabling the irq (which is why
2831 * we must do it here even though saa7146_core did it already),
2832 * and b) that if we were to disable an edge triggered irq
2833 * (like the gpio irqs sadly are) temporarily we would likely
2834 * loose some. This sucks :-(
2835 */
2836 SAA7146_IER_DISABLE(av7110->dev, MASK_19);
2837 SAA7146_ISR_CLEAR(av7110->dev, MASK_19);
2838 tasklet_schedule(&av7110->debi_tasklet);
2839 }
2840
2841 if (*isr & MASK_03) {
2842 //printk("av7110_irq: GPIO\n");
2843 tasklet_schedule(&av7110->gpio_tasklet);
2844 }
2845
9e615eac 2846 if (*isr & MASK_10)
1da177e4
LT		 2847 tasklet_schedule(&av7110->vpe_tasklet);
2848}
2849
2850
da517164 2851static struct saa7146_extension av7110_extension_driver;
1da177e4
LT		 2852
2853#define MAKE_AV7110_INFO(x_var,x_name) \
2854static struct saa7146_pci_extension_data x_var = { \
2855 .ext_priv = x_name, \
da517164 2856 .ext = &av7110_extension_driver }
1da177e4 2857
6af4ee10 2858MAKE_AV7110_INFO(tts_1_X_fsc,"Technotrend/Hauppauge WinTV DVB-S rev1.X or Fujitsu Siemens DVB-C");
1da177e4
LT		 2859MAKE_AV7110_INFO(ttt_1_X, "Technotrend/Hauppauge WinTV DVB-T rev1.X");
2860MAKE_AV7110_INFO(ttc_1_X, "Technotrend/Hauppauge WinTV Nexus-CA rev1.X");
2861MAKE_AV7110_INFO(ttc_2_X, "Technotrend/Hauppauge WinTV DVB-C rev2.X");
2862MAKE_AV7110_INFO(tts_2_X, "Technotrend/Hauppauge WinTV Nexus-S rev2.X");
3dfaebda 2863MAKE_AV7110_INFO(tts_2_3, "Technotrend/Hauppauge WinTV Nexus-S rev2.3");
1da177e4
LT		 2864MAKE_AV7110_INFO(tts_1_3se, "Technotrend/Hauppauge WinTV DVB-S rev1.3 SE");
2865MAKE_AV7110_INFO(ttt, "Technotrend/Hauppauge DVB-T");
2866MAKE_AV7110_INFO(fsc, "Fujitsu Siemens DVB-C");
2867MAKE_AV7110_INFO(fss, "Fujitsu Siemens DVB-S rev1.6");
8bd6301c 2868MAKE_AV7110_INFO(gxs_1_3, "Galaxis DVB-S rev1.3");
1da177e4
LT		 2869
2870static struct pci_device_id pci_tbl[] = {
6af4ee10
KH		 2871 MAKE_EXTENSION_PCI(fsc, 0x110a, 0x0000),
2872 MAKE_EXTENSION_PCI(tts_1_X_fsc, 0x13c2, 0x0000),
2873 MAKE_EXTENSION_PCI(ttt_1_X, 0x13c2, 0x0001),
2874 MAKE_EXTENSION_PCI(ttc_2_X, 0x13c2, 0x0002),
2875 MAKE_EXTENSION_PCI(tts_2_X, 0x13c2, 0x0003),
8bd6301c 2876 MAKE_EXTENSION_PCI(gxs_1_3, 0x13c2, 0x0004),
6af4ee10
KH		 2877 MAKE_EXTENSION_PCI(fss, 0x13c2, 0x0006),
2878 MAKE_EXTENSION_PCI(ttt, 0x13c2, 0x0008),
2879 MAKE_EXTENSION_PCI(ttc_1_X, 0x13c2, 0x000a),
2880 MAKE_EXTENSION_PCI(tts_2_3, 0x13c2, 0x000e),
2881 MAKE_EXTENSION_PCI(tts_1_3se, 0x13c2, 0x1002),
1da177e4 2882
1da177e4
LT		 2883/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0005), UNDEFINED CARD */ // Technisat SkyStar1
2884/* MAKE_EXTENSION_PCI(???, 0x13c2, 0x0009), UNDEFINED CARD */ // TT/Hauppauge WinTV Nexus-CA v????
2885
2886 {
2887 .vendor = 0,
2888 }
2889};
2890
2891MODULE_DEVICE_TABLE(pci, pci_tbl);
2892
2893
da517164 2894static struct saa7146_extension av7110_extension_driver = {
62929252 2895 .name = "av7110",
00c4cc67 2896 .flags = SAA7146_USE_I2C_IRQ,
1da177e4
LT		 2897
2898 .module = THIS_MODULE,
2899 .pci_tbl = &pci_tbl[0],
2900 .attach = av7110_attach,
4c62e976 2901 .detach = av7110_detach,
1da177e4
LT		 2902
2903 .irq_mask = MASK_19 | MASK_03 | MASK_10,
2904 .irq_func = av7110_irq,
2905};
2906
2907
2908static int __init av7110_init(void)
2909{
29a8d979 2910 return saa7146_register_extension(&av7110_extension_driver);
1da177e4
LT		 2911}
2912
2913
2914static void __exit av7110_exit(void)
2915{
da517164 2916 saa7146_unregister_extension(&av7110_extension_driver);
1da177e4
LT		 2917}
2918
2919module_init(av7110_init);
2920module_exit(av7110_exit);
2921
008e6ff9 2922MODULE_DESCRIPTION("driver for the SAA7146 based AV110 PCI DVB cards by Siemens, Technotrend, Hauppauge");
1da177e4
LT		 2923MODULE_AUTHOR("Ralph Metzler, Marcus Metzler, others");
2924MODULE_LICENSE("GPL");
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