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1da177e4 LT |
1 | /* |
2 | * budget-patch.c: driver for Budget Patch, | |
3 | * hardware modification of DVB-S cards enabling full TS | |
4 | * | |
5 | * Written by Emard <emard@softhome.net> | |
6 | * | |
7 | * Original idea by Roberto Deza <rdeza@unav.es> | |
8 | * | |
9 | * Special thanks to Holger Waechtler, Michael Hunold, Marian Durkovic | |
10 | * and Metzlerbros | |
11 | * | |
12 | * This program is free software; you can redistribute it and/or | |
13 | * modify it under the terms of the GNU General Public License | |
14 | * as published by the Free Software Foundation; either version 2 | |
15 | * of the License, or (at your option) any later version. | |
16 | * | |
17 | * | |
18 | * This program is distributed in the hope that it will be useful, | |
19 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
20 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
21 | * GNU General Public License for more details. | |
22 | * | |
bcb63314 SA |
23 | * To obtain the license, point your browser to |
24 | * http://www.gnu.org/copyleft/gpl.html | |
1da177e4 LT |
25 | * |
26 | * | |
991ce92f | 27 | * the project's page is at https://linuxtv.org |
1da177e4 LT |
28 | */ |
29 | ||
30 | #include "av7110.h" | |
31 | #include "av7110_hw.h" | |
32 | #include "budget.h" | |
33 | #include "stv0299.h" | |
34 | #include "ves1x93.h" | |
35 | #include "tda8083.h" | |
36 | ||
265366e8 PA |
37 | #include "bsru6.h" |
38 | ||
26dc4d04 JG |
39 | DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr); |
40 | ||
1da177e4 LT |
41 | #define budget_patch budget |
42 | ||
43 | static struct saa7146_extension budget_extension; | |
44 | ||
45 | MAKE_BUDGET_INFO(ttbp, "TT-Budget/Patch DVB-S 1.x PCI", BUDGET_PATCH); | |
46 | //MAKE_BUDGET_INFO(satel,"TT-Budget/Patch SATELCO PCI", BUDGET_TT_HW_DISEQC); | |
47 | ||
48 | static struct pci_device_id pci_tbl[] = { | |
9101e622 | 49 | MAKE_EXTENSION_PCI(ttbp,0x13c2, 0x0000), |
1da177e4 | 50 | // MAKE_EXTENSION_PCI(satel, 0x13c2, 0x1013), |
9101e622 MCC |
51 | { |
52 | .vendor = 0, | |
53 | } | |
1da177e4 LT |
54 | }; |
55 | ||
56 | /* those lines are for budget-patch to be tried | |
57 | ** on a true budget card and observe the | |
58 | ** behaviour of VSYNC generated by rps1. | |
59 | ** this code was shamelessly copy/pasted from budget.c | |
60 | */ | |
61 | static void gpio_Set22K (struct budget *budget, int state) | |
62 | { | |
63 | struct saa7146_dev *dev=budget->dev; | |
64 | dprintk(2, "budget: %p\n", budget); | |
65 | saa7146_setgpio(dev, 3, (state ? SAA7146_GPIO_OUTHI : SAA7146_GPIO_OUTLO)); | |
66 | } | |
67 | ||
68 | /* Diseqc functions only for TT Budget card */ | |
69 | /* taken from the Skyvision DVB driver by | |
70 | Ralph Metzler <rjkm@metzlerbros.de> */ | |
71 | ||
72 | static void DiseqcSendBit (struct budget *budget, int data) | |
73 | { | |
74 | struct saa7146_dev *dev=budget->dev; | |
75 | dprintk(2, "budget: %p\n", budget); | |
76 | ||
77 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
78 | udelay(data ? 500 : 1000); | |
79 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
80 | udelay(data ? 1000 : 500); | |
81 | } | |
82 | ||
83 | static void DiseqcSendByte (struct budget *budget, int data) | |
84 | { | |
85 | int i, par=1, d; | |
86 | ||
87 | dprintk(2, "budget: %p\n", budget); | |
88 | ||
89 | for (i=7; i>=0; i--) { | |
90 | d = (data>>i)&1; | |
91 | par ^= d; | |
92 | DiseqcSendBit(budget, d); | |
93 | } | |
94 | ||
95 | DiseqcSendBit(budget, par); | |
96 | } | |
97 | ||
98 | static int SendDiSEqCMsg (struct budget *budget, int len, u8 *msg, unsigned long burst) | |
99 | { | |
100 | struct saa7146_dev *dev=budget->dev; | |
101 | int i; | |
102 | ||
103 | dprintk(2, "budget: %p\n", budget); | |
104 | ||
105 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
106 | mdelay(16); | |
107 | ||
108 | for (i=0; i<len; i++) | |
109 | DiseqcSendByte(budget, msg[i]); | |
110 | ||
111 | mdelay(16); | |
112 | ||
113 | if (burst!=-1) { | |
114 | if (burst) | |
115 | DiseqcSendByte(budget, 0xff); | |
116 | else { | |
117 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
db210426 TM |
118 | mdelay(12); |
119 | udelay(500); | |
1da177e4 LT |
120 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); |
121 | } | |
122 | msleep(20); | |
123 | } | |
124 | ||
125 | return 0; | |
126 | } | |
127 | ||
0df289a2 MCC |
128 | /* shamelessly copy/pasted from budget.c */ |
129 | static int budget_set_tone(struct dvb_frontend *fe, | |
130 | enum fe_sec_tone_mode tone) | |
1da177e4 LT |
131 | { |
132 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
133 | ||
134 | switch (tone) { | |
135 | case SEC_TONE_ON: | |
136 | gpio_Set22K (budget, 1); | |
137 | break; | |
138 | ||
139 | case SEC_TONE_OFF: | |
140 | gpio_Set22K (budget, 0); | |
141 | break; | |
142 | ||
143 | default: | |
144 | return -EINVAL; | |
145 | } | |
146 | ||
147 | return 0; | |
148 | } | |
149 | ||
150 | static int budget_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | |
151 | { | |
152 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
153 | ||
154 | SendDiSEqCMsg (budget, cmd->msg_len, cmd->msg, 0); | |
155 | ||
156 | return 0; | |
157 | } | |
158 | ||
0df289a2 MCC |
159 | static int budget_diseqc_send_burst(struct dvb_frontend *fe, |
160 | enum fe_sec_mini_cmd minicmd) | |
1da177e4 LT |
161 | { |
162 | struct budget* budget = (struct budget*) fe->dvb->priv; | |
163 | ||
164 | SendDiSEqCMsg (budget, 0, NULL, minicmd); | |
165 | ||
166 | return 0; | |
167 | } | |
168 | ||
169 | static int budget_av7110_send_fw_cmd(struct budget_patch *budget, u16* buf, int length) | |
170 | { | |
9101e622 MCC |
171 | int i; |
172 | ||
173 | dprintk(2, "budget: %p\n", budget); | |
174 | ||
175 | for (i = 2; i < length; i++) | |
176 | { | |
177 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2*i, 2, (u32) buf[i], 0,0); | |
178 | msleep(5); | |
179 | } | |
180 | if (length) | |
181 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, (u32) buf[1], 0,0); | |
182 | else | |
183 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND + 2, 2, 0, 0,0); | |
184 | msleep(5); | |
185 | ttpci_budget_debiwrite(budget, DEBINOSWAP, COMMAND, 2, (u32) buf[0], 0,0); | |
186 | msleep(5); | |
187 | return 0; | |
1da177e4 LT |
188 | } |
189 | ||
190 | static void av7110_set22k(struct budget_patch *budget, int state) | |
191 | { | |
9101e622 | 192 | u16 buf[2] = {( COMTYPE_AUDIODAC << 8) | (state ? ON22K : OFF22K), 0}; |
1da177e4 | 193 | |
9101e622 MCC |
194 | dprintk(2, "budget: %p\n", budget); |
195 | budget_av7110_send_fw_cmd(budget, buf, 2); | |
1da177e4 LT |
196 | } |
197 | ||
198 | static int av7110_send_diseqc_msg(struct budget_patch *budget, int len, u8 *msg, int burst) | |
199 | { | |
9101e622 MCC |
200 | int i; |
201 | u16 buf[18] = { ((COMTYPE_AUDIODAC << 8) | SendDiSEqC), | |
202 | 16, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 }; | |
1da177e4 | 203 | |
9101e622 | 204 | dprintk(2, "budget: %p\n", budget); |
1da177e4 | 205 | |
9101e622 MCC |
206 | if (len>10) |
207 | len=10; | |
1da177e4 | 208 | |
9101e622 MCC |
209 | buf[1] = len+2; |
210 | buf[2] = len; | |
1da177e4 | 211 | |
9101e622 MCC |
212 | if (burst != -1) |
213 | buf[3]=burst ? 0x01 : 0x00; | |
214 | else | |
215 | buf[3]=0xffff; | |
1da177e4 | 216 | |
9101e622 MCC |
217 | for (i=0; i<len; i++) |
218 | buf[i+4]=msg[i]; | |
1da177e4 | 219 | |
9101e622 MCC |
220 | budget_av7110_send_fw_cmd(budget, buf, 18); |
221 | return 0; | |
1da177e4 LT |
222 | } |
223 | ||
0df289a2 MCC |
224 | static int budget_patch_set_tone(struct dvb_frontend *fe, |
225 | enum fe_sec_tone_mode tone) | |
1da177e4 LT |
226 | { |
227 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
228 | ||
229 | switch (tone) { | |
230 | case SEC_TONE_ON: | |
231 | av7110_set22k (budget, 1); | |
232 | break; | |
233 | ||
234 | case SEC_TONE_OFF: | |
235 | av7110_set22k (budget, 0); | |
236 | break; | |
237 | ||
238 | default: | |
239 | return -EINVAL; | |
240 | } | |
241 | ||
242 | return 0; | |
243 | } | |
244 | ||
245 | static int budget_patch_diseqc_send_master_cmd(struct dvb_frontend* fe, struct dvb_diseqc_master_cmd* cmd) | |
246 | { | |
247 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
248 | ||
249 | av7110_send_diseqc_msg (budget, cmd->msg_len, cmd->msg, 0); | |
250 | ||
251 | return 0; | |
252 | } | |
253 | ||
0df289a2 MCC |
254 | static int budget_patch_diseqc_send_burst(struct dvb_frontend *fe, |
255 | enum fe_sec_mini_cmd minicmd) | |
1da177e4 LT |
256 | { |
257 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; | |
258 | ||
259 | av7110_send_diseqc_msg (budget, 0, NULL, minicmd); | |
260 | ||
261 | return 0; | |
262 | } | |
263 | ||
14d24d14 | 264 | static int alps_bsrv2_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 265 | { |
a0a9ff7f | 266 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
267 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
268 | u8 pwr = 0; | |
269 | u8 buf[4]; | |
270 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = buf, .len = sizeof(buf) }; | |
a0a9ff7f MCC |
271 | u32 div = (p->frequency + 479500) / 125; |
272 | ||
273 | if (p->frequency > 2000000) | |
274 | pwr = 3; | |
275 | else if (p->frequency > 1800000) | |
276 | pwr = 2; | |
277 | else if (p->frequency > 1600000) | |
278 | pwr = 1; | |
279 | else if (p->frequency > 1200000) | |
280 | pwr = 0; | |
281 | else if (p->frequency >= 1100000) | |
282 | pwr = 1; | |
1da177e4 LT |
283 | else pwr = 2; |
284 | ||
285 | buf[0] = (div >> 8) & 0x7f; | |
286 | buf[1] = div & 0xff; | |
287 | buf[2] = ((div & 0x18000) >> 10) | 0x95; | |
288 | buf[3] = (pwr << 6) | 0x30; | |
289 | ||
9101e622 | 290 | // NOTE: since we're using a prescaler of 2, we set the |
1da177e4 LT |
291 | // divisor frequency to 62.5kHz and divide by 125 above |
292 | ||
dea74869 PB |
293 | if (fe->ops.i2c_gate_ctrl) |
294 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2d15fd2f AQ |
295 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) |
296 | return -EIO; | |
1da177e4 LT |
297 | return 0; |
298 | } | |
299 | ||
300 | static struct ves1x93_config alps_bsrv2_config = { | |
301 | .demod_address = 0x08, | |
302 | .xin = 90100000UL, | |
303 | .invert_pwm = 0, | |
1da177e4 LT |
304 | }; |
305 | ||
14d24d14 | 306 | static int grundig_29504_451_tuner_set_params(struct dvb_frontend *fe) |
1da177e4 | 307 | { |
a0a9ff7f | 308 | struct dtv_frontend_properties *p = &fe->dtv_property_cache; |
1da177e4 LT |
309 | struct budget_patch* budget = (struct budget_patch*) fe->dvb->priv; |
310 | u32 div; | |
311 | u8 data[4]; | |
312 | struct i2c_msg msg = { .addr = 0x61, .flags = 0, .buf = data, .len = sizeof(data) }; | |
313 | ||
a0a9ff7f | 314 | div = p->frequency / 125; |
1da177e4 LT |
315 | data[0] = (div >> 8) & 0x7f; |
316 | data[1] = div & 0xff; | |
317 | data[2] = 0x8e; | |
318 | data[3] = 0x00; | |
319 | ||
dea74869 PB |
320 | if (fe->ops.i2c_gate_ctrl) |
321 | fe->ops.i2c_gate_ctrl(fe, 1); | |
2d15fd2f AQ |
322 | if (i2c_transfer (&budget->i2c_adap, &msg, 1) != 1) |
323 | return -EIO; | |
1da177e4 LT |
324 | return 0; |
325 | } | |
326 | ||
327 | static struct tda8083_config grundig_29504_451_config = { | |
328 | .demod_address = 0x68, | |
1da177e4 LT |
329 | }; |
330 | ||
331 | static void frontend_init(struct budget_patch* budget) | |
332 | { | |
333 | switch(budget->dev->pci->subsystem_device) { | |
334 | case 0x0000: // Hauppauge/TT WinTV DVB-S rev1.X | |
9101e622 | 335 | case 0x1013: // SATELCO Multimedia PCI |
1da177e4 LT |
336 | |
337 | // try the ALPS BSRV2 first of all | |
2bfe031d | 338 | budget->dvb_frontend = dvb_attach(ves1x93_attach, &alps_bsrv2_config, &budget->i2c_adap); |
1da177e4 | 339 | if (budget->dvb_frontend) { |
dea74869 PB |
340 | budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsrv2_tuner_set_params; |
341 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_patch_diseqc_send_master_cmd; | |
342 | budget->dvb_frontend->ops.diseqc_send_burst = budget_patch_diseqc_send_burst; | |
343 | budget->dvb_frontend->ops.set_tone = budget_patch_set_tone; | |
1da177e4 LT |
344 | break; |
345 | } | |
346 | ||
347 | // try the ALPS BSRU6 now | |
2bfe031d | 348 | budget->dvb_frontend = dvb_attach(stv0299_attach, &alps_bsru6_config, &budget->i2c_adap); |
1da177e4 | 349 | if (budget->dvb_frontend) { |
dea74869 | 350 | budget->dvb_frontend->ops.tuner_ops.set_params = alps_bsru6_tuner_set_params; |
2d15fd2f AQ |
351 | budget->dvb_frontend->tuner_priv = &budget->i2c_adap; |
352 | ||
dea74869 PB |
353 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd; |
354 | budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst; | |
355 | budget->dvb_frontend->ops.set_tone = budget_set_tone; | |
1da177e4 LT |
356 | break; |
357 | } | |
358 | ||
359 | // Try the grundig 29504-451 | |
2bfe031d | 360 | budget->dvb_frontend = dvb_attach(tda8083_attach, &grundig_29504_451_config, &budget->i2c_adap); |
1da177e4 | 361 | if (budget->dvb_frontend) { |
dea74869 PB |
362 | budget->dvb_frontend->ops.tuner_ops.set_params = grundig_29504_451_tuner_set_params; |
363 | budget->dvb_frontend->ops.diseqc_send_master_cmd = budget_diseqc_send_master_cmd; | |
364 | budget->dvb_frontend->ops.diseqc_send_burst = budget_diseqc_send_burst; | |
365 | budget->dvb_frontend->ops.set_tone = budget_set_tone; | |
1da177e4 LT |
366 | break; |
367 | } | |
368 | break; | |
369 | } | |
370 | ||
371 | if (budget->dvb_frontend == NULL) { | |
29e66a6c | 372 | printk("dvb-ttpci: A frontend driver was not found for device [%04x:%04x] subsystem [%04x:%04x]\n", |
1da177e4 LT |
373 | budget->dev->pci->vendor, |
374 | budget->dev->pci->device, | |
375 | budget->dev->pci->subsystem_vendor, | |
376 | budget->dev->pci->subsystem_device); | |
377 | } else { | |
fdc53a6d | 378 | if (dvb_register_frontend(&budget->dvb_adapter, budget->dvb_frontend)) { |
1da177e4 | 379 | printk("budget-av: Frontend registration failed!\n"); |
f52a838b | 380 | dvb_frontend_detach(budget->dvb_frontend); |
1da177e4 LT |
381 | budget->dvb_frontend = NULL; |
382 | } | |
383 | } | |
384 | } | |
385 | ||
386 | /* written by Emard */ | |
387 | static int budget_patch_attach (struct saa7146_dev* dev, struct saa7146_pci_extension_data *info) | |
388 | { | |
9101e622 MCC |
389 | struct budget_patch *budget; |
390 | int err; | |
1da177e4 LT |
391 | int count = 0; |
392 | int detected = 0; | |
393 | ||
394 | #define PATCH_RESET 0 | |
395 | #define RPS_IRQ 0 | |
396 | #define HPS_SETUP 0 | |
397 | #if PATCH_RESET | |
9101e622 MCC |
398 | saa7146_write(dev, MC1, MASK_31); |
399 | msleep(40); | |
1da177e4 LT |
400 | #endif |
401 | #if HPS_SETUP | |
9101e622 MCC |
402 | // initialize registers. Better to have it like this |
403 | // than leaving something unconfigured | |
1da177e4 LT |
404 | saa7146_write(dev, DD1_STREAM_B, 0); |
405 | // port B VSYNC at rising edge | |
406 | saa7146_write(dev, DD1_INIT, 0x00000200); // have this in budget-core too! | |
407 | saa7146_write(dev, BRS_CTRL, 0x00000000); // VBI | |
408 | ||
409 | // debi config | |
410 | // saa7146_write(dev, DEBI_CONFIG, MASK_30|MASK_28|MASK_18); | |
411 | ||
9101e622 MCC |
412 | // zero all HPS registers |
413 | saa7146_write(dev, HPS_H_PRESCALE, 0); // r68 | |
414 | saa7146_write(dev, HPS_H_SCALE, 0); // r6c | |
415 | saa7146_write(dev, BCS_CTRL, 0); // r70 | |
416 | saa7146_write(dev, HPS_V_SCALE, 0); // r60 | |
417 | saa7146_write(dev, HPS_V_GAIN, 0); // r64 | |
418 | saa7146_write(dev, CHROMA_KEY_RANGE, 0); // r74 | |
419 | saa7146_write(dev, CLIP_FORMAT_CTRL, 0); // r78 | |
420 | // Set HPS prescaler for port B input | |
421 | saa7146_write(dev, HPS_CTRL, (1<<30) | (0<<29) | (1<<28) | (0<<12) ); | |
422 | saa7146_write(dev, MC2, | |
423 | 0 * (MASK_08 | MASK_24) | // BRS control | |
424 | 0 * (MASK_09 | MASK_25) | // a | |
425 | 0 * (MASK_10 | MASK_26) | // b | |
426 | 1 * (MASK_06 | MASK_22) | // HPS_CTRL1 | |
427 | 1 * (MASK_05 | MASK_21) | // HPS_CTRL2 | |
428 | 0 * (MASK_01 | MASK_15) // DEBI | |
429 | ); | |
1da177e4 LT |
430 | #endif |
431 | // Disable RPS1 and RPS0 | |
9101e622 MCC |
432 | saa7146_write(dev, MC1, ( MASK_29 | MASK_28)); |
433 | // RPS1 timeout disable | |
434 | saa7146_write(dev, RPS_TOV1, 0); | |
1da177e4 LT |
435 | |
436 | // code for autodetection | |
437 | // will wait for VBI_B event (vertical blank at port B) | |
438 | // and will reset GPIO3 after VBI_B is detected. | |
439 | // (GPIO3 should be raised high by CPU to | |
440 | // test if GPIO3 will generate vertical blank signal | |
441 | // in budget patch GPIO3 is connected to VSYNC_B | |
442 | count = 0; | |
443 | #if 0 | |
153755a7 AV |
444 | WRITE_RPS1(CMD_UPLOAD | |
445 | MASK_10 | MASK_09 | MASK_08 | MASK_06 | MASK_05 | MASK_04 | MASK_03 | MASK_02 ); | |
1da177e4 | 446 | #endif |
153755a7 AV |
447 | WRITE_RPS1(CMD_PAUSE | EVT_VBI_B); |
448 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); | |
449 | WRITE_RPS1(GPIO3_MSK); | |
450 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); | |
1da177e4 | 451 | #if RPS_IRQ |
9101e622 | 452 | // issue RPS1 interrupt to increment counter |
153755a7 | 453 | WRITE_RPS1(CMD_INTERRUPT); |
9101e622 | 454 | // at least a NOP is neede between two interrupts |
153755a7 | 455 | WRITE_RPS1(CMD_NOP); |
9101e622 | 456 | // interrupt again |
153755a7 | 457 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 | 458 | #endif |
153755a7 | 459 | WRITE_RPS1(CMD_STOP); |
1da177e4 LT |
460 | |
461 | #if RPS_IRQ | |
9101e622 MCC |
462 | // set event counter 1 source as RPS1 interrupt (0x03) (rE4 p53) |
463 | // use 0x03 to track RPS1 interrupts - increase by 1 every gpio3 is toggled | |
464 | // use 0x15 to track VPE interrupts - increase by 1 every vpeirq() is called | |
465 | saa7146_write(dev, EC1SSR, (0x03<<2) | 3 ); | |
af901ca1 | 466 | // set event counter 1 threshold to maximum allowed value (rEC p55) |
9101e622 | 467 | saa7146_write(dev, ECT1R, 0x3fff ); |
1da177e4 | 468 | #endif |
9101e622 MCC |
469 | // Fix VSYNC level |
470 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
471 | // Set RPS1 Address register to point to RPS code (r108 p42) | |
472 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
473 | // Enable RPS1, (rFC p33) | |
474 | saa7146_write(dev, MC1, (MASK_13 | MASK_29 )); | |
1da177e4 LT |
475 | |
476 | ||
9101e622 MCC |
477 | mdelay(50); |
478 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTHI); | |
1da177e4 LT |
479 | mdelay(150); |
480 | ||
481 | ||
482 | if( (saa7146_read(dev, GPIO_CTRL) & 0x10000000) == 0) | |
483 | detected = 1; | |
484 | ||
485 | #if RPS_IRQ | |
9101e622 | 486 | printk("Event Counter 1 0x%04x\n", saa7146_read(dev, EC1R) & 0x3fff ); |
1da177e4 LT |
487 | #endif |
488 | // Disable RPS1 | |
9101e622 | 489 | saa7146_write(dev, MC1, ( MASK_29 )); |
1da177e4 LT |
490 | |
491 | if(detected == 0) | |
9101e622 | 492 | printk("budget-patch not detected or saa7146 in non-default state.\n" |
6774def6 | 493 | "try enabling resetting of 7146 with MASK_31 in MC1 register\n"); |
1da177e4 LT |
494 | |
495 | else | |
9101e622 | 496 | printk("BUDGET-PATCH DETECTED.\n"); |
1da177e4 LT |
497 | |
498 | ||
499 | /* OLD (Original design by Roberto Deza): | |
500 | ** This code will setup the SAA7146_RPS1 to generate a square | |
501 | ** wave on GPIO3, changing when a field (TS_HEIGHT/2 "lines" of | |
502 | ** TS_WIDTH packets) has been acquired on SAA7146_D1B video port; | |
503 | ** then, this GPIO3 output which is connected to the D1B_VSYNC | |
504 | ** input, will trigger the acquisition of the alternate field | |
505 | ** and so on. | |
506 | ** Currently, the TT_budget / WinTV_Nova cards have two ICs | |
507 | ** (74HCT4040, LVC74) for the generation of this VSYNC signal, | |
508 | ** which seems that can be done perfectly without this :-)). | |
509 | */ | |
510 | ||
511 | /* New design (By Emard) | |
512 | ** this rps1 code will copy internal HS event to GPIO3 pin. | |
0779bf2d | 513 | ** GPIO3 is in budget-patch hardware connected to port B VSYNC |
1da177e4 LT |
514 | |
515 | ** HS is an internal event of 7146, accessible with RPS | |
516 | ** and temporarily raised high every n lines | |
517 | ** (n in defined in the RPS_THRESH1 counter threshold) | |
518 | ** I think HS is raised high on the beginning of the n-th line | |
519 | ** and remains high until this n-th line that triggered | |
0779bf2d | 520 | ** it is completely received. When the reception of n-th line |
1da177e4 LT |
521 | ** ends, HS is lowered. |
522 | ||
523 | ** To transmit data over DMA, 7146 needs changing state at | |
524 | ** port B VSYNC pin. Any changing of port B VSYNC will | |
525 | ** cause some DMA data transfer, with more or less packets loss. | |
526 | ** It depends on the phase and frequency of VSYNC and | |
527 | ** the way of 7146 is instructed to trigger on port B (defined | |
528 | ** in DD1_INIT register, 3rd nibble from the right valid | |
529 | ** numbers are 0-7, see datasheet) | |
530 | ** | |
531 | ** The correct triggering can minimize packet loss, | |
532 | ** dvbtraffic should give this stable bandwidths: | |
533 | ** 22k transponder = 33814 kbit/s | |
534 | ** 27.5k transponder = 38045 kbit/s | |
535 | ** by experiment it is found that the best results | |
536 | ** (stable bandwidths and almost no packet loss) | |
537 | ** are obtained using DD1_INIT triggering number 2 | |
538 | ** (Va at rising edge of VS Fa = HS x VS-failing forced toggle) | |
539 | ** and a VSYNC phase that occurs in the middle of DMA transfer | |
540 | ** (about byte 188*512=96256 in the DMA window). | |
541 | ** | |
542 | ** Phase of HS is still not clear to me how to control, | |
543 | ** It just happens to be so. It can be seen if one enables | |
544 | ** RPS_IRQ and print Event Counter 1 in vpeirq(). Every | |
545 | ** time RPS_INTERRUPT is called, the Event Counter 1 will | |
546 | ** increment. That's how the 7146 is programmed to do event | |
547 | ** counting in this budget-patch.c | |
548 | ** I *think* HPS setting has something to do with the phase | |
25985edc | 549 | ** of HS but I can't be 100% sure in that. |
1da177e4 LT |
550 | |
551 | ** hardware debug note: a working budget card (including budget patch) | |
552 | ** with vpeirq() interrupt setup in mode "0x90" (every 64K) will | |
553 | ** generate 3 interrupts per 25-Hz DMA frame of 2*188*512 bytes | |
0779bf2d | 554 | ** and that means 3*25=75 Hz of interrupt frequency, as seen by |
1da177e4 LT |
555 | ** watch cat /proc/interrupts |
556 | ** | |
557 | ** If this frequency is 3x lower (and data received in the DMA | |
558 | ** buffer don't start with 0x47, but in the middle of packets, | |
559 | ** whose lengths appear to be like 188 292 188 104 etc. | |
560 | ** this means VSYNC line is not connected in the hardware. | |
561 | ** (check soldering pcb and pins) | |
562 | ** The same behaviour of missing VSYNC can be duplicated on budget | |
0779bf2d | 563 | ** cards, by setting DD1_INIT trigger mode 7 in 3rd nibble. |
1da177e4 LT |
564 | */ |
565 | ||
566 | // Setup RPS1 "program" (p35) | |
9101e622 | 567 | count = 0; |
1da177e4 LT |
568 | |
569 | ||
9101e622 | 570 | // Wait Source Line Counter Threshold (p36) |
153755a7 | 571 | WRITE_RPS1(CMD_PAUSE | EVT_HS); |
9101e622 | 572 | // Set GPIO3=1 (p42) |
153755a7 AV |
573 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
574 | WRITE_RPS1(GPIO3_MSK); | |
575 | WRITE_RPS1(SAA7146_GPIO_OUTHI<<24); | |
1da177e4 | 576 | #if RPS_IRQ |
9101e622 | 577 | // issue RPS1 interrupt |
153755a7 | 578 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 | 579 | #endif |
9101e622 | 580 | // Wait reset Source Line Counter Threshold (p36) |
153755a7 | 581 | WRITE_RPS1(CMD_PAUSE | RPS_INV | EVT_HS); |
9101e622 | 582 | // Set GPIO3=0 (p42) |
153755a7 AV |
583 | WRITE_RPS1(CMD_WR_REG_MASK | (GPIO_CTRL>>2)); |
584 | WRITE_RPS1(GPIO3_MSK); | |
585 | WRITE_RPS1(SAA7146_GPIO_OUTLO<<24); | |
1da177e4 | 586 | #if RPS_IRQ |
9101e622 | 587 | // issue RPS1 interrupt |
153755a7 | 588 | WRITE_RPS1(CMD_INTERRUPT); |
1da177e4 | 589 | #endif |
9101e622 | 590 | // Jump to begin of RPS program (p37) |
153755a7 AV |
591 | WRITE_RPS1(CMD_JUMP); |
592 | WRITE_RPS1(dev->d_rps1.dma_handle); | |
1da177e4 | 593 | |
9101e622 MCC |
594 | // Fix VSYNC level |
595 | saa7146_setgpio(dev, 3, SAA7146_GPIO_OUTLO); | |
596 | // Set RPS1 Address register to point to RPS code (r108 p42) | |
597 | saa7146_write(dev, RPS_ADDR1, dev->d_rps1.dma_handle); | |
afa47abf IS |
598 | |
599 | if (!(budget = kmalloc (sizeof(struct budget_patch), GFP_KERNEL))) | |
600 | return -ENOMEM; | |
601 | ||
602 | dprintk(2, "budget: %p\n", budget); | |
603 | ||
26dc4d04 JG |
604 | err = ttpci_budget_init(budget, dev, info, THIS_MODULE, adapter_nr); |
605 | if (err) { | |
606 | kfree(budget); | |
afa47abf IS |
607 | return err; |
608 | } | |
609 | ||
9101e622 MCC |
610 | // Set Source Line Counter Threshold, using BRS (rCC p43) |
611 | // It generates HS event every TS_HEIGHT lines | |
612 | // this is related to TS_WIDTH set in register | |
613 | // NUM_LINE_BYTE3 in budget-core.c. If NUM_LINE_BYTE | |
614 | // low 16 bits are set to TS_WIDTH bytes (TS_WIDTH=2*188 | |
615 | //,then RPS_THRESH1 | |
616 | // should be set to trigger every TS_HEIGHT (512) lines. | |
617 | // | |
afa47abf | 618 | saa7146_write(dev, RPS_THRESH1, budget->buffer_height | MASK_12 ); |
9101e622 MCC |
619 | |
620 | // saa7146_write(dev, RPS_THRESH0, ((TS_HEIGHT/2)<<16) |MASK_28| (TS_HEIGHT/2) |MASK_12 ); | |
621 | // Enable RPS1 (rFC p33) | |
622 | saa7146_write(dev, MC1, (MASK_13 | MASK_29)); | |
623 | ||
624 | ||
9101e622 | 625 | dev->ext_priv = budget; |
1da177e4 | 626 | |
fdc53a6d | 627 | budget->dvb_adapter.priv = budget; |
1da177e4 LT |
628 | frontend_init(budget); |
629 | ||
32e4c3a5 OE |
630 | ttpci_budget_init_hooks(budget); |
631 | ||
9101e622 | 632 | return 0; |
1da177e4 LT |
633 | } |
634 | ||
635 | static int budget_patch_detach (struct saa7146_dev* dev) | |
636 | { | |
9101e622 MCC |
637 | struct budget_patch *budget = (struct budget_patch*) dev->ext_priv; |
638 | int err; | |
1da177e4 | 639 | |
2bfe031d AQ |
640 | if (budget->dvb_frontend) { |
641 | dvb_unregister_frontend(budget->dvb_frontend); | |
f52a838b | 642 | dvb_frontend_detach(budget->dvb_frontend); |
2bfe031d | 643 | } |
9101e622 | 644 | err = ttpci_budget_deinit (budget); |
1da177e4 | 645 | |
9101e622 | 646 | kfree (budget); |
1da177e4 | 647 | |
9101e622 | 648 | return err; |
1da177e4 LT |
649 | } |
650 | ||
651 | static int __init budget_patch_init(void) | |
652 | { | |
653 | return saa7146_register_extension(&budget_extension); | |
654 | } | |
655 | ||
656 | static void __exit budget_patch_exit(void) | |
657 | { | |
9101e622 | 658 | saa7146_unregister_extension(&budget_extension); |
1da177e4 LT |
659 | } |
660 | ||
661 | static struct saa7146_extension budget_extension = { | |
0e367a15 | 662 | .name = "budget_patch dvb", |
9101e622 | 663 | .flags = 0, |
1da177e4 | 664 | |
9101e622 MCC |
665 | .module = THIS_MODULE, |
666 | .pci_tbl = pci_tbl, | |
667 | .attach = budget_patch_attach, | |
668 | .detach = budget_patch_detach, | |
1da177e4 | 669 | |
9101e622 MCC |
670 | .irq_mask = MASK_10, |
671 | .irq_func = ttpci_budget_irq10_handler, | |
1da177e4 LT |
672 | }; |
673 | ||
674 | module_init(budget_patch_init); | |
675 | module_exit(budget_patch_exit); | |
676 | ||
677 | MODULE_LICENSE("GPL"); | |
678 | MODULE_AUTHOR("Emard, Roberto Deza, Holger Waechtler, Michael Hunold, others"); | |
008e6ff9 | 679 | MODULE_DESCRIPTION("Driver for full TS modified DVB-S SAA7146+AV7110 based so-called Budget Patch cards"); |