[mirror_ubuntu-hirsute-kernel.git] / drivers / media / pci / tw68 / tw68-risc.c

/*
 *  tw68_risc.c
 *  Part of the device driver for Techwell 68xx based cards
 *
 *  Much of this code is derived from the cx88 and sa7134 drivers, which
 *  were in turn derived from the bt87x driver.  The original work was by
 *  Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
 *  Hans Verkuil, Andy Walls and many others.  Their work is gratefully
 *  acknowledged.  Full credit goes to them - any problems within this code
 *  are mine.
 *
 *  Copyright (C) 2009  William M. Brack
 *
 *  Refactored and updated to the latest v4l core frameworks:
 *
 *  Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
 *
 *  This program is free software; you can redistribute it and/or modify
 *  it under the terms of the GNU General Public License as published by
 *  the Free Software Foundation; either version 2 of the License, or
 *  (at your option) any later version.
 *
 *  This program is distributed in the hope that it will be useful,
 *  but WITHOUT ANY WARRANTY; without even the implied warranty of
 *  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *  GNU General Public License for more details.
 */

#include "tw68.h"

/**
 *  @rp		pointer to current risc program position
 *  @sglist	pointer to "scatter-gather list" of buffer pointers
 *  @offset	offset to target memory buffer
 *  @sync_line	0 -> no sync, 1 -> odd sync, 2 -> even sync
 *  @bpl	number of bytes per scan line
 *  @padding	number of bytes of padding to add
 *  @lines	number of lines in field
 *  @jump	insert a jump at the start
 */
static __le32 *tw68_risc_field(__le32 *rp, struct scatterlist *sglist,
			    unsigned int offset, u32 sync_line,
			    unsigned int bpl, unsigned int padding,
			    unsigned int lines, bool jump)
{
	struct scatterlist *sg;
	unsigned int line, todo, done;

	if (jump) {
		*(rp++) = cpu_to_le32(RISC_JUMP);
		*(rp++) = 0;
	}

	/* sync instruction */
	if (sync_line == 1)
		*(rp++) = cpu_to_le32(RISC_SYNCO);
	else
		*(rp++) = cpu_to_le32(RISC_SYNCE);
	*(rp++) = 0;

	/* scan lines */
	sg = sglist;
	for (line = 0; line < lines; line++) {
		/* calculate next starting position */
		while (offset && offset >= sg_dma_len(sg)) {
			offset -= sg_dma_len(sg);
			sg = sg_next(sg);
		}
		if (bpl <= sg_dma_len(sg) - offset) {
			/* fits into current chunk */
			*(rp++) = cpu_to_le32(RISC_LINESTART |
					      /* (offset<<12) |*/  bpl);
			*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
			offset += bpl;
		} else {
			/*
			 * scanline needs to be split.  Put the start in
			 * whatever memory remains using RISC_LINESTART,
			 * then the remainder into following addresses
			 * given by the scatter-gather list.
			 */
			todo = bpl;	/* one full line to be done */
			/* first fragment */
			done = (sg_dma_len(sg) - offset);
			*(rp++) = cpu_to_le32(RISC_LINESTART |
						(7 << 24) |
						done);
			*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
			todo -= done;
			sg = sg_next(sg);
			/* succeeding fragments have no offset */
			while (todo > sg_dma_len(sg)) {
				*(rp++) = cpu_to_le32(RISC_INLINE |
						(done << 12) |
						sg_dma_len(sg));
				*(rp++) = cpu_to_le32(sg_dma_address(sg));
				todo -= sg_dma_len(sg);
				sg = sg_next(sg);
				done += sg_dma_len(sg);
			}
			if (todo) {
				/* final chunk - offset 0, count 'todo' */
				*(rp++) = cpu_to_le32(RISC_INLINE |
							(done << 12) |
							todo);
				*(rp++) = cpu_to_le32(sg_dma_address(sg));
			}
			offset = todo;
		}
		offset += padding;
	}

	return rp;
}

/**
 * tw68_risc_buffer
 *
 *	This routine is called by tw68-video.  It allocates
 *	memory for the dma controller "program" and then fills in that
 *	memory with the appropriate "instructions".
 *
 *	@pci_dev	structure with info about the pci
 *			slot which our device is in.
 *	@risc		structure with info about the memory
 *			used for our controller program.
 *	@sglist		scatter-gather list entry
 *	@top_offset	offset within the risc program area for the
 *			first odd frame line
 *	@bottom_offset	offset within the risc program area for the
 *			first even frame line
 *	@bpl		number of data bytes per scan line
 *	@padding	number of extra bytes to add at end of line
 *	@lines		number of scan lines
 */
int tw68_risc_buffer(struct pci_dev *pci,
			struct tw68_buf *buf,
			struct scatterlist *sglist,
			unsigned int top_offset,
			unsigned int bottom_offset,
			unsigned int bpl,
			unsigned int padding,
			unsigned int lines)
{
	u32 instructions, fields;
	__le32 *rp;

	fields = 0;
	if (UNSET != top_offset)
		fields++;
	if (UNSET != bottom_offset)
		fields++;
	/*
	 * estimate risc mem: worst case is one write per page border +
	 * one write per scan line + syncs + 2 jumps (all 2 dwords).
	 * Padding can cause next bpl to start close to a page border.
	 * First DMA region may be smaller than PAGE_SIZE
	 */
	instructions  = fields * (1 + (((bpl + padding) * lines) /
			 PAGE_SIZE) + lines) + 4;
	buf->size = instructions * 8;
	buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma);
	if (buf->cpu == NULL)
		return -ENOMEM;

	/* write risc instructions */
	rp = buf->cpu;
	if (UNSET != top_offset)	/* generates SYNCO */
		rp = tw68_risc_field(rp, sglist, top_offset, 1,
				     bpl, padding, lines, true);
	if (UNSET != bottom_offset)	/* generates SYNCE */
		rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
				     bpl, padding, lines, top_offset == UNSET);

	/* save pointer to jmp instruction address */
	buf->jmp = rp;
	buf->cpu[1] = cpu_to_le32(buf->dma + 8);
	/* assure risc buffer hasn't overflowed */
	BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
	return 0;
}

#if 0
/* ------------------------------------------------------------------ */
/* debug helper code                                                  */

static void tw68_risc_decode(u32 risc, u32 addr)
{
#define	RISC_OP(reg)	(((reg) >> 28) & 7)
	static struct instr_details {
		char *name;
		u8 has_data_type;
		u8 has_byte_info;
		u8 has_addr;
	} instr[8] = {
		[RISC_OP(RISC_SYNCO)]	  = {"syncOdd", 0, 0, 0},
		[RISC_OP(RISC_SYNCE)]	  = {"syncEven", 0, 0, 0},
		[RISC_OP(RISC_JUMP)]	  = {"jump", 0, 0, 1},
		[RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
		[RISC_OP(RISC_INLINE)]	  = {"inline", 1, 1, 1},
	};
	u32 p;

	p = RISC_OP(risc);
	if (!(risc & 0x80000000) || !instr[p].name) {
		pr_debug("0x%08x [ INVALID ]\n", risc);
		return;
	}
	pr_debug("0x%08x %-9s IRQ=%d",
		risc, instr[p].name, (risc >> 27) & 1);
	if (instr[p].has_data_type)
		pr_debug(" Type=%d", (risc >> 24) & 7);
	if (instr[p].has_byte_info)
		pr_debug(" Start=0x%03x Count=%03u",
			(risc >> 12) & 0xfff, risc & 0xfff);
	if (instr[p].has_addr)
		pr_debug(" StartAddr=0x%08x", addr);
	pr_debug("\n");
}

void tw68_risc_program_dump(struct tw68_core *core, struct tw68_buf *buf)
{
	const __le32 *addr;

	pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
		  core->name, buf, buf->cpu, buf->jmp);
	for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
		tw68_risc_decode(*addr, *(addr+1));
}
#endif
Commit	Line	Data
5740f4e7 HV	1	/*
	2	* tw68_risc.c
	3	* Part of the device driver for Techwell 68xx based cards
	4	*
	5	* Much of this code is derived from the cx88 and sa7134 drivers, which
	6	* were in turn derived from the bt87x driver. The original work was by
	7	* Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
	8	* Hans Verkuil, Andy Walls and many others. Their work is gratefully
	9	* acknowledged. Full credit goes to them - any problems within this code
	10	* are mine.
	11	*
e15d1c12 HV	12	* Copyright (C) 2009 William M. Brack
	13	*
	14	* Refactored and updated to the latest v4l core frameworks:
	15	*
	16	* Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
5740f4e7 HV	17	*
	18	* This program is free software; you can redistribute it and/or modify
	19	* it under the terms of the GNU General Public License as published by
	20	* the Free Software Foundation; either version 2 of the License, or
	21	* (at your option) any later version.
	22	*
	23	* This program is distributed in the hope that it will be useful,
	24	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	25	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	26	* GNU General Public License for more details.
5740f4e7 HV	27	*/
	28
	29	#include "tw68.h"
	30
5740f4e7 HV	31	/**
	32	* @rp pointer to current risc program position
	33	* @sglist pointer to "scatter-gather list" of buffer pointers
	34	* @offset offset to target memory buffer
	35	* @sync_line 0 -> no sync, 1 -> odd sync, 2 -> even sync
	36	* @bpl number of bytes per scan line
	37	* @padding number of bytes of padding to add
	38	* @lines number of lines in field
e15d1c12	39	* @jump insert a jump at the start
5740f4e7 HV	40	*/
	41	static __le32 tw68_risc_field(__le32 rp, struct scatterlist *sglist,
	42	unsigned int offset, u32 sync_line,
	43	unsigned int bpl, unsigned int padding,
e15d1c12	44	unsigned int lines, bool jump)
5740f4e7 HV	45	{
	46	struct scatterlist *sg;
	47	unsigned int line, todo, done;
	48
e15d1c12 HV	49	if (jump) {
e15d1c12 HV	50	*(rp++) = cpu_to_le32(RISC_JUMP);
5740f4e7 HV	51	*(rp++) = 0;
5740f4e7 HV	52	}
e15d1c12 HV	53
	54	/* sync instruction */
	55	if (sync_line == 1)
	56	*(rp++) = cpu_to_le32(RISC_SYNCO);
	57	else
	58	*(rp++) = cpu_to_le32(RISC_SYNCE);
	59	*(rp++) = 0;
	60
5740f4e7 HV	61	/* scan lines */
	62	sg = sglist;
	63	for (line = 0; line < lines; line++) {
	64	/* calculate next starting position */
	65	while (offset && offset >= sg_dma_len(sg)) {
	66	offset -= sg_dma_len(sg);
e15d1c12	67	sg = sg_next(sg);
5740f4e7 HV	68	}
	69	if (bpl <= sg_dma_len(sg) - offset) {
	70	/* fits into current chunk */
	71	*(rp++) = cpu_to_le32(RISC_LINESTART \|
	72	/* (offset<<12) \|*/ bpl);
	73	*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
	74	offset += bpl;
	75	} else {
	76	/*
	77	* scanline needs to be split. Put the start in
	78	* whatever memory remains using RISC_LINESTART,
	79	* then the remainder into following addresses
	80	* given by the scatter-gather list.
	81	*/
	82	todo = bpl; /* one full line to be done */
	83	/* first fragment */
	84	done = (sg_dma_len(sg) - offset);
	85	*(rp++) = cpu_to_le32(RISC_LINESTART \|
	86	(7 << 24) \|
	87	done);
	88	*(rp++) = cpu_to_le32(sg_dma_address(sg) + offset);
	89	todo -= done;
e15d1c12	90	sg = sg_next(sg);
5740f4e7 HV	91	/* succeeding fragments have no offset */
	92	while (todo > sg_dma_len(sg)) {
	93	*(rp++) = cpu_to_le32(RISC_INLINE \|
	94	(done << 12) \|
	95	sg_dma_len(sg));
	96	*(rp++) = cpu_to_le32(sg_dma_address(sg));
	97	todo -= sg_dma_len(sg);
e15d1c12	98	sg = sg_next(sg);
5740f4e7 HV	99	done += sg_dma_len(sg);
	100	}
	101	if (todo) {
	102	/* final chunk - offset 0, count 'todo' */
	103	*(rp++) = cpu_to_le32(RISC_INLINE \|
	104	(done << 12) \|
	105	todo);
	106	*(rp++) = cpu_to_le32(sg_dma_address(sg));
	107	}
	108	offset = todo;
	109	}
	110	offset += padding;
5740f4e7 HV	111	}
	112
	113	return rp;
	114	}
	115
	116	/**
	117	* tw68_risc_buffer
	118	*
e15d1c12 HV	119	* This routine is called by tw68-video. It allocates
	120	* memory for the dma controller "program" and then fills in that
	121	* memory with the appropriate "instructions".
5740f4e7	122	*
e15d1c12 HV	123	* @pci_dev structure with info about the pci
	124	* slot which our device is in.
	125	* @risc structure with info about the memory
	126	* used for our controller program.
	127	* @sglist scatter-gather list entry
	128	* @top_offset offset within the risc program area for the
	129	* first odd frame line
	130	* @bottom_offset offset within the risc program area for the
	131	* first even frame line
	132	* @bpl number of data bytes per scan line
	133	* @padding number of extra bytes to add at end of line
	134	* @lines number of scan lines
5740f4e7 HV	135	*/
5740f4e7 HV	136	int tw68_risc_buffer(struct pci_dev *pci,
e15d1c12	137	struct tw68_buf *buf,
5740f4e7 HV	138	struct scatterlist *sglist,
	139	unsigned int top_offset,
	140	unsigned int bottom_offset,
	141	unsigned int bpl,
	142	unsigned int padding,
	143	unsigned int lines)
	144	{
	145	u32 instructions, fields;
	146	__le32 *rp;
5740f4e7 HV	147
	148	fields = 0;
	149	if (UNSET != top_offset)
	150	fields++;
	151	if (UNSET != bottom_offset)
	152	fields++;
	153	/*
	154	* estimate risc mem: worst case is one write per page border +
e15d1c12	155	* one write per scan line + syncs + 2 jumps (all 2 dwords).
5740f4e7 HV	156	* Padding can cause next bpl to start close to a page border.
	157	* First DMA region may be smaller than PAGE_SIZE
	158	*/
	159	instructions = fields * (1 + (((bpl + padding) * lines) /
e15d1c12 HV	160	PAGE_SIZE) + lines) + 4;
	161	buf->size = instructions * 8;
	162	buf->cpu = pci_alloc_consistent(pci, buf->size, &buf->dma);
	163	if (buf->cpu == NULL)
	164	return -ENOMEM;
5740f4e7 HV	165
5740f4e7 HV	166	/* write risc instructions */
e15d1c12	167	rp = buf->cpu;
5740f4e7 HV	168	if (UNSET != top_offset) /* generates SYNCO */
5740f4e7 HV	169	rp = tw68_risc_field(rp, sglist, top_offset, 1,
e15d1c12	170	bpl, padding, lines, true);
5740f4e7 HV	171	if (UNSET != bottom_offset) /* generates SYNCE */
5740f4e7 HV	172	rp = tw68_risc_field(rp, sglist, bottom_offset, 2,
e15d1c12	173	bpl, padding, lines, top_offset == UNSET);
5740f4e7 HV	174
5740f4e7 HV	175	/* save pointer to jmp instruction address */
e15d1c12 HV	176	buf->jmp = rp;
e15d1c12 HV	177	buf->cpu[1] = cpu_to_le32(buf->dma + 8);
5740f4e7	178	/* assure risc buffer hasn't overflowed */
e15d1c12	179	BUG_ON((buf->jmp - buf->cpu + 2) * sizeof(buf->cpu[0]) > buf->size);
5740f4e7 HV	180	return 0;
	181	}
	182
	183	#if 0
	184	/* ------------------------------------------------------------------ */
	185	/* debug helper code */
	186
	187	static void tw68_risc_decode(u32 risc, u32 addr)
	188	{
	189	#define RISC_OP(reg) (((reg) >> 28) & 7)
	190	static struct instr_details {
	191	char *name;
	192	u8 has_data_type;
	193	u8 has_byte_info;
	194	u8 has_addr;
	195	} instr[8] = {
	196	[RISC_OP(RISC_SYNCO)] = {"syncOdd", 0, 0, 0},
	197	[RISC_OP(RISC_SYNCE)] = {"syncEven", 0, 0, 0},
	198	[RISC_OP(RISC_JUMP)] = {"jump", 0, 0, 1},
	199	[RISC_OP(RISC_LINESTART)] = {"lineStart", 1, 1, 1},
	200	[RISC_OP(RISC_INLINE)] = {"inline", 1, 1, 1},
	201	};
	202	u32 p;
	203
	204	p = RISC_OP(risc);
	205	if (!(risc & 0x80000000) \|\| !instr[p].name) {
e15d1c12	206	pr_debug("0x%08x [ INVALID ]\n", risc);
5740f4e7 HV	207	return;
5740f4e7 HV	208	}
e15d1c12	209	pr_debug("0x%08x %-9s IRQ=%d",
5740f4e7 HV	210	risc, instr[p].name, (risc >> 27) & 1);
5740f4e7 HV	211	if (instr[p].has_data_type)
e15d1c12	212	pr_debug(" Type=%d", (risc >> 24) & 7);
5740f4e7	213	if (instr[p].has_byte_info)
e15d1c12	214	pr_debug(" Start=0x%03x Count=%03u",
5740f4e7 HV	215	(risc >> 12) & 0xfff, risc & 0xfff);
5740f4e7 HV	216	if (instr[p].has_addr)
e15d1c12 HV	217	pr_debug(" StartAddr=0x%08x", addr);
e15d1c12 HV	218	pr_debug("\n");
5740f4e7 HV	219	}
5740f4e7 HV	220
e15d1c12	221	void tw68_risc_program_dump(struct tw68_core core, struct tw68_buf buf)
5740f4e7	222	{
e15d1c12	223	const __le32 *addr;
5740f4e7	224
e15d1c12 HV	225	pr_debug("%s: risc_program_dump: risc=%p, buf->cpu=0x%p, buf->jmp=0x%p\n",
	226	core->name, buf, buf->cpu, buf->jmp);
	227	for (addr = buf->cpu; addr <= buf->jmp; addr += 2)
5740f4e7 HV	228	tw68_risc_decode(addr, (addr+1));
5740f4e7 HV	229	}
5740f4e7	230	#endif