]> git.proxmox.com Git - mirror_ubuntu-artful-kernel.git/blame - drivers/media/pci/zoran/zoran_card.c
Merge branches 'for-4.11/upstream-fixes', 'for-4.12/accutouch', 'for-4.12/cp2112...
[mirror_ubuntu-artful-kernel.git] / drivers / media / pci / zoran / zoran_card.c
CommitLineData
1da177e4
LT
1/*
2 * Zoran zr36057/zr36067 PCI controller driver, for the
3 * Pinnacle/Miro DC10/DC10+/DC30/DC30+, Iomega Buz, Linux
4 * Media Labs LML33/LML33R10.
5 *
6 * This part handles card-specific data and detection
d56410e0 7 *
1da177e4
LT
8 * Copyright (C) 2000 Serguei Miridonov <mirsev@cicese.mx>
9 *
10 * Currently maintained by:
11 * Ronald Bultje <rbultje@ronald.bitfreak.net>
12 * Laurent Pinchart <laurent.pinchart@skynet.be>
13 * Mailinglist <mjpeg-users@lists.sf.net>
14 *
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License as published by
17 * the Free Software Foundation; either version 2 of the License, or
18 * (at your option) any later version.
19 *
20 * This program is distributed in the hope that it will be useful,
21 * but WITHOUT ANY WARRANTY; without even the implied warranty of
22 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
23 * GNU General Public License for more details.
1da177e4
LT
24 */
25
fbe60daa
MS
26#include <linux/delay.h>
27
1da177e4
LT
28#include <linux/types.h>
29#include <linux/kernel.h>
30#include <linux/module.h>
31#include <linux/init.h>
32#include <linux/vmalloc.h>
5a0e3ad6 33#include <linux/slab.h>
1da177e4
LT
34
35#include <linux/proc_fs.h>
36#include <linux/i2c.h>
37#include <linux/i2c-algo-bit.h>
7f6adeaf 38#include <linux/videodev2.h>
1da177e4
LT
39#include <linux/spinlock.h>
40#include <linux/sem.h>
41#include <linux/kmod.h>
42#include <linux/wait.h>
43
44#include <linux/pci.h>
45#include <linux/interrupt.h>
384c3689 46#include <linux/mutex.h>
1cd3c0fa
HV
47#include <linux/io.h>
48#include <media/v4l2-common.h>
b5dcee22 49#include <media/i2c/bt819.h>
1da177e4
LT
50
51#include "videocodec.h"
52#include "zoran.h"
53#include "zoran_card.h"
54#include "zoran_device.h"
55#include "zoran_procfs.h"
56
1da177e4
LT
57extern const struct zoran_format zoran_formats[];
58
45bdcefe 59static int card[BUZ_MAX] = { [0 ... (BUZ_MAX-1)] = -1 };
60e3cac4 60module_param_array(card, int, NULL, 0444);
45bdcefe 61MODULE_PARM_DESC(card, "Card type");
1da177e4 62
1da177e4
LT
63/*
64 The video mem address of the video card.
65 The driver has a little database for some videocards
66 to determine it from there. If your video card is not in there
67 you have either to give it to the driver as a parameter
68 or set in in a VIDIOCSFBUF ioctl
69 */
70
ff699e6b 71static unsigned long vidmem; /* default = 0 - Video memory base address */
60e3cac4
TP
72module_param(vidmem, ulong, 0444);
73MODULE_PARM_DESC(vidmem, "Default video memory base address");
1da177e4
LT
74
75/*
76 Default input and video norm at startup of the driver.
77*/
78
ff699e6b 79static unsigned int default_input; /* default 0 = Composite, 1 = S-Video */
60e3cac4 80module_param(default_input, uint, 0444);
1da177e4
LT
81MODULE_PARM_DESC(default_input,
82 "Default input (0=Composite, 1=S-Video, 2=Internal)");
83
fbe60daa 84static int default_mux = 1; /* 6 Eyes input selection */
60e3cac4 85module_param(default_mux, int, 0644);
fbe60daa
MS
86MODULE_PARM_DESC(default_mux,
87 "Default 6 Eyes mux setting (Input selection)");
88
ff699e6b 89static int default_norm; /* default 0 = PAL, 1 = NTSC 2 = SECAM */
60e3cac4 90module_param(default_norm, int, 0444);
1da177e4
LT
91MODULE_PARM_DESC(default_norm, "Default norm (0=PAL, 1=NTSC, 2=SECAM)");
92
60e3cac4 93/* /dev/videoN, -1 for autodetect */
45bdcefe 94static int video_nr[BUZ_MAX] = { [0 ... (BUZ_MAX-1)] = -1 };
60e3cac4 95module_param_array(video_nr, int, NULL, 0444);
45bdcefe 96MODULE_PARM_DESC(video_nr, "Video device number (-1=Auto)");
1da177e4 97
497d7d0b 98int v4l_nbufs = 4;
e686e73c 99int v4l_bufsize = 864; /* Everybody should be able to work with this setting */
60e3cac4 100module_param(v4l_nbufs, int, 0644);
1da177e4 101MODULE_PARM_DESC(v4l_nbufs, "Maximum number of V4L buffers to use");
60e3cac4 102module_param(v4l_bufsize, int, 0644);
1da177e4
LT
103MODULE_PARM_DESC(v4l_bufsize, "Maximum size per V4L buffer (in kB)");
104
105int jpg_nbufs = 32;
106int jpg_bufsize = 512; /* max size for 100% quality full-PAL frame */
60e3cac4 107module_param(jpg_nbufs, int, 0644);
1da177e4 108MODULE_PARM_DESC(jpg_nbufs, "Maximum number of JPG buffers to use");
60e3cac4 109module_param(jpg_bufsize, int, 0644);
1da177e4
LT
110MODULE_PARM_DESC(jpg_bufsize, "Maximum size per JPG buffer (in kB)");
111
112int pass_through = 0; /* 1=Pass through TV signal when device is not used */
113 /* 0=Show color bar when device is not used (LML33: only if lml33dpath=1) */
60e3cac4 114module_param(pass_through, int, 0644);
1da177e4
LT
115MODULE_PARM_DESC(pass_through,
116 "Pass TV signal through to TV-out when idling");
117
18b548ca
JD
118int zr36067_debug = 1;
119module_param_named(debug, zr36067_debug, int, 0644);
120MODULE_PARM_DESC(debug, "Debug level (0-5)");
1da177e4 121
1990d50b
MCC
122#define ZORAN_VERSION "0.10.1"
123
1da177e4
LT
124MODULE_DESCRIPTION("Zoran-36057/36067 JPEG codec driver");
125MODULE_AUTHOR("Serguei Miridonov");
126MODULE_LICENSE("GPL");
1990d50b 127MODULE_VERSION(ZORAN_VERSION);
1da177e4 128
17faeb20
TP
129#define ZR_DEVICE(subven, subdev, data) { \
130 .vendor = PCI_VENDOR_ID_ZORAN, .device = PCI_DEVICE_ID_ZORAN_36057, \
131 .subvendor = (subven), .subdevice = (subdev), .driver_data = (data) }
132
dbdf03b4 133static struct pci_device_id zr36067_pci_tbl[] = {
17faeb20
TP
134 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC10PLUS, DC10plus),
135 ZR_DEVICE(PCI_VENDOR_ID_MIRO, PCI_DEVICE_ID_MIRO_DC30PLUS, DC30plus),
136 ZR_DEVICE(PCI_VENDOR_ID_ELECTRONICDESIGNGMBH, PCI_DEVICE_ID_LML_33R10, LML33R10),
137 ZR_DEVICE(PCI_VENDOR_ID_IOMEGA, PCI_DEVICE_ID_IOMEGA_BUZ, BUZ),
138 ZR_DEVICE(PCI_ANY_ID, PCI_ANY_ID, NUM_CARDS),
dbdf03b4
MCC
139 {0}
140};
141MODULE_DEVICE_TABLE(pci, zr36067_pci_tbl);
1da177e4 142
601139e0 143static unsigned int zoran_num; /* number of cards found */
1da177e4
LT
144
145/* videocodec bus functions ZR36060 */
146static u32
147zr36060_read (struct videocodec *codec,
148 u16 reg)
149{
150 struct zoran *zr = (struct zoran *) codec->master_data->data;
151 __u32 data;
152
153 if (post_office_wait(zr)
154 || post_office_write(zr, 0, 1, reg >> 8)
155 || post_office_write(zr, 0, 2, reg & 0xff)) {
156 return -1;
157 }
158
159 data = post_office_read(zr, 0, 3) & 0xff;
160 return data;
161}
162
163static void
164zr36060_write (struct videocodec *codec,
165 u16 reg,
166 u32 val)
167{
168 struct zoran *zr = (struct zoran *) codec->master_data->data;
169
170 if (post_office_wait(zr)
171 || post_office_write(zr, 0, 1, reg >> 8)
172 || post_office_write(zr, 0, 2, reg & 0xff)) {
173 return;
174 }
175
176 post_office_write(zr, 0, 3, val & 0xff);
177}
178
179/* videocodec bus functions ZR36050 */
180static u32
181zr36050_read (struct videocodec *codec,
182 u16 reg)
183{
184 struct zoran *zr = (struct zoran *) codec->master_data->data;
185 __u32 data;
186
187 if (post_office_wait(zr)
188 || post_office_write(zr, 1, 0, reg >> 2)) { // reg. HIGHBYTES
189 return -1;
190 }
191
192 data = post_office_read(zr, 0, reg & 0x03) & 0xff; // reg. LOWBYTES + read
193 return data;
194}
195
196static void
197zr36050_write (struct videocodec *codec,
198 u16 reg,
199 u32 val)
200{
201 struct zoran *zr = (struct zoran *) codec->master_data->data;
202
203 if (post_office_wait(zr)
204 || post_office_write(zr, 1, 0, reg >> 2)) { // reg. HIGHBYTES
205 return;
206 }
207
208 post_office_write(zr, 0, reg & 0x03, val & 0xff); // reg. LOWBYTES + wr. data
209}
210
211/* videocodec bus functions ZR36016 */
212static u32
213zr36016_read (struct videocodec *codec,
214 u16 reg)
215{
216 struct zoran *zr = (struct zoran *) codec->master_data->data;
217 __u32 data;
218
219 if (post_office_wait(zr)) {
220 return -1;
221 }
222
223 data = post_office_read(zr, 2, reg & 0x03) & 0xff; // read
224 return data;
225}
226
227/* hack for in zoran_device.c */
228void
229zr36016_write (struct videocodec *codec,
230 u16 reg,
231 u32 val)
232{
233 struct zoran *zr = (struct zoran *) codec->master_data->data;
234
235 if (post_office_wait(zr)) {
236 return;
237 }
238
239 post_office_write(zr, 2, reg & 0x03, val & 0x0ff); // wr. data
240}
241
242/*
243 * Board specific information
244 */
245
246static void
247dc10_init (struct zoran *zr)
248{
c61402ba 249 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT
250
251 /* Pixel clock selection */
252 GPIO(zr, 4, 0);
253 GPIO(zr, 5, 1);
254 /* Enable the video bus sync signals */
255 GPIO(zr, 7, 0);
256}
257
258static void
259dc10plus_init (struct zoran *zr)
260{
c61402ba 261 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT
262}
263
264static void
265buz_init (struct zoran *zr)
266{
c61402ba 267 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT
268
269 /* some stuff from Iomega */
270 pci_write_config_dword(zr->pci_dev, 0xfc, 0x90680f15);
271 pci_write_config_dword(zr->pci_dev, 0x0c, 0x00012020);
272 pci_write_config_dword(zr->pci_dev, 0xe8, 0xc0200000);
273}
274
275static void
276lml33_init (struct zoran *zr)
277{
c61402ba 278 dprintk(3, KERN_DEBUG "%s: %s\n", ZR_DEVNAME(zr), __func__);
1da177e4
LT
279
280 GPIO(zr, 2, 1); // Set Composite input/output
281}
282
fbe60daa
MS
283static void
284avs6eyes_init (struct zoran *zr)
285{
286 // AverMedia 6-Eyes original driver by Christer Weinigel
287
288 // Lifted straight from Christer's old driver and
289 // modified slightly by Martin Samuelsson.
290
291 int mux = default_mux; /* 1 = BT866, 7 = VID1 */
292
293 GPIO(zr, 4, 1); /* Bt866 SLEEP on */
294 udelay(2);
295
296 GPIO(zr, 0, 1); /* ZR36060 /RESET on */
297 GPIO(zr, 1, 0); /* ZR36060 /SLEEP on */
298 GPIO(zr, 2, mux & 1); /* MUX S0 */
299 GPIO(zr, 3, 0); /* /FRAME on */
300 GPIO(zr, 4, 0); /* Bt866 SLEEP off */
301 GPIO(zr, 5, mux & 2); /* MUX S1 */
302 GPIO(zr, 6, 0); /* ? */
303 GPIO(zr, 7, mux & 4); /* MUX S2 */
304
305}
306
1da177e4
LT
307static char *
308codecid_to_modulename (u16 codecid)
309{
310 char *name = NULL;
311
312 switch (codecid) {
313 case CODEC_TYPE_ZR36060:
314 name = "zr36060";
315 break;
316 case CODEC_TYPE_ZR36050:
317 name = "zr36050";
318 break;
319 case CODEC_TYPE_ZR36016:
320 name = "zr36016";
321 break;
1da177e4
LT
322 }
323
324 return name;
325}
326
327// struct tvnorm {
328// u16 Wt, Wa, HStart, HSyncStart, Ht, Ha, VStart;
329// };
330
331static struct tvnorm f50sqpixel = { 944, 768, 83, 880, 625, 576, 16 };
332static struct tvnorm f60sqpixel = { 780, 640, 51, 716, 525, 480, 12 };
333static struct tvnorm f50ccir601 = { 864, 720, 75, 804, 625, 576, 18 };
334static struct tvnorm f60ccir601 = { 858, 720, 57, 788, 525, 480, 16 };
335
336static struct tvnorm f50ccir601_lml33 = { 864, 720, 75+34, 804, 625, 576, 18 };
337static struct tvnorm f60ccir601_lml33 = { 858, 720, 57+34, 788, 525, 480, 16 };
338
339/* The DC10 (57/16/50) uses VActive as HSync, so HStart must be 0 */
340static struct tvnorm f50sqpixel_dc10 = { 944, 768, 0, 880, 625, 576, 0 };
341static struct tvnorm f60sqpixel_dc10 = { 780, 640, 0, 716, 525, 480, 12 };
342
343/* FIXME: I cannot swap U and V in saa7114, so i do one
344 * pixel left shift in zoran (75 -> 74)
345 * (Maxim Yevtyushkin <max@linuxmedialabs.com>) */
346static struct tvnorm f50ccir601_lm33r10 = { 864, 720, 74+54, 804, 625, 576, 18 };
347static struct tvnorm f60ccir601_lm33r10 = { 858, 720, 56+54, 788, 525, 480, 16 };
348
fbe60daa
MS
349/* FIXME: The ks0127 seem incapable of swapping U and V, too, which is why I
350 * copy Maxim's left shift hack for the 6 Eyes.
351 *
352 * Christer's driver used the unshifted norms, though...
353 * /Sam */
354static struct tvnorm f50ccir601_avs6eyes = { 864, 720, 74, 804, 625, 576, 18 };
355static struct tvnorm f60ccir601_avs6eyes = { 858, 720, 56, 788, 525, 480, 16 };
356
0ab6e1c3
HV
357static const unsigned short vpx3220_addrs[] = { 0x43, 0x47, I2C_CLIENT_END };
358static const unsigned short saa7110_addrs[] = { 0x4e, 0x4f, I2C_CLIENT_END };
359static const unsigned short saa7111_addrs[] = { 0x25, 0x24, I2C_CLIENT_END };
360static const unsigned short saa7114_addrs[] = { 0x21, 0x20, I2C_CLIENT_END };
361static const unsigned short adv717x_addrs[] = { 0x6a, 0x6b, 0x2a, 0x2b, I2C_CLIENT_END };
362static const unsigned short ks0127_addrs[] = { 0x6c, 0x6d, I2C_CLIENT_END };
363static const unsigned short saa7185_addrs[] = { 0x44, I2C_CLIENT_END };
364static const unsigned short bt819_addrs[] = { 0x45, I2C_CLIENT_END };
365static const unsigned short bt856_addrs[] = { 0x44, I2C_CLIENT_END };
366static const unsigned short bt866_addrs[] = { 0x44, I2C_CLIENT_END };
367
4c62e976 368static struct card_info zoran_cards[NUM_CARDS] = {
1da177e4
LT
369 {
370 .type = DC10_old,
371 .name = "DC10(old)",
0ab6e1c3 372 .i2c_decoder = "vpx3220a",
0ab6e1c3 373 .addrs_decoder = vpx3220_addrs,
1da177e4
LT
374 .video_codec = CODEC_TYPE_ZR36050,
375 .video_vfe = CODEC_TYPE_ZR36016,
376
377 .inputs = 3,
378 .input = {
379 { 1, "Composite" },
380 { 2, "S-Video" },
381 { 0, "Internal/comp" }
382 },
107063c6 383 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
384 .tvn = {
385 &f50sqpixel_dc10,
386 &f60sqpixel_dc10,
387 &f50sqpixel_dc10
388 },
389 .jpeg_int = 0,
390 .vsync_int = ZR36057_ISR_GIRQ1,
391 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
392 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
393 .gpcs = { -1, 0 },
394 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
395 .gws_not_connected = 0,
fbe60daa 396 .input_mux = 0,
1da177e4
LT
397 .init = &dc10_init,
398 }, {
399 .type = DC10_new,
400 .name = "DC10(new)",
0ab6e1c3 401 .i2c_decoder = "saa7110",
0ab6e1c3
HV
402 .addrs_decoder = saa7110_addrs,
403 .i2c_encoder = "adv7175",
0ab6e1c3 404 .addrs_encoder = adv717x_addrs,
1da177e4
LT
405 .video_codec = CODEC_TYPE_ZR36060,
406
407 .inputs = 3,
408 .input = {
409 { 0, "Composite" },
410 { 7, "S-Video" },
411 { 5, "Internal/comp" }
412 },
107063c6 413 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
414 .tvn = {
415 &f50sqpixel,
416 &f60sqpixel,
417 &f50sqpixel},
418 .jpeg_int = ZR36057_ISR_GIRQ0,
419 .vsync_int = ZR36057_ISR_GIRQ1,
420 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
421 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
422 .gpcs = { -1, 1},
423 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
424 .gws_not_connected = 0,
fbe60daa 425 .input_mux = 0,
1da177e4
LT
426 .init = &dc10plus_init,
427 }, {
428 .type = DC10plus,
429 .name = "DC10plus",
0ab6e1c3 430 .i2c_decoder = "saa7110",
0ab6e1c3
HV
431 .addrs_decoder = saa7110_addrs,
432 .i2c_encoder = "adv7175",
0ab6e1c3 433 .addrs_encoder = adv717x_addrs,
1da177e4
LT
434 .video_codec = CODEC_TYPE_ZR36060,
435
436 .inputs = 3,
437 .input = {
438 { 0, "Composite" },
439 { 7, "S-Video" },
440 { 5, "Internal/comp" }
441 },
107063c6 442 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
443 .tvn = {
444 &f50sqpixel,
445 &f60sqpixel,
446 &f50sqpixel
447 },
448 .jpeg_int = ZR36057_ISR_GIRQ0,
449 .vsync_int = ZR36057_ISR_GIRQ1,
450 .gpio = { 3, 0, 6, 1, 2, -1, 4, 5 },
451 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
452 .gpcs = { -1, 1 },
453 .vfe_pol = { 1, 1, 1, 1, 0, 0, 0, 0 },
454 .gws_not_connected = 0,
fbe60daa 455 .input_mux = 0,
1da177e4
LT
456 .init = &dc10plus_init,
457 }, {
458 .type = DC30,
459 .name = "DC30",
0ab6e1c3 460 .i2c_decoder = "vpx3220a",
0ab6e1c3
HV
461 .addrs_decoder = vpx3220_addrs,
462 .i2c_encoder = "adv7175",
0ab6e1c3 463 .addrs_encoder = adv717x_addrs,
1da177e4
LT
464 .video_codec = CODEC_TYPE_ZR36050,
465 .video_vfe = CODEC_TYPE_ZR36016,
466
467 .inputs = 3,
468 .input = {
469 { 1, "Composite" },
470 { 2, "S-Video" },
471 { 0, "Internal/comp" }
472 },
107063c6 473 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
474 .tvn = {
475 &f50sqpixel_dc10,
476 &f60sqpixel_dc10,
477 &f50sqpixel_dc10
478 },
479 .jpeg_int = 0,
480 .vsync_int = ZR36057_ISR_GIRQ1,
481 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
482 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
483 .gpcs = { -1, 0 },
484 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
485 .gws_not_connected = 0,
fbe60daa 486 .input_mux = 0,
1da177e4
LT
487 .init = &dc10_init,
488 }, {
489 .type = DC30plus,
490 .name = "DC30plus",
0ab6e1c3 491 .i2c_decoder = "vpx3220a",
0ab6e1c3
HV
492 .addrs_decoder = vpx3220_addrs,
493 .i2c_encoder = "adv7175",
0ab6e1c3 494 .addrs_encoder = adv717x_addrs,
1da177e4
LT
495 .video_codec = CODEC_TYPE_ZR36050,
496 .video_vfe = CODEC_TYPE_ZR36016,
497
498 .inputs = 3,
499 .input = {
500 { 1, "Composite" },
501 { 2, "S-Video" },
502 { 0, "Internal/comp" }
503 },
107063c6 504 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
505 .tvn = {
506 &f50sqpixel_dc10,
507 &f60sqpixel_dc10,
508 &f50sqpixel_dc10
509 },
510 .jpeg_int = 0,
511 .vsync_int = ZR36057_ISR_GIRQ1,
512 .gpio = { 2, 1, -1, 3, 7, 0, 4, 5 },
513 .gpio_pol = { 0, 0, 0, 1, 0, 0, 0, 0 },
514 .gpcs = { -1, 0 },
515 .vfe_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
516 .gws_not_connected = 0,
fbe60daa 517 .input_mux = 0,
1da177e4
LT
518 .init = &dc10_init,
519 }, {
520 .type = LML33,
521 .name = "LML33",
0ab6e1c3 522 .i2c_decoder = "bt819a",
0ab6e1c3
HV
523 .addrs_decoder = bt819_addrs,
524 .i2c_encoder = "bt856",
0ab6e1c3 525 .addrs_encoder = bt856_addrs,
1da177e4
LT
526 .video_codec = CODEC_TYPE_ZR36060,
527
528 .inputs = 2,
529 .input = {
530 { 0, "Composite" },
531 { 7, "S-Video" }
532 },
107063c6 533 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
1da177e4
LT
534 .tvn = {
535 &f50ccir601_lml33,
536 &f60ccir601_lml33,
537 NULL
538 },
539 .jpeg_int = ZR36057_ISR_GIRQ1,
540 .vsync_int = ZR36057_ISR_GIRQ0,
541 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
542 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
543 .gpcs = { 3, 1 },
544 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
545 .gws_not_connected = 1,
fbe60daa 546 .input_mux = 0,
1da177e4
LT
547 .init = &lml33_init,
548 }, {
549 .type = LML33R10,
550 .name = "LML33R10",
0ab6e1c3 551 .i2c_decoder = "saa7114",
0ab6e1c3
HV
552 .addrs_decoder = saa7114_addrs,
553 .i2c_encoder = "adv7170",
0ab6e1c3 554 .addrs_encoder = adv717x_addrs,
1da177e4
LT
555 .video_codec = CODEC_TYPE_ZR36060,
556
557 .inputs = 2,
558 .input = {
559 { 0, "Composite" },
560 { 7, "S-Video" }
561 },
107063c6 562 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
1da177e4
LT
563 .tvn = {
564 &f50ccir601_lm33r10,
565 &f60ccir601_lm33r10,
566 NULL
567 },
568 .jpeg_int = ZR36057_ISR_GIRQ1,
569 .vsync_int = ZR36057_ISR_GIRQ0,
570 .gpio = { 1, -1, 3, 5, 7, -1, -1, -1 },
571 .gpio_pol = { 0, 0, 0, 0, 1, 0, 0, 0 },
572 .gpcs = { 3, 1 },
573 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
574 .gws_not_connected = 1,
fbe60daa 575 .input_mux = 0,
1da177e4
LT
576 .init = &lml33_init,
577 }, {
578 .type = BUZ,
579 .name = "Buz",
0ab6e1c3 580 .i2c_decoder = "saa7111",
0ab6e1c3
HV
581 .addrs_decoder = saa7111_addrs,
582 .i2c_encoder = "saa7185",
0ab6e1c3 583 .addrs_encoder = saa7185_addrs,
1da177e4
LT
584 .video_codec = CODEC_TYPE_ZR36060,
585
586 .inputs = 2,
587 .input = {
588 { 3, "Composite" },
589 { 7, "S-Video" }
590 },
107063c6 591 .norms = V4L2_STD_NTSC|V4L2_STD_PAL|V4L2_STD_SECAM,
1da177e4
LT
592 .tvn = {
593 &f50ccir601,
594 &f60ccir601,
595 &f50ccir601
596 },
597 .jpeg_int = ZR36057_ISR_GIRQ1,
598 .vsync_int = ZR36057_ISR_GIRQ0,
599 .gpio = { 1, -1, 3, -1, -1, -1, -1, -1 },
600 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 },
601 .gpcs = { 3, 1 },
602 .vfe_pol = { 1, 1, 0, 0, 0, 1, 0, 0 },
603 .gws_not_connected = 1,
fbe60daa 604 .input_mux = 0,
1da177e4 605 .init = &buz_init,
fbe60daa
MS
606 }, {
607 .type = AVS6EYES,
608 .name = "6-Eyes",
609 /* AverMedia chose not to brand the 6-Eyes. Thus it
610 can't be autodetected, and requires card=x. */
0ab6e1c3 611 .i2c_decoder = "ks0127",
0ab6e1c3
HV
612 .addrs_decoder = ks0127_addrs,
613 .i2c_encoder = "bt866",
0ab6e1c3 614 .addrs_encoder = bt866_addrs,
fbe60daa
MS
615 .video_codec = CODEC_TYPE_ZR36060,
616
617 .inputs = 10,
618 .input = {
619 { 0, "Composite 1" },
620 { 1, "Composite 2" },
621 { 2, "Composite 3" },
622 { 4, "Composite 4" },
623 { 5, "Composite 5" },
624 { 6, "Composite 6" },
625 { 8, "S-Video 1" },
626 { 9, "S-Video 2" },
627 {10, "S-Video 3" },
628 {15, "YCbCr" }
629 },
107063c6 630 .norms = V4L2_STD_NTSC|V4L2_STD_PAL,
fbe60daa
MS
631 .tvn = {
632 &f50ccir601_avs6eyes,
633 &f60ccir601_avs6eyes,
634 NULL
635 },
636 .jpeg_int = ZR36057_ISR_GIRQ1,
637 .vsync_int = ZR36057_ISR_GIRQ0,
638 .gpio = { 1, 0, 3, -1, -1, -1, -1, -1 },// Validity unknown /Sam
639 .gpio_pol = { 0, 0, 0, 0, 0, 0, 0, 0 }, // Validity unknown /Sam
640 .gpcs = { 3, 1 }, // Validity unknown /Sam
641 .vfe_pol = { 1, 0, 0, 0, 0, 1, 0, 0 }, // Validity unknown /Sam
642 .gws_not_connected = 1,
643 .input_mux = 1,
644 .init = &avs6eyes_init,
1da177e4 645 }
fbe60daa 646
1da177e4
LT
647};
648
649/*
650 * I2C functions
651 */
652/* software I2C functions */
653static int
654zoran_i2c_getsda (void *data)
655{
656 struct zoran *zr = (struct zoran *) data;
657
658 return (btread(ZR36057_I2CBR) >> 1) & 1;
659}
660
661static int
662zoran_i2c_getscl (void *data)
663{
664 struct zoran *zr = (struct zoran *) data;
665
666 return btread(ZR36057_I2CBR) & 1;
667}
668
669static void
670zoran_i2c_setsda (void *data,
671 int state)
672{
673 struct zoran *zr = (struct zoran *) data;
674
675 if (state)
676 zr->i2cbr |= 2;
677 else
678 zr->i2cbr &= ~2;
679 btwrite(zr->i2cbr, ZR36057_I2CBR);
680}
681
682static void
683zoran_i2c_setscl (void *data,
684 int state)
685{
686 struct zoran *zr = (struct zoran *) data;
687
688 if (state)
689 zr->i2cbr |= 1;
690 else
691 zr->i2cbr &= ~1;
692 btwrite(zr->i2cbr, ZR36057_I2CBR);
693}
694
6275163e 695static const struct i2c_algo_bit_data zoran_i2c_bit_data_template = {
1da177e4
LT
696 .setsda = zoran_i2c_setsda,
697 .setscl = zoran_i2c_setscl,
698 .getsda = zoran_i2c_getsda,
699 .getscl = zoran_i2c_getscl,
700 .udelay = 10,
1da177e4
LT
701 .timeout = 100,
702};
703
1da177e4
LT
704static int
705zoran_register_i2c (struct zoran *zr)
706{
37320d7b 707 zr->i2c_algo = zoran_i2c_bit_data_template;
1da177e4 708 zr->i2c_algo.data = zr;
6275163e
JD
709 strlcpy(zr->i2c_adapter.name, ZR_DEVNAME(zr),
710 sizeof(zr->i2c_adapter.name));
0ab6e1c3 711 i2c_set_adapdata(&zr->i2c_adapter, &zr->v4l2_dev);
1da177e4 712 zr->i2c_adapter.algo_data = &zr->i2c_algo;
12a917f6 713 zr->i2c_adapter.dev.parent = &zr->pci_dev->dev;
1da177e4
LT
714 return i2c_bit_add_bus(&zr->i2c_adapter);
715}
716
717static void
718zoran_unregister_i2c (struct zoran *zr)
719{
3269711b 720 i2c_del_adapter(&zr->i2c_adapter);
1da177e4
LT
721}
722
723/* Check a zoran_params struct for correctness, insert default params */
724
725int
726zoran_check_jpg_settings (struct zoran *zr,
0ba514d5
HV
727 struct zoran_jpg_settings *settings,
728 int try)
1da177e4
LT
729{
730 int err = 0, err0 = 0;
731
732 dprintk(4,
733 KERN_DEBUG
c61402ba
TP
734 "%s: %s - dec: %d, Hdcm: %d, Vdcm: %d, Tdcm: %d\n",
735 ZR_DEVNAME(zr), __func__, settings->decimation, settings->HorDcm,
1da177e4
LT
736 settings->VerDcm, settings->TmpDcm);
737 dprintk(4,
738 KERN_DEBUG
c61402ba
TP
739 "%s: %s - x: %d, y: %d, w: %d, y: %d\n",
740 ZR_DEVNAME(zr), __func__, settings->img_x, settings->img_y,
1da177e4
LT
741 settings->img_width, settings->img_height);
742 /* Check decimation, set default values for decimation = 1, 2, 4 */
743 switch (settings->decimation) {
744 case 1:
745
746 settings->HorDcm = 1;
747 settings->VerDcm = 1;
748 settings->TmpDcm = 1;
749 settings->field_per_buff = 2;
750 settings->img_x = 0;
751 settings->img_y = 0;
752 settings->img_width = BUZ_MAX_WIDTH;
753 settings->img_height = BUZ_MAX_HEIGHT / 2;
754 break;
755 case 2:
756
757 settings->HorDcm = 2;
758 settings->VerDcm = 1;
759 settings->TmpDcm = 2;
760 settings->field_per_buff = 1;
761 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
762 settings->img_y = 0;
763 settings->img_width =
764 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
765 settings->img_height = BUZ_MAX_HEIGHT / 2;
766 break;
767 case 4:
768
769 if (zr->card.type == DC10_new) {
770 dprintk(1,
771 KERN_DEBUG
c61402ba
TP
772 "%s: %s - HDec by 4 is not supported on the DC10\n",
773 ZR_DEVNAME(zr), __func__);
1da177e4
LT
774 err0++;
775 break;
776 }
777
778 settings->HorDcm = 4;
779 settings->VerDcm = 2;
780 settings->TmpDcm = 2;
781 settings->field_per_buff = 1;
782 settings->img_x = (BUZ_MAX_WIDTH == 720) ? 8 : 0;
783 settings->img_y = 0;
784 settings->img_width =
785 (BUZ_MAX_WIDTH == 720) ? 704 : BUZ_MAX_WIDTH;
786 settings->img_height = BUZ_MAX_HEIGHT / 2;
787 break;
788 case 0:
789
790 /* We have to check the data the user has set */
791
792 if (settings->HorDcm != 1 && settings->HorDcm != 2 &&
0ba514d5
HV
793 (zr->card.type == DC10_new || settings->HorDcm != 4)) {
794 settings->HorDcm = clamp(settings->HorDcm, 1, 2);
1da177e4 795 err0++;
0ba514d5
HV
796 }
797 if (settings->VerDcm != 1 && settings->VerDcm != 2) {
798 settings->VerDcm = clamp(settings->VerDcm, 1, 2);
1da177e4 799 err0++;
0ba514d5
HV
800 }
801 if (settings->TmpDcm != 1 && settings->TmpDcm != 2) {
802 settings->TmpDcm = clamp(settings->TmpDcm, 1, 2);
1da177e4 803 err0++;
0ba514d5 804 }
1da177e4 805 if (settings->field_per_buff != 1 &&
0ba514d5
HV
806 settings->field_per_buff != 2) {
807 settings->field_per_buff = clamp(settings->field_per_buff, 1, 2);
1da177e4 808 err0++;
0ba514d5
HV
809 }
810 if (settings->img_x < 0) {
811 settings->img_x = 0;
1da177e4 812 err0++;
0ba514d5
HV
813 }
814 if (settings->img_y < 0) {
815 settings->img_y = 0;
1da177e4 816 err0++;
0ba514d5
HV
817 }
818 if (settings->img_width < 0 || settings->img_width > BUZ_MAX_WIDTH) {
819 settings->img_width = clamp(settings->img_width, 0, (int)BUZ_MAX_WIDTH);
1da177e4 820 err0++;
0ba514d5
HV
821 }
822 if (settings->img_height < 0 || settings->img_height > BUZ_MAX_HEIGHT / 2) {
823 settings->img_height = clamp(settings->img_height, 0, BUZ_MAX_HEIGHT / 2);
1da177e4 824 err0++;
0ba514d5
HV
825 }
826 if (settings->img_x + settings->img_width > BUZ_MAX_WIDTH) {
827 settings->img_x = BUZ_MAX_WIDTH - settings->img_width;
828 err0++;
829 }
830 if (settings->img_y + settings->img_height > BUZ_MAX_HEIGHT / 2) {
831 settings->img_y = BUZ_MAX_HEIGHT / 2 - settings->img_height;
1da177e4 832 err0++;
0ba514d5
HV
833 }
834 if (settings->img_width % (16 * settings->HorDcm) != 0) {
835 settings->img_width -= settings->img_width % (16 * settings->HorDcm);
836 if (settings->img_width == 0)
837 settings->img_width = 16 * settings->HorDcm;
838 err0++;
839 }
840 if (settings->img_height % (8 * settings->VerDcm) != 0) {
841 settings->img_height -= settings->img_height % (8 * settings->VerDcm);
842 if (settings->img_height == 0)
843 settings->img_height = 8 * settings->VerDcm;
1da177e4 844 err0++;
1da177e4
LT
845 }
846
0ba514d5 847 if (!try && err0) {
1da177e4
LT
848 dprintk(1,
849 KERN_ERR
c61402ba
TP
850 "%s: %s - error in params for decimation = 0\n",
851 ZR_DEVNAME(zr), __func__);
1da177e4
LT
852 err++;
853 }
854 break;
855 default:
856 dprintk(1,
857 KERN_ERR
c61402ba
TP
858 "%s: %s - decimation = %d, must be 0, 1, 2 or 4\n",
859 ZR_DEVNAME(zr), __func__, settings->decimation);
1da177e4
LT
860 err++;
861 break;
862 }
863
864 if (settings->jpg_comp.quality > 100)
865 settings->jpg_comp.quality = 100;
866 if (settings->jpg_comp.quality < 5)
867 settings->jpg_comp.quality = 5;
868 if (settings->jpg_comp.APPn < 0)
869 settings->jpg_comp.APPn = 0;
870 if (settings->jpg_comp.APPn > 15)
871 settings->jpg_comp.APPn = 15;
872 if (settings->jpg_comp.APP_len < 0)
873 settings->jpg_comp.APP_len = 0;
874 if (settings->jpg_comp.APP_len > 60)
875 settings->jpg_comp.APP_len = 60;
876 if (settings->jpg_comp.COM_len < 0)
877 settings->jpg_comp.COM_len = 0;
878 if (settings->jpg_comp.COM_len > 60)
879 settings->jpg_comp.COM_len = 60;
880 if (err)
881 return -EINVAL;
882 return 0;
883}
884
885void
886zoran_open_init_params (struct zoran *zr)
887{
888 int i;
889
890 /* User must explicitly set a window */
891 zr->overlay_settings.is_set = 0;
892 zr->overlay_mask = NULL;
893 zr->overlay_active = ZORAN_FREE;
894
895 zr->v4l_memgrab_active = 0;
896 zr->v4l_overlay_active = 0;
897 zr->v4l_grab_frame = NO_GRAB_ACTIVE;
898 zr->v4l_grab_seq = 0;
899 zr->v4l_settings.width = 192;
900 zr->v4l_settings.height = 144;
c014ec90 901 zr->v4l_settings.format = &zoran_formats[7]; /* YUY2 - YUV-4:2:2 packed */
1da177e4
LT
902 zr->v4l_settings.bytesperline =
903 zr->v4l_settings.width *
904 ((zr->v4l_settings.format->depth + 7) / 8);
905
906 /* DMA ring stuff for V4L */
907 zr->v4l_pend_tail = 0;
908 zr->v4l_pend_head = 0;
909 zr->v4l_sync_tail = 0;
910 zr->v4l_buffers.active = ZORAN_FREE;
911 for (i = 0; i < VIDEO_MAX_FRAME; i++) {
912 zr->v4l_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
913 }
914 zr->v4l_buffers.allocated = 0;
915
916 for (i = 0; i < BUZ_MAX_FRAME; i++) {
917 zr->jpg_buffers.buffer[i].state = BUZ_STATE_USER; /* nothing going on */
918 }
919 zr->jpg_buffers.active = ZORAN_FREE;
920 zr->jpg_buffers.allocated = 0;
921 /* Set necessary params and call zoran_check_jpg_settings to set the defaults */
922 zr->jpg_settings.decimation = 1;
923 zr->jpg_settings.jpg_comp.quality = 50; /* default compression factor 8 */
924 if (zr->card.type != BUZ)
925 zr->jpg_settings.odd_even = 1;
926 else
927 zr->jpg_settings.odd_even = 0;
928 zr->jpg_settings.jpg_comp.APPn = 0;
929 zr->jpg_settings.jpg_comp.APP_len = 0; /* No APPn marker */
930 memset(zr->jpg_settings.jpg_comp.APP_data, 0,
931 sizeof(zr->jpg_settings.jpg_comp.APP_data));
932 zr->jpg_settings.jpg_comp.COM_len = 0; /* No COM marker */
933 memset(zr->jpg_settings.jpg_comp.COM_data, 0,
934 sizeof(zr->jpg_settings.jpg_comp.COM_data));
935 zr->jpg_settings.jpg_comp.jpeg_markers =
ad1ecf86 936 V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT;
0ba514d5 937 i = zoran_check_jpg_settings(zr, &zr->jpg_settings, 0);
1da177e4 938 if (i)
c61402ba
TP
939 dprintk(1, KERN_ERR "%s: %s internal error\n",
940 ZR_DEVNAME(zr), __func__);
1da177e4
LT
941
942 clear_interrupt_counters(zr);
943 zr->testing = 0;
944}
945
4c62e976 946static void test_interrupts (struct zoran *zr)
1da177e4
LT
947{
948 DEFINE_WAIT(wait);
949 int timeout, icr;
950
951 clear_interrupt_counters(zr);
952
953 zr->testing = 1;
954 icr = btread(ZR36057_ICR);
955 btwrite(0x78000000 | ZR36057_ICR_IntPinEn, ZR36057_ICR);
956 prepare_to_wait(&zr->test_q, &wait, TASK_INTERRUPTIBLE);
957 timeout = schedule_timeout(HZ);
958 finish_wait(&zr->test_q, &wait);
959 btwrite(0, ZR36057_ICR);
960 btwrite(0x78000000, ZR36057_ISR);
961 zr->testing = 0;
962 dprintk(5, KERN_INFO "%s: Testing interrupts...\n", ZR_DEVNAME(zr));
963 if (timeout) {
964 dprintk(1, ": time spent: %d\n", 1 * HZ - timeout);
965 }
18b548ca 966 if (zr36067_debug > 1)
1da177e4
LT
967 print_interrupts(zr);
968 btwrite(icr, ZR36057_ICR);
969}
970
4c62e976 971static int zr36057_init (struct zoran *zr)
1da177e4 972{
daf72f40 973 int j, err;
1da177e4
LT
974
975 dprintk(1,
976 KERN_INFO
c61402ba
TP
977 "%s: %s - initializing card[%d], zr=%p\n",
978 ZR_DEVNAME(zr), __func__, zr->id, zr);
1da177e4
LT
979
980 /* default setup of all parameters which will persist between opens */
981 zr->user = 0;
982
983 init_waitqueue_head(&zr->v4l_capq);
984 init_waitqueue_head(&zr->jpg_capq);
985 init_waitqueue_head(&zr->test_q);
986 zr->jpg_buffers.allocated = 0;
987 zr->v4l_buffers.allocated = 0;
988
7f6adeaf
HV
989 zr->vbuf_base = (void *) vidmem;
990 zr->vbuf_width = 0;
991 zr->vbuf_height = 0;
992 zr->vbuf_depth = 0;
993 zr->vbuf_bytesperline = 0;
1da177e4
LT
994
995 /* Avoid nonsense settings from user for default input/norm */
b475f4ee 996 if (default_norm < 0 || default_norm > 2)
7f6adeaf
HV
997 default_norm = 0;
998 if (default_norm == 0) {
107063c6
HV
999 zr->norm = V4L2_STD_PAL;
1000 zr->timing = zr->card.tvn[0];
7f6adeaf 1001 } else if (default_norm == 1) {
107063c6
HV
1002 zr->norm = V4L2_STD_NTSC;
1003 zr->timing = zr->card.tvn[1];
1004 } else {
1005 zr->norm = V4L2_STD_SECAM;
1006 zr->timing = zr->card.tvn[2];
1007 }
1008 if (zr->timing == NULL) {
1da177e4
LT
1009 dprintk(1,
1010 KERN_WARNING
c61402ba
TP
1011 "%s: %s - default TV standard not supported by hardware. PAL will be used.\n",
1012 ZR_DEVNAME(zr), __func__);
107063c6
HV
1013 zr->norm = V4L2_STD_PAL;
1014 zr->timing = zr->card.tvn[0];
1da177e4
LT
1015 }
1016
60e3cac4
TP
1017 if (default_input > zr->card.inputs-1) {
1018 dprintk(1,
1019 KERN_WARNING
1020 "%s: default_input value %d out of range (0-%d)\n",
1021 ZR_DEVNAME(zr), default_input, zr->card.inputs-1);
1022 default_input = 0;
1023 }
1024 zr->input = default_input;
1da177e4 1025
1da177e4
LT
1026 /* default setup (will be repeated at every open) */
1027 zoran_open_init_params(zr);
1028
1029 /* allocate memory *before* doing anything to the hardware
1030 * in case allocation fails */
daf72f40 1031 zr->stat_com = kzalloc(BUZ_NUM_STAT_COM * 4, GFP_KERNEL);
6ce3ced4 1032 zr->video_dev = video_device_alloc();
daf72f40 1033 if (!zr->stat_com || !zr->video_dev) {
1da177e4
LT
1034 dprintk(1,
1035 KERN_ERR
c61402ba
TP
1036 "%s: %s - kmalloc (STAT_COM) failed\n",
1037 ZR_DEVNAME(zr), __func__);
daf72f40
JD
1038 err = -ENOMEM;
1039 goto exit_free;
1da177e4 1040 }
1da177e4 1041 for (j = 0; j < BUZ_NUM_STAT_COM; j++) {
9c169df8 1042 zr->stat_com[j] = cpu_to_le32(1); /* mark as unavailable to zr36057 */
1da177e4
LT
1043 }
1044
1045 /*
1046 * Now add the template and register the device unit.
1047 */
7b962d43 1048 *zr->video_dev = zoran_template;
9592bd0a 1049 zr->video_dev->v4l2_dev = &zr->v4l2_dev;
7b962d43 1050 zr->video_dev->lock = &zr->lock;
1da177e4 1051 strcpy(zr->video_dev->name, ZR_DEVNAME(zr));
954f340f
HV
1052 /* It's not a mem2mem device, but you can both capture and output from
1053 one and the same device. This should really be split up into two
1054 device nodes, but that's a job for another day. */
1055 zr->video_dev->vfl_dir = VFL_DIR_M2M;
60e3cac4 1056 err = video_register_device(zr->video_dev, VFL_TYPE_GRABBER, video_nr[zr->id]);
daf72f40 1057 if (err < 0)
66aa66ea 1058 goto exit_free;
601139e0 1059 video_set_drvdata(zr->video_dev, zr);
1da177e4
LT
1060
1061 zoran_init_hardware(zr);
18b548ca 1062 if (zr36067_debug > 2)
1da177e4
LT
1063 detect_guest_activity(zr);
1064 test_interrupts(zr);
1065 if (!pass_through) {
0ab6e1c3 1066 decoder_call(zr, video, s_stream, 0);
5325b427 1067 encoder_call(zr, video, s_routing, 2, 0, 0);
1da177e4
LT
1068 }
1069
1070 zr->zoran_proc = NULL;
1071 zr->initialized = 1;
1072 return 0;
daf72f40 1073
daf72f40
JD
1074exit_free:
1075 kfree(zr->stat_com);
1076 kfree(zr->video_dev);
1077 return err;
1da177e4
LT
1078}
1079
4c62e976 1080static void zoran_remove(struct pci_dev *pdev)
1da177e4 1081{
0ab6e1c3
HV
1082 struct v4l2_device *v4l2_dev = dev_get_drvdata(&pdev->dev);
1083 struct zoran *zr = to_zoran(v4l2_dev);
66aa66ea 1084
1da177e4 1085 if (!zr->initialized)
85b9b8a4 1086 goto exit_free;
66aa66ea 1087
1da177e4
LT
1088 /* unregister videocodec bus */
1089 if (zr->codec) {
1090 struct videocodec_master *master = zr->codec->master_data;
2ea75330 1091
1da177e4 1092 videocodec_detach(zr->codec);
2ea75330 1093 kfree(master);
1da177e4
LT
1094 }
1095 if (zr->vfe) {
1096 struct videocodec_master *master = zr->vfe->master_data;
2ea75330 1097
1da177e4 1098 videocodec_detach(zr->vfe);
2ea75330 1099 kfree(master);
1da177e4
LT
1100 }
1101
1102 /* unregister i2c bus */
1103 zoran_unregister_i2c(zr);
1104 /* disable PCI bus-mastering */
1105 zoran_set_pci_master(zr, 0);
1106 /* put chip into reset */
1107 btwrite(0, ZR36057_SPGPPCR);
1108 free_irq(zr->pci_dev->irq, zr);
1109 /* unmap and free memory */
daf72f40 1110 kfree(zr->stat_com);
1da177e4
LT
1111 zoran_proc_cleanup(zr);
1112 iounmap(zr->zr36057_mem);
1113 pci_disable_device(zr->pci_dev);
1114 video_unregister_device(zr->video_dev);
85b9b8a4 1115exit_free:
e56c597b 1116 v4l2_ctrl_handler_free(&zr->hdl);
0ab6e1c3 1117 v4l2_device_unregister(&zr->v4l2_dev);
85b9b8a4 1118 kfree(zr);
1da177e4
LT
1119}
1120
1121void
1122zoran_vdev_release (struct video_device *vdev)
1123{
1124 kfree(vdev);
1125}
1126
4c62e976
GKH
1127static struct videocodec_master *zoran_setup_videocodec(struct zoran *zr,
1128 int type)
1da177e4
LT
1129{
1130 struct videocodec_master *m = NULL;
1131
1132 m = kmalloc(sizeof(struct videocodec_master), GFP_KERNEL);
1133 if (!m) {
c61402ba
TP
1134 dprintk(1, KERN_ERR "%s: %s - no memory\n",
1135 ZR_DEVNAME(zr), __func__);
1da177e4
LT
1136 return m;
1137 }
1138
22c4a4e9
MCC
1139 /* magic and type are unused for master struct. Makes sense only at
1140 codec structs.
1141 In the past, .type were initialized to the old V4L1 .hardware
1142 value, as VID_HARDWARE_ZR36067
1143 */
1144 m->magic = 0L;
1145 m->type = 0;
1146
1da177e4 1147 m->flags = CODEC_FLAG_ENCODER | CODEC_FLAG_DECODER;
bd0eb12f 1148 strlcpy(m->name, ZR_DEVNAME(zr), sizeof(m->name));
1da177e4
LT
1149 m->data = zr;
1150
1151 switch (type)
1152 {
1153 case CODEC_TYPE_ZR36060:
1154 m->readreg = zr36060_read;
1155 m->writereg = zr36060_write;
1156 m->flags |= CODEC_FLAG_JPEG | CODEC_FLAG_VFE;
1157 break;
1158 case CODEC_TYPE_ZR36050:
1159 m->readreg = zr36050_read;
1160 m->writereg = zr36050_write;
1161 m->flags |= CODEC_FLAG_JPEG;
1162 break;
1163 case CODEC_TYPE_ZR36016:
1164 m->readreg = zr36016_read;
1165 m->writereg = zr36016_write;
1166 m->flags |= CODEC_FLAG_VFE;
1167 break;
1168 }
1169
1170 return m;
1171}
1172
33470423 1173static void zoran_subdev_notify(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1cd3c0fa
HV
1174{
1175 struct zoran *zr = to_zoran(sd->v4l2_dev);
1176
1177 /* Bt819 needs to reset its FIFO buffer using #FRST pin and
1178 LML33 card uses GPIO(7) for that. */
1179 if (cmd == BT819_FIFO_RESET_LOW)
1180 GPIO(zr, 7, 0);
1181 else if (cmd == BT819_FIFO_RESET_HIGH)
1182 GPIO(zr, 7, 1);
1cd3c0fa
HV
1183}
1184
1da177e4 1185/*
c84e6036 1186 * Scan for a Buz card (actually for the PCI controller ZR36057),
1da177e4
LT
1187 * request the irq and map the io memory
1188 */
4c62e976 1189static int zoran_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
1da177e4
LT
1190{
1191 unsigned char latency, need_latency;
1192 struct zoran *zr;
1da177e4
LT
1193 int result;
1194 struct videocodec_master *master_vfe = NULL;
1195 struct videocodec_master *master_codec = NULL;
1196 int card_num;
0ab6e1c3 1197 char *codec_name, *vfe_name;
66aa66ea 1198 unsigned int nr;
1da177e4 1199
1da177e4 1200
601139e0 1201 nr = zoran_num++;
66aa66ea 1202 if (nr >= BUZ_MAX) {
c61402ba 1203 dprintk(1, KERN_ERR "%s: driver limited to %d card(s) maximum\n",
66aa66ea
TP
1204 ZORAN_NAME, BUZ_MAX);
1205 return -ENOENT;
1206 }
1da177e4 1207
66aa66ea
TP
1208 zr = kzalloc(sizeof(struct zoran), GFP_KERNEL);
1209 if (!zr) {
c61402ba
TP
1210 dprintk(1, KERN_ERR "%s: %s - kzalloc failed\n",
1211 ZORAN_NAME, __func__);
66aa66ea
TP
1212 return -ENOMEM;
1213 }
1cd3c0fa 1214 zr->v4l2_dev.notify = zoran_subdev_notify;
0ab6e1c3
HV
1215 if (v4l2_device_register(&pdev->dev, &zr->v4l2_dev))
1216 goto zr_free_mem;
66aa66ea
TP
1217 zr->pci_dev = pdev;
1218 zr->id = nr;
1219 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)), "MJPEG[%u]", zr->id);
e56c597b
HV
1220 if (v4l2_ctrl_handler_init(&zr->hdl, 10))
1221 goto zr_unreg;
1222 zr->v4l2_dev.ctrl_handler = &zr->hdl;
66aa66ea 1223 spin_lock_init(&zr->spinlock);
7b962d43 1224 mutex_init(&zr->lock);
66aa66ea 1225 if (pci_enable_device(pdev))
0ab6e1c3 1226 goto zr_unreg;
abd34d8d 1227 zr->revision = zr->pci_dev->revision;
17faeb20
TP
1228
1229 dprintk(1,
1230 KERN_INFO
5e098b66 1231 "%s: Zoran ZR360%c7 (rev %d), irq: %d, memory: 0x%08llx\n",
17faeb20 1232 ZR_DEVNAME(zr), zr->revision < 2 ? '5' : '6', zr->revision,
5e098b66 1233 zr->pci_dev->irq, (uint64_t)pci_resource_start(zr->pci_dev, 0));
17faeb20 1234 if (zr->revision >= 2) {
66aa66ea
TP
1235 dprintk(1,
1236 KERN_INFO
17faeb20
TP
1237 "%s: Subsystem vendor=0x%04x id=0x%04x\n",
1238 ZR_DEVNAME(zr), zr->pci_dev->subsystem_vendor,
1239 zr->pci_dev->subsystem_device);
1240 }
1da177e4 1241
17faeb20
TP
1242 /* Use auto-detected card type? */
1243 if (card[nr] == -1) {
1244 if (zr->revision < 2) {
1da177e4
LT
1245 dprintk(1,
1246 KERN_ERR
17faeb20
TP
1247 "%s: No card type specified, please use the card=X module parameter\n",
1248 ZR_DEVNAME(zr));
1249 dprintk(1,
1250 KERN_ERR
1251 "%s: It is not possible to auto-detect ZR36057 based cards\n",
1da177e4 1252 ZR_DEVNAME(zr));
0ab6e1c3 1253 goto zr_unreg;
1da177e4
LT
1254 }
1255
17faeb20
TP
1256 card_num = ent->driver_data;
1257 if (card_num >= NUM_CARDS) {
1258 dprintk(1,
1259 KERN_ERR
1260 "%s: Unknown card, try specifying card=X module parameter\n",
66aa66ea 1261 ZR_DEVNAME(zr));
0ab6e1c3 1262 goto zr_unreg;
17faeb20
TP
1263 }
1264 dprintk(3,
1265 KERN_DEBUG
1266 "%s: %s() - card %s detected\n",
1267 ZR_DEVNAME(zr), __func__, zoran_cards[card_num].name);
1268 } else {
1269 card_num = card[nr];
1270 if (card_num >= NUM_CARDS || card_num < 0) {
1271 dprintk(1,
1272 KERN_ERR
1273 "%s: User specified card type %d out of range (0 .. %d)\n",
1274 ZR_DEVNAME(zr), card_num, NUM_CARDS - 1);
0ab6e1c3 1275 goto zr_unreg;
1da177e4 1276 }
66aa66ea 1277 }
1da177e4 1278
66aa66ea
TP
1279 /* even though we make this a non pointer and thus
1280 * theoretically allow for making changes to this struct
1281 * on a per-individual card basis at runtime, this is
1282 * strongly discouraged. This structure is intended to
1283 * keep general card information, no settings or anything */
1284 zr->card = zoran_cards[card_num];
1285 snprintf(ZR_DEVNAME(zr), sizeof(ZR_DEVNAME(zr)),
1286 "%s[%u]", zr->card.name, zr->id);
1287
5e098b66 1288 zr->zr36057_mem = pci_ioremap_bar(zr->pci_dev, 0);
66aa66ea 1289 if (!zr->zr36057_mem) {
c61402ba 1290 dprintk(1, KERN_ERR "%s: %s() - ioremap failed\n",
5e098b66 1291 ZR_DEVNAME(zr), __func__);
0ab6e1c3 1292 goto zr_unreg;
66aa66ea 1293 }
1da177e4 1294
66aa66ea 1295 result = request_irq(zr->pci_dev->irq, zoran_irq,
7b5e71ad 1296 IRQF_SHARED, ZR_DEVNAME(zr), zr);
66aa66ea
TP
1297 if (result < 0) {
1298 if (result == -EINVAL) {
1299 dprintk(1,
1300 KERN_ERR
c61402ba
TP
1301 "%s: %s - bad irq number or handler\n",
1302 ZR_DEVNAME(zr), __func__);
66aa66ea
TP
1303 } else if (result == -EBUSY) {
1304 dprintk(1,
1305 KERN_ERR
c61402ba
TP
1306 "%s: %s - IRQ %d busy, change your PnP config in BIOS\n",
1307 ZR_DEVNAME(zr), __func__, zr->pci_dev->irq);
1da177e4 1308 } else {
66aa66ea
TP
1309 dprintk(1,
1310 KERN_ERR
c61402ba
TP
1311 "%s: %s - can't assign irq, error code %d\n",
1312 ZR_DEVNAME(zr), __func__, result);
1da177e4 1313 }
66aa66ea
TP
1314 goto zr_unmap;
1315 }
1da177e4 1316
66aa66ea
TP
1317 /* set PCI latency timer */
1318 pci_read_config_byte(zr->pci_dev, PCI_LATENCY_TIMER,
1319 &latency);
1320 need_latency = zr->revision > 1 ? 32 : 48;
1321 if (latency != need_latency) {
c61402ba 1322 dprintk(2, KERN_INFO "%s: Changing PCI latency from %d to %d\n",
66aa66ea
TP
1323 ZR_DEVNAME(zr), latency, need_latency);
1324 pci_write_config_byte(zr->pci_dev, PCI_LATENCY_TIMER,
1325 need_latency);
1326 }
1da177e4 1327
66aa66ea
TP
1328 zr36057_restart(zr);
1329 /* i2c */
1330 dprintk(2, KERN_INFO "%s: Initializing i2c bus...\n",
1331 ZR_DEVNAME(zr));
1332
66aa66ea 1333 if (zoran_register_i2c(zr) < 0) {
c61402ba
TP
1334 dprintk(1, KERN_ERR "%s: %s - can't initialize i2c bus\n",
1335 ZR_DEVNAME(zr), __func__);
66aa66ea
TP
1336 goto zr_free_irq;
1337 }
1da177e4 1338
53dacb15 1339 zr->decoder = v4l2_i2c_new_subdev(&zr->v4l2_dev,
9a1f8b34 1340 &zr->i2c_adapter, zr->card.i2c_decoder,
53dacb15 1341 0, zr->card.addrs_decoder);
0ab6e1c3 1342
99f7d81b 1343 if (zr->card.i2c_encoder)
53dacb15 1344 zr->encoder = v4l2_i2c_new_subdev(&zr->v4l2_dev,
9a1f8b34 1345 &zr->i2c_adapter, zr->card.i2c_encoder,
53dacb15 1346 0, zr->card.addrs_encoder);
0ab6e1c3 1347
66aa66ea
TP
1348 dprintk(2,
1349 KERN_INFO "%s: Initializing videocodec bus...\n",
1350 ZR_DEVNAME(zr));
1351
1352 if (zr->card.video_codec) {
1353 codec_name = codecid_to_modulename(zr->card.video_codec);
1354 if (codec_name) {
1355 result = request_module(codec_name);
1356 if (result) {
1da177e4
LT
1357 dprintk(1,
1358 KERN_ERR
1359 "%s: failed to load modules %s: %d\n",
1360 ZR_DEVNAME(zr), codec_name, result);
1361 }
1362 }
66aa66ea
TP
1363 }
1364 if (zr->card.video_vfe) {
1365 vfe_name = codecid_to_modulename(zr->card.video_vfe);
1366 if (vfe_name) {
1367 result = request_module(vfe_name);
1368 if (result < 0) {
1da177e4
LT
1369 dprintk(1,
1370 KERN_ERR
1371 "%s: failed to load modules %s: %d\n",
1372 ZR_DEVNAME(zr), vfe_name, result);
1373 }
1374 }
66aa66ea 1375 }
1da177e4 1376
66aa66ea
TP
1377 /* reset JPEG codec */
1378 jpeg_codec_sleep(zr, 1);
1379 jpeg_codec_reset(zr);
1380 /* video bus enabled */
1381 /* display codec revision */
1382 if (zr->card.video_codec != 0) {
1383 master_codec = zoran_setup_videocodec(zr, zr->card.video_codec);
1384 if (!master_codec)
1385 goto zr_unreg_i2c;
1386 zr->codec = videocodec_attach(master_codec);
1387 if (!zr->codec) {
c61402ba
TP
1388 dprintk(1, KERN_ERR "%s: %s - no codec found\n",
1389 ZR_DEVNAME(zr), __func__);
66aa66ea 1390 goto zr_free_codec;
1da177e4 1391 }
66aa66ea 1392 if (zr->codec->type != zr->card.video_codec) {
c61402ba
TP
1393 dprintk(1, KERN_ERR "%s: %s - wrong codec\n",
1394 ZR_DEVNAME(zr), __func__);
66aa66ea 1395 goto zr_detach_codec;
1da177e4 1396 }
1da177e4 1397 }
66aa66ea
TP
1398 if (zr->card.video_vfe != 0) {
1399 master_vfe = zoran_setup_videocodec(zr, zr->card.video_vfe);
1400 if (!master_vfe)
1401 goto zr_detach_codec;
1402 zr->vfe = videocodec_attach(master_vfe);
1403 if (!zr->vfe) {
c61402ba
TP
1404 dprintk(1, KERN_ERR "%s: %s - no VFE found\n",
1405 ZR_DEVNAME(zr), __func__);
66aa66ea
TP
1406 goto zr_free_vfe;
1407 }
1408 if (zr->vfe->type != zr->card.video_vfe) {
c61402ba
TP
1409 dprintk(1, KERN_ERR "%s: %s = wrong VFE\n",
1410 ZR_DEVNAME(zr), __func__);
66aa66ea
TP
1411 goto zr_detach_vfe;
1412 }
1413 }
e491cbc8 1414
66aa66ea
TP
1415 /* take care of Natoma chipset and a revision 1 zr36057 */
1416 if ((pci_pci_problems & PCIPCI_NATOMA) && zr->revision <= 1) {
1417 zr->jpg_buffers.need_contiguous = 1;
c61402ba 1418 dprintk(1, KERN_INFO
66aa66ea
TP
1419 "%s: ZR36057/Natoma bug, max. buffer size is 128K\n",
1420 ZR_DEVNAME(zr));
1da177e4 1421 }
66aa66ea
TP
1422
1423 if (zr36057_init(zr) < 0)
1424 goto zr_detach_vfe;
1425
1426 zoran_proc_init(zr);
1427
66aa66ea
TP
1428 return 0;
1429
1430zr_detach_vfe:
1431 videocodec_detach(zr->vfe);
1432zr_free_vfe:
1433 kfree(master_vfe);
1434zr_detach_codec:
1435 videocodec_detach(zr->codec);
1436zr_free_codec:
1437 kfree(master_codec);
1438zr_unreg_i2c:
1439 zoran_unregister_i2c(zr);
1440zr_free_irq:
1441 btwrite(0, ZR36057_SPGPPCR);
1442 free_irq(zr->pci_dev->irq, zr);
1443zr_unmap:
1444 iounmap(zr->zr36057_mem);
0ab6e1c3 1445zr_unreg:
e56c597b 1446 v4l2_ctrl_handler_free(&zr->hdl);
0ab6e1c3 1447 v4l2_device_unregister(&zr->v4l2_dev);
66aa66ea
TP
1448zr_free_mem:
1449 kfree(zr);
1450
1451 return -ENODEV;
1da177e4
LT
1452}
1453
66aa66ea
TP
1454static struct pci_driver zoran_driver = {
1455 .name = "zr36067",
1456 .id_table = zr36067_pci_tbl,
1457 .probe = zoran_probe,
4c62e976 1458 .remove = zoran_remove,
66aa66ea
TP
1459};
1460
1461static int __init zoran_init(void)
1da177e4 1462{
66aa66ea 1463 int res;
1da177e4 1464
1990d50b
MCC
1465 printk(KERN_INFO "Zoran MJPEG board driver version %s\n",
1466 ZORAN_VERSION);
1da177e4 1467
1da177e4
LT
1468 /* check the parameters we have been given, adjust if necessary */
1469 if (v4l_nbufs < 2)
1470 v4l_nbufs = 2;
1471 if (v4l_nbufs > VIDEO_MAX_FRAME)
1472 v4l_nbufs = VIDEO_MAX_FRAME;
1473 /* The user specfies the in KB, we want them in byte
1474 * (and page aligned) */
1475 v4l_bufsize = PAGE_ALIGN(v4l_bufsize * 1024);
1476 if (v4l_bufsize < 32768)
1477 v4l_bufsize = 32768;
1478 /* 2 MB is arbitrary but sufficient for the maximum possible images */
1479 if (v4l_bufsize > 2048 * 1024)
1480 v4l_bufsize = 2048 * 1024;
1481 if (jpg_nbufs < 4)
1482 jpg_nbufs = 4;
1483 if (jpg_nbufs > BUZ_MAX_FRAME)
1484 jpg_nbufs = BUZ_MAX_FRAME;
1485 jpg_bufsize = PAGE_ALIGN(jpg_bufsize * 1024);
1486 if (jpg_bufsize < 8192)
1487 jpg_bufsize = 8192;
1488 if (jpg_bufsize > (512 * 1024))
1489 jpg_bufsize = 512 * 1024;
1490 /* Use parameter for vidmem or try to find a video card */
1491 if (vidmem) {
1492 dprintk(1,
1493 KERN_INFO
1494 "%s: Using supplied video memory base address @ 0x%lx\n",
1495 ZORAN_NAME, vidmem);
1496 }
1497
1da177e4 1498 /* some mainboards might not do PCI-PCI data transfer well */
e355880b 1499 if (pci_pci_problems & (PCIPCI_FAIL|PCIAGP_FAIL|PCIPCI_ALIMAGIK)) {
1da177e4
LT
1500 dprintk(1,
1501 KERN_WARNING
e355880b 1502 "%s: chipset does not support reliable PCI-PCI DMA\n",
1da177e4
LT
1503 ZORAN_NAME);
1504 }
1505
66aa66ea
TP
1506 res = pci_register_driver(&zoran_driver);
1507 if (res) {
1508 dprintk(1,
1509 KERN_ERR
1510 "%s: Unable to register ZR36057 driver\n",
1511 ZORAN_NAME);
1512 return res;
1da177e4
LT
1513 }
1514
1515 return 0;
1516}
1517
66aa66ea 1518static void __exit zoran_exit(void)
1da177e4 1519{
66aa66ea 1520 pci_unregister_driver(&zoran_driver);
1da177e4
LT
1521}
1522
66aa66ea
TP
1523module_init(zoran_init);
1524module_exit(zoran_exit);