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[media] v4l2: replace try_mbus_fmt by set_fmt in bridge drivers
[mirror_ubuntu-hirsute-kernel.git] / drivers / media / platform / am437x / am437x-vpfe.c
CommitLineData
417d2e50
BP		 1/*
2 * TI VPFE capture Driver
3 *
4 * Copyright (C) 2013 - 2014 Texas Instruments, Inc.
5 *
6 * Benoit Parrot <bparrot@ti.com>
7 * Lad, Prabhakar <prabhakar.csengg@gmail.com>
8 *
9 * This program is free software; you may redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; version 2 of the License.
12 *
13 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
14 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
15 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
16 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
17 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
18 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
20 * SOFTWARE.
21 */
22
23#include <linux/delay.h>
24#include <linux/err.h>
25#include <linux/init.h>
26#include <linux/interrupt.h>
27#include <linux/io.h>
28#include <linux/module.h>
29#include <linux/pinctrl/consumer.h>
30#include <linux/platform_device.h>
31#include <linux/pm_runtime.h>
32#include <linux/slab.h>
33#include <linux/uaccess.h>
34#include <linux/videodev2.h>
35
36#include <media/v4l2-common.h>
37#include <media/v4l2-ctrls.h>
38#include <media/v4l2-event.h>
39#include <media/v4l2-of.h>
40
41#include "am437x-vpfe.h"
42
43#define VPFE_MODULE_NAME "vpfe"
44#define VPFE_VERSION "0.1.0"
45
46static int debug;
47module_param(debug, int, 0644);
48MODULE_PARM_DESC(debug, "Debug level 0-8");
49
50#define vpfe_dbg(level, dev, fmt, arg...) \
51 v4l2_dbg(level, debug, &dev->v4l2_dev, fmt, ##arg)
52#define vpfe_info(dev, fmt, arg...) \
53 v4l2_info(&dev->v4l2_dev, fmt, ##arg)
54#define vpfe_err(dev, fmt, arg...) \
55 v4l2_err(&dev->v4l2_dev, fmt, ##arg)
56
57/* standard information */
58struct vpfe_standard {
59 v4l2_std_id std_id;
60 unsigned int width;
61 unsigned int height;
62 struct v4l2_fract pixelaspect;
63 int frame_format;
64};
65
42fd3638 66static const struct vpfe_standard vpfe_standards[] = {
417d2e50
BP		 67 {V4L2_STD_525_60, 720, 480, {11, 10}, 1},
68 {V4L2_STD_625_50, 720, 576, {54, 59}, 1},
69};
70
71struct bus_format {
72 unsigned int width;
73 unsigned int bpp;
74};
75
76/*
77 * struct vpfe_fmt - VPFE media bus format information
78 * @name: V4L2 format description
79 * @code: V4L2 media bus format code
80 * @shifted: V4L2 media bus format code for the same pixel layout but
81 * shifted to be 8 bits per pixel. =0 if format is not shiftable.
82 * @pixelformat: V4L2 pixel format FCC identifier
83 * @width: Bits per pixel (when transferred over a bus)
84 * @bpp: Bytes per pixel (when stored in memory)
85 * @supported: Indicates format supported by subdev
86 */
87struct vpfe_fmt {
88 const char *name;
89 u32 fourcc;
90 u32 code;
91 struct bus_format l;
92 struct bus_format s;
93 bool supported;
94 u32 index;
95};
96
97static struct vpfe_fmt formats[] = {
98 {
99 .name = "YUV 4:2:2 packed, YCbYCr",
100 .fourcc = V4L2_PIX_FMT_YUYV,
101 .code = MEDIA_BUS_FMT_YUYV8_2X8,
102 .l.width = 10,
103 .l.bpp = 4,
104 .s.width = 8,
105 .s.bpp = 2,
106 .supported = false,
107 }, {
108 .name = "YUV 4:2:2 packed, CbYCrY",
109 .fourcc = V4L2_PIX_FMT_UYVY,
110 .code = MEDIA_BUS_FMT_UYVY8_2X8,
111 .l.width = 10,
112 .l.bpp = 4,
113 .s.width = 8,
114 .s.bpp = 2,
115 .supported = false,
116 }, {
117 .name = "YUV 4:2:2 packed, YCrYCb",
118 .fourcc = V4L2_PIX_FMT_YVYU,
119 .code = MEDIA_BUS_FMT_YVYU8_2X8,
120 .l.width = 10,
121 .l.bpp = 4,
122 .s.width = 8,
123 .s.bpp = 2,
124 .supported = false,
125 }, {
126 .name = "YUV 4:2:2 packed, CrYCbY",
127 .fourcc = V4L2_PIX_FMT_VYUY,
128 .code = MEDIA_BUS_FMT_VYUY8_2X8,
129 .l.width = 10,
130 .l.bpp = 4,
131 .s.width = 8,
132 .s.bpp = 2,
133 .supported = false,
134 }, {
135 .name = "RAW8 BGGR",
136 .fourcc = V4L2_PIX_FMT_SBGGR8,
137 .code = MEDIA_BUS_FMT_SBGGR8_1X8,
138 .l.width = 10,
139 .l.bpp = 2,
140 .s.width = 8,
141 .s.bpp = 1,
142 .supported = false,
143 }, {
144 .name = "RAW8 GBRG",
145 .fourcc = V4L2_PIX_FMT_SGBRG8,
146 .code = MEDIA_BUS_FMT_SGBRG8_1X8,
147 .l.width = 10,
148 .l.bpp = 2,
149 .s.width = 8,
150 .s.bpp = 1,
151 .supported = false,
152 }, {
153 .name = "RAW8 GRBG",
154 .fourcc = V4L2_PIX_FMT_SGRBG8,
155 .code = MEDIA_BUS_FMT_SGRBG8_1X8,
156 .l.width = 10,
157 .l.bpp = 2,
158 .s.width = 8,
159 .s.bpp = 1,
160 .supported = false,
161 }, {
162 .name = "RAW8 RGGB",
163 .fourcc = V4L2_PIX_FMT_SRGGB8,
164 .code = MEDIA_BUS_FMT_SRGGB8_1X8,
165 .l.width = 10,
166 .l.bpp = 2,
167 .s.width = 8,
168 .s.bpp = 1,
169 .supported = false,
170 }, {
171 .name = "RGB565 (LE)",
172 .fourcc = V4L2_PIX_FMT_RGB565,
173 .code = MEDIA_BUS_FMT_RGB565_2X8_LE,
174 .l.width = 10,
175 .l.bpp = 4,
176 .s.width = 8,
177 .s.bpp = 2,
178 .supported = false,
179 }, {
180 .name = "RGB565 (BE)",
181 .fourcc = V4L2_PIX_FMT_RGB565X,
182 .code = MEDIA_BUS_FMT_RGB565_2X8_BE,
183 .l.width = 10,
184 .l.bpp = 4,
185 .s.width = 8,
186 .s.bpp = 2,
187 .supported = false,
188 },
189};
190
191static int
192__vpfe_get_format(struct vpfe_device *vpfe,
193 struct v4l2_format *format, unsigned int *bpp);
194
195static struct vpfe_fmt *find_format_by_code(unsigned int code)
196{
197 struct vpfe_fmt *fmt;
198 unsigned int k;
199
200 for (k = 0; k < ARRAY_SIZE(formats); k++) {
201 fmt = &formats[k];
202 if (fmt->code == code)
203 return fmt;
204 }
205
206 return NULL;
207}
208
209static struct vpfe_fmt *find_format_by_pix(unsigned int pixelformat)
210{
211 struct vpfe_fmt *fmt;
212 unsigned int k;
213
214 for (k = 0; k < ARRAY_SIZE(formats); k++) {
215 fmt = &formats[k];
216 if (fmt->fourcc == pixelformat)
217 return fmt;
218 }
219
220 return NULL;
221}
222
223static void
224mbus_to_pix(struct vpfe_device *vpfe,
225 const struct v4l2_mbus_framefmt *mbus,
226 struct v4l2_pix_format *pix, unsigned int *bpp)
227{
228 struct vpfe_subdev_info *sdinfo = vpfe->current_subdev;
229 unsigned int bus_width = sdinfo->vpfe_param.bus_width;
230 struct vpfe_fmt *fmt;
231
232 fmt = find_format_by_code(mbus->code);
233 if (WARN_ON(fmt == NULL)) {
234 pr_err("Invalid mbus code set\n");
235 *bpp = 1;
236 return;
237 }
238
239 memset(pix, 0, sizeof(*pix));
240 v4l2_fill_pix_format(pix, mbus);
241 pix->pixelformat = fmt->fourcc;
242 *bpp = (bus_width == 10) ? fmt->l.bpp : fmt->s.bpp;
243
244 /* pitch should be 32 bytes aligned */
245 pix->bytesperline = ALIGN(pix->width * *bpp, 32);
246 pix->sizeimage = pix->bytesperline * pix->height;
247}
248
249static void pix_to_mbus(struct vpfe_device *vpfe,
250 struct v4l2_pix_format *pix_fmt,
251 struct v4l2_mbus_framefmt *mbus_fmt)
252{
253 struct vpfe_fmt *fmt;
254
255 fmt = find_format_by_pix(pix_fmt->pixelformat);
256 if (!fmt) {
257 /* default to first entry */
258 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
259 pix_fmt->pixelformat);
260 fmt = &formats[0];
261 }
262
263 memset(mbus_fmt, 0, sizeof(*mbus_fmt));
264 v4l2_fill_mbus_format(mbus_fmt, pix_fmt, fmt->code);
265}
266
267/* Print Four-character-code (FOURCC) */
268static char *print_fourcc(u32 fmt)
269{
270 static char code[5];
271
272 code[0] = (unsigned char)(fmt & 0xff);
273 code[1] = (unsigned char)((fmt >> 8) & 0xff);
274 code[2] = (unsigned char)((fmt >> 16) & 0xff);
275 code[3] = (unsigned char)((fmt >> 24) & 0xff);
276 code[4] = '\0';
277
278 return code;
279}
280
281static int
282cmp_v4l2_format(const struct v4l2_format *lhs, const struct v4l2_format *rhs)
283{
284 return lhs->type == rhs->type &&
285 lhs->fmt.pix.width == rhs->fmt.pix.width &&
286 lhs->fmt.pix.height == rhs->fmt.pix.height &&
287 lhs->fmt.pix.pixelformat == rhs->fmt.pix.pixelformat &&
288 lhs->fmt.pix.field == rhs->fmt.pix.field &&
289 lhs->fmt.pix.colorspace == rhs->fmt.pix.colorspace &&
290 lhs->fmt.pix.ycbcr_enc == rhs->fmt.pix.ycbcr_enc &&
291 lhs->fmt.pix.quantization == rhs->fmt.pix.quantization;
292}
293
294static inline u32 vpfe_reg_read(struct vpfe_ccdc *ccdc, u32 offset)
295{
296 return ioread32(ccdc->ccdc_cfg.base_addr + offset);
297}
298
299static inline void vpfe_reg_write(struct vpfe_ccdc *ccdc, u32 val, u32 offset)
300{
301 iowrite32(val, ccdc->ccdc_cfg.base_addr + offset);
302}
303
304static inline struct vpfe_device *to_vpfe(struct vpfe_ccdc *ccdc)
305{
306 return container_of(ccdc, struct vpfe_device, ccdc);
307}
308
309static inline struct vpfe_cap_buffer *to_vpfe_buffer(struct vb2_buffer *vb)
310{
311 return container_of(vb, struct vpfe_cap_buffer, vb);
312}
313
314static inline void vpfe_pcr_enable(struct vpfe_ccdc *ccdc, int flag)
315{
316 vpfe_reg_write(ccdc, !!flag, VPFE_PCR);
317}
318
319static void vpfe_config_enable(struct vpfe_ccdc *ccdc, int flag)
320{
321 unsigned int cfg;
322
323 if (!flag) {
324 cfg = vpfe_reg_read(ccdc, VPFE_CONFIG);
325 cfg &= ~(VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT);
326 } else {
327 cfg = VPFE_CONFIG_EN_ENABLE << VPFE_CONFIG_EN_SHIFT;
328 }
329
330 vpfe_reg_write(ccdc, cfg, VPFE_CONFIG);
331}
332
333static void vpfe_ccdc_setwin(struct vpfe_ccdc *ccdc,
334 struct v4l2_rect *image_win,
335 enum ccdc_frmfmt frm_fmt,
336 int bpp)
337{
338 int horz_start, horz_nr_pixels;
339 int vert_start, vert_nr_lines;
340 int val, mid_img;
341
342 /*
343 * ppc - per pixel count. indicates how many pixels per cell
344 * output to SDRAM. example, for ycbcr, it is one y and one c, so 2.
345 * raw capture this is 1
346 */
347 horz_start = image_win->left * bpp;
348 horz_nr_pixels = (image_win->width * bpp) - 1;
349 vpfe_reg_write(ccdc, (horz_start << VPFE_HORZ_INFO_SPH_SHIFT) |
350 horz_nr_pixels, VPFE_HORZ_INFO);
351
352 vert_start = image_win->top;
353
354 if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
355 vert_nr_lines = (image_win->height >> 1) - 1;
356 vert_start >>= 1;
357 /* Since first line doesn't have any data */
358 vert_start += 1;
359 /* configure VDINT0 */
360 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT);
361 } else {
362 /* Since first line doesn't have any data */
363 vert_start += 1;
364 vert_nr_lines = image_win->height - 1;
365 /*
366 * configure VDINT0 and VDINT1. VDINT1 will be at half
367 * of image height
368 */
369 mid_img = vert_start + (image_win->height / 2);
370 val = (vert_start << VPFE_VDINT_VDINT0_SHIFT) |
371 (mid_img & VPFE_VDINT_VDINT1_MASK);
372 }
373
374 vpfe_reg_write(ccdc, val, VPFE_VDINT);
375
376 vpfe_reg_write(ccdc, (vert_start << VPFE_VERT_START_SLV0_SHIFT) |
377 vert_start, VPFE_VERT_START);
378 vpfe_reg_write(ccdc, vert_nr_lines, VPFE_VERT_LINES);
379}
380
381static void vpfe_reg_dump(struct vpfe_ccdc *ccdc)
382{
383 struct vpfe_device *vpfe = to_vpfe(ccdc);
384
385 vpfe_dbg(3, vpfe, "ALAW: 0x%x\n", vpfe_reg_read(ccdc, VPFE_ALAW));
386 vpfe_dbg(3, vpfe, "CLAMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_CLAMP));
387 vpfe_dbg(3, vpfe, "DCSUB: 0x%x\n", vpfe_reg_read(ccdc, VPFE_DCSUB));
388 vpfe_dbg(3, vpfe, "BLKCMP: 0x%x\n", vpfe_reg_read(ccdc, VPFE_BLKCMP));
389 vpfe_dbg(3, vpfe, "COLPTN: 0x%x\n", vpfe_reg_read(ccdc, VPFE_COLPTN));
390 vpfe_dbg(3, vpfe, "SDOFST: 0x%x\n", vpfe_reg_read(ccdc, VPFE_SDOFST));
391 vpfe_dbg(3, vpfe, "SYN_MODE: 0x%x\n",
392 vpfe_reg_read(ccdc, VPFE_SYNMODE));
393 vpfe_dbg(3, vpfe, "HSIZE_OFF: 0x%x\n",
394 vpfe_reg_read(ccdc, VPFE_HSIZE_OFF));
395 vpfe_dbg(3, vpfe, "HORZ_INFO: 0x%x\n",
396 vpfe_reg_read(ccdc, VPFE_HORZ_INFO));
397 vpfe_dbg(3, vpfe, "VERT_START: 0x%x\n",
398 vpfe_reg_read(ccdc, VPFE_VERT_START));
399 vpfe_dbg(3, vpfe, "VERT_LINES: 0x%x\n",
400 vpfe_reg_read(ccdc, VPFE_VERT_LINES));
401}
402
403static int
404vpfe_ccdc_validate_param(struct vpfe_ccdc *ccdc,
405 struct vpfe_ccdc_config_params_raw *ccdcparam)
406{
407 struct vpfe_device *vpfe = to_vpfe(ccdc);
408 u8 max_gamma, max_data;
409
410 if (!ccdcparam->alaw.enable)
411 return 0;
412
413 max_gamma = ccdc_gamma_width_max_bit(ccdcparam->alaw.gamma_wd);
414 max_data = ccdc_data_size_max_bit(ccdcparam->data_sz);
415
416 if (ccdcparam->alaw.gamma_wd > VPFE_CCDC_GAMMA_BITS_09_0 ||
417 ccdcparam->alaw.gamma_wd < VPFE_CCDC_GAMMA_BITS_15_6 ||
418 max_gamma > max_data) {
419 vpfe_dbg(1, vpfe, "Invalid data line select\n");
420 return -EINVAL;
421 }
422
423 return 0;
424}
425
426static void
427vpfe_ccdc_update_raw_params(struct vpfe_ccdc *ccdc,
428 struct vpfe_ccdc_config_params_raw *raw_params)
429{
430 struct vpfe_ccdc_config_params_raw *config_params =
431 &ccdc->ccdc_cfg.bayer.config_params;
432
adf98ffe 433 *config_params = *raw_params;
417d2e50
BP		 434}
435
436/*
437 * vpfe_ccdc_restore_defaults()
438 * This function will write defaults to all CCDC registers
439 */
440static void vpfe_ccdc_restore_defaults(struct vpfe_ccdc *ccdc)
441{
442 int i;
443
444 /* Disable CCDC */
445 vpfe_pcr_enable(ccdc, 0);
446
447 /* set all registers to default value */
448 for (i = 4; i <= 0x94; i += 4)
449 vpfe_reg_write(ccdc, 0, i);
450
451 vpfe_reg_write(ccdc, VPFE_NO_CULLING, VPFE_CULLING);
452 vpfe_reg_write(ccdc, VPFE_CCDC_GAMMA_BITS_11_2, VPFE_ALAW);
453}
454
455static int vpfe_ccdc_close(struct vpfe_ccdc *ccdc, struct device *dev)
456{
457 int dma_cntl, i, pcr;
458
459 /* If the CCDC module is still busy wait for it to be done */
460 for (i = 0; i < 10; i++) {
461 usleep_range(5000, 6000);
462 pcr = vpfe_reg_read(ccdc, VPFE_PCR);
463 if (!pcr)
464 break;
465
466 /* make sure it it is disabled */
467 vpfe_pcr_enable(ccdc, 0);
468 }
469
470 /* Disable CCDC by resetting all register to default POR values */
471 vpfe_ccdc_restore_defaults(ccdc);
472
473 /* if DMA_CNTL overflow bit is set. Clear it
474 * It appears to take a while for this to become quiescent ~20ms
475 */
476 for (i = 0; i < 10; i++) {
477 dma_cntl = vpfe_reg_read(ccdc, VPFE_DMA_CNTL);
478 if (!(dma_cntl & VPFE_DMA_CNTL_OVERFLOW))
479 break;
480
481 /* Clear the overflow bit */
482 vpfe_reg_write(ccdc, dma_cntl, VPFE_DMA_CNTL);
483 usleep_range(5000, 6000);
484 }
485
486 /* Disabled the module at the CONFIG level */
487 vpfe_config_enable(ccdc, 0);
488
489 pm_runtime_put_sync(dev);
490
491 return 0;
492}
493
494static int vpfe_ccdc_set_params(struct vpfe_ccdc *ccdc, void __user *params)
495{
496 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
497 struct vpfe_ccdc_config_params_raw raw_params;
498 int x;
499
500 if (ccdc->ccdc_cfg.if_type != VPFE_RAW_BAYER)
501 return -EINVAL;
502
503 x = copy_from_user(&raw_params, params, sizeof(raw_params));
504 if (x) {
505 vpfe_dbg(1, vpfe,
506 "vpfe_ccdc_set_params: error in copying ccdc params, %d\n",
507 x);
508 return -EFAULT;
509 }
510
511 if (!vpfe_ccdc_validate_param(ccdc, &raw_params)) {
512 vpfe_ccdc_update_raw_params(ccdc, &raw_params);
f396573e 513 return 0;
417d2e50
BP		 514 }
515
516 return -EINVAL;
517}
518
519/*
520 * vpfe_ccdc_config_ycbcr()
521 * This function will configure CCDC for YCbCr video capture
522 */
523static void vpfe_ccdc_config_ycbcr(struct vpfe_ccdc *ccdc)
524{
525 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
526 struct ccdc_params_ycbcr *params = &ccdc->ccdc_cfg.ycbcr;
527 u32 syn_mode;
528
529 vpfe_dbg(3, vpfe, "vpfe_ccdc_config_ycbcr:\n");
530 /*
531 * first restore the CCDC registers to default values
532 * This is important since we assume default values to be set in
533 * a lot of registers that we didn't touch
534 */
535 vpfe_ccdc_restore_defaults(ccdc);
536
537 /*
538 * configure pixel format, frame format, configure video frame
539 * format, enable output to SDRAM, enable internal timing generator
540 * and 8bit pack mode
541 */
542 syn_mode = (((params->pix_fmt & VPFE_SYN_MODE_INPMOD_MASK) <<
543 VPFE_SYN_MODE_INPMOD_SHIFT) |
544 ((params->frm_fmt & VPFE_SYN_FLDMODE_MASK) <<
545 VPFE_SYN_FLDMODE_SHIFT) | VPFE_VDHDEN_ENABLE |
546 VPFE_WEN_ENABLE | VPFE_DATA_PACK_ENABLE);
547
548 /* setup BT.656 sync mode */
549 if (params->bt656_enable) {
550 vpfe_reg_write(ccdc, VPFE_REC656IF_BT656_EN, VPFE_REC656IF);
551
552 /*
553 * configure the FID, VD, HD pin polarity,
554 * fld,hd pol positive, vd negative, 8-bit data
555 */
556 syn_mode |= VPFE_SYN_MODE_VD_POL_NEGATIVE;
557 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
558 syn_mode |= VPFE_SYN_MODE_10BITS;
559 else
560 syn_mode |= VPFE_SYN_MODE_8BITS;
561 } else {
562 /* y/c external sync mode */
563 syn_mode |= (((params->fid_pol & VPFE_FID_POL_MASK) <<
564 VPFE_FID_POL_SHIFT) |
565 ((params->hd_pol & VPFE_HD_POL_MASK) <<
566 VPFE_HD_POL_SHIFT) |
567 ((params->vd_pol & VPFE_VD_POL_MASK) <<
568 VPFE_VD_POL_SHIFT));
569 }
570 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
571
572 /* configure video window */
573 vpfe_ccdc_setwin(ccdc, &params->win,
574 params->frm_fmt, params->bytesperpixel);
575
576 /*
577 * configure the order of y cb cr in SDRAM, and disable latch
578 * internal register on vsync
579 */
580 if (ccdc->ccdc_cfg.if_type == VPFE_BT656_10BIT)
581 vpfe_reg_write(ccdc,
582 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
583 VPFE_LATCH_ON_VSYNC_DISABLE |
584 VPFE_CCDCFG_BW656_10BIT, VPFE_CCDCFG);
585 else
586 vpfe_reg_write(ccdc,
587 (params->pix_order << VPFE_CCDCFG_Y8POS_SHIFT) |
588 VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
589
590 /*
591 * configure the horizontal line offset. This should be a
592 * on 32 byte boundary. So clear LSB 5 bits
593 */
594 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
595
596 /* configure the memory line offset */
597 if (params->buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED)
598 /* two fields are interleaved in memory */
599 vpfe_reg_write(ccdc, VPFE_SDOFST_FIELD_INTERLEAVED,
600 VPFE_SDOFST);
601}
602
603static void
604vpfe_ccdc_config_black_clamp(struct vpfe_ccdc *ccdc,
605 struct vpfe_ccdc_black_clamp *bclamp)
606{
607 u32 val;
608
609 if (!bclamp->enable) {
610 /* configure DCSub */
611 val = (bclamp->dc_sub) & VPFE_BLK_DC_SUB_MASK;
612 vpfe_reg_write(ccdc, val, VPFE_DCSUB);
613 vpfe_reg_write(ccdc, VPFE_CLAMP_DEFAULT_VAL, VPFE_CLAMP);
614 return;
615 }
616 /*
617 * Configure gain, Start pixel, No of line to be avg,
618 * No of pixel/line to be avg, & Enable the Black clamping
619 */
620 val = ((bclamp->sgain & VPFE_BLK_SGAIN_MASK) |
621 ((bclamp->start_pixel & VPFE_BLK_ST_PXL_MASK) <<
622 VPFE_BLK_ST_PXL_SHIFT) |
623 ((bclamp->sample_ln & VPFE_BLK_SAMPLE_LINE_MASK) <<
624 VPFE_BLK_SAMPLE_LINE_SHIFT) |
625 ((bclamp->sample_pixel & VPFE_BLK_SAMPLE_LN_MASK) <<
626 VPFE_BLK_SAMPLE_LN_SHIFT) | VPFE_BLK_CLAMP_ENABLE);
627 vpfe_reg_write(ccdc, val, VPFE_CLAMP);
628 /* If Black clamping is enable then make dcsub 0 */
629 vpfe_reg_write(ccdc, VPFE_DCSUB_DEFAULT_VAL, VPFE_DCSUB);
630}
631
632static void
633vpfe_ccdc_config_black_compense(struct vpfe_ccdc *ccdc,
634 struct vpfe_ccdc_black_compensation *bcomp)
635{
636 u32 val;
637
638 val = ((bcomp->b & VPFE_BLK_COMP_MASK) |
639 ((bcomp->gb & VPFE_BLK_COMP_MASK) <<
640 VPFE_BLK_COMP_GB_COMP_SHIFT) |
641 ((bcomp->gr & VPFE_BLK_COMP_MASK) <<
642 VPFE_BLK_COMP_GR_COMP_SHIFT) |
643 ((bcomp->r & VPFE_BLK_COMP_MASK) <<
644 VPFE_BLK_COMP_R_COMP_SHIFT));
645 vpfe_reg_write(ccdc, val, VPFE_BLKCMP);
646}
647
648/*
649 * vpfe_ccdc_config_raw()
650 * This function will configure CCDC for Raw capture mode
651 */
652static void vpfe_ccdc_config_raw(struct vpfe_ccdc *ccdc)
653{
654 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
655 struct vpfe_ccdc_config_params_raw *config_params =
656 &ccdc->ccdc_cfg.bayer.config_params;
657 struct ccdc_params_raw *params = &ccdc->ccdc_cfg.bayer;
658 unsigned int syn_mode;
659 unsigned int val;
660
661 vpfe_dbg(3, vpfe, "vpfe_ccdc_config_raw:\n");
662
663 /* Reset CCDC */
664 vpfe_ccdc_restore_defaults(ccdc);
665
666 /* Disable latching function registers on VSYNC */
667 vpfe_reg_write(ccdc, VPFE_LATCH_ON_VSYNC_DISABLE, VPFE_CCDCFG);
668
669 /*
670 * Configure the vertical sync polarity(SYN_MODE.VDPOL),
671 * horizontal sync polarity (SYN_MODE.HDPOL), frame id polarity
672 * (SYN_MODE.FLDPOL), frame format(progressive or interlace),
673 * data size(SYNMODE.DATSIZ), &pixel format (Input mode), output
674 * SDRAM, enable internal timing generator
675 */
676 syn_mode = (((params->vd_pol & VPFE_VD_POL_MASK) << VPFE_VD_POL_SHIFT) |
677 ((params->hd_pol & VPFE_HD_POL_MASK) << VPFE_HD_POL_SHIFT) |
678 ((params->fid_pol & VPFE_FID_POL_MASK) <<
679 VPFE_FID_POL_SHIFT) | ((params->frm_fmt &
680 VPFE_FRM_FMT_MASK) << VPFE_FRM_FMT_SHIFT) |
681 ((config_params->data_sz & VPFE_DATA_SZ_MASK) <<
682 VPFE_DATA_SZ_SHIFT) | ((params->pix_fmt &
683 VPFE_PIX_FMT_MASK) << VPFE_PIX_FMT_SHIFT) |
684 VPFE_WEN_ENABLE | VPFE_VDHDEN_ENABLE);
685
686 /* Enable and configure aLaw register if needed */
687 if (config_params->alaw.enable) {
688 val = ((config_params->alaw.gamma_wd &
689 VPFE_ALAW_GAMMA_WD_MASK) | VPFE_ALAW_ENABLE);
690 vpfe_reg_write(ccdc, val, VPFE_ALAW);
691 vpfe_dbg(3, vpfe, "\nWriting 0x%x to ALAW...\n", val);
692 }
693
694 /* Configure video window */
695 vpfe_ccdc_setwin(ccdc, &params->win, params->frm_fmt,
696 params->bytesperpixel);
697
698 /* Configure Black Clamp */
699 vpfe_ccdc_config_black_clamp(ccdc, &config_params->blk_clamp);
700
701 /* Configure Black level compensation */
702 vpfe_ccdc_config_black_compense(ccdc, &config_params->blk_comp);
703
704 /* If data size is 8 bit then pack the data */
705 if ((config_params->data_sz == VPFE_CCDC_DATA_8BITS) ||
706 config_params->alaw.enable)
707 syn_mode |= VPFE_DATA_PACK_ENABLE;
708
709 /*
710 * Configure Horizontal offset register. If pack 8 is enabled then
711 * 1 pixel will take 1 byte
712 */
713 vpfe_reg_write(ccdc, params->bytesperline, VPFE_HSIZE_OFF);
714
715 vpfe_dbg(3, vpfe, "Writing %d (%x) to HSIZE_OFF\n",
716 params->bytesperline, params->bytesperline);
717
718 /* Set value for SDOFST */
719 if (params->frm_fmt == CCDC_FRMFMT_INTERLACED) {
720 if (params->image_invert_enable) {
721 /* For interlace inverse mode */
722 vpfe_reg_write(ccdc, VPFE_INTERLACED_IMAGE_INVERT,
723 VPFE_SDOFST);
724 } else {
725 /* For interlace non inverse mode */
726 vpfe_reg_write(ccdc, VPFE_INTERLACED_NO_IMAGE_INVERT,
727 VPFE_SDOFST);
728 }
729 } else if (params->frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
730 vpfe_reg_write(ccdc, VPFE_PROGRESSIVE_NO_IMAGE_INVERT,
731 VPFE_SDOFST);
732 }
733
734 vpfe_reg_write(ccdc, syn_mode, VPFE_SYNMODE);
735
736 vpfe_reg_dump(ccdc);
737}
738
739static inline int
740vpfe_ccdc_set_buftype(struct vpfe_ccdc *ccdc,
741 enum ccdc_buftype buf_type)
742{
743 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
744 ccdc->ccdc_cfg.bayer.buf_type = buf_type;
745 else
746 ccdc->ccdc_cfg.ycbcr.buf_type = buf_type;
747
748 return 0;
749}
750
751static inline enum ccdc_buftype vpfe_ccdc_get_buftype(struct vpfe_ccdc *ccdc)
752{
753 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
754 return ccdc->ccdc_cfg.bayer.buf_type;
755
756 return ccdc->ccdc_cfg.ycbcr.buf_type;
757}
758
759static int vpfe_ccdc_set_pixel_format(struct vpfe_ccdc *ccdc, u32 pixfmt)
760{
761 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
762
763 vpfe_dbg(1, vpfe, "vpfe_ccdc_set_pixel_format: if_type: %d, pixfmt:%s\n",
764 ccdc->ccdc_cfg.if_type, print_fourcc(pixfmt));
765
766 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
767 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
768 /*
769 * Need to clear it in case it was left on
770 * after the last capture.
771 */
772 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 0;
773
774 switch (pixfmt) {
775 case V4L2_PIX_FMT_SBGGR8:
776 ccdc->ccdc_cfg.bayer.config_params.alaw.enable = 1;
777 break;
778
779 case V4L2_PIX_FMT_YUYV:
780 case V4L2_PIX_FMT_UYVY:
781 case V4L2_PIX_FMT_YUV420:
782 case V4L2_PIX_FMT_NV12:
783 case V4L2_PIX_FMT_RGB565X:
784 break;
785
786 case V4L2_PIX_FMT_SBGGR16:
787 default:
788 return -EINVAL;
789 }
790 } else {
791 switch (pixfmt) {
792 case V4L2_PIX_FMT_YUYV:
793 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_YCBYCR;
794 break;
795
796 case V4L2_PIX_FMT_UYVY:
797 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
798 break;
799
800 default:
801 return -EINVAL;
802 }
803 }
804
805 return 0;
806}
807
808static u32 vpfe_ccdc_get_pixel_format(struct vpfe_ccdc *ccdc)
809{
810 u32 pixfmt;
811
812 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
813 pixfmt = V4L2_PIX_FMT_YUYV;
814 } else {
815 if (ccdc->ccdc_cfg.ycbcr.pix_order == CCDC_PIXORDER_YCBYCR)
816 pixfmt = V4L2_PIX_FMT_YUYV;
817 else
818 pixfmt = V4L2_PIX_FMT_UYVY;
819 }
820
821 return pixfmt;
822}
823
824static int
825vpfe_ccdc_set_image_window(struct vpfe_ccdc *ccdc,
826 struct v4l2_rect *win, unsigned int bpp)
827{
828 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER) {
829 ccdc->ccdc_cfg.bayer.win = *win;
830 ccdc->ccdc_cfg.bayer.bytesperpixel = bpp;
831 ccdc->ccdc_cfg.bayer.bytesperline = ALIGN(win->width * bpp, 32);
832 } else {
833 ccdc->ccdc_cfg.ycbcr.win = *win;
834 ccdc->ccdc_cfg.ycbcr.bytesperpixel = bpp;
835 ccdc->ccdc_cfg.ycbcr.bytesperline = ALIGN(win->width * bpp, 32);
836 }
837
838 return 0;
839}
840
841static inline void
842vpfe_ccdc_get_image_window(struct vpfe_ccdc *ccdc,
843 struct v4l2_rect *win)
844{
845 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
846 *win = ccdc->ccdc_cfg.bayer.win;
847 else
848 *win = ccdc->ccdc_cfg.ycbcr.win;
849}
850
851static inline unsigned int vpfe_ccdc_get_line_length(struct vpfe_ccdc *ccdc)
852{
853 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
854 return ccdc->ccdc_cfg.bayer.bytesperline;
855
856 return ccdc->ccdc_cfg.ycbcr.bytesperline;
857}
858
859static inline int
860vpfe_ccdc_set_frame_format(struct vpfe_ccdc *ccdc,
861 enum ccdc_frmfmt frm_fmt)
862{
863 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
864 ccdc->ccdc_cfg.bayer.frm_fmt = frm_fmt;
865 else
866 ccdc->ccdc_cfg.ycbcr.frm_fmt = frm_fmt;
867
868 return 0;
869}
870
871static inline enum ccdc_frmfmt
872vpfe_ccdc_get_frame_format(struct vpfe_ccdc *ccdc)
873{
874 if (ccdc->ccdc_cfg.if_type == VPFE_RAW_BAYER)
875 return ccdc->ccdc_cfg.bayer.frm_fmt;
876
877 return ccdc->ccdc_cfg.ycbcr.frm_fmt;
878}
879
880static inline int vpfe_ccdc_getfid(struct vpfe_ccdc *ccdc)
881{
882 return (vpfe_reg_read(ccdc, VPFE_SYNMODE) >> 15) & 1;
883}
884
885static inline void vpfe_set_sdr_addr(struct vpfe_ccdc *ccdc, unsigned long addr)
886{
887 vpfe_reg_write(ccdc, addr & 0xffffffe0, VPFE_SDR_ADDR);
888}
889
890static int vpfe_ccdc_set_hw_if_params(struct vpfe_ccdc *ccdc,
891 struct vpfe_hw_if_param *params)
892{
893 struct vpfe_device *vpfe = container_of(ccdc, struct vpfe_device, ccdc);
894
895 ccdc->ccdc_cfg.if_type = params->if_type;
896
897 switch (params->if_type) {
898 case VPFE_BT656:
899 case VPFE_YCBCR_SYNC_16:
900 case VPFE_YCBCR_SYNC_8:
901 case VPFE_BT656_10BIT:
902 ccdc->ccdc_cfg.ycbcr.vd_pol = params->vdpol;
903 ccdc->ccdc_cfg.ycbcr.hd_pol = params->hdpol;
904 break;
905
906 case VPFE_RAW_BAYER:
907 ccdc->ccdc_cfg.bayer.vd_pol = params->vdpol;
908 ccdc->ccdc_cfg.bayer.hd_pol = params->hdpol;
909 if (params->bus_width == 10)
910 ccdc->ccdc_cfg.bayer.config_params.data_sz =
911 VPFE_CCDC_DATA_10BITS;
912 else
913 ccdc->ccdc_cfg.bayer.config_params.data_sz =
914 VPFE_CCDC_DATA_8BITS;
915 vpfe_dbg(1, vpfe, "params.bus_width: %d\n",
916 params->bus_width);
917 vpfe_dbg(1, vpfe, "config_params.data_sz: %d\n",
918 ccdc->ccdc_cfg.bayer.config_params.data_sz);
919 break;
920
921 default:
922 return -EINVAL;
923 }
924
925 return 0;
926}
927
928static void vpfe_clear_intr(struct vpfe_ccdc *ccdc, int vdint)
929{
930 unsigned int vpfe_int_status;
931
932 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
933
934 switch (vdint) {
935 /* VD0 interrupt */
936 case VPFE_VDINT0:
937 vpfe_int_status &= ~VPFE_VDINT0;
938 vpfe_int_status |= VPFE_VDINT0;
939 break;
940
941 /* VD1 interrupt */
942 case VPFE_VDINT1:
943 vpfe_int_status &= ~VPFE_VDINT1;
944 vpfe_int_status |= VPFE_VDINT1;
945 break;
946
947 /* VD2 interrupt */
948 case VPFE_VDINT2:
949 vpfe_int_status &= ~VPFE_VDINT2;
950 vpfe_int_status |= VPFE_VDINT2;
951 break;
952
953 /* Clear all interrupts */
954 default:
955 vpfe_int_status &= ~(VPFE_VDINT0 |
956 VPFE_VDINT1 |
957 VPFE_VDINT2);
958 vpfe_int_status |= (VPFE_VDINT0 |
959 VPFE_VDINT1 |
960 VPFE_VDINT2);
961 break;
962 }
963 /* Clear specific VDINT from the status register */
964 vpfe_reg_write(ccdc, vpfe_int_status, VPFE_IRQ_STS);
965
966 vpfe_int_status = vpfe_reg_read(ccdc, VPFE_IRQ_STS);
967
968 /* Acknowledge that we are done with all interrupts */
969 vpfe_reg_write(ccdc, 1, VPFE_IRQ_EOI);
970}
971
972static void vpfe_ccdc_config_defaults(struct vpfe_ccdc *ccdc)
973{
974 ccdc->ccdc_cfg.if_type = VPFE_RAW_BAYER;
975
976 ccdc->ccdc_cfg.ycbcr.pix_fmt = CCDC_PIXFMT_YCBCR_8BIT;
977 ccdc->ccdc_cfg.ycbcr.frm_fmt = CCDC_FRMFMT_INTERLACED;
978 ccdc->ccdc_cfg.ycbcr.fid_pol = VPFE_PINPOL_POSITIVE;
979 ccdc->ccdc_cfg.ycbcr.vd_pol = VPFE_PINPOL_POSITIVE;
980 ccdc->ccdc_cfg.ycbcr.hd_pol = VPFE_PINPOL_POSITIVE;
981 ccdc->ccdc_cfg.ycbcr.pix_order = CCDC_PIXORDER_CBYCRY;
982 ccdc->ccdc_cfg.ycbcr.buf_type = CCDC_BUFTYPE_FLD_INTERLEAVED;
983
984 ccdc->ccdc_cfg.ycbcr.win.left = 0;
985 ccdc->ccdc_cfg.ycbcr.win.top = 0;
986 ccdc->ccdc_cfg.ycbcr.win.width = 720;
987 ccdc->ccdc_cfg.ycbcr.win.height = 576;
988 ccdc->ccdc_cfg.ycbcr.bt656_enable = 1;
989
990 ccdc->ccdc_cfg.bayer.pix_fmt = CCDC_PIXFMT_RAW;
991 ccdc->ccdc_cfg.bayer.frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
992 ccdc->ccdc_cfg.bayer.fid_pol = VPFE_PINPOL_POSITIVE;
993 ccdc->ccdc_cfg.bayer.vd_pol = VPFE_PINPOL_POSITIVE;
994 ccdc->ccdc_cfg.bayer.hd_pol = VPFE_PINPOL_POSITIVE;
995
996 ccdc->ccdc_cfg.bayer.win.left = 0;
997 ccdc->ccdc_cfg.bayer.win.top = 0;
998 ccdc->ccdc_cfg.bayer.win.width = 800;
999 ccdc->ccdc_cfg.bayer.win.height = 600;
1000 ccdc->ccdc_cfg.bayer.config_params.data_sz = VPFE_CCDC_DATA_8BITS;
1001 ccdc->ccdc_cfg.bayer.config_params.alaw.gamma_wd =
1002 VPFE_CCDC_GAMMA_BITS_09_0;
1003}
1004
1005/*
1006 * vpfe_get_ccdc_image_format - Get image parameters based on CCDC settings
1007 */
1008static int vpfe_get_ccdc_image_format(struct vpfe_device *vpfe,
1009 struct v4l2_format *f)
1010{
1011 struct v4l2_rect image_win;
1012 enum ccdc_buftype buf_type;
1013 enum ccdc_frmfmt frm_fmt;
1014
1015 memset(f, 0, sizeof(*f));
1016 f->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1017 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1018 f->fmt.pix.width = image_win.width;
1019 f->fmt.pix.height = image_win.height;
1020 f->fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
1021 f->fmt.pix.sizeimage = f->fmt.pix.bytesperline *
1022 f->fmt.pix.height;
1023 buf_type = vpfe_ccdc_get_buftype(&vpfe->ccdc);
1024 f->fmt.pix.pixelformat = vpfe_ccdc_get_pixel_format(&vpfe->ccdc);
1025 frm_fmt = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1026
1027 if (frm_fmt == CCDC_FRMFMT_PROGRESSIVE) {
1028 f->fmt.pix.field = V4L2_FIELD_NONE;
1029 } else if (frm_fmt == CCDC_FRMFMT_INTERLACED) {
1030 if (buf_type == CCDC_BUFTYPE_FLD_INTERLEAVED) {
1031 f->fmt.pix.field = V4L2_FIELD_INTERLACED;
1032 } else if (buf_type == CCDC_BUFTYPE_FLD_SEPARATED) {
1033 f->fmt.pix.field = V4L2_FIELD_SEQ_TB;
1034 } else {
1035 vpfe_err(vpfe, "Invalid buf_type\n");
1036 return -EINVAL;
1037 }
1038 } else {
1039 vpfe_err(vpfe, "Invalid frm_fmt\n");
1040 return -EINVAL;
1041 }
1042 return 0;
1043}
1044
1045static int vpfe_config_ccdc_image_format(struct vpfe_device *vpfe)
1046{
1047 enum ccdc_frmfmt frm_fmt = CCDC_FRMFMT_INTERLACED;
1048 int ret;
1049
1050 vpfe_dbg(2, vpfe, "vpfe_config_ccdc_image_format\n");
1051
1052 vpfe_dbg(1, vpfe, "pixelformat: %s\n",
1053 print_fourcc(vpfe->fmt.fmt.pix.pixelformat));
1054
1055 if (vpfe_ccdc_set_pixel_format(&vpfe->ccdc,
1056 vpfe->fmt.fmt.pix.pixelformat) < 0) {
1057 vpfe_err(vpfe, "couldn't set pix format in ccdc\n");
1058 return -EINVAL;
1059 }
1060
1061 /* configure the image window */
1062 vpfe_ccdc_set_image_window(&vpfe->ccdc, &vpfe->crop, vpfe->bpp);
1063
1064 switch (vpfe->fmt.fmt.pix.field) {
1065 case V4L2_FIELD_INTERLACED:
1066 /* do nothing, since it is default */
1067 ret = vpfe_ccdc_set_buftype(
1068 &vpfe->ccdc,
1069 CCDC_BUFTYPE_FLD_INTERLEAVED);
1070 break;
1071
1072 case V4L2_FIELD_NONE:
1073 frm_fmt = CCDC_FRMFMT_PROGRESSIVE;
1074 /* buffer type only applicable for interlaced scan */
1075 break;
1076
1077 case V4L2_FIELD_SEQ_TB:
1078 ret = vpfe_ccdc_set_buftype(
1079 &vpfe->ccdc,
1080 CCDC_BUFTYPE_FLD_SEPARATED);
1081 break;
1082
1083 default:
1084 return -EINVAL;
1085 }
1086
1087 if (ret)
1088 return ret;
1089
1090 return vpfe_ccdc_set_frame_format(&vpfe->ccdc, frm_fmt);
1091}
1092
1093/*
1094 * vpfe_config_image_format()
1095 * For a given standard, this functions sets up the default
1096 * pix format & crop values in the vpfe device and ccdc. It first
1097 * starts with defaults based values from the standard table.
da298c6d 1098 * It then checks if sub device supports get_fmt and then override the
417d2e50
BP		 1099 * values based on that.Sets crop values to match with scan resolution
1100 * starting at 0,0. It calls vpfe_config_ccdc_image_format() set the
1101 * values in ccdc
1102 */
1103static int vpfe_config_image_format(struct vpfe_device *vpfe,
1104 v4l2_std_id std_id)
1105{
1106 struct v4l2_pix_format *pix = &vpfe->fmt.fmt.pix;
1107 int i, ret;
1108
1109 for (i = 0; i < ARRAY_SIZE(vpfe_standards); i++) {
1110 if (vpfe_standards[i].std_id & std_id) {
1111 vpfe->std_info.active_pixels =
1112 vpfe_standards[i].width;
1113 vpfe->std_info.active_lines =
1114 vpfe_standards[i].height;
1115 vpfe->std_info.frame_format =
1116 vpfe_standards[i].frame_format;
1117 vpfe->std_index = i;
1118
1119 break;
1120 }
1121 }
1122
1123 if (i == ARRAY_SIZE(vpfe_standards)) {
1124 vpfe_err(vpfe, "standard not supported\n");
1125 return -EINVAL;
1126 }
1127
1128 vpfe->crop.top = vpfe->crop.left = 0;
1129 vpfe->crop.width = vpfe->std_info.active_pixels;
1130 vpfe->crop.height = vpfe->std_info.active_lines;
1131 pix->width = vpfe->crop.width;
1132 pix->height = vpfe->crop.height;
1133 pix->pixelformat = V4L2_PIX_FMT_YUYV;
1134
1135 /* first field and frame format based on standard frame format */
1136 if (vpfe->std_info.frame_format)
1137 pix->field = V4L2_FIELD_INTERLACED;
1138 else
1139 pix->field = V4L2_FIELD_NONE;
1140
1141 ret = __vpfe_get_format(vpfe, &vpfe->fmt, &vpfe->bpp);
1142 if (ret)
1143 return ret;
1144
1145 /* Update the crop window based on found values */
1146 vpfe->crop.width = pix->width;
1147 vpfe->crop.height = pix->height;
1148
1149 return vpfe_config_ccdc_image_format(vpfe);
1150}
1151
1152static int vpfe_initialize_device(struct vpfe_device *vpfe)
1153{
1154 struct vpfe_subdev_info *sdinfo;
1155 int ret;
1156
1157 sdinfo = &vpfe->cfg->sub_devs[0];
1158 sdinfo->sd = vpfe->sd[0];
1159 vpfe->current_input = 0;
1160 vpfe->std_index = 0;
1161 /* Configure the default format information */
1162 ret = vpfe_config_image_format(vpfe,
1163 vpfe_standards[vpfe->std_index].std_id);
1164 if (ret)
1165 return ret;
1166
1167 pm_runtime_get_sync(vpfe->pdev);
1168
1169 vpfe_config_enable(&vpfe->ccdc, 1);
1170
1171 vpfe_ccdc_restore_defaults(&vpfe->ccdc);
1172
1173 /* Clear all VPFE interrupts */
1174 vpfe_clear_intr(&vpfe->ccdc, -1);
1175
1176 return ret;
1177}
1178
1179/*
1180 * vpfe_release : This function is based on the vb2_fop_release
1181 * helper function.
1182 * It has been augmented to handle module power management,
1183 * by disabling/enabling h/w module fcntl clock when necessary.
1184 */
1185static int vpfe_release(struct file *file)
1186{
1187 struct vpfe_device *vpfe = video_drvdata(file);
1188 int ret;
1189
1190 mutex_lock(&vpfe->lock);
1191
1192 if (v4l2_fh_is_singular_file(file))
1193 vpfe_ccdc_close(&vpfe->ccdc, vpfe->pdev);
1194 ret = _vb2_fop_release(file, NULL);
1195
1196 mutex_unlock(&vpfe->lock);
1197
1198 return ret;
1199}
1200
1201/*
1202 * vpfe_open : This function is based on the v4l2_fh_open helper function.
1203 * It has been augmented to handle module power management,
1204 * by disabling/enabling h/w module fcntl clock when necessary.
1205 */
1206static int vpfe_open(struct file *file)
1207{
1208 struct vpfe_device *vpfe = video_drvdata(file);
1209 int ret;
1210
1211 mutex_lock(&vpfe->lock);
1212
1213 ret = v4l2_fh_open(file);
1214 if (ret) {
1215 vpfe_err(vpfe, "v4l2_fh_open failed\n");
1216 goto unlock;
1217 }
1218
1219 if (!v4l2_fh_is_singular_file(file))
1220 goto unlock;
1221
1222 if (vpfe_initialize_device(vpfe)) {
1223 v4l2_fh_release(file);
1224 ret = -ENODEV;
1225 }
1226
1227unlock:
1228 mutex_unlock(&vpfe->lock);
1229 return ret;
1230}
1231
1232/**
1233 * vpfe_schedule_next_buffer: set next buffer address for capture
1234 * @vpfe : ptr to vpfe device
1235 *
1236 * This function will get next buffer from the dma queue and
1237 * set the buffer address in the vpfe register for capture.
1238 * the buffer is marked active
1239 *
1240 * Assumes caller is holding vpfe->dma_queue_lock already
1241 */
1242static inline void vpfe_schedule_next_buffer(struct vpfe_device *vpfe)
1243{
1244 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
1245 struct vpfe_cap_buffer, list);
1246 list_del(&vpfe->next_frm->list);
1247
1248 vpfe_set_sdr_addr(&vpfe->ccdc,
1249 vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb, 0));
1250}
1251
1252static inline void vpfe_schedule_bottom_field(struct vpfe_device *vpfe)
1253{
1254 unsigned long addr;
1255
1256 addr = vb2_dma_contig_plane_dma_addr(&vpfe->next_frm->vb, 0) +
1257 vpfe->field_off;
1258
1259 vpfe_set_sdr_addr(&vpfe->ccdc, addr);
1260}
1261
1262/*
1263 * vpfe_process_buffer_complete: process a completed buffer
1264 * @vpfe : ptr to vpfe device
1265 *
1266 * This function time stamp the buffer and mark it as DONE. It also
1267 * wake up any process waiting on the QUEUE and set the next buffer
1268 * as current
1269 */
1270static inline void vpfe_process_buffer_complete(struct vpfe_device *vpfe)
1271{
1272 v4l2_get_timestamp(&vpfe->cur_frm->vb.v4l2_buf.timestamp);
1273 vpfe->cur_frm->vb.v4l2_buf.field = vpfe->fmt.fmt.pix.field;
1274 vpfe->cur_frm->vb.v4l2_buf.sequence = vpfe->sequence++;
1275 vb2_buffer_done(&vpfe->cur_frm->vb, VB2_BUF_STATE_DONE);
1276 vpfe->cur_frm = vpfe->next_frm;
1277}
1278
1279/*
1280 * vpfe_isr : ISR handler for vpfe capture (VINT0)
1281 * @irq: irq number
1282 * @dev_id: dev_id ptr
1283 *
1284 * It changes status of the captured buffer, takes next buffer from the queue
1285 * and sets its address in VPFE registers
1286 */
1287static irqreturn_t vpfe_isr(int irq, void *dev)
1288{
1289 struct vpfe_device *vpfe = (struct vpfe_device *)dev;
1290 enum v4l2_field field;
1291 int intr_status;
1292 int fid;
1293
1294 intr_status = vpfe_reg_read(&vpfe->ccdc, VPFE_IRQ_STS);
1295
1296 if (intr_status & VPFE_VDINT0) {
1297 field = vpfe->fmt.fmt.pix.field;
1298
1299 if (field == V4L2_FIELD_NONE) {
1300 /* handle progressive frame capture */
1301 if (vpfe->cur_frm != vpfe->next_frm)
1302 vpfe_process_buffer_complete(vpfe);
1303 goto next_intr;
1304 }
1305
1306 /* interlaced or TB capture check which field
1307 we are in hardware */
1308 fid = vpfe_ccdc_getfid(&vpfe->ccdc);
1309
1310 /* switch the software maintained field id */
1311 vpfe->field ^= 1;
1312 if (fid == vpfe->field) {
1313 /* we are in-sync here,continue */
1314 if (fid == 0) {
1315 /*
1316 * One frame is just being captured. If the
1317 * next frame is available, release the
1318 * current frame and move on
1319 */
1320 if (vpfe->cur_frm != vpfe->next_frm)
1321 vpfe_process_buffer_complete(vpfe);
1322 /*
1323 * based on whether the two fields are stored
1324 * interleave or separately in memory,
1325 * reconfigure the CCDC memory address
1326 */
1327 if (field == V4L2_FIELD_SEQ_TB)
1328 vpfe_schedule_bottom_field(vpfe);
1329
1330 goto next_intr;
1331 }
1332 /*
1333 * if one field is just being captured configure
1334 * the next frame get the next frame from the empty
1335 * queue if no frame is available hold on to the
1336 * current buffer
1337 */
1338 spin_lock(&vpfe->dma_queue_lock);
1339 if (!list_empty(&vpfe->dma_queue) &&
1340 vpfe->cur_frm == vpfe->next_frm)
1341 vpfe_schedule_next_buffer(vpfe);
1342 spin_unlock(&vpfe->dma_queue_lock);
1343 } else if (fid == 0) {
1344 /*
1345 * out of sync. Recover from any hardware out-of-sync.
1346 * May loose one frame
1347 */
1348 vpfe->field = fid;
1349 }
1350 }
1351
1352next_intr:
1353 if (intr_status & VPFE_VDINT1) {
1354 spin_lock(&vpfe->dma_queue_lock);
1355 if (vpfe->fmt.fmt.pix.field == V4L2_FIELD_NONE &&
1356 !list_empty(&vpfe->dma_queue) &&
1357 vpfe->cur_frm == vpfe->next_frm)
1358 vpfe_schedule_next_buffer(vpfe);
1359 spin_unlock(&vpfe->dma_queue_lock);
1360 }
1361
1362 vpfe_clear_intr(&vpfe->ccdc, intr_status);
1363
1364 return IRQ_HANDLED;
1365}
1366
1367static inline void vpfe_detach_irq(struct vpfe_device *vpfe)
1368{
1369 unsigned int intr = VPFE_VDINT0;
1370 enum ccdc_frmfmt frame_format;
1371
1372 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1373 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1374 intr |= VPFE_VDINT1;
1375
1376 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_CLR);
1377}
1378
1379static inline void vpfe_attach_irq(struct vpfe_device *vpfe)
1380{
1381 unsigned int intr = VPFE_VDINT0;
1382 enum ccdc_frmfmt frame_format;
1383
1384 frame_format = vpfe_ccdc_get_frame_format(&vpfe->ccdc);
1385 if (frame_format == CCDC_FRMFMT_PROGRESSIVE)
1386 intr |= VPFE_VDINT1;
1387
1388 vpfe_reg_write(&vpfe->ccdc, intr, VPFE_IRQ_EN_SET);
1389}
1390
1391static int vpfe_querycap(struct file *file, void *priv,
1392 struct v4l2_capability *cap)
1393{
1394 struct vpfe_device *vpfe = video_drvdata(file);
1395
1396 vpfe_dbg(2, vpfe, "vpfe_querycap\n");
1397
1398 strlcpy(cap->driver, VPFE_MODULE_NAME, sizeof(cap->driver));
1399 strlcpy(cap->card, "TI AM437x VPFE", sizeof(cap->card));
1400 snprintf(cap->bus_info, sizeof(cap->bus_info),
1401 "platform:%s", vpfe->v4l2_dev.name);
1402 cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING |
1403 V4L2_CAP_READWRITE;
1404 cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
1405
1406 return 0;
1407}
1408
1409/* get the format set at output pad of the adjacent subdev */
1410static int __vpfe_get_format(struct vpfe_device *vpfe,
1411 struct v4l2_format *format, unsigned int *bpp)
1412{
1413 struct v4l2_mbus_framefmt mbus_fmt;
1414 struct vpfe_subdev_info *sdinfo;
1415 struct v4l2_subdev_format fmt;
1416 int ret;
1417
1418 sdinfo = vpfe->current_subdev;
1419 if (!sdinfo->sd)
1420 return -EINVAL;
1421
1422 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1423 fmt.pad = 0;
1424
1425 ret = v4l2_subdev_call(sdinfo->sd, pad, get_fmt, NULL, &fmt);
1426 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1427 return ret;
1428
1429 if (!ret) {
1430 v4l2_fill_pix_format(&format->fmt.pix, &fmt.format);
1431 mbus_to_pix(vpfe, &fmt.format, &format->fmt.pix, bpp);
1432 } else {
1433 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev,
1434 sdinfo->grp_id,
da298c6d
HV		 1435 pad, get_fmt,
1436 NULL, &fmt);
417d2e50
BP		 1437 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1438 return ret;
1439 v4l2_fill_pix_format(&format->fmt.pix, &mbus_fmt);
1440 mbus_to_pix(vpfe, &mbus_fmt, &format->fmt.pix, bpp);
1441 }
1442
1443 format->type = vpfe->fmt.type;
1444
1445 vpfe_dbg(1, vpfe,
1446 "%s size %dx%d (%s) bytesperline = %d, size = %d, bpp = %d\n",
1447 __func__, format->fmt.pix.width, format->fmt.pix.height,
1448 print_fourcc(format->fmt.pix.pixelformat),
1449 format->fmt.pix.bytesperline, format->fmt.pix.sizeimage, *bpp);
1450
1451 return 0;
1452}
1453
1454/* set the format at output pad of the adjacent subdev */
1455static int __vpfe_set_format(struct vpfe_device *vpfe,
1456 struct v4l2_format *format, unsigned int *bpp)
1457{
1458 struct v4l2_mbus_framefmt mbus_fmt;
1459 struct vpfe_subdev_info *sdinfo;
1460 struct v4l2_subdev_format fmt;
1461 int ret;
1462
1463 vpfe_dbg(2, vpfe, "__vpfe_set_format\n");
1464
1465 sdinfo = vpfe->current_subdev;
1466 if (!sdinfo->sd)
1467 return -EINVAL;
1468
1469 fmt.which = V4L2_SUBDEV_FORMAT_ACTIVE;
1470 fmt.pad = 0;
1471
1472 pix_to_mbus(vpfe, &format->fmt.pix, &fmt.format);
1473
1474 ret = v4l2_subdev_call(sdinfo->sd, pad, set_fmt, NULL, &fmt);
1475 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1476 return ret;
1477
1478 if (!ret) {
1479 v4l2_fill_pix_format(&format->fmt.pix, &fmt.format);
1480 mbus_to_pix(vpfe, &fmt.format, &format->fmt.pix, bpp);
1481 } else {
1482 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev,
1483 sdinfo->grp_id,
1484 video, s_mbus_fmt,
1485 &mbus_fmt);
1486 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
1487 return ret;
1488
1489 v4l2_fill_pix_format(&format->fmt.pix, &mbus_fmt);
1490 mbus_to_pix(vpfe, &mbus_fmt, &format->fmt.pix, bpp);
1491 }
1492
1493 format->type = vpfe->fmt.type;
1494
1495 vpfe_dbg(1, vpfe,
1496 "%s size %dx%d (%s) bytesperline = %d, size = %d, bpp = %d\n",
1497 __func__, format->fmt.pix.width, format->fmt.pix.height,
1498 print_fourcc(format->fmt.pix.pixelformat),
1499 format->fmt.pix.bytesperline, format->fmt.pix.sizeimage, *bpp);
1500
1501 return 0;
1502}
1503
1504static int vpfe_g_fmt(struct file *file, void *priv,
1505 struct v4l2_format *fmt)
1506{
1507 struct vpfe_device *vpfe = video_drvdata(file);
1508
1509 vpfe_dbg(2, vpfe, "vpfe_g_fmt\n");
1510
1511 *fmt = vpfe->fmt;
1512
1513 return 0;
1514}
1515
1516static int vpfe_enum_fmt(struct file *file, void *priv,
1517 struct v4l2_fmtdesc *f)
1518{
1519 struct vpfe_device *vpfe = video_drvdata(file);
1520 struct vpfe_subdev_info *sdinfo;
1521 struct vpfe_fmt *fmt = NULL;
1522 unsigned int k;
1523
1524 vpfe_dbg(2, vpfe, "vpfe_enum_format index:%d\n",
1525 f->index);
1526
1527 sdinfo = vpfe->current_subdev;
1528 if (!sdinfo->sd)
1529 return -EINVAL;
1530
1531 if (f->index > ARRAY_SIZE(formats))
1532 return -EINVAL;
1533
1534 for (k = 0; k < ARRAY_SIZE(formats); k++) {
1535 if (formats[k].index == f->index) {
1536 fmt = &formats[k];
1537 break;
1538 }
1539 }
1540 if (!fmt)
1541 return -EINVAL;
1542
1543 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
1544 f->pixelformat = fmt->fourcc;
1545 f->type = vpfe->fmt.type;
1546
1547 vpfe_dbg(1, vpfe, "vpfe_enum_format: mbus index: %d code: %x pixelformat: %s [%s]\n",
1548 f->index, fmt->code, print_fourcc(fmt->fourcc), fmt->name);
1549
1550 return 0;
1551}
1552
1553static int vpfe_try_fmt(struct file *file, void *priv,
1554 struct v4l2_format *fmt)
1555{
1556 struct vpfe_device *vpfe = video_drvdata(file);
1557 unsigned int bpp;
1558
1559 vpfe_dbg(2, vpfe, "vpfe_try_fmt\n");
1560
1561 return __vpfe_get_format(vpfe, fmt, &bpp);
1562}
1563
1564static int vpfe_s_fmt(struct file *file, void *priv,
1565 struct v4l2_format *fmt)
1566{
1567 struct vpfe_device *vpfe = video_drvdata(file);
1568 struct v4l2_format format;
1569 unsigned int bpp;
1570 int ret;
1571
1572 vpfe_dbg(2, vpfe, "vpfe_s_fmt\n");
1573
1574 /* If streaming is started, return error */
1575 if (vb2_is_busy(&vpfe->buffer_queue)) {
1576 vpfe_err(vpfe, "%s device busy\n", __func__);
1577 return -EBUSY;
1578 }
1579
1580 ret = vpfe_try_fmt(file, priv, fmt);
1581 if (ret)
1582 return ret;
1583
1584
1585 if (!cmp_v4l2_format(fmt, &format)) {
1586 /* Sensor format is different from the requested format
1587 * so we need to change it
1588 */
1589 ret = __vpfe_set_format(vpfe, fmt, &bpp);
1590 if (ret)
1591 return ret;
1592 } else /* Just make sure all of the fields are consistent */
1593 *fmt = format;
1594
1595 /* First detach any IRQ if currently attached */
1596 vpfe_detach_irq(vpfe);
1597 vpfe->fmt = *fmt;
1598 vpfe->bpp = bpp;
1599
1600 /* Update the crop window based on found values */
1601 vpfe->crop.width = fmt->fmt.pix.width;
1602 vpfe->crop.height = fmt->fmt.pix.height;
1603
1604 /* set image capture parameters in the ccdc */
1605 return vpfe_config_ccdc_image_format(vpfe);
1606}
1607
1608static int vpfe_enum_size(struct file *file, void *priv,
1609 struct v4l2_frmsizeenum *fsize)
1610{
1611 struct vpfe_device *vpfe = video_drvdata(file);
1612 struct v4l2_subdev_frame_size_enum fse;
1613 struct vpfe_subdev_info *sdinfo;
1614 struct v4l2_mbus_framefmt mbus;
1615 struct v4l2_pix_format pix;
1616 struct vpfe_fmt *fmt;
1617 int ret;
1618
1619 vpfe_dbg(2, vpfe, "vpfe_enum_size\n");
1620
1621 /* check for valid format */
1622 fmt = find_format_by_pix(fsize->pixel_format);
1623 if (!fmt) {
1624 vpfe_dbg(3, vpfe, "Invalid pixel code: %x, default used instead\n",
1625 fsize->pixel_format);
1626 return -EINVAL;
1627 }
1628
1629 memset(fsize->reserved, 0x0, sizeof(fsize->reserved));
1630
1631 sdinfo = vpfe->current_subdev;
1632 if (!sdinfo->sd)
1633 return -EINVAL;
1634
1635 memset(&pix, 0x0, sizeof(pix));
1636 /* Construct pix from parameter and use default for the rest */
1637 pix.pixelformat = fsize->pixel_format;
1638 pix.width = 640;
1639 pix.height = 480;
1640 pix.colorspace = V4L2_COLORSPACE_SRGB;
1641 pix.field = V4L2_FIELD_NONE;
1642 pix_to_mbus(vpfe, &pix, &mbus);
1643
1644 memset(&fse, 0x0, sizeof(fse));
1645 fse.index = fsize->index;
1646 fse.pad = 0;
1647 fse.code = mbus.code;
5778e749 1648 fse.which = V4L2_SUBDEV_FORMAT_ACTIVE;
417d2e50
BP		 1649 ret = v4l2_subdev_call(sdinfo->sd, pad, enum_frame_size, NULL, &fse);
1650 if (ret)
1651 return -EINVAL;
1652
1653 vpfe_dbg(1, vpfe, "vpfe_enum_size: index: %d code: %x W:[%d,%d] H:[%d,%d]\n",
1654 fse.index, fse.code, fse.min_width, fse.max_width,
1655 fse.min_height, fse.max_height);
1656
1657 fsize->type = V4L2_FRMSIZE_TYPE_DISCRETE;
1658 fsize->discrete.width = fse.max_width;
1659 fsize->discrete.height = fse.max_height;
1660
1661 vpfe_dbg(1, vpfe, "vpfe_enum_size: index: %d pixformat: %s size: %dx%d\n",
1662 fsize->index, print_fourcc(fsize->pixel_format),
1663 fsize->discrete.width, fsize->discrete.height);
1664
1665 return 0;
1666}
1667
1668/*
1669 * vpfe_get_subdev_input_index - Get subdev index and subdev input index for a
1670 * given app input index
1671 */
1672static int
1673vpfe_get_subdev_input_index(struct vpfe_device *vpfe,
1674 int *subdev_index,
1675 int *subdev_input_index,
1676 int app_input_index)
1677{
417d2e50
BP		 1678 int i, j = 0;
1679
1680 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
417d2e50
BP		 1681 if (app_input_index < (j + 1)) {
1682 *subdev_index = i;
1683 *subdev_input_index = app_input_index - j;
1684 return 0;
1685 }
1686 j++;
1687 }
1688 return -EINVAL;
1689}
1690
1691/*
1692 * vpfe_get_app_input - Get app input index for a given subdev input index
1693 * driver stores the input index of the current sub device and translate it
1694 * when application request the current input
1695 */
1696static int vpfe_get_app_input_index(struct vpfe_device *vpfe,
1697 int *app_input_index)
1698{
1699 struct vpfe_config *cfg = vpfe->cfg;
1700 struct vpfe_subdev_info *sdinfo;
d3723239
LP		 1701 struct i2c_client *client;
1702 struct i2c_client *curr_client;
417d2e50
BP		 1703 int i, j = 0;
1704
d3723239 1705 curr_client = v4l2_get_subdevdata(vpfe->current_subdev->sd);
417d2e50
BP		 1706 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
1707 sdinfo = &cfg->sub_devs[i];
d3723239
LP		 1708 client = v4l2_get_subdevdata(sdinfo->sd);
1709 if (client->addr == curr_client->addr &&
1710 client->adapter->nr == client->adapter->nr) {
417d2e50
BP		 1711 if (vpfe->current_input >= 1)
1712 return -1;
1713 *app_input_index = j + vpfe->current_input;
1714 return 0;
1715 }
1716 j++;
1717 }
1718 return -EINVAL;
1719}
1720
1721static int vpfe_enum_input(struct file *file, void *priv,
1722 struct v4l2_input *inp)
1723{
1724 struct vpfe_device *vpfe = video_drvdata(file);
1725 struct vpfe_subdev_info *sdinfo;
1726 int subdev, index;
1727
1728 vpfe_dbg(2, vpfe, "vpfe_enum_input\n");
1729
1730 if (vpfe_get_subdev_input_index(vpfe, &subdev, &index,
1731 inp->index) < 0) {
1732 vpfe_dbg(1, vpfe,
1733 "input information not found for the subdev\n");
1734 return -EINVAL;
1735 }
1736 sdinfo = &vpfe->cfg->sub_devs[subdev];
1737 *inp = sdinfo->inputs[index];
1738
1739 return 0;
1740}
1741
1742static int vpfe_g_input(struct file *file, void *priv, unsigned int *index)
1743{
1744 struct vpfe_device *vpfe = video_drvdata(file);
1745
1746 vpfe_dbg(2, vpfe, "vpfe_g_input\n");
1747
1748 return vpfe_get_app_input_index(vpfe, index);
1749}
1750
1751/* Assumes caller is holding vpfe_dev->lock */
1752static int vpfe_set_input(struct vpfe_device *vpfe, unsigned int index)
1753{
1754 int subdev_index = 0, inp_index = 0;
1755 struct vpfe_subdev_info *sdinfo;
1756 struct vpfe_route *route;
1757 u32 input, output;
1758 int ret;
1759
1760 vpfe_dbg(2, vpfe, "vpfe_set_input: index: %d\n", index);
1761
1762 /* If streaming is started, return error */
1763 if (vb2_is_busy(&vpfe->buffer_queue)) {
1764 vpfe_err(vpfe, "%s device busy\n", __func__);
1765 return -EBUSY;
1766 }
1767 ret = vpfe_get_subdev_input_index(vpfe,
1768 &subdev_index,
1769 &inp_index,
1770 index);
1771 if (ret < 0) {
1772 vpfe_err(vpfe, "invalid input index: %d\n", index);
1773 goto get_out;
1774 }
1775
1776 sdinfo = &vpfe->cfg->sub_devs[subdev_index];
1777 sdinfo->sd = vpfe->sd[subdev_index];
1778 route = &sdinfo->routes[inp_index];
1779 if (route && sdinfo->can_route) {
1780 input = route->input;
1781 output = route->output;
1782 if (sdinfo->sd) {
1783 ret = v4l2_subdev_call(sdinfo->sd, video,
1784 s_routing, input, output, 0);
1785 if (ret) {
1786 vpfe_err(vpfe, "s_routing failed\n");
1787 ret = -EINVAL;
1788 goto get_out;
1789 }
1790 }
1791
1792 }
1793
1794 vpfe->current_subdev = sdinfo;
1795 if (sdinfo->sd)
1796 vpfe->v4l2_dev.ctrl_handler = sdinfo->sd->ctrl_handler;
1797 vpfe->current_input = index;
1798 vpfe->std_index = 0;
1799
1800 /* set the bus/interface parameter for the sub device in ccdc */
1801 ret = vpfe_ccdc_set_hw_if_params(&vpfe->ccdc, &sdinfo->vpfe_param);
1802 if (ret)
1803 return ret;
1804
1805 /* set the default image parameters in the device */
1806 return vpfe_config_image_format(vpfe,
1807 vpfe_standards[vpfe->std_index].std_id);
1808
1809get_out:
1810 return ret;
1811}
1812
1813static int vpfe_s_input(struct file *file, void *priv, unsigned int index)
1814{
1815 struct vpfe_device *vpfe = video_drvdata(file);
1816
1817 vpfe_dbg(2, vpfe,
1818 "vpfe_s_input: index: %d\n", index);
1819
1820 return vpfe_set_input(vpfe, index);
1821}
1822
1823static int vpfe_querystd(struct file *file, void *priv, v4l2_std_id *std_id)
1824{
1825 struct vpfe_device *vpfe = video_drvdata(file);
1826 struct vpfe_subdev_info *sdinfo;
1827
1828 vpfe_dbg(2, vpfe, "vpfe_querystd\n");
1829
1830 sdinfo = vpfe->current_subdev;
1831 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1832 return -ENODATA;
1833
1834 /* Call querystd function of decoder device */
1835 return v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1836 video, querystd, std_id);
1837}
1838
1839static int vpfe_s_std(struct file *file, void *priv, v4l2_std_id std_id)
1840{
1841 struct vpfe_device *vpfe = video_drvdata(file);
1842 struct vpfe_subdev_info *sdinfo;
1843 int ret;
1844
1845 vpfe_dbg(2, vpfe, "vpfe_s_std\n");
1846
1847 sdinfo = vpfe->current_subdev;
1848 if (!(sdinfo->inputs[0].capabilities & V4L2_IN_CAP_STD))
1849 return -ENODATA;
1850
1851 /* If streaming is started, return error */
1852 if (vb2_is_busy(&vpfe->buffer_queue)) {
1853 vpfe_err(vpfe, "%s device busy\n", __func__);
1854 ret = -EBUSY;
1855 return ret;
1856 }
1857
1858 ret = v4l2_device_call_until_err(&vpfe->v4l2_dev, sdinfo->grp_id,
1859 video, s_std, std_id);
1860 if (ret < 0) {
1861 vpfe_err(vpfe, "Failed to set standard\n");
1862 return ret;
1863 }
1864 ret = vpfe_config_image_format(vpfe, std_id);
1865
1866 return ret;
1867}
1868
1869static int vpfe_g_std(struct file *file, void *priv, v4l2_std_id *std_id)
1870{
1871 struct vpfe_device *vpfe = video_drvdata(file);
1872 struct vpfe_subdev_info *sdinfo;
1873
1874 vpfe_dbg(2, vpfe, "vpfe_g_std\n");
1875
1876 sdinfo = vpfe->current_subdev;
1877 if (sdinfo->inputs[0].capabilities != V4L2_IN_CAP_STD)
1878 return -ENODATA;
1879
1880 *std_id = vpfe_standards[vpfe->std_index].std_id;
1881
1882 return 0;
1883}
1884
1885/*
1886 * vpfe_calculate_offsets : This function calculates buffers offset
1887 * for top and bottom field
1888 */
1889static void vpfe_calculate_offsets(struct vpfe_device *vpfe)
1890{
1891 struct v4l2_rect image_win;
1892
1893 vpfe_dbg(2, vpfe, "vpfe_calculate_offsets\n");
1894
1895 vpfe_ccdc_get_image_window(&vpfe->ccdc, &image_win);
1896 vpfe->field_off = image_win.height * image_win.width;
1897}
1898
1899/*
1900 * vpfe_queue_setup - Callback function for buffer setup.
1901 * @vq: vb2_queue ptr
1902 * @fmt: v4l2 format
1903 * @nbuffers: ptr to number of buffers requested by application
1904 * @nplanes:: contains number of distinct video planes needed to hold a frame
1905 * @sizes[]: contains the size (in bytes) of each plane.
1906 * @alloc_ctxs: ptr to allocation context
1907 *
1908 * This callback function is called when reqbuf() is called to adjust
1909 * the buffer count and buffer size
1910 */
1911static int vpfe_queue_setup(struct vb2_queue *vq,
1912 const struct v4l2_format *fmt,
1913 unsigned int *nbuffers, unsigned int *nplanes,
1914 unsigned int sizes[], void *alloc_ctxs[])
1915{
1916 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1917
1918 if (fmt && fmt->fmt.pix.sizeimage < vpfe->fmt.fmt.pix.sizeimage)
1919 return -EINVAL;
1920
1921 if (vq->num_buffers + *nbuffers < 3)
1922 *nbuffers = 3 - vq->num_buffers;
1923
1924 *nplanes = 1;
1925 sizes[0] = fmt ? fmt->fmt.pix.sizeimage : vpfe->fmt.fmt.pix.sizeimage;
1926 alloc_ctxs[0] = vpfe->alloc_ctx;
1927
1928 vpfe_dbg(1, vpfe,
1929 "nbuffers=%d, size=%u\n", *nbuffers, sizes[0]);
1930
1931 /* Calculate field offset */
1932 vpfe_calculate_offsets(vpfe);
1933
1934 return 0;
1935}
1936
1937/*
1938 * vpfe_buffer_prepare : callback function for buffer prepare
1939 * @vb: ptr to vb2_buffer
1940 *
1941 * This is the callback function for buffer prepare when vb2_qbuf()
1942 * function is called. The buffer is prepared and user space virtual address
1943 * or user address is converted into physical address
1944 */
1945static int vpfe_buffer_prepare(struct vb2_buffer *vb)
1946{
1947 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1948
1949 vb2_set_plane_payload(vb, 0, vpfe->fmt.fmt.pix.sizeimage);
1950
1951 if (vb2_get_plane_payload(vb, 0) > vb2_plane_size(vb, 0))
1952 return -EINVAL;
1953
1954 vb->v4l2_buf.field = vpfe->fmt.fmt.pix.field;
1955
1956 return 0;
1957}
1958
1959/*
1960 * vpfe_buffer_queue : Callback function to add buffer to DMA queue
1961 * @vb: ptr to vb2_buffer
1962 */
1963static void vpfe_buffer_queue(struct vb2_buffer *vb)
1964{
1965 struct vpfe_device *vpfe = vb2_get_drv_priv(vb->vb2_queue);
1966 struct vpfe_cap_buffer *buf = to_vpfe_buffer(vb);
1967 unsigned long flags = 0;
1968
1969 /* add the buffer to the DMA queue */
1970 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1971 list_add_tail(&buf->list, &vpfe->dma_queue);
1972 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
1973}
1974
1975/*
1976 * vpfe_start_streaming : Starts the DMA engine for streaming
1977 * @vb: ptr to vb2_buffer
1978 * @count: number of buffers
1979 */
1980static int vpfe_start_streaming(struct vb2_queue *vq, unsigned int count)
1981{
1982 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
1983 struct vpfe_cap_buffer *buf, *tmp;
1984 struct vpfe_subdev_info *sdinfo;
1985 unsigned long flags;
1986 unsigned long addr;
1987 int ret;
1988
1989 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
1990
1991 vpfe->field = 0;
1992 vpfe->sequence = 0;
1993
1994 sdinfo = vpfe->current_subdev;
1995
1996 vpfe_attach_irq(vpfe);
1997
1998 if (vpfe->ccdc.ccdc_cfg.if_type == VPFE_RAW_BAYER)
1999 vpfe_ccdc_config_raw(&vpfe->ccdc);
2000 else
2001 vpfe_ccdc_config_ycbcr(&vpfe->ccdc);
2002
2003 /* Get the next frame from the buffer queue */
2004 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
2005 struct vpfe_cap_buffer, list);
2006 vpfe->cur_frm = vpfe->next_frm;
2007 /* Remove buffer from the buffer queue */
2008 list_del(&vpfe->cur_frm->list);
2009 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
2010
2011 addr = vb2_dma_contig_plane_dma_addr(&vpfe->cur_frm->vb, 0);
2012
2013 vpfe_set_sdr_addr(&vpfe->ccdc, (unsigned long)(addr));
2014
2015 vpfe_pcr_enable(&vpfe->ccdc, 1);
2016
2017 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 1);
2018 if (ret < 0) {
2019 vpfe_err(vpfe, "Error in attaching interrupt handle\n");
2020 goto err;
2021 }
2022
2023 return 0;
2024
2025err:
2026 list_for_each_entry_safe(buf, tmp, &vpfe->dma_queue, list) {
2027 list_del(&buf->list);
2028 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_QUEUED);
2029 }
417d2e50
BP		 2030
2031 return ret;
2032}
2033
2034/*
2035 * vpfe_stop_streaming : Stop the DMA engine
2036 * @vq: ptr to vb2_queue
2037 *
2038 * This callback stops the DMA engine and any remaining buffers
2039 * in the DMA queue are released.
2040 */
2041static void vpfe_stop_streaming(struct vb2_queue *vq)
2042{
2043 struct vpfe_device *vpfe = vb2_get_drv_priv(vq);
2044 struct vpfe_subdev_info *sdinfo;
2045 unsigned long flags;
2046 int ret;
2047
2048 vpfe_pcr_enable(&vpfe->ccdc, 0);
2049
2050 vpfe_detach_irq(vpfe);
2051
2052 sdinfo = vpfe->current_subdev;
2053 ret = v4l2_subdev_call(sdinfo->sd, video, s_stream, 0);
2054 if (ret && ret != -ENOIOCTLCMD && ret != -ENODEV)
2055 vpfe_dbg(1, vpfe, "stream off failed in subdev\n");
2056
2057 /* release all active buffers */
2058 spin_lock_irqsave(&vpfe->dma_queue_lock, flags);
2059 if (vpfe->cur_frm == vpfe->next_frm) {
2060 vb2_buffer_done(&vpfe->cur_frm->vb, VB2_BUF_STATE_ERROR);
2061 } else {
2062 if (vpfe->cur_frm != NULL)
2063 vb2_buffer_done(&vpfe->cur_frm->vb,
2064 VB2_BUF_STATE_ERROR);
2065 if (vpfe->next_frm != NULL)
2066 vb2_buffer_done(&vpfe->next_frm->vb,
2067 VB2_BUF_STATE_ERROR);
2068 }
2069
2070 while (!list_empty(&vpfe->dma_queue)) {
2071 vpfe->next_frm = list_entry(vpfe->dma_queue.next,
2072 struct vpfe_cap_buffer, list);
2073 list_del(&vpfe->next_frm->list);
2074 vb2_buffer_done(&vpfe->next_frm->vb, VB2_BUF_STATE_ERROR);
2075 }
2076 spin_unlock_irqrestore(&vpfe->dma_queue_lock, flags);
2077}
2078
2079static int vpfe_cropcap(struct file *file, void *priv,
2080 struct v4l2_cropcap *crop)
2081{
2082 struct vpfe_device *vpfe = video_drvdata(file);
2083
2084 vpfe_dbg(2, vpfe, "vpfe_cropcap\n");
2085
2086 if (vpfe->std_index >= ARRAY_SIZE(vpfe_standards))
2087 return -EINVAL;
2088
2089 memset(crop, 0, sizeof(struct v4l2_cropcap));
2090
2091 crop->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2092 crop->defrect.width = vpfe_standards[vpfe->std_index].width;
2093 crop->bounds.width = crop->defrect.width;
2094 crop->defrect.height = vpfe_standards[vpfe->std_index].height;
2095 crop->bounds.height = crop->defrect.height;
2096 crop->pixelaspect = vpfe_standards[vpfe->std_index].pixelaspect;
2097
2098 return 0;
2099}
2100
2101static int
2102vpfe_g_selection(struct file *file, void *fh, struct v4l2_selection *s)
2103{
2104 struct vpfe_device *vpfe = video_drvdata(file);
2105
2106 switch (s->target) {
2107 case V4L2_SEL_TGT_CROP_BOUNDS:
2108 case V4L2_SEL_TGT_CROP_DEFAULT:
2109 s->r.left = s->r.top = 0;
2110 s->r.width = vpfe->crop.width;
2111 s->r.height = vpfe->crop.height;
2112 break;
2113
2114 case V4L2_SEL_TGT_CROP:
2115 s->r = vpfe->crop;
2116 break;
2117
2118 default:
2119 return -EINVAL;
2120 }
2121
2122 return 0;
2123}
2124
2125static int enclosed_rectangle(struct v4l2_rect *a, struct v4l2_rect *b)
2126{
2127 if (a->left < b->left || a->top < b->top)
2128 return 0;
2129
2130 if (a->left + a->width > b->left + b->width)
2131 return 0;
2132
2133 if (a->top + a->height > b->top + b->height)
2134 return 0;
2135
2136 return 1;
2137}
2138
2139static int
2140vpfe_s_selection(struct file *file, void *fh, struct v4l2_selection *s)
2141{
2142 struct vpfe_device *vpfe = video_drvdata(file);
2143 struct v4l2_rect cr = vpfe->crop;
2144 struct v4l2_rect r = s->r;
2145
2146 /* If streaming is started, return error */
2147 if (vb2_is_busy(&vpfe->buffer_queue)) {
2148 vpfe_err(vpfe, "%s device busy\n", __func__);
2149 return -EBUSY;
2150 }
2151
2152 if (s->type != V4L2_BUF_TYPE_VIDEO_CAPTURE ||
2153 s->target != V4L2_SEL_TGT_CROP)
2154 return -EINVAL;
2155
2156 v4l_bound_align_image(&r.width, 0, cr.width, 0,
2157 &r.height, 0, cr.height, 0, 0);
2158
2159 r.left = clamp_t(unsigned int, r.left, 0, cr.width - r.width);
2160 r.top = clamp_t(unsigned int, r.top, 0, cr.height - r.height);
2161
2162 if (s->flags & V4L2_SEL_FLAG_LE && !enclosed_rectangle(&r, &s->r))
2163 return -ERANGE;
2164
2165 if (s->flags & V4L2_SEL_FLAG_GE && !enclosed_rectangle(&s->r, &r))
2166 return -ERANGE;
2167
2168 s->r = vpfe->crop = r;
2169
2170 vpfe_ccdc_set_image_window(&vpfe->ccdc, &r, vpfe->bpp);
2171 vpfe->fmt.fmt.pix.width = r.width;
2172 vpfe->fmt.fmt.pix.height = r.height;
2173 vpfe->fmt.fmt.pix.bytesperline = vpfe_ccdc_get_line_length(&vpfe->ccdc);
2174 vpfe->fmt.fmt.pix.sizeimage = vpfe->fmt.fmt.pix.bytesperline *
2175 vpfe->fmt.fmt.pix.height;
2176
2177 vpfe_dbg(1, vpfe, "cropped (%d,%d)/%dx%d of %dx%d\n",
2178 r.left, r.top, r.width, r.height, cr.width, cr.height);
2179
2180 return 0;
2181}
2182
2183static long vpfe_ioctl_default(struct file *file, void *priv,
2184 bool valid_prio, unsigned int cmd, void *param)
2185{
2186 struct vpfe_device *vpfe = video_drvdata(file);
2187 int ret;
2188
2189 vpfe_dbg(2, vpfe, "vpfe_ioctl_default\n");
2190
2191 if (!valid_prio) {
2192 vpfe_err(vpfe, "%s device busy\n", __func__);
2193 return -EBUSY;
2194 }
2195
2196 /* If streaming is started, return error */
2197 if (vb2_is_busy(&vpfe->buffer_queue)) {
2198 vpfe_err(vpfe, "%s device busy\n", __func__);
2199 return -EBUSY;
2200 }
2201
2202 switch (cmd) {
2203 case VIDIOC_AM437X_CCDC_CFG:
42fd3638 2204 ret = vpfe_ccdc_set_params(&vpfe->ccdc, (void __user *)param);
417d2e50
BP		 2205 if (ret) {
2206 vpfe_dbg(2, vpfe,
2207 "Error setting parameters in CCDC\n");
2208 return ret;
2209 }
2210 ret = vpfe_get_ccdc_image_format(vpfe,
2211 &vpfe->fmt);
2212 if (ret < 0) {
2213 vpfe_dbg(2, vpfe,
2214 "Invalid image format at CCDC\n");
2215 return ret;
2216 }
2217 break;
2218
2219 default:
2220 ret = -ENOTTY;
2221 break;
2222 }
2223
2224 return ret;
2225}
2226
2227static const struct vb2_ops vpfe_video_qops = {
2228 .wait_prepare = vb2_ops_wait_prepare,
2229 .wait_finish = vb2_ops_wait_finish,
2230 .queue_setup = vpfe_queue_setup,
2231 .buf_prepare = vpfe_buffer_prepare,
2232 .buf_queue = vpfe_buffer_queue,
2233 .start_streaming = vpfe_start_streaming,
2234 .stop_streaming = vpfe_stop_streaming,
2235};
2236
2237/* vpfe capture driver file operations */
2238static const struct v4l2_file_operations vpfe_fops = {
2239 .owner = THIS_MODULE,
2240 .open = vpfe_open,
2241 .release = vpfe_release,
2242 .read = vb2_fop_read,
2243 .poll = vb2_fop_poll,
2244 .unlocked_ioctl = video_ioctl2,
2245 .mmap = vb2_fop_mmap,
2246};
2247
2248/* vpfe capture ioctl operations */
2249static const struct v4l2_ioctl_ops vpfe_ioctl_ops = {
2250 .vidioc_querycap = vpfe_querycap,
2251 .vidioc_enum_fmt_vid_cap = vpfe_enum_fmt,
2252 .vidioc_g_fmt_vid_cap = vpfe_g_fmt,
2253 .vidioc_s_fmt_vid_cap = vpfe_s_fmt,
2254 .vidioc_try_fmt_vid_cap = vpfe_try_fmt,
2255
2256 .vidioc_enum_framesizes = vpfe_enum_size,
2257
2258 .vidioc_enum_input = vpfe_enum_input,
2259 .vidioc_g_input = vpfe_g_input,
2260 .vidioc_s_input = vpfe_s_input,
2261
2262 .vidioc_querystd = vpfe_querystd,
2263 .vidioc_s_std = vpfe_s_std,
2264 .vidioc_g_std = vpfe_g_std,
2265
2266 .vidioc_reqbufs = vb2_ioctl_reqbufs,
2267 .vidioc_create_bufs = vb2_ioctl_create_bufs,
2268 .vidioc_prepare_buf = vb2_ioctl_prepare_buf,
2269 .vidioc_querybuf = vb2_ioctl_querybuf,
2270 .vidioc_qbuf = vb2_ioctl_qbuf,
2271 .vidioc_dqbuf = vb2_ioctl_dqbuf,
2272 .vidioc_expbuf = vb2_ioctl_expbuf,
2273 .vidioc_streamon = vb2_ioctl_streamon,
2274 .vidioc_streamoff = vb2_ioctl_streamoff,
2275
2276 .vidioc_log_status = v4l2_ctrl_log_status,
2277 .vidioc_subscribe_event = v4l2_ctrl_subscribe_event,
2278 .vidioc_unsubscribe_event = v4l2_event_unsubscribe,
2279
2280 .vidioc_cropcap = vpfe_cropcap,
2281 .vidioc_g_selection = vpfe_g_selection,
2282 .vidioc_s_selection = vpfe_s_selection,
2283
2284 .vidioc_default = vpfe_ioctl_default,
2285};
2286
2287static int
2288vpfe_async_bound(struct v4l2_async_notifier *notifier,
2289 struct v4l2_subdev *subdev,
2290 struct v4l2_async_subdev *asd)
2291{
2292 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2293 struct vpfe_device, v4l2_dev);
2294 struct v4l2_subdev_mbus_code_enum mbus_code;
2295 struct vpfe_subdev_info *sdinfo;
2296 bool found = false;
2297 int i, j;
2298
2299 vpfe_dbg(1, vpfe, "vpfe_async_bound\n");
2300
2301 for (i = 0; i < ARRAY_SIZE(vpfe->cfg->asd); i++) {
d3723239
LP		 2302 if (vpfe->cfg->asd[i]->match.of.node == asd[i].match.of.node) {
2303 sdinfo = &vpfe->cfg->sub_devs[i];
417d2e50 2304 vpfe->sd[i] = subdev;
d3723239 2305 vpfe->sd[i]->grp_id = sdinfo->grp_id;
417d2e50
BP		 2306 found = true;
2307 break;
2308 }
2309 }
2310
2311 if (!found) {
2312 vpfe_info(vpfe, "sub device (%s) not matched\n", subdev->name);
2313 return -EINVAL;
2314 }
2315
8b97e0e3 2316 vpfe->video_dev.tvnorms |= sdinfo->inputs[0].std;
d3723239 2317
417d2e50
BP		 2318 /* setup the supported formats & indexes */
2319 for (j = 0, i = 0; ; ++j) {
2320 struct vpfe_fmt *fmt;
2321 int ret;
2322
2323 memset(&mbus_code, 0, sizeof(mbus_code));
2324 mbus_code.index = j;
3f1ccf16 2325 mbus_code.which = V4L2_SUBDEV_FORMAT_ACTIVE;
417d2e50
BP		 2326 ret = v4l2_subdev_call(subdev, pad, enum_mbus_code,
2327 NULL, &mbus_code);
2328 if (ret)
2329 break;
2330
2331 fmt = find_format_by_code(mbus_code.code);
2332 if (!fmt)
2333 continue;
2334
2335 fmt->supported = true;
2336 fmt->index = i++;
2337 }
2338
2339 return 0;
2340}
2341
2342static int vpfe_probe_complete(struct vpfe_device *vpfe)
2343{
2344 struct video_device *vdev;
2345 struct vb2_queue *q;
2346 int err;
2347
2348 spin_lock_init(&vpfe->dma_queue_lock);
2349 mutex_init(&vpfe->lock);
2350
2351 vpfe->fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2352
2353 /* set first sub device as current one */
2354 vpfe->current_subdev = &vpfe->cfg->sub_devs[0];
2355 vpfe->v4l2_dev.ctrl_handler = vpfe->sd[0]->ctrl_handler;
2356
2357 err = vpfe_set_input(vpfe, 0);
2358 if (err)
2359 goto probe_out;
2360
2361 /* Initialize videobuf2 queue as per the buffer type */
2362 vpfe->alloc_ctx = vb2_dma_contig_init_ctx(vpfe->pdev);
2363 if (IS_ERR(vpfe->alloc_ctx)) {
2364 vpfe_err(vpfe, "Failed to get the context\n");
2365 err = PTR_ERR(vpfe->alloc_ctx);
2366 goto probe_out;
2367 }
2368
2369 q = &vpfe->buffer_queue;
2370 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2371 q->io_modes = VB2_MMAP | VB2_DMABUF | VB2_READ;
2372 q->drv_priv = vpfe;
2373 q->ops = &vpfe_video_qops;
2374 q->mem_ops = &vb2_dma_contig_memops;
2375 q->buf_struct_size = sizeof(struct vpfe_cap_buffer);
2376 q->timestamp_flags = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
2377 q->lock = &vpfe->lock;
2378 q->min_buffers_needed = 1;
2379
2380 err = vb2_queue_init(q);
2381 if (err) {
2382 vpfe_err(vpfe, "vb2_queue_init() failed\n");
2383 vb2_dma_contig_cleanup_ctx(vpfe->alloc_ctx);
2384 goto probe_out;
2385 }
2386
2387 INIT_LIST_HEAD(&vpfe->dma_queue);
2388
8b97e0e3 2389 vdev = &vpfe->video_dev;
417d2e50 2390 strlcpy(vdev->name, VPFE_MODULE_NAME, sizeof(vdev->name));
8b97e0e3 2391 vdev->release = video_device_release_empty;
417d2e50
BP		 2392 vdev->fops = &vpfe_fops;
2393 vdev->ioctl_ops = &vpfe_ioctl_ops;
2394 vdev->v4l2_dev = &vpfe->v4l2_dev;
2395 vdev->vfl_dir = VFL_DIR_RX;
2396 vdev->queue = q;
2397 vdev->lock = &vpfe->lock;
2398 video_set_drvdata(vdev, vpfe);
8b97e0e3 2399 err = video_register_device(&vpfe->video_dev, VFL_TYPE_GRABBER, -1);
417d2e50
BP		 2400 if (err) {
2401 vpfe_err(vpfe,
2402 "Unable to register video device.\n");
2403 goto probe_out;
2404 }
2405
2406 return 0;
2407
2408probe_out:
2409 v4l2_device_unregister(&vpfe->v4l2_dev);
2410 return err;
2411}
2412
2413static int vpfe_async_complete(struct v4l2_async_notifier *notifier)
2414{
2415 struct vpfe_device *vpfe = container_of(notifier->v4l2_dev,
2416 struct vpfe_device, v4l2_dev);
2417
2418 return vpfe_probe_complete(vpfe);
2419}
2420
2421static struct vpfe_config *
2422vpfe_get_pdata(struct platform_device *pdev)
2423{
ee662d44 2424 struct device_node *endpoint = NULL;
417d2e50
BP		 2425 struct v4l2_of_endpoint bus_cfg;
2426 struct vpfe_subdev_info *sdinfo;
2427 struct vpfe_config *pdata;
2428 unsigned int flags;
2429 unsigned int i;
2430 int err;
2431
2432 dev_dbg(&pdev->dev, "vpfe_get_pdata\n");
2433
2434 if (!IS_ENABLED(CONFIG_OF) || !pdev->dev.of_node)
2435 return pdev->dev.platform_data;
2436
2437 pdata = devm_kzalloc(&pdev->dev, sizeof(*pdata), GFP_KERNEL);
2438 if (!pdata)
2439 return NULL;
2440
2441 for (i = 0; ; i++) {
ee662d44
LP		 2442 struct device_node *rem;
2443
417d2e50
BP		 2444 endpoint = of_graph_get_next_endpoint(pdev->dev.of_node,
2445 endpoint);
2446 if (!endpoint)
2447 break;
2448
2449 sdinfo = &pdata->sub_devs[i];
2450 sdinfo->grp_id = 0;
2451
2452 /* we only support camera */
2453 sdinfo->inputs[0].index = i;
2454 strcpy(sdinfo->inputs[0].name, "Camera");
2455 sdinfo->inputs[0].type = V4L2_INPUT_TYPE_CAMERA;
2456 sdinfo->inputs[0].std = V4L2_STD_ALL;
2457 sdinfo->inputs[0].capabilities = V4L2_IN_CAP_STD;
2458
2459 sdinfo->can_route = 0;
2460 sdinfo->routes = NULL;
2461
2462 of_property_read_u32(endpoint, "ti,am437x-vpfe-interface",
2463 &sdinfo->vpfe_param.if_type);
2464 if (sdinfo->vpfe_param.if_type < 0 ||
2465 sdinfo->vpfe_param.if_type > 4) {
2466 sdinfo->vpfe_param.if_type = VPFE_RAW_BAYER;
2467 }
2468
2469 err = v4l2_of_parse_endpoint(endpoint, &bus_cfg);
2470 if (err) {
2471 dev_err(&pdev->dev, "Could not parse the endpoint\n");
2472 goto done;
2473 }
2474
2475 sdinfo->vpfe_param.bus_width = bus_cfg.bus.parallel.bus_width;
2476
2477 if (sdinfo->vpfe_param.bus_width < 8 ||
2478 sdinfo->vpfe_param.bus_width > 16) {
2479 dev_err(&pdev->dev, "Invalid bus width.\n");
2480 goto done;
2481 }
2482
2483 flags = bus_cfg.bus.parallel.flags;
2484
2485 if (flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH)
2486 sdinfo->vpfe_param.hdpol = 1;
2487
2488 if (flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH)
2489 sdinfo->vpfe_param.vdpol = 1;
2490
2491 rem = of_graph_get_remote_port_parent(endpoint);
2492 if (!rem) {
2493 dev_err(&pdev->dev, "Remote device at %s not found\n",
2494 endpoint->full_name);
2495 goto done;
2496 }
2497
417d2e50
BP		 2498 pdata->asd[i] = devm_kzalloc(&pdev->dev,
2499 sizeof(struct v4l2_async_subdev),
2500 GFP_KERNEL);
7d87db3d
LP		 2501 if (!pdata->asd[i]) {
2502 of_node_put(rem);
2503 pdata = NULL;
2504 goto done;
2505 }
2506
417d2e50
BP		 2507 pdata->asd[i]->match_type = V4L2_ASYNC_MATCH_OF;
2508 pdata->asd[i]->match.of.node = rem;
417d2e50
BP		 2509 of_node_put(rem);
2510 }
2511
2512 of_node_put(endpoint);
2513 return pdata;
2514
2515done:
2516 of_node_put(endpoint);
417d2e50
BP		 2517 return NULL;
2518}
2519
2520/*
2521 * vpfe_probe : This function creates device entries by register
2522 * itself to the V4L2 driver and initializes fields of each
2523 * device objects
2524 */
2525static int vpfe_probe(struct platform_device *pdev)
2526{
2527 struct vpfe_config *vpfe_cfg = vpfe_get_pdata(pdev);
2528 struct vpfe_device *vpfe;
2529 struct vpfe_ccdc *ccdc;
2530 struct resource *res;
2531 int ret;
2532
2533 if (!vpfe_cfg) {
2534 dev_err(&pdev->dev, "No platform data\n");
2535 return -EINVAL;
2536 }
2537
2538 vpfe = devm_kzalloc(&pdev->dev, sizeof(*vpfe), GFP_KERNEL);
2539 if (!vpfe)
2540 return -ENOMEM;
2541
2542 vpfe->pdev = &pdev->dev;
2543 vpfe->cfg = vpfe_cfg;
2544 ccdc = &vpfe->ccdc;
2545
2546 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
2547 ccdc->ccdc_cfg.base_addr = devm_ioremap_resource(&pdev->dev, res);
2548 if (IS_ERR(ccdc->ccdc_cfg.base_addr))
2549 return PTR_ERR(ccdc->ccdc_cfg.base_addr);
2550
2551 vpfe->irq = platform_get_irq(pdev, 0);
2552 if (vpfe->irq <= 0) {
2553 dev_err(&pdev->dev, "No IRQ resource\n");
2554 return -ENODEV;
2555 }
2556
2557 ret = devm_request_irq(vpfe->pdev, vpfe->irq, vpfe_isr, 0,
2558 "vpfe_capture0", vpfe);
2559 if (ret) {
2560 dev_err(&pdev->dev, "Unable to request interrupt\n");
2561 return -EINVAL;
2562 }
2563
417d2e50
BP		 2564 ret = v4l2_device_register(&pdev->dev, &vpfe->v4l2_dev);
2565 if (ret) {
2566 vpfe_err(vpfe,
2567 "Unable to register v4l2 device.\n");
8b97e0e3 2568 return ret;
417d2e50
BP		 2569 }
2570
2571 /* set the driver data in platform device */
2572 platform_set_drvdata(pdev, vpfe);
2573 /* Enabling module functional clock */
2574 pm_runtime_enable(&pdev->dev);
2575
2576 /* for now just enable it here instead of waiting for the open */
2577 pm_runtime_get_sync(&pdev->dev);
2578
2579 vpfe_ccdc_config_defaults(ccdc);
2580
2581 pm_runtime_put_sync(&pdev->dev);
2582
2583 vpfe->sd = devm_kzalloc(&pdev->dev, sizeof(struct v4l2_subdev *) *
2584 ARRAY_SIZE(vpfe->cfg->asd), GFP_KERNEL);
2585 if (!vpfe->sd) {
2586 ret = -ENOMEM;
2587 goto probe_out_v4l2_unregister;
2588 }
2589
2590 vpfe->notifier.subdevs = vpfe->cfg->asd;
2591 vpfe->notifier.num_subdevs = ARRAY_SIZE(vpfe->cfg->asd);
2592 vpfe->notifier.bound = vpfe_async_bound;
2593 vpfe->notifier.complete = vpfe_async_complete;
2594 ret = v4l2_async_notifier_register(&vpfe->v4l2_dev,
2595 &vpfe->notifier);
2596 if (ret) {
2597 vpfe_err(vpfe, "Error registering async notifier\n");
2598 ret = -EINVAL;
2599 goto probe_out_v4l2_unregister;
2600 }
2601
2602 return 0;
2603
2604probe_out_v4l2_unregister:
2605 v4l2_device_unregister(&vpfe->v4l2_dev);
417d2e50
BP		 2606 return ret;
2607}
2608
2609/*
2610 * vpfe_remove : It un-register device from V4L2 driver
2611 */
2612static int vpfe_remove(struct platform_device *pdev)
2613{
2614 struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2615
2616 vpfe_dbg(2, vpfe, "vpfe_remove\n");
2617
2618 pm_runtime_disable(&pdev->dev);
2619
2620 v4l2_async_notifier_unregister(&vpfe->notifier);
2621 v4l2_device_unregister(&vpfe->v4l2_dev);
8b97e0e3 2622 video_unregister_device(&vpfe->video_dev);
417d2e50
BP		 2623
2624 return 0;
2625}
2626
2627#ifdef CONFIG_PM_SLEEP
2628
2629static void vpfe_save_context(struct vpfe_ccdc *ccdc)
2630{
2631 ccdc->ccdc_ctx[VPFE_PCR >> 2] = vpfe_reg_read(ccdc, VPFE_PCR);
2632 ccdc->ccdc_ctx[VPFE_SYNMODE >> 2] = vpfe_reg_read(ccdc, VPFE_SYNMODE);
2633 ccdc->ccdc_ctx[VPFE_SDOFST >> 2] = vpfe_reg_read(ccdc, VPFE_SDOFST);
2634 ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2] = vpfe_reg_read(ccdc, VPFE_SDR_ADDR);
2635 ccdc->ccdc_ctx[VPFE_CLAMP >> 2] = vpfe_reg_read(ccdc, VPFE_CLAMP);
2636 ccdc->ccdc_ctx[VPFE_DCSUB >> 2] = vpfe_reg_read(ccdc, VPFE_DCSUB);
2637 ccdc->ccdc_ctx[VPFE_COLPTN >> 2] = vpfe_reg_read(ccdc, VPFE_COLPTN);
2638 ccdc->ccdc_ctx[VPFE_BLKCMP >> 2] = vpfe_reg_read(ccdc, VPFE_BLKCMP);
2639 ccdc->ccdc_ctx[VPFE_VDINT >> 2] = vpfe_reg_read(ccdc, VPFE_VDINT);
2640 ccdc->ccdc_ctx[VPFE_ALAW >> 2] = vpfe_reg_read(ccdc, VPFE_ALAW);
2641 ccdc->ccdc_ctx[VPFE_REC656IF >> 2] = vpfe_reg_read(ccdc, VPFE_REC656IF);
2642 ccdc->ccdc_ctx[VPFE_CCDCFG >> 2] = vpfe_reg_read(ccdc, VPFE_CCDCFG);
2643 ccdc->ccdc_ctx[VPFE_CULLING >> 2] = vpfe_reg_read(ccdc, VPFE_CULLING);
2644 ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2] = vpfe_reg_read(ccdc,
2645 VPFE_HD_VD_WID);
2646 ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2] = vpfe_reg_read(ccdc,
2647 VPFE_PIX_LINES);
2648 ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2] = vpfe_reg_read(ccdc,
2649 VPFE_HORZ_INFO);
2650 ccdc->ccdc_ctx[VPFE_VERT_START >> 2] = vpfe_reg_read(ccdc,
2651 VPFE_VERT_START);
2652 ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2] = vpfe_reg_read(ccdc,
2653 VPFE_VERT_LINES);
2654 ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2] = vpfe_reg_read(ccdc,
2655 VPFE_HSIZE_OFF);
2656}
2657
2658static int vpfe_suspend(struct device *dev)
2659{
2660 struct platform_device *pdev = to_platform_device(dev);
2661 struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2662 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2663
2664 /* if streaming has not started we don't care */
2665 if (!vb2_start_streaming_called(&vpfe->buffer_queue))
2666 return 0;
2667
2668 pm_runtime_get_sync(dev);
2669 vpfe_config_enable(ccdc, 1);
2670
2671 /* Save VPFE context */
2672 vpfe_save_context(ccdc);
2673
2674 /* Disable CCDC */
2675 vpfe_pcr_enable(ccdc, 0);
2676 vpfe_config_enable(ccdc, 0);
2677
2678 /* Disable both master and slave clock */
2679 pm_runtime_put_sync(dev);
2680
2681 /* Select sleep pin state */
2682 pinctrl_pm_select_sleep_state(dev);
2683
2684 return 0;
2685}
2686
2687static void vpfe_restore_context(struct vpfe_ccdc *ccdc)
2688{
2689 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SYNMODE >> 2], VPFE_SYNMODE);
2690 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CULLING >> 2], VPFE_CULLING);
2691 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDOFST >> 2], VPFE_SDOFST);
2692 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_SDR_ADDR >> 2], VPFE_SDR_ADDR);
2693 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CLAMP >> 2], VPFE_CLAMP);
2694 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_DCSUB >> 2], VPFE_DCSUB);
2695 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_COLPTN >> 2], VPFE_COLPTN);
2696 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_BLKCMP >> 2], VPFE_BLKCMP);
2697 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VDINT >> 2], VPFE_VDINT);
2698 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_ALAW >> 2], VPFE_ALAW);
2699 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_REC656IF >> 2], VPFE_REC656IF);
2700 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_CCDCFG >> 2], VPFE_CCDCFG);
2701 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PCR >> 2], VPFE_PCR);
2702 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HD_VD_WID >> 2],
2703 VPFE_HD_VD_WID);
2704 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_PIX_LINES >> 2],
2705 VPFE_PIX_LINES);
2706 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HORZ_INFO >> 2],
2707 VPFE_HORZ_INFO);
2708 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_START >> 2],
2709 VPFE_VERT_START);
2710 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_VERT_LINES >> 2],
2711 VPFE_VERT_LINES);
2712 vpfe_reg_write(ccdc, ccdc->ccdc_ctx[VPFE_HSIZE_OFF >> 2],
2713 VPFE_HSIZE_OFF);
2714}
2715
2716static int vpfe_resume(struct device *dev)
2717{
2718 struct platform_device *pdev = to_platform_device(dev);
2719 struct vpfe_device *vpfe = platform_get_drvdata(pdev);
2720 struct vpfe_ccdc *ccdc = &vpfe->ccdc;
2721
2722 /* if streaming has not started we don't care */
2723 if (!vb2_start_streaming_called(&vpfe->buffer_queue))
2724 return 0;
2725
2726 /* Enable both master and slave clock */
2727 pm_runtime_get_sync(dev);
2728 vpfe_config_enable(ccdc, 1);
2729
2730 /* Restore VPFE context */
2731 vpfe_restore_context(ccdc);
2732
2733 vpfe_config_enable(ccdc, 0);
2734 pm_runtime_put_sync(dev);
2735
2736 /* Select default pin state */
2737 pinctrl_pm_select_default_state(dev);
2738
2739 return 0;
2740}
2741
2742#endif
2743
2744static SIMPLE_DEV_PM_OPS(vpfe_pm_ops, vpfe_suspend, vpfe_resume);
2745
2746static const struct of_device_id vpfe_of_match[] = {
2747 { .compatible = "ti,am437x-vpfe", },
2748 { /* sentinel */ },
2749};
2750MODULE_DEVICE_TABLE(of, vpfe_of_match);
2751
2752static struct platform_driver vpfe_driver = {
2753 .probe = vpfe_probe,
2754 .remove = vpfe_remove,
2755 .driver = {
2756 .name = VPFE_MODULE_NAME,
417d2e50
BP		 2757 .pm = &vpfe_pm_ops,
2758 .of_match_table = of_match_ptr(vpfe_of_match),
2759 },
2760};
2761
2762module_platform_driver(vpfe_driver);
2763
2764MODULE_AUTHOR("Texas Instruments");
2765MODULE_DESCRIPTION("TI AM437x VPFE driver");
2766MODULE_LICENSE("GPL");
2767MODULE_VERSION(VPFE_VERSION);
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