[mirror_ubuntu-artful-kernel.git] / drivers / media / platform / blackfin / ppi.c

/*
 * ppi.c Analog Devices Parallel Peripheral Interface driver
 *
 * Copyright (c) 2011 Analog Devices Inc.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 *
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */

#include <linux/module.h>
#include <linux/slab.h>

#include <asm/bfin_ppi.h>
#include <asm/blackfin.h>
#include <asm/cacheflush.h>
#include <asm/dma.h>
#include <asm/portmux.h>

#include <media/blackfin/ppi.h>

static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
static void ppi_detach_irq(struct ppi_if *ppi);
static int ppi_start(struct ppi_if *ppi);
static int ppi_stop(struct ppi_if *ppi);
static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params);
static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);

static const struct ppi_ops ppi_ops = {
	.attach_irq = ppi_attach_irq,
	.detach_irq = ppi_detach_irq,
	.start = ppi_start,
	.stop = ppi_stop,
	.set_params = ppi_set_params,
	.update_addr = ppi_update_addr,
};

static irqreturn_t ppi_irq_err(int irq, void *dev_id)
{
	struct ppi_if *ppi = dev_id;
	const struct ppi_info *info = ppi->info;

	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		unsigned short status;

		/* register on bf561 is cleared when read 
		 * others are W1C
		 */
		status = bfin_read16(&reg->status);
		bfin_write16(&reg->status, 0xff00);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		bfin_write16(&reg->status, 0xffff);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;

		bfin_write32(&reg->stat, 0xc0ff);
		break;
	}
	default:
		break;
	}

	return IRQ_HANDLED;
}

static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
{
	const struct ppi_info *info = ppi->info;
	int ret;

	ret = request_dma(info->dma_ch, "PPI_DMA");

	if (ret) {
		pr_err("Unable to allocate DMA channel for PPI\n");
		return ret;
	}
	set_dma_callback(info->dma_ch, handler, ppi);

	if (ppi->err_int) {
		ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
		if (ret) {
			pr_err("Unable to allocate IRQ for PPI\n");
			free_dma(info->dma_ch);
		}
	}
	return ret;
}

static void ppi_detach_irq(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	if (ppi->err_int)
		free_irq(info->irq_err, ppi);
	free_dma(info->dma_ch);
}

static int ppi_start(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	/* enable DMA */
	enable_dma(info->dma_ch);

	/* enable PPI */
	ppi->ppi_control |= PORT_EN;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		bfin_write16(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		bfin_write32(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;
		bfin_write32(&reg->ctl, ppi->ppi_control);
		break;
	}
	default:
		return -EINVAL;
	}

	SSYNC();
	return 0;
}

static int ppi_stop(struct ppi_if *ppi)
{
	const struct ppi_info *info = ppi->info;

	/* disable PPI */
	ppi->ppi_control &= ~PORT_EN;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;
		bfin_write16(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;
		bfin_write32(&reg->control, ppi->ppi_control);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;
		bfin_write32(&reg->ctl, ppi->ppi_control);
		break;
	}
	default:
		return -EINVAL;
	}

	/* disable DMA */
	clear_dma_irqstat(info->dma_ch);
	disable_dma(info->dma_ch);

	SSYNC();
	return 0;
}

static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params)
{
	const struct ppi_info *info = ppi->info;
	int dma32 = 0;
	int dma_config, bytes_per_line;
	int hcount, hdelay, samples_per_line;

	bytes_per_line = params->width * params->bpp / 8;
	/* convert parameters unit from pixels to samples */
	hcount = params->width * params->bpp / params->dlen;
	hdelay = params->hdelay * params->bpp / params->dlen;
	samples_per_line = params->line * params->bpp / params->dlen;
	if (params->int_mask == 0xFFFFFFFF)
		ppi->err_int = false;
	else
		ppi->err_int = true;

	dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y);
	ppi->ppi_control = params->ppi_control & ~PORT_EN;
	if (!(ppi->ppi_control & PORT_DIR))
		dma_config |= WNR;
	switch (info->type) {
	case PPI_TYPE_PPI:
	{
		struct bfin_ppi_regs *reg = info->base;

		if (params->ppi_control & DMA32)
			dma32 = 1;

		bfin_write16(&reg->control, ppi->ppi_control);
		bfin_write16(&reg->count, samples_per_line - 1);
		bfin_write16(&reg->frame, params->frame);
		break;
	}
	case PPI_TYPE_EPPI:
	{
		struct bfin_eppi_regs *reg = info->base;

		if ((params->ppi_control & PACK_EN)
			|| (params->ppi_control & 0x38000) > DLEN_16)
			dma32 = 1;

		bfin_write32(&reg->control, ppi->ppi_control);
		bfin_write16(&reg->line, samples_per_line);
		bfin_write16(&reg->frame, params->frame);
		bfin_write16(&reg->hdelay, hdelay);
		bfin_write16(&reg->vdelay, params->vdelay);
		bfin_write16(&reg->hcount, hcount);
		bfin_write16(&reg->vcount, params->height);
		break;
	}
	case PPI_TYPE_EPPI3:
	{
		struct bfin_eppi3_regs *reg = info->base;

		if ((params->ppi_control & PACK_EN)
			|| (params->ppi_control & 0x70000) > DLEN_16)
			dma32 = 1;

		bfin_write32(&reg->ctl, ppi->ppi_control);
		bfin_write32(&reg->line, samples_per_line);
		bfin_write32(&reg->frame, params->frame);
		bfin_write32(&reg->hdly, hdelay);
		bfin_write32(&reg->vdly, params->vdelay);
		bfin_write32(&reg->hcnt, hcount);
		bfin_write32(&reg->vcnt, params->height);
		if (params->int_mask)
			bfin_write32(&reg->imsk, params->int_mask & 0xFF);
		break;
	}
	default:
		return -EINVAL;
	}

	if (dma32) {
		dma_config |= WDSIZE_32 | PSIZE_32;
		set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
		set_dma_x_modify(info->dma_ch, 4);
		set_dma_y_modify(info->dma_ch, 4);
	} else {
		dma_config |= WDSIZE_16 | PSIZE_16;
		set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
		set_dma_x_modify(info->dma_ch, 2);
		set_dma_y_modify(info->dma_ch, 2);
	}
	set_dma_y_count(info->dma_ch, params->height);
	set_dma_config(info->dma_ch, dma_config);

	SSYNC();
	return 0;
}

static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
{
	set_dma_start_addr(ppi->info->dma_ch, addr);
}

struct ppi_if *ppi_create_instance(const struct ppi_info *info)
{
	struct ppi_if *ppi;

	if (!info || !info->pin_req)
		return NULL;

	if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
		pr_err("request peripheral failed\n");
		return NULL;
	}

	ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
	if (!ppi) {
		peripheral_free_list(info->pin_req);
		pr_err("unable to allocate memory for ppi handle\n");
		return NULL;
	}
	ppi->ops = &ppi_ops;
	ppi->info = info;

	pr_info("ppi probe success\n");
	return ppi;
}
EXPORT_SYMBOL(ppi_create_instance);

void ppi_delete_instance(struct ppi_if *ppi)
{
	peripheral_free_list(ppi->info->pin_req);
	kfree(ppi);
}
EXPORT_SYMBOL(ppi_delete_instance);

MODULE_DESCRIPTION("Analog Devices PPI driver");
MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
MODULE_LICENSE("GPL v2");
Commit	Line	Data
63b1a90d SJ	1	/*
	2	* ppi.c Analog Devices Parallel Peripheral Interface driver
	3	*
	4	* Copyright (c) 2011 Analog Devices Inc.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
	18	*/
	19
fab0e8fa	20	#include <linux/module.h>
63b1a90d SJ	21	#include <linux/slab.h>
	22
	23	#include <asm/bfin_ppi.h>
	24	#include <asm/blackfin.h>
	25	#include <asm/cacheflush.h>
	26	#include <asm/dma.h>
	27	#include <asm/portmux.h>
	28
	29	#include <media/blackfin/ppi.h>
	30
	31	static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler);
	32	static void ppi_detach_irq(struct ppi_if *ppi);
	33	static int ppi_start(struct ppi_if *ppi);
	34	static int ppi_stop(struct ppi_if *ppi);
	35	static int ppi_set_params(struct ppi_if ppi, struct ppi_params params);
	36	static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr);
	37
	38	static const struct ppi_ops ppi_ops = {
	39	.attach_irq = ppi_attach_irq,
	40	.detach_irq = ppi_detach_irq,
	41	.start = ppi_start,
	42	.stop = ppi_stop,
	43	.set_params = ppi_set_params,
	44	.update_addr = ppi_update_addr,
	45	};
	46
	47	static irqreturn_t ppi_irq_err(int irq, void *dev_id)
	48	{
	49	struct ppi_if *ppi = dev_id;
	50	const struct ppi_info *info = ppi->info;
	51
	52	switch (info->type) {
	53	case PPI_TYPE_PPI:
	54	{
	55	struct bfin_ppi_regs *reg = info->base;
	56	unsigned short status;
	57
	58	/* register on bf561 is cleared when read
	59	* others are W1C
	60	*/
	61	status = bfin_read16(&reg->status);
	62	bfin_write16(&reg->status, 0xff00);
	63	break;
	64	}
	65	case PPI_TYPE_EPPI:
	66	{
	67	struct bfin_eppi_regs *reg = info->base;
	68	bfin_write16(&reg->status, 0xffff);
	69	break;
	70	}
45b82596 SJ	71	case PPI_TYPE_EPPI3:
	72	{
	73	struct bfin_eppi3_regs *reg = info->base;
	74
	75	bfin_write32(&reg->stat, 0xc0ff);
	76	break;
	77	}
63b1a90d SJ	78	default:
	79	break;
	80	}
	81
	82	return IRQ_HANDLED;
	83	}
	84
	85	static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler)
	86	{
	87	const struct ppi_info *info = ppi->info;
	88	int ret;
	89
	90	ret = request_dma(info->dma_ch, "PPI_DMA");
	91
	92	if (ret) {
	93	pr_err("Unable to allocate DMA channel for PPI\n");
	94	return ret;
	95	}
	96	set_dma_callback(info->dma_ch, handler, ppi);
	97
	98	if (ppi->err_int) {
	99	ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi);
	100	if (ret) {
	101	pr_err("Unable to allocate IRQ for PPI\n");
	102	free_dma(info->dma_ch);
	103	}
	104	}
	105	return ret;
	106	}
	107
	108	static void ppi_detach_irq(struct ppi_if *ppi)
	109	{
	110	const struct ppi_info *info = ppi->info;
	111
	112	if (ppi->err_int)
	113	free_irq(info->irq_err, ppi);
	114	free_dma(info->dma_ch);
	115	}
	116
	117	static int ppi_start(struct ppi_if *ppi)
	118	{
	119	const struct ppi_info *info = ppi->info;
	120
	121	/* enable DMA */
	122	enable_dma(info->dma_ch);
	123
	124	/* enable PPI */
	125	ppi->ppi_control \|= PORT_EN;
	126	switch (info->type) {
	127	case PPI_TYPE_PPI:
	128	{
	129	struct bfin_ppi_regs *reg = info->base;
	130	bfin_write16(&reg->control, ppi->ppi_control);
	131	break;
	132	}
	133	case PPI_TYPE_EPPI:
	134	{
	135	struct bfin_eppi_regs *reg = info->base;
	136	bfin_write32(&reg->control, ppi->ppi_control);
	137	break;
	138	}
45b82596 SJ	139	case PPI_TYPE_EPPI3:
	140	{
	141	struct bfin_eppi3_regs *reg = info->base;
	142	bfin_write32(&reg->ctl, ppi->ppi_control);
	143	break;
	144	}
63b1a90d SJ	145	default:
	146	return -EINVAL;
	147	}
	148
	149	SSYNC();
	150	return 0;
	151	}
	152
	153	static int ppi_stop(struct ppi_if *ppi)
	154	{
	155	const struct ppi_info *info = ppi->info;
	156
	157	/* disable PPI */
	158	ppi->ppi_control &= ~PORT_EN;
	159	switch (info->type) {
	160	case PPI_TYPE_PPI:
	161	{
	162	struct bfin_ppi_regs *reg = info->base;
	163	bfin_write16(&reg->control, ppi->ppi_control);
	164	break;
	165	}
	166	case PPI_TYPE_EPPI:
	167	{
	168	struct bfin_eppi_regs *reg = info->base;
	169	bfin_write32(&reg->control, ppi->ppi_control);
	170	break;
	171	}
45b82596 SJ	172	case PPI_TYPE_EPPI3:
	173	{
	174	struct bfin_eppi3_regs *reg = info->base;
	175	bfin_write32(&reg->ctl, ppi->ppi_control);
	176	break;
	177	}
63b1a90d SJ	178	default:
	179	return -EINVAL;
	180	}
	181
	182	/* disable DMA */
	183	clear_dma_irqstat(info->dma_ch);
	184	disable_dma(info->dma_ch);
	185
	186	SSYNC();
	187	return 0;
	188	}
	189
	190	static int ppi_set_params(struct ppi_if ppi, struct ppi_params params)
	191	{
	192	const struct ppi_info *info = ppi->info;
	193	int dma32 = 0;
45b82596 SJ	194	int dma_config, bytes_per_line;
45b82596 SJ	195	int hcount, hdelay, samples_per_line;
63b1a90d SJ	196
63b1a90d SJ	197	bytes_per_line = params->width * params->bpp / 8;
45b82596 SJ	198	/* convert parameters unit from pixels to samples */
	199	hcount = params->width * params->bpp / params->dlen;
	200	hdelay = params->hdelay * params->bpp / params->dlen;
	201	samples_per_line = params->line * params->bpp / params->dlen;
63b1a90d SJ	202	if (params->int_mask == 0xFFFFFFFF)
	203	ppi->err_int = false;
	204	else
	205	ppi->err_int = true;
	206
45b82596	207	dma_config = (DMA_FLOW_STOP \| RESTART \| DMA2D \| DI_EN_Y);
63b1a90d	208	ppi->ppi_control = params->ppi_control & ~PORT_EN;
45b82596 SJ	209	if (!(ppi->ppi_control & PORT_DIR))
45b82596 SJ	210	dma_config \|= WNR;
63b1a90d SJ	211	switch (info->type) {
	212	case PPI_TYPE_PPI:
	213	{
	214	struct bfin_ppi_regs *reg = info->base;
	215
	216	if (params->ppi_control & DMA32)
	217	dma32 = 1;
	218
	219	bfin_write16(&reg->control, ppi->ppi_control);
45b82596 SJ	220	bfin_write16(&reg->count, samples_per_line - 1);
45b82596 SJ	221	bfin_write16(&reg->frame, params->frame);
63b1a90d SJ	222	break;
	223	}
	224	case PPI_TYPE_EPPI:
	225	{
	226	struct bfin_eppi_regs *reg = info->base;
	227
	228	if ((params->ppi_control & PACK_EN)
	229	\|\| (params->ppi_control & 0x38000) > DLEN_16)
	230	dma32 = 1;
	231
	232	bfin_write32(&reg->control, ppi->ppi_control);
45b82596 SJ	233	bfin_write16(&reg->line, samples_per_line);
	234	bfin_write16(&reg->frame, params->frame);
	235	bfin_write16(&reg->hdelay, hdelay);
	236	bfin_write16(&reg->vdelay, params->vdelay);
	237	bfin_write16(&reg->hcount, hcount);
	238	bfin_write16(&reg->vcount, params->height);
	239	break;
	240	}
	241	case PPI_TYPE_EPPI3:
	242	{
	243	struct bfin_eppi3_regs *reg = info->base;
	244
	245	if ((params->ppi_control & PACK_EN)
	246	\|\| (params->ppi_control & 0x70000) > DLEN_16)
	247	dma32 = 1;
	248
	249	bfin_write32(&reg->ctl, ppi->ppi_control);
	250	bfin_write32(&reg->line, samples_per_line);
	251	bfin_write32(&reg->frame, params->frame);
	252	bfin_write32(&reg->hdly, hdelay);
	253	bfin_write32(&reg->vdly, params->vdelay);
	254	bfin_write32(&reg->hcnt, hcount);
	255	bfin_write32(&reg->vcnt, params->height);
	256	if (params->int_mask)
	257	bfin_write32(&reg->imsk, params->int_mask & 0xFF);
63b1a90d SJ	258	break;
	259	}
	260	default:
	261	return -EINVAL;
	262	}
	263
	264	if (dma32) {
45b82596	265	dma_config \|= WDSIZE_32 \| PSIZE_32;
63b1a90d SJ	266	set_dma_x_count(info->dma_ch, bytes_per_line >> 2);
	267	set_dma_x_modify(info->dma_ch, 4);
	268	set_dma_y_modify(info->dma_ch, 4);
	269	} else {
45b82596	270	dma_config \|= WDSIZE_16 \| PSIZE_16;
63b1a90d SJ	271	set_dma_x_count(info->dma_ch, bytes_per_line >> 1);
	272	set_dma_x_modify(info->dma_ch, 2);
	273	set_dma_y_modify(info->dma_ch, 2);
	274	}
45b82596	275	set_dma_y_count(info->dma_ch, params->height);
63b1a90d SJ	276	set_dma_config(info->dma_ch, dma_config);
	277
	278	SSYNC();
	279	return 0;
	280	}
	281
	282	static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr)
	283	{
	284	set_dma_start_addr(ppi->info->dma_ch, addr);
	285	}
	286
	287	struct ppi_if ppi_create_instance(const struct ppi_info info)
	288	{
	289	struct ppi_if *ppi;
	290
	291	if (!info \|\| !info->pin_req)
	292	return NULL;
	293
	294	if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) {
	295	pr_err("request peripheral failed\n");
	296	return NULL;
	297	}
	298
	299	ppi = kzalloc(sizeof(*ppi), GFP_KERNEL);
	300	if (!ppi) {
	301	peripheral_free_list(info->pin_req);
	302	pr_err("unable to allocate memory for ppi handle\n");
	303	return NULL;
	304	}
	305	ppi->ops = &ppi_ops;
	306	ppi->info = info;
	307
	308	pr_info("ppi probe success\n");
	309	return ppi;
	310	}
fab0e8fa	311	EXPORT_SYMBOL(ppi_create_instance);
63b1a90d SJ	312
	313	void ppi_delete_instance(struct ppi_if *ppi)
	314	{
	315	peripheral_free_list(ppi->info->pin_req);
	316	kfree(ppi);
	317	}
fab0e8fa SJ	318	EXPORT_SYMBOL(ppi_delete_instance);
	319
	320	MODULE_DESCRIPTION("Analog Devices PPI driver");
	321	MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>");
	322	MODULE_LICENSE("GPL v2");