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63b1a90d SJ |
1 | /* |
2 | * ppi.c Analog Devices Parallel Peripheral Interface driver | |
3 | * | |
4 | * Copyright (c) 2011 Analog Devices Inc. | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License version 2 as | |
8 | * published by the Free Software Foundation. | |
9 | * | |
10 | * This program is distributed in the hope that it will be useful, | |
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
13 | * GNU General Public License for more details. | |
63b1a90d SJ |
14 | */ |
15 | ||
fab0e8fa | 16 | #include <linux/module.h> |
63b1a90d | 17 | #include <linux/slab.h> |
f7d0e6d6 | 18 | #include <linux/platform_device.h> |
63b1a90d SJ |
19 | |
20 | #include <asm/bfin_ppi.h> | |
21 | #include <asm/blackfin.h> | |
22 | #include <asm/cacheflush.h> | |
23 | #include <asm/dma.h> | |
24 | #include <asm/portmux.h> | |
25 | ||
26 | #include <media/blackfin/ppi.h> | |
27 | ||
28 | static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler); | |
29 | static void ppi_detach_irq(struct ppi_if *ppi); | |
30 | static int ppi_start(struct ppi_if *ppi); | |
31 | static int ppi_stop(struct ppi_if *ppi); | |
32 | static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params); | |
33 | static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr); | |
34 | ||
35 | static const struct ppi_ops ppi_ops = { | |
36 | .attach_irq = ppi_attach_irq, | |
37 | .detach_irq = ppi_detach_irq, | |
38 | .start = ppi_start, | |
39 | .stop = ppi_stop, | |
40 | .set_params = ppi_set_params, | |
41 | .update_addr = ppi_update_addr, | |
42 | }; | |
43 | ||
44 | static irqreturn_t ppi_irq_err(int irq, void *dev_id) | |
45 | { | |
46 | struct ppi_if *ppi = dev_id; | |
47 | const struct ppi_info *info = ppi->info; | |
48 | ||
49 | switch (info->type) { | |
50 | case PPI_TYPE_PPI: | |
51 | { | |
52 | struct bfin_ppi_regs *reg = info->base; | |
53 | unsigned short status; | |
54 | ||
55 | /* register on bf561 is cleared when read | |
56 | * others are W1C | |
57 | */ | |
58 | status = bfin_read16(®->status); | |
d78a4882 SJ |
59 | if (status & 0x3000) |
60 | ppi->err = true; | |
63b1a90d SJ |
61 | bfin_write16(®->status, 0xff00); |
62 | break; | |
63 | } | |
64 | case PPI_TYPE_EPPI: | |
65 | { | |
66 | struct bfin_eppi_regs *reg = info->base; | |
d78a4882 SJ |
67 | unsigned short status; |
68 | ||
69 | status = bfin_read16(®->status); | |
70 | if (status & 0x2) | |
71 | ppi->err = true; | |
63b1a90d SJ |
72 | bfin_write16(®->status, 0xffff); |
73 | break; | |
74 | } | |
45b82596 SJ |
75 | case PPI_TYPE_EPPI3: |
76 | { | |
77 | struct bfin_eppi3_regs *reg = info->base; | |
d78a4882 | 78 | unsigned long stat; |
45b82596 | 79 | |
d78a4882 SJ |
80 | stat = bfin_read32(®->stat); |
81 | if (stat & 0x2) | |
82 | ppi->err = true; | |
45b82596 SJ |
83 | bfin_write32(®->stat, 0xc0ff); |
84 | break; | |
85 | } | |
63b1a90d SJ |
86 | default: |
87 | break; | |
88 | } | |
89 | ||
90 | return IRQ_HANDLED; | |
91 | } | |
92 | ||
93 | static int ppi_attach_irq(struct ppi_if *ppi, irq_handler_t handler) | |
94 | { | |
95 | const struct ppi_info *info = ppi->info; | |
96 | int ret; | |
97 | ||
98 | ret = request_dma(info->dma_ch, "PPI_DMA"); | |
99 | ||
100 | if (ret) { | |
101 | pr_err("Unable to allocate DMA channel for PPI\n"); | |
102 | return ret; | |
103 | } | |
104 | set_dma_callback(info->dma_ch, handler, ppi); | |
105 | ||
106 | if (ppi->err_int) { | |
107 | ret = request_irq(info->irq_err, ppi_irq_err, 0, "PPI ERROR", ppi); | |
108 | if (ret) { | |
109 | pr_err("Unable to allocate IRQ for PPI\n"); | |
110 | free_dma(info->dma_ch); | |
111 | } | |
112 | } | |
113 | return ret; | |
114 | } | |
115 | ||
116 | static void ppi_detach_irq(struct ppi_if *ppi) | |
117 | { | |
118 | const struct ppi_info *info = ppi->info; | |
119 | ||
120 | if (ppi->err_int) | |
121 | free_irq(info->irq_err, ppi); | |
122 | free_dma(info->dma_ch); | |
123 | } | |
124 | ||
125 | static int ppi_start(struct ppi_if *ppi) | |
126 | { | |
127 | const struct ppi_info *info = ppi->info; | |
128 | ||
129 | /* enable DMA */ | |
130 | enable_dma(info->dma_ch); | |
131 | ||
132 | /* enable PPI */ | |
133 | ppi->ppi_control |= PORT_EN; | |
134 | switch (info->type) { | |
135 | case PPI_TYPE_PPI: | |
136 | { | |
137 | struct bfin_ppi_regs *reg = info->base; | |
138 | bfin_write16(®->control, ppi->ppi_control); | |
139 | break; | |
140 | } | |
141 | case PPI_TYPE_EPPI: | |
142 | { | |
143 | struct bfin_eppi_regs *reg = info->base; | |
144 | bfin_write32(®->control, ppi->ppi_control); | |
145 | break; | |
146 | } | |
45b82596 SJ |
147 | case PPI_TYPE_EPPI3: |
148 | { | |
149 | struct bfin_eppi3_regs *reg = info->base; | |
150 | bfin_write32(®->ctl, ppi->ppi_control); | |
151 | break; | |
152 | } | |
63b1a90d SJ |
153 | default: |
154 | return -EINVAL; | |
155 | } | |
156 | ||
157 | SSYNC(); | |
158 | return 0; | |
159 | } | |
160 | ||
161 | static int ppi_stop(struct ppi_if *ppi) | |
162 | { | |
163 | const struct ppi_info *info = ppi->info; | |
164 | ||
165 | /* disable PPI */ | |
166 | ppi->ppi_control &= ~PORT_EN; | |
167 | switch (info->type) { | |
168 | case PPI_TYPE_PPI: | |
169 | { | |
170 | struct bfin_ppi_regs *reg = info->base; | |
171 | bfin_write16(®->control, ppi->ppi_control); | |
172 | break; | |
173 | } | |
174 | case PPI_TYPE_EPPI: | |
175 | { | |
176 | struct bfin_eppi_regs *reg = info->base; | |
177 | bfin_write32(®->control, ppi->ppi_control); | |
178 | break; | |
179 | } | |
45b82596 SJ |
180 | case PPI_TYPE_EPPI3: |
181 | { | |
182 | struct bfin_eppi3_regs *reg = info->base; | |
183 | bfin_write32(®->ctl, ppi->ppi_control); | |
184 | break; | |
185 | } | |
63b1a90d SJ |
186 | default: |
187 | return -EINVAL; | |
188 | } | |
189 | ||
190 | /* disable DMA */ | |
191 | clear_dma_irqstat(info->dma_ch); | |
192 | disable_dma(info->dma_ch); | |
193 | ||
194 | SSYNC(); | |
195 | return 0; | |
196 | } | |
197 | ||
198 | static int ppi_set_params(struct ppi_if *ppi, struct ppi_params *params) | |
199 | { | |
200 | const struct ppi_info *info = ppi->info; | |
201 | int dma32 = 0; | |
45b82596 SJ |
202 | int dma_config, bytes_per_line; |
203 | int hcount, hdelay, samples_per_line; | |
63b1a90d | 204 | |
0a6824bc SZ |
205 | #ifdef CONFIG_PINCTRL |
206 | static const char * const pin_state[] = {"8bit", "16bit", "24bit"}; | |
207 | struct pinctrl *pctrl; | |
208 | struct pinctrl_state *pstate; | |
209 | ||
210 | if (params->dlen > 24 || params->dlen <= 0) | |
211 | return -EINVAL; | |
212 | pctrl = devm_pinctrl_get(ppi->dev); | |
c9205e18 DC |
213 | if (IS_ERR(pctrl)) |
214 | return PTR_ERR(pctrl); | |
0a6824bc SZ |
215 | pstate = pinctrl_lookup_state(pctrl, |
216 | pin_state[(params->dlen + 7) / 8 - 1]); | |
217 | if (pinctrl_select_state(pctrl, pstate)) | |
218 | return -EINVAL; | |
219 | #endif | |
220 | ||
63b1a90d | 221 | bytes_per_line = params->width * params->bpp / 8; |
45b82596 SJ |
222 | /* convert parameters unit from pixels to samples */ |
223 | hcount = params->width * params->bpp / params->dlen; | |
224 | hdelay = params->hdelay * params->bpp / params->dlen; | |
225 | samples_per_line = params->line * params->bpp / params->dlen; | |
63b1a90d SJ |
226 | if (params->int_mask == 0xFFFFFFFF) |
227 | ppi->err_int = false; | |
228 | else | |
229 | ppi->err_int = true; | |
230 | ||
45b82596 | 231 | dma_config = (DMA_FLOW_STOP | RESTART | DMA2D | DI_EN_Y); |
63b1a90d | 232 | ppi->ppi_control = params->ppi_control & ~PORT_EN; |
45b82596 SJ |
233 | if (!(ppi->ppi_control & PORT_DIR)) |
234 | dma_config |= WNR; | |
63b1a90d SJ |
235 | switch (info->type) { |
236 | case PPI_TYPE_PPI: | |
237 | { | |
238 | struct bfin_ppi_regs *reg = info->base; | |
239 | ||
240 | if (params->ppi_control & DMA32) | |
241 | dma32 = 1; | |
242 | ||
243 | bfin_write16(®->control, ppi->ppi_control); | |
45b82596 SJ |
244 | bfin_write16(®->count, samples_per_line - 1); |
245 | bfin_write16(®->frame, params->frame); | |
63b1a90d SJ |
246 | break; |
247 | } | |
248 | case PPI_TYPE_EPPI: | |
249 | { | |
250 | struct bfin_eppi_regs *reg = info->base; | |
251 | ||
252 | if ((params->ppi_control & PACK_EN) | |
253 | || (params->ppi_control & 0x38000) > DLEN_16) | |
254 | dma32 = 1; | |
255 | ||
256 | bfin_write32(®->control, ppi->ppi_control); | |
45b82596 SJ |
257 | bfin_write16(®->line, samples_per_line); |
258 | bfin_write16(®->frame, params->frame); | |
259 | bfin_write16(®->hdelay, hdelay); | |
260 | bfin_write16(®->vdelay, params->vdelay); | |
261 | bfin_write16(®->hcount, hcount); | |
262 | bfin_write16(®->vcount, params->height); | |
263 | break; | |
264 | } | |
265 | case PPI_TYPE_EPPI3: | |
266 | { | |
267 | struct bfin_eppi3_regs *reg = info->base; | |
268 | ||
269 | if ((params->ppi_control & PACK_EN) | |
270 | || (params->ppi_control & 0x70000) > DLEN_16) | |
271 | dma32 = 1; | |
272 | ||
273 | bfin_write32(®->ctl, ppi->ppi_control); | |
274 | bfin_write32(®->line, samples_per_line); | |
275 | bfin_write32(®->frame, params->frame); | |
276 | bfin_write32(®->hdly, hdelay); | |
277 | bfin_write32(®->vdly, params->vdelay); | |
278 | bfin_write32(®->hcnt, hcount); | |
279 | bfin_write32(®->vcnt, params->height); | |
280 | if (params->int_mask) | |
281 | bfin_write32(®->imsk, params->int_mask & 0xFF); | |
968bd2e7 SJ |
282 | if (ppi->ppi_control & PORT_DIR) { |
283 | u32 hsync_width, vsync_width, vsync_period; | |
284 | ||
285 | hsync_width = params->hsync | |
286 | * params->bpp / params->dlen; | |
287 | vsync_width = params->vsync * samples_per_line; | |
288 | vsync_period = samples_per_line * params->frame; | |
289 | bfin_write32(®->fs1_wlhb, hsync_width); | |
290 | bfin_write32(®->fs1_paspl, samples_per_line); | |
291 | bfin_write32(®->fs2_wlvb, vsync_width); | |
292 | bfin_write32(®->fs2_palpf, vsync_period); | |
293 | } | |
63b1a90d SJ |
294 | break; |
295 | } | |
296 | default: | |
297 | return -EINVAL; | |
298 | } | |
299 | ||
300 | if (dma32) { | |
45b82596 | 301 | dma_config |= WDSIZE_32 | PSIZE_32; |
63b1a90d SJ |
302 | set_dma_x_count(info->dma_ch, bytes_per_line >> 2); |
303 | set_dma_x_modify(info->dma_ch, 4); | |
304 | set_dma_y_modify(info->dma_ch, 4); | |
305 | } else { | |
45b82596 | 306 | dma_config |= WDSIZE_16 | PSIZE_16; |
63b1a90d SJ |
307 | set_dma_x_count(info->dma_ch, bytes_per_line >> 1); |
308 | set_dma_x_modify(info->dma_ch, 2); | |
309 | set_dma_y_modify(info->dma_ch, 2); | |
310 | } | |
45b82596 | 311 | set_dma_y_count(info->dma_ch, params->height); |
63b1a90d SJ |
312 | set_dma_config(info->dma_ch, dma_config); |
313 | ||
314 | SSYNC(); | |
315 | return 0; | |
316 | } | |
317 | ||
318 | static void ppi_update_addr(struct ppi_if *ppi, unsigned long addr) | |
319 | { | |
320 | set_dma_start_addr(ppi->info->dma_ch, addr); | |
321 | } | |
322 | ||
f7d0e6d6 SZ |
323 | struct ppi_if *ppi_create_instance(struct platform_device *pdev, |
324 | const struct ppi_info *info) | |
63b1a90d SJ |
325 | { |
326 | struct ppi_if *ppi; | |
327 | ||
328 | if (!info || !info->pin_req) | |
329 | return NULL; | |
330 | ||
0a6824bc | 331 | #ifndef CONFIG_PINCTRL |
63b1a90d | 332 | if (peripheral_request_list(info->pin_req, KBUILD_MODNAME)) { |
f7d0e6d6 | 333 | dev_err(&pdev->dev, "request peripheral failed\n"); |
63b1a90d SJ |
334 | return NULL; |
335 | } | |
0a6824bc | 336 | #endif |
63b1a90d SJ |
337 | |
338 | ppi = kzalloc(sizeof(*ppi), GFP_KERNEL); | |
339 | if (!ppi) { | |
340 | peripheral_free_list(info->pin_req); | |
f7d0e6d6 | 341 | dev_err(&pdev->dev, "unable to allocate memory for ppi handle\n"); |
63b1a90d SJ |
342 | return NULL; |
343 | } | |
344 | ppi->ops = &ppi_ops; | |
345 | ppi->info = info; | |
0a6824bc | 346 | ppi->dev = &pdev->dev; |
63b1a90d SJ |
347 | |
348 | pr_info("ppi probe success\n"); | |
349 | return ppi; | |
350 | } | |
fab0e8fa | 351 | EXPORT_SYMBOL(ppi_create_instance); |
63b1a90d SJ |
352 | |
353 | void ppi_delete_instance(struct ppi_if *ppi) | |
354 | { | |
355 | peripheral_free_list(ppi->info->pin_req); | |
356 | kfree(ppi); | |
357 | } | |
fab0e8fa SJ |
358 | EXPORT_SYMBOL(ppi_delete_instance); |
359 | ||
360 | MODULE_DESCRIPTION("Analog Devices PPI driver"); | |
361 | MODULE_AUTHOR("Scott Jiang <Scott.Jiang.Linux@gmail.com>"); | |
362 | MODULE_LICENSE("GPL v2"); |