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89069699 SK |
1 | /* |
2 | * Copyright (c) 2011 - 2012 Samsung Electronics Co., Ltd. | |
3 | * http://www.samsung.com | |
4 | * | |
5 | * Samsung EXYNOS5 SoC series G-Scaler driver | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published | |
9 | * by the Free Software Foundation, either version 2 of the License, | |
10 | * or (at your option) any later version. | |
11 | */ | |
12 | ||
13 | #include <linux/module.h> | |
14 | #include <linux/kernel.h> | |
89069699 SK |
15 | #include <linux/types.h> |
16 | #include <linux/errno.h> | |
17 | #include <linux/bug.h> | |
18 | #include <linux/interrupt.h> | |
19 | #include <linux/workqueue.h> | |
20 | #include <linux/device.h> | |
21 | #include <linux/platform_device.h> | |
22 | #include <linux/list.h> | |
23 | #include <linux/io.h> | |
24 | #include <linux/slab.h> | |
25 | #include <linux/clk.h> | |
26 | #include <linux/of.h> | |
aa7929f5 | 27 | #include <linux/of_device.h> |
89069699 SK |
28 | #include <media/v4l2-ioctl.h> |
29 | ||
30 | #include "gsc-core.h" | |
31 | ||
89069699 SK |
32 | static const struct gsc_fmt gsc_formats[] = { |
33 | { | |
34 | .name = "RGB565", | |
35 | .pixelformat = V4L2_PIX_FMT_RGB565X, | |
36 | .depth = { 16 }, | |
37 | .color = GSC_RGB, | |
38 | .num_planes = 1, | |
39 | .num_comp = 1, | |
40 | }, { | |
8a661745 JMC |
41 | .name = "BGRX-8-8-8-8, 32 bpp", |
42 | .pixelformat = V4L2_PIX_FMT_BGR32, | |
89069699 SK |
43 | .depth = { 32 }, |
44 | .color = GSC_RGB, | |
45 | .num_planes = 1, | |
46 | .num_comp = 1, | |
47 | }, { | |
48 | .name = "YUV 4:2:2 packed, YCbYCr", | |
49 | .pixelformat = V4L2_PIX_FMT_YUYV, | |
50 | .depth = { 16 }, | |
51 | .color = GSC_YUV422, | |
52 | .yorder = GSC_LSB_Y, | |
53 | .corder = GSC_CBCR, | |
54 | .num_planes = 1, | |
55 | .num_comp = 1, | |
27ffaeb0 | 56 | .mbus_code = MEDIA_BUS_FMT_YUYV8_2X8, |
89069699 SK |
57 | }, { |
58 | .name = "YUV 4:2:2 packed, CbYCrY", | |
59 | .pixelformat = V4L2_PIX_FMT_UYVY, | |
60 | .depth = { 16 }, | |
61 | .color = GSC_YUV422, | |
62 | .yorder = GSC_LSB_C, | |
63 | .corder = GSC_CBCR, | |
64 | .num_planes = 1, | |
65 | .num_comp = 1, | |
27ffaeb0 | 66 | .mbus_code = MEDIA_BUS_FMT_UYVY8_2X8, |
89069699 SK |
67 | }, { |
68 | .name = "YUV 4:2:2 packed, CrYCbY", | |
69 | .pixelformat = V4L2_PIX_FMT_VYUY, | |
70 | .depth = { 16 }, | |
71 | .color = GSC_YUV422, | |
72 | .yorder = GSC_LSB_C, | |
73 | .corder = GSC_CRCB, | |
74 | .num_planes = 1, | |
75 | .num_comp = 1, | |
27ffaeb0 | 76 | .mbus_code = MEDIA_BUS_FMT_VYUY8_2X8, |
89069699 SK |
77 | }, { |
78 | .name = "YUV 4:2:2 packed, YCrYCb", | |
79 | .pixelformat = V4L2_PIX_FMT_YVYU, | |
80 | .depth = { 16 }, | |
81 | .color = GSC_YUV422, | |
82 | .yorder = GSC_LSB_Y, | |
83 | .corder = GSC_CRCB, | |
84 | .num_planes = 1, | |
85 | .num_comp = 1, | |
27ffaeb0 | 86 | .mbus_code = MEDIA_BUS_FMT_YVYU8_2X8, |
89069699 SK |
87 | }, { |
88 | .name = "YUV 4:4:4 planar, YCbYCr", | |
89 | .pixelformat = V4L2_PIX_FMT_YUV32, | |
90 | .depth = { 32 }, | |
91 | .color = GSC_YUV444, | |
92 | .yorder = GSC_LSB_Y, | |
93 | .corder = GSC_CBCR, | |
94 | .num_planes = 1, | |
95 | .num_comp = 1, | |
96 | }, { | |
97 | .name = "YUV 4:2:2 planar, Y/Cb/Cr", | |
98 | .pixelformat = V4L2_PIX_FMT_YUV422P, | |
99 | .depth = { 16 }, | |
100 | .color = GSC_YUV422, | |
101 | .yorder = GSC_LSB_Y, | |
102 | .corder = GSC_CBCR, | |
103 | .num_planes = 1, | |
104 | .num_comp = 3, | |
105 | }, { | |
106 | .name = "YUV 4:2:2 planar, Y/CbCr", | |
107 | .pixelformat = V4L2_PIX_FMT_NV16, | |
108 | .depth = { 16 }, | |
109 | .color = GSC_YUV422, | |
110 | .yorder = GSC_LSB_Y, | |
111 | .corder = GSC_CBCR, | |
112 | .num_planes = 1, | |
113 | .num_comp = 2, | |
114 | }, { | |
115 | .name = "YUV 4:2:2 planar, Y/CrCb", | |
116 | .pixelformat = V4L2_PIX_FMT_NV61, | |
117 | .depth = { 16 }, | |
118 | .color = GSC_YUV422, | |
119 | .yorder = GSC_LSB_Y, | |
120 | .corder = GSC_CRCB, | |
121 | .num_planes = 1, | |
122 | .num_comp = 2, | |
123 | }, { | |
124 | .name = "YUV 4:2:0 planar, YCbCr", | |
125 | .pixelformat = V4L2_PIX_FMT_YUV420, | |
126 | .depth = { 12 }, | |
127 | .color = GSC_YUV420, | |
128 | .yorder = GSC_LSB_Y, | |
129 | .corder = GSC_CBCR, | |
130 | .num_planes = 1, | |
131 | .num_comp = 3, | |
132 | }, { | |
133 | .name = "YUV 4:2:0 planar, YCrCb", | |
134 | .pixelformat = V4L2_PIX_FMT_YVU420, | |
135 | .depth = { 12 }, | |
136 | .color = GSC_YUV420, | |
137 | .yorder = GSC_LSB_Y, | |
138 | .corder = GSC_CRCB, | |
139 | .num_planes = 1, | |
140 | .num_comp = 3, | |
141 | ||
142 | }, { | |
143 | .name = "YUV 4:2:0 planar, Y/CbCr", | |
144 | .pixelformat = V4L2_PIX_FMT_NV12, | |
145 | .depth = { 12 }, | |
146 | .color = GSC_YUV420, | |
147 | .yorder = GSC_LSB_Y, | |
148 | .corder = GSC_CBCR, | |
149 | .num_planes = 1, | |
150 | .num_comp = 2, | |
151 | }, { | |
152 | .name = "YUV 4:2:0 planar, Y/CrCb", | |
153 | .pixelformat = V4L2_PIX_FMT_NV21, | |
154 | .depth = { 12 }, | |
155 | .color = GSC_YUV420, | |
156 | .yorder = GSC_LSB_Y, | |
157 | .corder = GSC_CRCB, | |
158 | .num_planes = 1, | |
159 | .num_comp = 2, | |
160 | }, { | |
161 | .name = "YUV 4:2:0 non-contig. 2p, Y/CbCr", | |
162 | .pixelformat = V4L2_PIX_FMT_NV12M, | |
163 | .depth = { 8, 4 }, | |
164 | .color = GSC_YUV420, | |
165 | .yorder = GSC_LSB_Y, | |
166 | .corder = GSC_CBCR, | |
167 | .num_planes = 2, | |
168 | .num_comp = 2, | |
169 | }, { | |
170 | .name = "YUV 4:2:0 non-contig. 3p, Y/Cb/Cr", | |
171 | .pixelformat = V4L2_PIX_FMT_YUV420M, | |
172 | .depth = { 8, 2, 2 }, | |
173 | .color = GSC_YUV420, | |
174 | .yorder = GSC_LSB_Y, | |
175 | .corder = GSC_CBCR, | |
176 | .num_planes = 3, | |
177 | .num_comp = 3, | |
178 | }, { | |
179 | .name = "YUV 4:2:0 non-contig. 3p, Y/Cr/Cb", | |
180 | .pixelformat = V4L2_PIX_FMT_YVU420M, | |
181 | .depth = { 8, 2, 2 }, | |
182 | .color = GSC_YUV420, | |
183 | .yorder = GSC_LSB_Y, | |
184 | .corder = GSC_CRCB, | |
185 | .num_planes = 3, | |
186 | .num_comp = 3, | |
aecede4c SAB |
187 | }, { |
188 | .name = "YUV 4:2:0 n.c. 2p, Y/CbCr tiled", | |
189 | .pixelformat = V4L2_PIX_FMT_NV12MT_16X16, | |
190 | .depth = { 8, 4 }, | |
191 | .color = GSC_YUV420, | |
192 | .yorder = GSC_LSB_Y, | |
193 | .corder = GSC_CBCR, | |
194 | .num_planes = 2, | |
195 | .num_comp = 2, | |
89069699 SK |
196 | } |
197 | }; | |
198 | ||
199 | const struct gsc_fmt *get_format(int index) | |
200 | { | |
201 | if (index >= ARRAY_SIZE(gsc_formats)) | |
202 | return NULL; | |
203 | ||
204 | return (struct gsc_fmt *)&gsc_formats[index]; | |
205 | } | |
206 | ||
207 | const struct gsc_fmt *find_fmt(u32 *pixelformat, u32 *mbus_code, u32 index) | |
208 | { | |
209 | const struct gsc_fmt *fmt, *def_fmt = NULL; | |
210 | unsigned int i; | |
211 | ||
212 | if (index >= ARRAY_SIZE(gsc_formats)) | |
213 | return NULL; | |
214 | ||
215 | for (i = 0; i < ARRAY_SIZE(gsc_formats); ++i) { | |
216 | fmt = get_format(i); | |
217 | if (pixelformat && fmt->pixelformat == *pixelformat) | |
218 | return fmt; | |
219 | if (mbus_code && fmt->mbus_code == *mbus_code) | |
220 | return fmt; | |
221 | if (index == i) | |
222 | def_fmt = fmt; | |
223 | } | |
224 | return def_fmt; | |
225 | ||
226 | } | |
227 | ||
228 | void gsc_set_frame_size(struct gsc_frame *frame, int width, int height) | |
229 | { | |
230 | frame->f_width = width; | |
231 | frame->f_height = height; | |
232 | frame->crop.width = width; | |
233 | frame->crop.height = height; | |
234 | frame->crop.left = 0; | |
235 | frame->crop.top = 0; | |
236 | } | |
237 | ||
238 | int gsc_cal_prescaler_ratio(struct gsc_variant *var, u32 src, u32 dst, | |
239 | u32 *ratio) | |
240 | { | |
241 | if ((dst > src) || (dst >= src / var->poly_sc_down_max)) { | |
242 | *ratio = 1; | |
243 | return 0; | |
244 | } | |
245 | ||
246 | if ((src / var->poly_sc_down_max / var->pre_sc_down_max) > dst) { | |
247 | pr_err("Exceeded maximum downscaling ratio (1/16))"); | |
248 | return -EINVAL; | |
249 | } | |
250 | ||
251 | *ratio = (dst > (src / 8)) ? 2 : 4; | |
252 | ||
253 | return 0; | |
254 | } | |
255 | ||
256 | void gsc_get_prescaler_shfactor(u32 hratio, u32 vratio, u32 *sh) | |
257 | { | |
258 | if (hratio == 4 && vratio == 4) | |
259 | *sh = 4; | |
260 | else if ((hratio == 4 && vratio == 2) || | |
261 | (hratio == 2 && vratio == 4)) | |
262 | *sh = 3; | |
263 | else if ((hratio == 4 && vratio == 1) || | |
264 | (hratio == 1 && vratio == 4) || | |
265 | (hratio == 2 && vratio == 2)) | |
266 | *sh = 2; | |
267 | else if (hratio == 1 && vratio == 1) | |
268 | *sh = 0; | |
269 | else | |
270 | *sh = 1; | |
271 | } | |
272 | ||
273 | void gsc_check_src_scale_info(struct gsc_variant *var, | |
274 | struct gsc_frame *s_frame, u32 *wratio, | |
275 | u32 tx, u32 ty, u32 *hratio) | |
276 | { | |
277 | int remainder = 0, walign, halign; | |
278 | ||
279 | if (is_yuv420(s_frame->fmt->color)) { | |
280 | walign = GSC_SC_ALIGN_4; | |
281 | halign = GSC_SC_ALIGN_4; | |
282 | } else if (is_yuv422(s_frame->fmt->color)) { | |
283 | walign = GSC_SC_ALIGN_4; | |
284 | halign = GSC_SC_ALIGN_2; | |
285 | } else { | |
286 | walign = GSC_SC_ALIGN_2; | |
287 | halign = GSC_SC_ALIGN_2; | |
288 | } | |
289 | ||
290 | remainder = s_frame->crop.width % (*wratio * walign); | |
291 | if (remainder) { | |
292 | s_frame->crop.width -= remainder; | |
293 | gsc_cal_prescaler_ratio(var, s_frame->crop.width, tx, wratio); | |
294 | pr_info("cropped src width size is recalculated from %d to %d", | |
295 | s_frame->crop.width + remainder, s_frame->crop.width); | |
296 | } | |
297 | ||
298 | remainder = s_frame->crop.height % (*hratio * halign); | |
299 | if (remainder) { | |
300 | s_frame->crop.height -= remainder; | |
301 | gsc_cal_prescaler_ratio(var, s_frame->crop.height, ty, hratio); | |
302 | pr_info("cropped src height size is recalculated from %d to %d", | |
303 | s_frame->crop.height + remainder, s_frame->crop.height); | |
304 | } | |
305 | } | |
306 | ||
307 | int gsc_enum_fmt_mplane(struct v4l2_fmtdesc *f) | |
308 | { | |
309 | const struct gsc_fmt *fmt; | |
310 | ||
311 | fmt = find_fmt(NULL, NULL, f->index); | |
312 | if (!fmt) | |
313 | return -EINVAL; | |
314 | ||
315 | strlcpy(f->description, fmt->name, sizeof(f->description)); | |
316 | f->pixelformat = fmt->pixelformat; | |
317 | ||
318 | return 0; | |
319 | } | |
320 | ||
32af858c | 321 | static int get_plane_info(struct gsc_frame *frm, u32 addr, u32 *index, u32 *ret_addr) |
89069699 SK |
322 | { |
323 | if (frm->addr.y == addr) { | |
324 | *index = 0; | |
32af858c | 325 | *ret_addr = frm->addr.y; |
89069699 SK |
326 | } else if (frm->addr.cb == addr) { |
327 | *index = 1; | |
32af858c | 328 | *ret_addr = frm->addr.cb; |
89069699 SK |
329 | } else if (frm->addr.cr == addr) { |
330 | *index = 2; | |
32af858c | 331 | *ret_addr = frm->addr.cr; |
89069699 SK |
332 | } else { |
333 | pr_err("Plane address is wrong"); | |
334 | return -EINVAL; | |
335 | } | |
32af858c | 336 | return 0; |
89069699 SK |
337 | } |
338 | ||
339 | void gsc_set_prefbuf(struct gsc_dev *gsc, struct gsc_frame *frm) | |
340 | { | |
341 | u32 f_chk_addr, f_chk_len, s_chk_addr, s_chk_len; | |
342 | f_chk_addr = f_chk_len = s_chk_addr = s_chk_len = 0; | |
343 | ||
344 | f_chk_addr = frm->addr.y; | |
345 | f_chk_len = frm->payload[0]; | |
346 | if (frm->fmt->num_planes == 2) { | |
347 | s_chk_addr = frm->addr.cb; | |
348 | s_chk_len = frm->payload[1]; | |
349 | } else if (frm->fmt->num_planes == 3) { | |
350 | u32 low_addr, low_plane, mid_addr, mid_plane; | |
351 | u32 high_addr, high_plane; | |
352 | u32 t_min, t_max; | |
353 | ||
354 | t_min = min3(frm->addr.y, frm->addr.cb, frm->addr.cr); | |
32af858c MCC |
355 | if (get_plane_info(frm, t_min, &low_plane, &low_addr)) |
356 | return; | |
89069699 | 357 | t_max = max3(frm->addr.y, frm->addr.cb, frm->addr.cr); |
32af858c MCC |
358 | if (get_plane_info(frm, t_max, &high_plane, &high_addr)) |
359 | return; | |
89069699 SK |
360 | |
361 | mid_plane = 3 - (low_plane + high_plane); | |
362 | if (mid_plane == 0) | |
363 | mid_addr = frm->addr.y; | |
364 | else if (mid_plane == 1) | |
365 | mid_addr = frm->addr.cb; | |
366 | else if (mid_plane == 2) | |
367 | mid_addr = frm->addr.cr; | |
368 | else | |
369 | return; | |
370 | ||
371 | f_chk_addr = low_addr; | |
372 | if (mid_addr + frm->payload[mid_plane] - low_addr > | |
373 | high_addr + frm->payload[high_plane] - mid_addr) { | |
374 | f_chk_len = frm->payload[low_plane]; | |
375 | s_chk_addr = mid_addr; | |
376 | s_chk_len = high_addr + | |
377 | frm->payload[high_plane] - mid_addr; | |
378 | } else { | |
379 | f_chk_len = mid_addr + | |
380 | frm->payload[mid_plane] - low_addr; | |
381 | s_chk_addr = high_addr; | |
382 | s_chk_len = frm->payload[high_plane]; | |
383 | } | |
384 | } | |
385 | pr_debug("f_addr = 0x%08x, f_len = %d, s_addr = 0x%08x, s_len = %d\n", | |
386 | f_chk_addr, f_chk_len, s_chk_addr, s_chk_len); | |
387 | } | |
388 | ||
389 | int gsc_try_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) | |
390 | { | |
391 | struct gsc_dev *gsc = ctx->gsc_dev; | |
392 | struct gsc_variant *variant = gsc->variant; | |
393 | struct v4l2_pix_format_mplane *pix_mp = &f->fmt.pix_mp; | |
394 | const struct gsc_fmt *fmt; | |
395 | u32 max_w, max_h, mod_x, mod_y; | |
396 | u32 min_w, min_h, tmp_w, tmp_h; | |
397 | int i; | |
398 | ||
399 | pr_debug("user put w: %d, h: %d", pix_mp->width, pix_mp->height); | |
400 | ||
401 | fmt = find_fmt(&pix_mp->pixelformat, NULL, 0); | |
402 | if (!fmt) { | |
403 | pr_err("pixelformat format (0x%X) invalid\n", | |
404 | pix_mp->pixelformat); | |
405 | return -EINVAL; | |
406 | } | |
407 | ||
408 | if (pix_mp->field == V4L2_FIELD_ANY) | |
409 | pix_mp->field = V4L2_FIELD_NONE; | |
410 | else if (pix_mp->field != V4L2_FIELD_NONE) { | |
c2987aaf | 411 | pr_debug("Not supported field order(%d)\n", pix_mp->field); |
89069699 SK |
412 | return -EINVAL; |
413 | } | |
414 | ||
415 | max_w = variant->pix_max->target_rot_dis_w; | |
416 | max_h = variant->pix_max->target_rot_dis_h; | |
417 | ||
418 | mod_x = ffs(variant->pix_align->org_w) - 1; | |
419 | if (is_yuv420(fmt->color)) | |
420 | mod_y = ffs(variant->pix_align->org_h) - 1; | |
421 | else | |
422 | mod_y = ffs(variant->pix_align->org_h) - 2; | |
423 | ||
424 | if (V4L2_TYPE_IS_OUTPUT(f->type)) { | |
425 | min_w = variant->pix_min->org_w; | |
426 | min_h = variant->pix_min->org_h; | |
427 | } else { | |
428 | min_w = variant->pix_min->target_rot_dis_w; | |
429 | min_h = variant->pix_min->target_rot_dis_h; | |
430 | } | |
431 | ||
432 | pr_debug("mod_x: %d, mod_y: %d, max_w: %d, max_h = %d", | |
433 | mod_x, mod_y, max_w, max_h); | |
434 | ||
435 | /* To check if image size is modified to adjust parameter against | |
436 | hardware abilities */ | |
437 | tmp_w = pix_mp->width; | |
438 | tmp_h = pix_mp->height; | |
439 | ||
440 | v4l_bound_align_image(&pix_mp->width, min_w, max_w, mod_x, | |
441 | &pix_mp->height, min_h, max_h, mod_y, 0); | |
442 | if (tmp_w != pix_mp->width || tmp_h != pix_mp->height) | |
def2cc8c | 443 | pr_debug("Image size has been modified from %dx%d to %dx%d\n", |
89069699 SK |
444 | tmp_w, tmp_h, pix_mp->width, pix_mp->height); |
445 | ||
446 | pix_mp->num_planes = fmt->num_planes; | |
447 | ||
448 | if (pix_mp->width >= 1280) /* HD */ | |
449 | pix_mp->colorspace = V4L2_COLORSPACE_REC709; | |
450 | else /* SD */ | |
451 | pix_mp->colorspace = V4L2_COLORSPACE_SMPTE170M; | |
452 | ||
89069699 | 453 | for (i = 0; i < pix_mp->num_planes; ++i) { |
652bb680 JMC |
454 | struct v4l2_plane_pix_format *plane_fmt = &pix_mp->plane_fmt[i]; |
455 | u32 bpl = plane_fmt->bytesperline; | |
456 | ||
457 | if (fmt->num_comp == 1 && /* Packed */ | |
458 | (bpl == 0 || (bpl * 8 / fmt->depth[i]) < pix_mp->width)) | |
459 | bpl = pix_mp->width * fmt->depth[i] / 8; | |
460 | ||
461 | if (fmt->num_comp > 1 && /* Planar */ | |
462 | (bpl == 0 || bpl < pix_mp->width)) | |
463 | bpl = pix_mp->width; | |
464 | ||
465 | if (i != 0 && fmt->num_comp == 3) | |
466 | bpl /= 2; | |
89069699 | 467 | |
652bb680 JMC |
468 | plane_fmt->bytesperline = bpl; |
469 | plane_fmt->sizeimage = max(pix_mp->width * pix_mp->height * | |
470 | fmt->depth[i] / 8, | |
471 | plane_fmt->sizeimage); | |
89069699 SK |
472 | pr_debug("[%d]: bpl: %d, sizeimage: %d", |
473 | i, bpl, pix_mp->plane_fmt[i].sizeimage); | |
474 | } | |
475 | ||
476 | return 0; | |
477 | } | |
478 | ||
479 | int gsc_g_fmt_mplane(struct gsc_ctx *ctx, struct v4l2_format *f) | |
480 | { | |
481 | struct gsc_frame *frame; | |
482 | struct v4l2_pix_format_mplane *pix_mp; | |
483 | int i; | |
484 | ||
485 | frame = ctx_get_frame(ctx, f->type); | |
486 | if (IS_ERR(frame)) | |
487 | return PTR_ERR(frame); | |
488 | ||
489 | pix_mp = &f->fmt.pix_mp; | |
490 | ||
491 | pix_mp->width = frame->f_width; | |
492 | pix_mp->height = frame->f_height; | |
493 | pix_mp->field = V4L2_FIELD_NONE; | |
494 | pix_mp->pixelformat = frame->fmt->pixelformat; | |
495 | pix_mp->colorspace = V4L2_COLORSPACE_REC709; | |
496 | pix_mp->num_planes = frame->fmt->num_planes; | |
497 | ||
498 | for (i = 0; i < pix_mp->num_planes; ++i) { | |
499 | pix_mp->plane_fmt[i].bytesperline = (frame->f_width * | |
500 | frame->fmt->depth[i]) / 8; | |
501 | pix_mp->plane_fmt[i].sizeimage = | |
502 | pix_mp->plane_fmt[i].bytesperline * frame->f_height; | |
503 | } | |
504 | ||
505 | return 0; | |
506 | } | |
507 | ||
508 | void gsc_check_crop_change(u32 tmp_w, u32 tmp_h, u32 *w, u32 *h) | |
509 | { | |
510 | if (tmp_w != *w || tmp_h != *h) { | |
511 | pr_info("Cropped size has been modified from %dx%d to %dx%d", | |
512 | *w, *h, tmp_w, tmp_h); | |
513 | *w = tmp_w; | |
514 | *h = tmp_h; | |
515 | } | |
516 | } | |
517 | ||
518 | int gsc_g_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr) | |
519 | { | |
520 | struct gsc_frame *frame; | |
521 | ||
522 | frame = ctx_get_frame(ctx, cr->type); | |
523 | if (IS_ERR(frame)) | |
524 | return PTR_ERR(frame); | |
525 | ||
526 | cr->c = frame->crop; | |
527 | ||
528 | return 0; | |
529 | } | |
530 | ||
531 | int gsc_try_crop(struct gsc_ctx *ctx, struct v4l2_crop *cr) | |
532 | { | |
533 | struct gsc_frame *f; | |
534 | struct gsc_dev *gsc = ctx->gsc_dev; | |
535 | struct gsc_variant *variant = gsc->variant; | |
536 | u32 mod_x = 0, mod_y = 0, tmp_w, tmp_h; | |
537 | u32 min_w, min_h, max_w, max_h; | |
538 | ||
539 | if (cr->c.top < 0 || cr->c.left < 0) { | |
540 | pr_err("doesn't support negative values for top & left\n"); | |
541 | return -EINVAL; | |
542 | } | |
543 | pr_debug("user put w: %d, h: %d", cr->c.width, cr->c.height); | |
544 | ||
545 | if (cr->type == V4L2_BUF_TYPE_VIDEO_CAPTURE_MPLANE) | |
546 | f = &ctx->d_frame; | |
547 | else if (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT_MPLANE) | |
548 | f = &ctx->s_frame; | |
549 | else | |
550 | return -EINVAL; | |
551 | ||
552 | max_w = f->f_width; | |
553 | max_h = f->f_height; | |
554 | tmp_w = cr->c.width; | |
555 | tmp_h = cr->c.height; | |
556 | ||
557 | if (V4L2_TYPE_IS_OUTPUT(cr->type)) { | |
558 | if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 1) || | |
559 | is_rgb(f->fmt->color)) | |
560 | min_w = 32; | |
561 | else | |
562 | min_w = 64; | |
563 | if ((is_yuv422(f->fmt->color) && f->fmt->num_comp == 3) || | |
564 | is_yuv420(f->fmt->color)) | |
565 | min_h = 32; | |
566 | else | |
567 | min_h = 16; | |
568 | } else { | |
569 | if (is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) | |
570 | mod_x = ffs(variant->pix_align->target_w) - 1; | |
571 | if (is_yuv420(f->fmt->color)) | |
572 | mod_y = ffs(variant->pix_align->target_h) - 1; | |
573 | if (ctx->gsc_ctrls.rotate->val == 90 || | |
574 | ctx->gsc_ctrls.rotate->val == 270) { | |
575 | max_w = f->f_height; | |
576 | max_h = f->f_width; | |
577 | min_w = variant->pix_min->target_rot_en_w; | |
578 | min_h = variant->pix_min->target_rot_en_h; | |
579 | tmp_w = cr->c.height; | |
580 | tmp_h = cr->c.width; | |
581 | } else { | |
582 | min_w = variant->pix_min->target_rot_dis_w; | |
583 | min_h = variant->pix_min->target_rot_dis_h; | |
584 | } | |
585 | } | |
586 | pr_debug("mod_x: %d, mod_y: %d, min_w: %d, min_h = %d", | |
587 | mod_x, mod_y, min_w, min_h); | |
588 | pr_debug("tmp_w : %d, tmp_h : %d", tmp_w, tmp_h); | |
589 | ||
590 | v4l_bound_align_image(&tmp_w, min_w, max_w, mod_x, | |
591 | &tmp_h, min_h, max_h, mod_y, 0); | |
592 | ||
593 | if (!V4L2_TYPE_IS_OUTPUT(cr->type) && | |
594 | (ctx->gsc_ctrls.rotate->val == 90 || | |
595 | ctx->gsc_ctrls.rotate->val == 270)) | |
596 | gsc_check_crop_change(tmp_h, tmp_w, | |
597 | &cr->c.width, &cr->c.height); | |
598 | else | |
599 | gsc_check_crop_change(tmp_w, tmp_h, | |
600 | &cr->c.width, &cr->c.height); | |
601 | ||
602 | ||
603 | /* adjust left/top if cropping rectangle is out of bounds */ | |
604 | /* Need to add code to algin left value with 2's multiple */ | |
605 | if (cr->c.left + tmp_w > max_w) | |
606 | cr->c.left = max_w - tmp_w; | |
607 | if (cr->c.top + tmp_h > max_h) | |
608 | cr->c.top = max_h - tmp_h; | |
609 | ||
610 | if ((is_yuv420(f->fmt->color) || is_yuv422(f->fmt->color)) && | |
611 | cr->c.left & 1) | |
612 | cr->c.left -= 1; | |
613 | ||
614 | pr_debug("Aligned l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d", | |
615 | cr->c.left, cr->c.top, cr->c.width, cr->c.height, max_w, max_h); | |
616 | ||
617 | return 0; | |
618 | } | |
619 | ||
620 | int gsc_check_scaler_ratio(struct gsc_variant *var, int sw, int sh, int dw, | |
621 | int dh, int rot, int out_path) | |
622 | { | |
623 | int tmp_w, tmp_h, sc_down_max; | |
624 | ||
625 | if (out_path == GSC_DMA) | |
626 | sc_down_max = var->sc_down_max; | |
627 | else | |
628 | sc_down_max = var->local_sc_down; | |
629 | ||
630 | if (rot == 90 || rot == 270) { | |
631 | tmp_w = dh; | |
632 | tmp_h = dw; | |
633 | } else { | |
634 | tmp_w = dw; | |
635 | tmp_h = dh; | |
636 | } | |
637 | ||
638 | if ((sw / tmp_w) > sc_down_max || | |
639 | (sh / tmp_h) > sc_down_max || | |
640 | (tmp_w / sw) > var->sc_up_max || | |
641 | (tmp_h / sh) > var->sc_up_max) | |
642 | return -EINVAL; | |
643 | ||
644 | return 0; | |
645 | } | |
646 | ||
647 | int gsc_set_scaler_info(struct gsc_ctx *ctx) | |
648 | { | |
649 | struct gsc_scaler *sc = &ctx->scaler; | |
650 | struct gsc_frame *s_frame = &ctx->s_frame; | |
651 | struct gsc_frame *d_frame = &ctx->d_frame; | |
652 | struct gsc_variant *variant = ctx->gsc_dev->variant; | |
653 | struct device *dev = &ctx->gsc_dev->pdev->dev; | |
654 | int tx, ty; | |
655 | int ret; | |
656 | ||
657 | ret = gsc_check_scaler_ratio(variant, s_frame->crop.width, | |
658 | s_frame->crop.height, d_frame->crop.width, d_frame->crop.height, | |
659 | ctx->gsc_ctrls.rotate->val, ctx->out_path); | |
660 | if (ret) { | |
661 | pr_err("out of scaler range"); | |
662 | return ret; | |
663 | } | |
664 | ||
665 | if (ctx->gsc_ctrls.rotate->val == 90 || | |
666 | ctx->gsc_ctrls.rotate->val == 270) { | |
667 | ty = d_frame->crop.width; | |
668 | tx = d_frame->crop.height; | |
669 | } else { | |
670 | tx = d_frame->crop.width; | |
671 | ty = d_frame->crop.height; | |
672 | } | |
673 | ||
674 | if (tx <= 0 || ty <= 0) { | |
675 | dev_err(dev, "Invalid target size: %dx%d", tx, ty); | |
676 | return -EINVAL; | |
677 | } | |
678 | ||
679 | ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.width, | |
680 | tx, &sc->pre_hratio); | |
681 | if (ret) { | |
682 | pr_err("Horizontal scale ratio is out of range"); | |
683 | return ret; | |
684 | } | |
685 | ||
686 | ret = gsc_cal_prescaler_ratio(variant, s_frame->crop.height, | |
687 | ty, &sc->pre_vratio); | |
688 | if (ret) { | |
689 | pr_err("Vertical scale ratio is out of range"); | |
690 | return ret; | |
691 | } | |
692 | ||
693 | gsc_check_src_scale_info(variant, s_frame, &sc->pre_hratio, | |
694 | tx, ty, &sc->pre_vratio); | |
695 | ||
696 | gsc_get_prescaler_shfactor(sc->pre_hratio, sc->pre_vratio, | |
697 | &sc->pre_shfactor); | |
698 | ||
699 | sc->main_hratio = (s_frame->crop.width << 16) / tx; | |
700 | sc->main_vratio = (s_frame->crop.height << 16) / ty; | |
701 | ||
702 | pr_debug("scaler input/output size : sx = %d, sy = %d, tx = %d, ty = %d", | |
703 | s_frame->crop.width, s_frame->crop.height, tx, ty); | |
704 | pr_debug("scaler ratio info : pre_shfactor : %d, pre_h : %d", | |
705 | sc->pre_shfactor, sc->pre_hratio); | |
706 | pr_debug("pre_v :%d, main_h : %d, main_v : %d", | |
707 | sc->pre_vratio, sc->main_hratio, sc->main_vratio); | |
708 | ||
709 | return 0; | |
710 | } | |
711 | ||
712 | static int __gsc_s_ctrl(struct gsc_ctx *ctx, struct v4l2_ctrl *ctrl) | |
713 | { | |
714 | struct gsc_dev *gsc = ctx->gsc_dev; | |
715 | struct gsc_variant *variant = gsc->variant; | |
716 | unsigned int flags = GSC_DST_FMT | GSC_SRC_FMT; | |
717 | int ret = 0; | |
718 | ||
719 | if (ctrl->flags & V4L2_CTRL_FLAG_INACTIVE) | |
720 | return 0; | |
721 | ||
722 | switch (ctrl->id) { | |
723 | case V4L2_CID_HFLIP: | |
724 | ctx->hflip = ctrl->val; | |
725 | break; | |
726 | ||
727 | case V4L2_CID_VFLIP: | |
728 | ctx->vflip = ctrl->val; | |
729 | break; | |
730 | ||
731 | case V4L2_CID_ROTATE: | |
732 | if ((ctx->state & flags) == flags) { | |
733 | ret = gsc_check_scaler_ratio(variant, | |
734 | ctx->s_frame.crop.width, | |
735 | ctx->s_frame.crop.height, | |
736 | ctx->d_frame.crop.width, | |
737 | ctx->d_frame.crop.height, | |
738 | ctx->gsc_ctrls.rotate->val, | |
739 | ctx->out_path); | |
740 | ||
741 | if (ret) | |
742 | return -EINVAL; | |
743 | } | |
744 | ||
745 | ctx->rotation = ctrl->val; | |
746 | break; | |
747 | ||
748 | case V4L2_CID_ALPHA_COMPONENT: | |
749 | ctx->d_frame.alpha = ctrl->val; | |
750 | break; | |
751 | } | |
752 | ||
753 | ctx->state |= GSC_PARAMS; | |
754 | return 0; | |
755 | } | |
756 | ||
757 | static int gsc_s_ctrl(struct v4l2_ctrl *ctrl) | |
758 | { | |
759 | struct gsc_ctx *ctx = ctrl_to_ctx(ctrl); | |
760 | unsigned long flags; | |
761 | int ret; | |
762 | ||
763 | spin_lock_irqsave(&ctx->gsc_dev->slock, flags); | |
764 | ret = __gsc_s_ctrl(ctx, ctrl); | |
765 | spin_unlock_irqrestore(&ctx->gsc_dev->slock, flags); | |
766 | ||
767 | return ret; | |
768 | } | |
769 | ||
d2331c99 | 770 | static const struct v4l2_ctrl_ops gsc_ctrl_ops = { |
89069699 SK |
771 | .s_ctrl = gsc_s_ctrl, |
772 | }; | |
773 | ||
774 | int gsc_ctrls_create(struct gsc_ctx *ctx) | |
775 | { | |
776 | if (ctx->ctrls_rdy) { | |
777 | pr_err("Control handler of this context was created already"); | |
778 | return 0; | |
779 | } | |
780 | ||
781 | v4l2_ctrl_handler_init(&ctx->ctrl_handler, GSC_MAX_CTRL_NUM); | |
782 | ||
783 | ctx->gsc_ctrls.rotate = v4l2_ctrl_new_std(&ctx->ctrl_handler, | |
784 | &gsc_ctrl_ops, V4L2_CID_ROTATE, 0, 270, 90, 0); | |
785 | ctx->gsc_ctrls.hflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, | |
786 | &gsc_ctrl_ops, V4L2_CID_HFLIP, 0, 1, 1, 0); | |
787 | ctx->gsc_ctrls.vflip = v4l2_ctrl_new_std(&ctx->ctrl_handler, | |
788 | &gsc_ctrl_ops, V4L2_CID_VFLIP, 0, 1, 1, 0); | |
789 | ctx->gsc_ctrls.global_alpha = v4l2_ctrl_new_std(&ctx->ctrl_handler, | |
790 | &gsc_ctrl_ops, V4L2_CID_ALPHA_COMPONENT, 0, 255, 1, 0); | |
791 | ||
792 | ctx->ctrls_rdy = ctx->ctrl_handler.error == 0; | |
793 | ||
794 | if (ctx->ctrl_handler.error) { | |
795 | int err = ctx->ctrl_handler.error; | |
796 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); | |
797 | pr_err("Failed to create G-Scaler control handlers"); | |
798 | return err; | |
799 | } | |
800 | ||
801 | return 0; | |
802 | } | |
803 | ||
804 | void gsc_ctrls_delete(struct gsc_ctx *ctx) | |
805 | { | |
806 | if (ctx->ctrls_rdy) { | |
807 | v4l2_ctrl_handler_free(&ctx->ctrl_handler); | |
808 | ctx->ctrls_rdy = false; | |
809 | } | |
810 | } | |
811 | ||
812 | /* The color format (num_comp, num_planes) must be already configured. */ | |
813 | int gsc_prepare_addr(struct gsc_ctx *ctx, struct vb2_buffer *vb, | |
814 | struct gsc_frame *frame, struct gsc_addr *addr) | |
815 | { | |
816 | int ret = 0; | |
817 | u32 pix_size; | |
818 | ||
819 | if ((vb == NULL) || (frame == NULL)) | |
820 | return -EINVAL; | |
821 | ||
822 | pix_size = frame->f_width * frame->f_height; | |
823 | ||
824 | pr_debug("num_planes= %d, num_comp= %d, pix_size= %d", | |
825 | frame->fmt->num_planes, frame->fmt->num_comp, pix_size); | |
826 | ||
827 | addr->y = vb2_dma_contig_plane_dma_addr(vb, 0); | |
828 | ||
829 | if (frame->fmt->num_planes == 1) { | |
830 | switch (frame->fmt->num_comp) { | |
831 | case 1: | |
832 | addr->cb = 0; | |
833 | addr->cr = 0; | |
834 | break; | |
835 | case 2: | |
836 | /* decompose Y into Y/Cb */ | |
837 | addr->cb = (dma_addr_t)(addr->y + pix_size); | |
838 | addr->cr = 0; | |
839 | break; | |
840 | case 3: | |
841 | /* decompose Y into Y/Cb/Cr */ | |
842 | addr->cb = (dma_addr_t)(addr->y + pix_size); | |
843 | if (GSC_YUV420 == frame->fmt->color) | |
844 | addr->cr = (dma_addr_t)(addr->cb | |
845 | + (pix_size >> 2)); | |
846 | else /* 422 */ | |
847 | addr->cr = (dma_addr_t)(addr->cb | |
848 | + (pix_size >> 1)); | |
849 | break; | |
850 | default: | |
851 | pr_err("Invalid the number of color planes"); | |
852 | return -EINVAL; | |
853 | } | |
854 | } else { | |
855 | if (frame->fmt->num_planes >= 2) | |
856 | addr->cb = vb2_dma_contig_plane_dma_addr(vb, 1); | |
857 | ||
858 | if (frame->fmt->num_planes == 3) | |
859 | addr->cr = vb2_dma_contig_plane_dma_addr(vb, 2); | |
860 | } | |
861 | ||
862 | if ((frame->fmt->pixelformat == V4L2_PIX_FMT_VYUY) || | |
863 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVYU) || | |
864 | (frame->fmt->pixelformat == V4L2_PIX_FMT_NV61) || | |
865 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420) || | |
866 | (frame->fmt->pixelformat == V4L2_PIX_FMT_NV21) || | |
867 | (frame->fmt->pixelformat == V4L2_PIX_FMT_YVU420M)) | |
868 | swap(addr->cb, addr->cr); | |
869 | ||
286da990 MCC |
870 | pr_debug("ADDR: y= %pad cb= %pad cr= %pad ret= %d", |
871 | &addr->y, &addr->cb, &addr->cr, ret); | |
89069699 SK |
872 | |
873 | return ret; | |
874 | } | |
875 | ||
876 | static irqreturn_t gsc_irq_handler(int irq, void *priv) | |
877 | { | |
878 | struct gsc_dev *gsc = priv; | |
879 | struct gsc_ctx *ctx; | |
880 | int gsc_irq; | |
881 | ||
882 | gsc_irq = gsc_hw_get_irq_status(gsc); | |
883 | gsc_hw_clear_irq(gsc, gsc_irq); | |
884 | ||
885 | if (gsc_irq == GSC_IRQ_OVERRUN) { | |
886 | pr_err("Local path input over-run interrupt has occurred!\n"); | |
887 | return IRQ_HANDLED; | |
888 | } | |
889 | ||
890 | spin_lock(&gsc->slock); | |
891 | ||
892 | if (test_and_clear_bit(ST_M2M_PEND, &gsc->state)) { | |
893 | ||
894 | gsc_hw_enable_control(gsc, false); | |
895 | ||
896 | if (test_and_clear_bit(ST_M2M_SUSPENDING, &gsc->state)) { | |
897 | set_bit(ST_M2M_SUSPENDED, &gsc->state); | |
898 | wake_up(&gsc->irq_queue); | |
899 | goto isr_unlock; | |
900 | } | |
901 | ctx = v4l2_m2m_get_curr_priv(gsc->m2m.m2m_dev); | |
902 | ||
903 | if (!ctx || !ctx->m2m_ctx) | |
904 | goto isr_unlock; | |
905 | ||
906 | spin_unlock(&gsc->slock); | |
907 | gsc_m2m_job_finish(ctx, VB2_BUF_STATE_DONE); | |
908 | ||
909 | /* wake_up job_abort, stop_streaming */ | |
910 | if (ctx->state & GSC_CTX_STOP_REQ) { | |
911 | ctx->state &= ~GSC_CTX_STOP_REQ; | |
912 | wake_up(&gsc->irq_queue); | |
913 | } | |
914 | return IRQ_HANDLED; | |
915 | } | |
916 | ||
917 | isr_unlock: | |
918 | spin_unlock(&gsc->slock); | |
919 | return IRQ_HANDLED; | |
920 | } | |
921 | ||
922 | static struct gsc_pix_max gsc_v_100_max = { | |
923 | .org_scaler_bypass_w = 8192, | |
924 | .org_scaler_bypass_h = 8192, | |
925 | .org_scaler_input_w = 4800, | |
926 | .org_scaler_input_h = 3344, | |
927 | .real_rot_dis_w = 4800, | |
928 | .real_rot_dis_h = 3344, | |
929 | .real_rot_en_w = 2047, | |
930 | .real_rot_en_h = 2047, | |
931 | .target_rot_dis_w = 4800, | |
932 | .target_rot_dis_h = 3344, | |
933 | .target_rot_en_w = 2016, | |
934 | .target_rot_en_h = 2016, | |
935 | }; | |
936 | ||
937 | static struct gsc_pix_min gsc_v_100_min = { | |
938 | .org_w = 64, | |
939 | .org_h = 32, | |
940 | .real_w = 64, | |
941 | .real_h = 32, | |
942 | .target_rot_dis_w = 64, | |
943 | .target_rot_dis_h = 32, | |
944 | .target_rot_en_w = 32, | |
945 | .target_rot_en_h = 16, | |
946 | }; | |
947 | ||
948 | static struct gsc_pix_align gsc_v_100_align = { | |
949 | .org_h = 16, | |
950 | .org_w = 16, /* yuv420 : 16, others : 8 */ | |
951 | .offset_h = 2, /* yuv420/422 : 2, others : 1 */ | |
952 | .real_w = 16, /* yuv420/422 : 4~16, others : 2~8 */ | |
953 | .real_h = 16, /* yuv420 : 4~16, others : 1 */ | |
954 | .target_w = 2, /* yuv420/422 : 2, others : 1 */ | |
955 | .target_h = 2, /* yuv420 : 2, others : 1 */ | |
956 | }; | |
957 | ||
958 | static struct gsc_variant gsc_v_100_variant = { | |
959 | .pix_max = &gsc_v_100_max, | |
960 | .pix_min = &gsc_v_100_min, | |
961 | .pix_align = &gsc_v_100_align, | |
1b590133 SAB |
962 | .in_buf_cnt = 32, |
963 | .out_buf_cnt = 32, | |
89069699 SK |
964 | .sc_up_max = 8, |
965 | .sc_down_max = 16, | |
966 | .poly_sc_down_max = 4, | |
967 | .pre_sc_down_max = 4, | |
968 | .local_sc_down = 2, | |
969 | }; | |
970 | ||
971 | static struct gsc_driverdata gsc_v_100_drvdata = { | |
972 | .variant = { | |
973 | [0] = &gsc_v_100_variant, | |
974 | [1] = &gsc_v_100_variant, | |
975 | [2] = &gsc_v_100_variant, | |
976 | [3] = &gsc_v_100_variant, | |
977 | }, | |
978 | .num_entities = 4, | |
92955ea0 MS |
979 | .clk_names = { "gscl" }, |
980 | .num_clocks = 1, | |
981 | }; | |
982 | ||
983 | static struct gsc_driverdata gsc_5433_drvdata = { | |
984 | .variant = { | |
985 | [0] = &gsc_v_100_variant, | |
986 | [1] = &gsc_v_100_variant, | |
987 | [2] = &gsc_v_100_variant, | |
988 | }, | |
989 | .num_entities = 3, | |
990 | .clk_names = { "pclk", "aclk", "aclk_xiu", "aclk_gsclbend" }, | |
991 | .num_clocks = 4, | |
89069699 SK |
992 | }; |
993 | ||
89069699 | 994 | static const struct of_device_id exynos_gsc_match[] = { |
84035438 SAB |
995 | { |
996 | .compatible = "samsung,exynos5-gsc", | |
997 | .data = &gsc_v_100_drvdata, | |
998 | }, | |
92955ea0 MS |
999 | { |
1000 | .compatible = "samsung,exynos5433-gsc", | |
1001 | .data = &gsc_5433_drvdata, | |
1002 | }, | |
89069699 SK |
1003 | {}, |
1004 | }; | |
1005 | MODULE_DEVICE_TABLE(of, exynos_gsc_match); | |
1006 | ||
89069699 SK |
1007 | static int gsc_probe(struct platform_device *pdev) |
1008 | { | |
1009 | struct gsc_dev *gsc; | |
1010 | struct resource *res; | |
89069699 | 1011 | struct device *dev = &pdev->dev; |
aa7929f5 | 1012 | const struct gsc_driverdata *drv_data = of_device_get_match_data(dev); |
aff093d4 | 1013 | int ret; |
92955ea0 | 1014 | int i; |
89069699 SK |
1015 | |
1016 | gsc = devm_kzalloc(dev, sizeof(struct gsc_dev), GFP_KERNEL); | |
1017 | if (!gsc) | |
1018 | return -ENOMEM; | |
1019 | ||
aff093d4 AB |
1020 | ret = of_alias_get_id(pdev->dev.of_node, "gsc"); |
1021 | if (ret < 0) | |
1022 | return ret; | |
1023 | ||
1024 | gsc->id = ret; | |
26a7ed9c | 1025 | if (gsc->id >= drv_data->num_entities) { |
89069699 SK |
1026 | dev_err(dev, "Invalid platform device id: %d\n", gsc->id); |
1027 | return -EINVAL; | |
1028 | } | |
1029 | ||
92955ea0 | 1030 | gsc->num_clocks = drv_data->num_clocks; |
89069699 SK |
1031 | gsc->variant = drv_data->variant[gsc->id]; |
1032 | gsc->pdev = pdev; | |
89069699 SK |
1033 | |
1034 | init_waitqueue_head(&gsc->irq_queue); | |
1035 | spin_lock_init(&gsc->slock); | |
1036 | mutex_init(&gsc->lock); | |
1037 | ||
1038 | res = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
f23999ec TR |
1039 | gsc->regs = devm_ioremap_resource(dev, res); |
1040 | if (IS_ERR(gsc->regs)) | |
1041 | return PTR_ERR(gsc->regs); | |
89069699 SK |
1042 | |
1043 | res = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
1044 | if (!res) { | |
1045 | dev_err(dev, "failed to get IRQ resource\n"); | |
1046 | return -ENXIO; | |
1047 | } | |
1048 | ||
92955ea0 MS |
1049 | for (i = 0; i < gsc->num_clocks; i++) { |
1050 | gsc->clock[i] = devm_clk_get(dev, drv_data->clk_names[i]); | |
1051 | if (IS_ERR(gsc->clock[i])) { | |
1052 | dev_err(dev, "failed to get clock: %s\n", | |
1053 | drv_data->clk_names[i]); | |
1054 | return PTR_ERR(gsc->clock[i]); | |
1055 | } | |
d83db904 UH |
1056 | } |
1057 | ||
92955ea0 MS |
1058 | for (i = 0; i < gsc->num_clocks; i++) { |
1059 | ret = clk_prepare_enable(gsc->clock[i]); | |
1060 | if (ret) { | |
1061 | dev_err(dev, "clock prepare failed for clock: %s\n", | |
1062 | drv_data->clk_names[i]); | |
1063 | while (--i >= 0) | |
1064 | clk_disable_unprepare(gsc->clock[i]); | |
1065 | return ret; | |
1066 | } | |
d83db904 | 1067 | } |
89069699 SK |
1068 | |
1069 | ret = devm_request_irq(dev, res->start, gsc_irq_handler, | |
1070 | 0, pdev->name, gsc); | |
1071 | if (ret) { | |
1072 | dev_err(dev, "failed to install irq (%d)\n", ret); | |
1073 | goto err_clk; | |
1074 | } | |
1075 | ||
d0b1c313 | 1076 | ret = v4l2_device_register(dev, &gsc->v4l2_dev); |
89069699 SK |
1077 | if (ret) |
1078 | goto err_clk; | |
1079 | ||
d0b1c313 AK |
1080 | ret = gsc_register_m2m_device(gsc); |
1081 | if (ret) | |
1082 | goto err_v4l2; | |
1083 | ||
89069699 | 1084 | platform_set_drvdata(pdev, gsc); |
15f90ab5 UH |
1085 | |
1086 | gsc_hw_set_sw_reset(gsc); | |
1087 | gsc_wait_reset(gsc); | |
89069699 | 1088 | |
712b617e | 1089 | vb2_dma_contig_set_max_seg_size(dev, DMA_BIT_MASK(32)); |
89069699 SK |
1090 | |
1091 | dev_dbg(dev, "gsc-%d registered successfully\n", gsc->id); | |
1092 | ||
15f90ab5 UH |
1093 | pm_runtime_set_active(dev); |
1094 | pm_runtime_enable(dev); | |
1095 | ||
89069699 | 1096 | return 0; |
c781e4a5 | 1097 | |
d0b1c313 AK |
1098 | err_v4l2: |
1099 | v4l2_device_unregister(&gsc->v4l2_dev); | |
89069699 | 1100 | err_clk: |
92955ea0 MS |
1101 | for (i = gsc->num_clocks - 1; i >= 0; i--) |
1102 | clk_disable_unprepare(gsc->clock[i]); | |
89069699 SK |
1103 | return ret; |
1104 | } | |
1105 | ||
4c62e976 | 1106 | static int gsc_remove(struct platform_device *pdev) |
89069699 SK |
1107 | { |
1108 | struct gsc_dev *gsc = platform_get_drvdata(pdev); | |
92955ea0 | 1109 | int i; |
89069699 | 1110 | |
a006c04e UH |
1111 | pm_runtime_get_sync(&pdev->dev); |
1112 | ||
89069699 | 1113 | gsc_unregister_m2m_device(gsc); |
d0b1c313 | 1114 | v4l2_device_unregister(&gsc->v4l2_dev); |
89069699 | 1115 | |
712b617e | 1116 | vb2_dma_contig_clear_max_seg_size(&pdev->dev); |
92955ea0 MS |
1117 | for (i = 0; i < gsc->num_clocks; i++) |
1118 | clk_disable_unprepare(gsc->clock[i]); | |
a006c04e UH |
1119 | |
1120 | pm_runtime_put_noidle(&pdev->dev); | |
cb610c8f | 1121 | pm_runtime_disable(&pdev->dev); |
89069699 SK |
1122 | |
1123 | dev_dbg(&pdev->dev, "%s driver unloaded\n", pdev->name); | |
1124 | return 0; | |
1125 | } | |
1126 | ||
81aa8d14 UH |
1127 | #ifdef CONFIG_PM |
1128 | static int gsc_m2m_suspend(struct gsc_dev *gsc) | |
1129 | { | |
1130 | unsigned long flags; | |
1131 | int timeout; | |
1132 | ||
1133 | spin_lock_irqsave(&gsc->slock, flags); | |
1134 | if (!gsc_m2m_pending(gsc)) { | |
1135 | spin_unlock_irqrestore(&gsc->slock, flags); | |
1136 | return 0; | |
1137 | } | |
1138 | clear_bit(ST_M2M_SUSPENDED, &gsc->state); | |
1139 | set_bit(ST_M2M_SUSPENDING, &gsc->state); | |
1140 | spin_unlock_irqrestore(&gsc->slock, flags); | |
1141 | ||
1142 | timeout = wait_event_timeout(gsc->irq_queue, | |
1143 | test_bit(ST_M2M_SUSPENDED, &gsc->state), | |
1144 | GSC_SHUTDOWN_TIMEOUT); | |
1145 | ||
1146 | clear_bit(ST_M2M_SUSPENDING, &gsc->state); | |
1147 | return timeout == 0 ? -EAGAIN : 0; | |
1148 | } | |
1149 | ||
1150 | static void gsc_m2m_resume(struct gsc_dev *gsc) | |
1151 | { | |
1152 | struct gsc_ctx *ctx; | |
1153 | unsigned long flags; | |
1154 | ||
1155 | spin_lock_irqsave(&gsc->slock, flags); | |
1156 | /* Clear for full H/W setup in first run after resume */ | |
1157 | ctx = gsc->m2m.ctx; | |
1158 | gsc->m2m.ctx = NULL; | |
1159 | spin_unlock_irqrestore(&gsc->slock, flags); | |
1160 | ||
1161 | if (test_and_clear_bit(ST_M2M_SUSPENDED, &gsc->state)) | |
1162 | gsc_m2m_job_finish(ctx, VB2_BUF_STATE_ERROR); | |
1163 | } | |
1164 | ||
89069699 SK |
1165 | static int gsc_runtime_resume(struct device *dev) |
1166 | { | |
1167 | struct gsc_dev *gsc = dev_get_drvdata(dev); | |
1168 | int ret = 0; | |
92955ea0 | 1169 | int i; |
89069699 | 1170 | |
e0f01399 | 1171 | pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state); |
89069699 | 1172 | |
92955ea0 MS |
1173 | for (i = 0; i < gsc->num_clocks; i++) { |
1174 | ret = clk_prepare_enable(gsc->clock[i]); | |
1175 | if (ret) { | |
1176 | while (--i >= 0) | |
1177 | clk_disable_unprepare(gsc->clock[i]); | |
1178 | return ret; | |
1179 | } | |
1180 | } | |
89069699 SK |
1181 | |
1182 | gsc_hw_set_sw_reset(gsc); | |
1183 | gsc_wait_reset(gsc); | |
f9fd6ee6 | 1184 | gsc_m2m_resume(gsc); |
89069699 | 1185 | |
f9fd6ee6 | 1186 | return 0; |
89069699 SK |
1187 | } |
1188 | ||
1189 | static int gsc_runtime_suspend(struct device *dev) | |
1190 | { | |
1191 | struct gsc_dev *gsc = dev_get_drvdata(dev); | |
1192 | int ret = 0; | |
92955ea0 | 1193 | int i; |
89069699 SK |
1194 | |
1195 | ret = gsc_m2m_suspend(gsc); | |
92955ea0 MS |
1196 | if (ret) |
1197 | return ret; | |
1198 | ||
1199 | for (i = gsc->num_clocks - 1; i >= 0; i--) | |
1200 | clk_disable_unprepare(gsc->clock[i]); | |
89069699 | 1201 | |
e0f01399 | 1202 | pr_debug("gsc%d: state: 0x%lx\n", gsc->id, gsc->state); |
89069699 SK |
1203 | return ret; |
1204 | } | |
81aa8d14 | 1205 | #endif |
89069699 | 1206 | |
89069699 | 1207 | static const struct dev_pm_ops gsc_pm_ops = { |
8098f9ca MS |
1208 | SET_SYSTEM_SLEEP_PM_OPS(pm_runtime_force_suspend, |
1209 | pm_runtime_force_resume) | |
81aa8d14 | 1210 | SET_RUNTIME_PM_OPS(gsc_runtime_suspend, gsc_runtime_resume, NULL) |
89069699 SK |
1211 | }; |
1212 | ||
1213 | static struct platform_driver gsc_driver = { | |
1214 | .probe = gsc_probe, | |
4c62e976 | 1215 | .remove = gsc_remove, |
89069699 SK |
1216 | .driver = { |
1217 | .name = GSC_MODULE_NAME, | |
89069699 SK |
1218 | .pm = &gsc_pm_ops, |
1219 | .of_match_table = exynos_gsc_match, | |
1220 | } | |
1221 | }; | |
1222 | ||
1223 | module_platform_driver(gsc_driver); | |
1224 | ||
1225 | MODULE_AUTHOR("Hyunwong Kim <khw0178.kim@samsung.com>"); | |
1226 | MODULE_DESCRIPTION("Samsung EXYNOS5 Soc series G-Scaler driver"); | |
1227 | MODULE_LICENSE("GPL"); |